JP4848740B2 - Power converter control method - Google Patents

Description

  The present invention relates to a method for controlling a power converter.

Conventionally, a configuration in which a motor is driven with high efficiency using a fuel cell as a main power source is disclosed in Japanese Patent Application Laid-Open No. 2002-118981 (see Patent Document 1). FIG. 1 shows this configuration, in which a battery is connected in parallel with a fuel cell via a DCDC converter, and the output voltage of the DCDC converter is controlled to improve the output efficiency of the power supply. Yes. As an improvement of this prior art, the present applicant can reduce and reduce the overall volume and loss by not using a DCDC converter but using and distributing multiple power sources, not limited to a combination of a fuel cell and a battery. Is developing a control method for a simple power converter (Japanese Patent Application No. 2004200545). Furthermore, a control method for securing a route from the motor to the power source has been developed (Japanese Patent Application No. 2004-354155).
Japanese Patent Laying-Open No. 2002-118981 (paragraphs 0004-0006, FIG. 1)

However, since the DCDC converter is used in the above-described configuration, the volume of the entire system including the power source, the power conversion device, and the motor increases, and the battery passes through the DCDC converter in order to charge and discharge the battery. Loss. In addition, in the above-mentioned prior application (Japanese Patent Application No. 2004-354155) of the present applicant, a control method for securing a path from the motor to the power source is shown, but the operation method for stopping the power converter is also described. Was not considered. Also, there are a plurality of paths from the motor to the power source, but no consideration has been given to a method for securing a path when any of them fails.
Therefore, the present invention provides a method for controlling a power converter that can further reduce the overall volume and loss by using and distributing a plurality of power sources, not limited to a combination of a fuel cell and a battery, without using a DCDC converter. An object of the present invention is to provide a control method that can be stopped without generating an unnecessary surge voltage or the like when the operation of the power converter is stopped.

In order to solve the above-described problems, a method for controlling a power conversion device according to the present invention includes:
A power converter for driving a load (such as an AC motor), which is connected to a plurality of DC power supplies, and generates and synthesizes pulses from the output voltages of each of these DC power supplies. A method for controlling a power converter that generates a drive voltage, comprising:
The power converter is
A first switch for connecting and disconnecting power from the first DC power supply to the multiphase motor in a first energization path formed between the positive electrode of the first DC power supply and each phase of the multiphase motor;
A second switch for connecting / disconnecting energization from the multiphase motor to the first DC power source on the first energization path;
A third switch for connecting / disconnecting power from the second DC power supply to the multiphase motor in a second energization path formed between the positive electrode of the second DC power supply and each phase of the multiphase motor;
A fourth switch for connecting / disconnecting energization from the multiphase motor to the second DC power source on the second energization path;
The first DC power source and the second DC power source from the multi-phase motor in a third energization path formed between the negative electrode of the first DC power source and the second DC power source and each phase of the multi-phase motor. A fifth switch for connecting / disconnecting power to / from
With
When the first switch is on, turn off the fourth switch and the fifth switch;
When the third switch is on, turn off the second switch and the fifth switch;
Turning off the first switch and the third switch when the power converter is stopped , and turning on at least one of the second switch, the fourth switch, and the fifth switch;
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
From the operation / stop determination signal of the power conversion device and the on / off signals of the first to fifth switches (which turn on / off the path between each DC power source and the load), the first to fifth of the switches, the first switch and the third off switch to Rutotomoni, the second switch, the fourth switch, turn on the at least one switch of said fifth switch,
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
A failure detection means for outputting a failure detection signal at the time of failure of the power converter,
Of the first to fifth switches, the first switch and the third switch are turned off from the failure detection signal output from the failure detection means and the on / off signals of the first to fifth switches. be Rutotomoni, the second switch, the fourth switch, you turn on the at least one switch of said fifth switch,
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
Among from the first fifth switch, the second switch, turn on the at least one switch of said fourth switch,
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
Among from the first fifth switch, the fifth on the switch to Rutotomoni, the first switch, turn off the third switch,
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
Among from the first fifth switch, the second switch, and at least one of said fourth switch, you turn on the fifth switch,
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
Wherein the first based on a state of each of the fifth switch, one from the first fifth switches to make on the second switch, the fourth switch and the fifth switch, either switch ,
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
A reflux switch failure detection means for outputting a reflux switch failure detection signal when the second switch or the fourth switch among the first to fifth switches fails;
Wherein based on the reflux switch failure detection signal outputted from the reflux switch failure detecting means, among from the first to the fifth switch, turn on the fifth switch,
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
The second switch, at least one of the fourth switch, switch on the path to the positive electrode of the largest DC power charging capacity among the DC power source,
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
Of the first to fifth switches, the second switch and the fourth switch are semiconductor switches, and the semiconductor switches are turned on by turning off the drive power of these semiconductor switches (that is, the drive power is When off (normal state), these semiconductor switches are on)
It is characterized by that.

Moreover, the control method of the power converter device by the other aspect of this invention is as follows.
The on / off determination of the first to fifth switches is performed using a logical operation (specifically, for example, a circuit configured by a logic circuit is used).
It is characterized by that.
As described above, the solution of the present invention has been described as a method. However, the present invention can be realized as a device, a program, and a storage medium storing the program substantially corresponding to these, and the scope of the present invention. It should be understood that these are also included.

With the power converter of the present invention, it is possible to manipulate the power distribution of a plurality of DC power supplies, and without using a DCDC converter that adjusts the DC voltage as disclosed in JP-A-2002-118981, Electric power can be distributed and controlled. As a result, the entire apparatus can be reduced in size and efficiency. Further, according to the present invention, when the power converter is stopped, even if a current flows from the motor to the power source, a path through which the current flows can be secured, so that it is not necessary to generate a surge voltage in each switch. . Therefore, it is possible to use an inexpensive low withstand voltage element instead of a high withstand voltage switching element against a surge voltage, and it is possible to configure a power converter without providing a device for absorbing and consuming surge energy. . For this reason, it becomes possible to provide a small-sized and low-cost power converter.

According to another aspect of the present invention , it is possible to secure a path through which the current flows even when a current flows from the motor to the power source when the power converter is stopped based on the signal for determining the stop. Therefore, the power converter can be stopped without generating a surge voltage in each switch. Therefore, it is possible to use an inexpensive low withstand voltage element instead of a high withstand voltage switching element against a surge voltage, and it is possible to configure a power converter without providing a device for absorbing and consuming surge energy. . For this reason, it becomes possible to provide a small-sized and low-cost power converter.

In addition, according to another aspect of the present invention , it is possible to secure a path through which a current flows even if a current flows from the motor to the power source when the power converter is stopped based on a signal for determining a failure. Therefore, the power converter can be stopped without generating a surge voltage in each switch. Therefore, it is possible to use an inexpensive low withstand voltage element instead of a high withstand voltage switching element against a surge voltage, and it is possible to configure a power converter without providing a device for absorbing and consuming surge energy. . For this reason, it becomes possible to provide a small-sized and low-cost power converter.

According to another aspect of the present invention , even when a current flows from the motor to the power source by turning on at least one of the second switch and the fourth switch at the time of stop, the current flows. Can be secured.

In addition, according to another aspect of the present invention , when the current is flowing from the motor to the power source by turning on the fifth switch at the time of stop, a path through which the current flows can be secured.

According to another aspect of the invention, at the time of stop, the second switch, and at least one fourth switch, by turning on both the fifth switch by some failure or delay, to turn on one of the switches Even if this is not possible, the remaining switch is turned on, so that a path through which current flows from the motor to the power source can be secured.

According to another aspect of the present invention , a path for flowing a current in the direction of the power from the motor can be secured by turning on any of the second switch, the fourth switch, and the fifth switch at the time of stop.

Further, according to another aspect of the present invention, even when the second switch and the fourth switch fail and cannot be turned on at the time of stop, the power supply negative electrode is connected from the load based on the return switch failure detection signal. By turning on the switch of the path to, a path for flowing current in the direction from the motor to the power source can be secured.

In addition, according to another aspect of the present invention , by preferentially securing a path for charging a power source having a large charge capacity, it is possible to suppress an increase in voltage of the smoothing capacitor connected in parallel to the direct current due to the motor current. . As a result, it is not necessary to use a capacitor having a high withstand voltage, so that the manufacturing cost of the power converter can be suppressed.

According to another aspect of the present invention , when the semiconductor switch drive circuit power supply is turned off, the semiconductor switch that is turned on is used for the second switch and the fourth switch. In addition, it is possible to secure a path through which the motor current flows, and it is possible to avoid generating a surge voltage in each switch. For this reason, the power converter can be safely stopped even in the case of a failure / abnormality such as an overcurrent or overvoltage of the power converter.

Further, according to another aspect of the present invention , the control method at the time of stoppage is a circuit configuration using a logic circuit, so that it is possible to reduce the time delay required for the operation and process the switch on / off signal. It is.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
First Embodiment FIG. 3 shows a circuit diagram of a power converter in this embodiment. A negative electrode of the first power supply 10a and a negative electrode of the second power supply 10b constituting the power supply 10 are connected to the common negative electrode bus 15. Between the common negative electrode bus 15 and each phase terminal of the motor (load) 20, a pair of semiconductor switches 107a, 108a, 109a and diodes 107b, 108b, 109b is provided in the same manner as a generally known lower arm of an inverter. Connected. The positive electrode bus 14 of the power supply 10a and each phase terminal of the motor 20 are connected by semiconductor switches 101a / 101b, 102a / 102b, 103a / 103b, respectively, capable of controlling bidirectional conduction. Further, semiconductor switches 104a / 104b, 105a / 105b, and 106a / 106b that can control bidirectional conduction are also connected between the positive electrode bus 16 of the power supply 10b and each phase terminal of the motor 20. A smoothing capacitor 12 is provided between the positive electrode bus 14 and the common negative electrode bus 15 of the power source 10a, and a smoothing capacitor 13 is also provided between the positive electrode bus 16 and the common negative electrode bus 15 of the power source 10b.

  The power converter 30 is a DC-AC power converter that generates a voltage to be applied to the motor based on the above three potentials, the common negative electrode bus, the positive electrode bus of the power source 10a, and the positive electrode bus of the power source 10b. A semiconductor switch provided in each phase is a switch means for generating a voltage to be output to each phase of the AC motor, and is connected alternatively from these potentials, and the proportion of the connection time is changed. Then, the necessary voltage is supplied to the motor.

  The configuration of the control device 40 will be described with reference to FIG. Reference numeral 41 denotes torque control means for calculating a d-axis current command value id * and a q-axis current command value iq * of the AC motor from a torque command Te * and a motor rotation speed ω given from the outside. In 41, reference is made to a map with Te * and ω as axes, and id * and iq * are output. Reference numeral 42 denotes current control means for performing current control for matching the d-axis current command value id * and q-axis current command value iq * with the d-axis current value id and q-axis current value iq. By this control, voltage command values vu *, vv *, vw * for each phase of the three-phase AC are output.

Details of the current control means 42 will be described with reference to FIG. The current control unit 201 performs feedback control by PI control so that id and iq follow id * and iq *, respectively, and outputs a d-axis voltage command value vd * and a q-axis voltage command value vq *. id and iq are obtained from the U-phase current iu and the V-phase current iv by the three-phase / dq conversion means 48. The dq / 3-phase converter 202 is dq / 3-phase voltage conversion means for converting the dq-axis voltage into a three-phase voltage command, and receives the dq-axis voltage command values vd * and vq * as inputs, and the U-phase voltage command value vu. *, V phase voltage command value vv *, W phase voltage command value vw * are output. In the power control / modulation rate calculation 45, power control is performed using distribution target values (rto_pa, rto_pb) of power supplied from the power supplies 10a and b. The power distribution target value means the ratio of power between the power supply 10a and the power supply 10b when the correction voltage values vd_0 * and vq_0 * are 0. The power distribution target values rto_pa and rto_pb have the following relationship: .
rto_pa + rto_pb = 1
For this reason, if one power distribution target value is obtained, the other power distribution target value can be obtained from the above relationship. In FIG. 2, only rto_pa is shown as an input of the means 45, and rto_pb is calculated based on the above equation by calculation inside the means 45.

Details of the power control / modulation rate calculation 45 will be described with reference to FIG. The multiplier 203 multiplies vu *, vv *, and vw * by rto_pa to calculate the voltage command values vu_a, vv_a, and vw_a on the power supply 10a side (hereinafter, a voltage command generated from the power supply 10a is calculated). The power supply 10a voltage command and the voltage command generated from the power supply 10b are referred to as the power supply 10b voltage command).
vu_a = vu * ・ rto_pa
vv_a = vv * ・ rto_pa
vw_a = vw * ・ rto_pa
On the other hand, the voltage command value on the power supply 10b side is obtained from the voltage command values vu *, vv *, vw * obtained from the control voltage of the motor current control, and the voltage command value values vu_a *, vv_a *, vw_a * on the power supply 10a side. Is subtracted by the subtractor 204.
vu_b * = vu *-vu_a *
vv_b * = vv *-vv_a *
vw_b * = vw *-vw_a *
The following description of the modulation factor calculation and PWM pulse generation is performed only for the U phase, but the same operation is performed for the V phase and the W phase.

Modulation rate calculation means 45
9 inputs the voltage Vdc_a of the power source 10a and the voltage Vdc_b of the power source 10b, respectively, and instantaneous modulation rate commands mu_a *, mu_b *, mv_a *, mv_b *, which are standardized voltage commands, respectively. Modulation rate calculation means for generating mw_a * and mw_b *. A dotted line portion 45 in FIG. 9 is a modulation factor calculation means, and is constituted by multipliers 205 and 206. Here, the U-phase power supply 10a divided voltage command vu_a * and the power supply 10b divided voltage command vu_b * are normalized by half the value of each DC voltage, so that the power supply 10a instantaneous modulation rate command mu_a * and the power supply 10b instantaneous A modulation factor command mu_b * is obtained.
mu_a * = vu_a * / (Vdc_a / 2)
mu_b * = vu_b * / (Vdc_b / 2)

Modulation rate correction means 46
A dotted line portion 46 in FIG. 9 is a modulation rate correction means. In this modulation rate correction means, in order to output the obtained modulation rate, the final modulation rate command value is calculated by allocating the time width of the PWM cycle and multiplying by the correction gain. First, the modulation factor offset calculator 211 calculates the next modulation factor offsets ma_offset0 and mb_offset0 from the power supply voltages Vdc_a and Vdc_b and rto_pa. Here, rto_pb is calculated based on the above formula.

The obtained modulation factor offsets ma_offset0 and mb_offset0 are added by the adders 209 and 210 to the instantaneous modulation factor command mu_a * for the power supply 10a and the instantaneous modulation factor command mu_b * for the power supply 10b, respectively. For the power supply 10a, the final modulation factor command mu_a_c * is obtained by multiplying the correction gain. For the power supply 10b, the modulation rate command mu_b_c * is obtained from the above addition. This is expressed as follows.
mu_a_c * = (mu_a * + ma_offset *) ・ Gcmp_u_a (multiply by correction gain)
mu_b_c * = mu_b * + mb_offset *

PWM pulse generation means 47
In FIG. 4, a power supply 10a carrier is a triangular wave carrier for generating a PWM pulse for driving each switch in order to output a voltage pulse from the voltage Vdc_a of the power supply 10a. Similarly, a triangular wave carrier is used as the power supply 10b carrier. Is provided. These two triangular wave carriers have values of an upper limit of +1 and a lower limit of -1, and have a phase difference of 180 degrees. Here, the signals for driving the U-phase switches are set as follows based on FIG.
A: Switch drive signal conducting from the power supply 10a to the output terminal B: Switch drive signal conducting from the output terminal to the negative electrode C: Switch drive signal conducting from the output terminal to the power supply 10a D: Power supply Switch drive signal conducting from 10b to output terminal E: Switch drive signal conducting from output terminal to power supply 10b

  First, a pulse generation method when a voltage pulse is output from the power supply 10a will be described. When outputting a PWM pulse from the power supply 10a, it is necessary to turn on A. When there is a potential difference between the positive electrode and the positive electrode and Vdc_a> Vdc_b, when both A and E are turned on, a current that short-circuits between the positive electrodes flows. For example, when A is switched from on to off at the same time and E is switched from off to on, it takes time for A to completely turn off. A short-circuit current flows, and the amount of heat generated by the semiconductor switch installed in this path increases. In order to prevent such an increase in heat generation, A and E are switched from OFF to ON after a time during which both the drive signals A and E are turned off. In this way, pulse generation is performed by adding a short-circuit prevention time (dead time) to the drive signal. Similar to adding dead time to the drive signals of A and E, dead time is added to E and C, and in order to prevent a short circuit between the positive and negative electrodes, dead to A and B and E and B. Add time.

A method for adding dead time to the A and E drive signals will be described below with reference to FIG. In order to generate a drive signal with a dead time added, mu_a_c_up * and mu_a_c_down * offset from the mu_a_c * by the dead time are obtained as follows.
mu_a_c_up * = mu_a_c * + Hd
mu_a_c_down * = mu_a_c * − Hd
Here, Hd is obtained from the amplitude of the triangular wave (from the base to the apex) Htr, the period Ttr, and the dead time Td as follows.
Hd = 2Td · Htr / Ttr
The carrier and mu_a_c *, mu_a_c_up *, mu_a_c_down * are compared, and the drive signals for the A and E switches are obtained according to the following rules.
If mu_a_c_down * ≥ carrier for power supply 10a, A = on mu_a_c * ≤ A for carrier for power supply 10a, A = off mu_a_c * ≥ For carrier for power supply 10a, E = off mu = a_c_up * ≤ carrier for power supply 10a, E = on In addition, by generating the drive signal, a dead time of Td can be provided between A and E, and a short circuit between the positive electrodes can be prevented.

The pulse generation method for outputting voltage pulses from the power supply 10b is the same as that of the power supply 10a, and the following mu_b_c_up * and mu_b_c_down * are obtained and compared with the carrier for the power supply 10b (FIG. 7).
mu_b_c_up * = mu_b_c * + Hd
mu_b_c_down * = mu_b_c * − Hd
The drive signals for the D and C switches are obtained according to the following rules.
If mu_b_c_down * ≥ carrier for power supply 10b, D = on mu_b_c * ≤ D if carrier for power supply 10b D = off mu = b_c * ≥ If carrier for power supply 10b C = off mu = b_c_up * ≤ carrier for power supply 10b C = on Thus, a dead time of Td can also be provided between D and C, and a short circuit between the positive electrodes can be prevented.

The drive signal B is generated from the AND of the generated drive signal E and drive signal C.
B = E ・ C
E is a drive signal with a dead time added to A, and C is a drive signal with a dead time added to D. For this reason, by generating B from the AND (logical product) of E and C, dead time can be generated for B and A and B and E as well. An example of pulse generation with a dead time added is shown in FIG. Based on the PWM pulse generated in this way, each switch of the power converter is driven on and off to generate an output voltage pulse. Taking the average of the voltage pulse generated from the voltage Vdc_a of the power supply 10a and the voltage pulse generated from the voltage Vdc_b of the power supply 10b for each period, the original three-phase voltage command values vu *, vv *, vw * Thus, a voltage pulse that realizes is generated. The power converter 30 driven in this way is capable of operating the power distribution between the power supply 10a and the power supply 10b, and adjusts the DC voltage as disclosed in Japanese Patent Laid-Open No. 2002-118981. Power supply power can be distributed and controlled without using a DCDC converter. As a result, the entire apparatus can be reduced in size and efficiency.

  Considering when the power converter 30 is operated / stopped, the drive signal of each switch generated as described above is subjected to a logical operation with the pwm_enable signal, which is an operation / stop determination signal, and the resulting signal is obtained. Replace with the drive signal of each switch. Here, the pwm_enable signal corresponds to the operation / stop determination signal in the second invention. FIG. 11 is a diagram showing the configuration of the control system according to the present invention. As shown in the figure, a drive signal processing circuit 49 is configured at the subsequent stage of the PWM pulse generating means 47 in order to perform such drive signal processing. To do.

Drive signal processing circuit (means) 49
The detailed configuration of the drive signal processing circuit 49 will be described with reference to FIG. 12 for signal processing for the U phase only, as described above. Similar signal processing circuits are configured for the other phases. FIG. 12 shows a signal processing circuit for this drive signal, which is a logic circuit that receives the drive signal of each switch A, B, C, D, E and the pwm_enable signal as input and outputs the drive signal for each switch. . Before performing the logical operation with the pwm_enable signal, the B drive signal, the logically inverted signal through the NOT circuit 401, and the A and D drive signals are ANDed by AND circuits 402 and 403, respectively, and Ao, Do is output. As a result, it is possible to prevent output of drive signals in which A and B are simultaneously turned on and D and B are simultaneously turned on, and a short circuit between the electrodes can be prevented.

  When the E drive signal and the C drive signal are both OFF and L (low), the output of the NOR circuit 404 is H (high). When this and the original drive signal E are passed through the OR circuit 406, the signal Eo output from the 406 becomes H. Similarly, the drive signal of C also passes through the OR circuit 405, so that the output Co of 405 becomes H. That is, by passing a signal through this circuit, when both E and C are off signals, it is possible to secure a current path from the motor to the power source by turning on E and C.

  The pwm_enable signal is H when the power converter is in operation and L when it is stopped. For example, in the case of an electric vehicle, this signal is obtained as a driving H signal from the circuit of the key when the driver inputs the key into the ignition position of a normal engine vehicle. When the other position or key is removed, a stop L signal is output.

  A logical product of this pwm_enable signal and each of Ao, Do, and Bo is calculated by ANDs 407, 408, and 409, and drive signals A, D, and B are output. By this logical operation, when the pwm_enable signal is L, the drive signals for the A, D, and B switches are L, and power supply from the power supply to the load can be stopped. Further, the logical sum of Co, Eo and the signal obtained by inverting the pwm_enable signal with NOT 410 is calculated with OR 411, 412 to output drive signals C and E. By this logical operation, the pwm_enable signal is L, that is, when the power converter stop signal is received, the drive signals of C and E are both H, and C and E are turned on.

  If a stop signal is received and all the switches are turned off, a surge voltage is generated in each switch due to the current and inductance of the motor. When such a surge voltage is generated, a switching element having a high withstand voltage or a snubber capacitor that absorbs the energy of the surge must be provided. Lead to cost and cost increase. In order to solve these problems, it is assumed that when the pwm_enable signal and the drive signal of the present invention are processed, a current flows from the motor to the power source when the power converter is stopped in response to the stop signal. However, since a path through which the current flows can be secured, it is not necessary to generate a surge voltage in each switch. Therefore, it is possible to use an inexpensive low-voltage element instead of a high-voltage switching element for a surge that occurs when all switches are turned off, and a power converter without providing a device for absorbing and consuming surge energy Can be configured. For this reason, it becomes possible to provide a small-sized and low-cost power converter.

Second Embodiment In the second embodiment, only the difference from the first embodiment is shown. FIG. 13 shows the details of the drive signal processing circuit 49, as in FIG. 12, and shows the signal processing circuit of the drive signal in the second embodiment. This circuit has a configuration in which a logic circuit of the output of the circuit of the first embodiment and a fail # stop signal is added. The fail # stop signal is a signal output from the failure detector 501 of FIG. 14, and normally takes H, and is set to L when the power converter or load fails or is abnormal. Failure detector 501 detects the output current of the power converter with current sensors 502 and 503, compares the current value with a preset current limit value, and if a current value exceeding the current limit value is detected The fail # stop signal is output as L.

  Also, the input voltage of the power converter is detected by voltage sensors 504 and 505, and the voltage value is compared with a preset voltage limit value. If a voltage value exceeding the voltage limit value is detected, fail_stop The signal is output as L. As described above, when the failure detector 501 outputs the fail_stop signal, the L level is maintained until the reset signal is input. Although not shown in the figure, the failure detection of the power converter may be configured to output a fail_stop signal to L by comparing the temperature limit value and the temperature detection value. Furthermore, the failure detection may be performed by complementing estimation calculation or the like instead of directly detecting the failure detection location by a sensor or the like. For example, in FIG. 14, only the current values for two phases of the three-phase alternating current are detected, but the remaining phase current values may be estimated from the three-phase alternating current equilibrium condition and used for failure detection. .

  The operation of the logic circuit in FIG. 13 will be described. The fail_stop signal and the drive signals A, D, and B are input to the AND circuits 413, 414, and 415, and the drive signals of the switches are output by taking the logical products of the respective signals. Further, OR signals 417 and 418 are obtained for the signals obtained by inverting the fail_stop signal by the NOT circuit 416 and the drive signals E and C, respectively, and the E and C drive signals are output.

  When the output current or input voltage of the power converter becomes excessive by the signal processing circuit of the present invention, the state is detected, a signal for stopping the power converter is output, and the signal is received, Even when a current is flowing, a path through which the current flows is secured, and a surge voltage is not generated in each switch. For this reason, the power converter can be safely stopped even in the event of a malfunction or abnormality such as an overcurrent or overvoltage of the power converter, and the entire system can be avoided without affecting other connected devices. The protection device can be reduced and the cost can be reduced.

Third Embodiment The third embodiment differs from the second embodiment in part of the signal processing circuit. FIG. 15 shows a signal processing circuit of the third embodiment. The fail # stop signal and the drive signals A and D are inputted to the AND circuits 413 and 414, and the drive signal of each switch is outputted by taking the logical product of each. Further, OR signals of the signal obtained by inverting the fail # stop signal by the NOT circuit 416b and the drive signals B, E, and C are obtained by the OR circuits 415b, 417, and 418, respectively, and the drive signals for B, E, and C are output. This is configured to turn on the path from the load (motor) to the negative electrode.

  By adopting such a signal processing circuit configuration, even if E and C do not both follow the drive signal and cannot be turned on, a path through which the motor current flows by turning on switch B This ensures that no surge voltage is generated in each switch. For this reason, the power converter can be safely stopped even in the case of a failure / abnormality such as an overcurrent or overvoltage of the power converter.

Fourth Embodiment The fourth embodiment has a configuration in which the signal processing circuit of FIG. 16 is added to the output of the signal processing circuit in the second embodiment, and 49a is the signal processing of FIG. 15 as shown in FIG. The circuit 49b is connected as the signal processing circuit of FIG. FIG. 19 shows only the U phase, and the other phases have the same configuration.

  The C_f signal is a signal that outputs L when a failure or abnormality of the switch C is detected, and H during normal times. Here, the failure of the switch C is detected as follows. Using a current sensor provided in the switch C, if a current exceeding a preset value flows in the switch, it is determined that there is an abnormality, and the C_f signal is set to L. Alternatively, the C_f signal is set to L when the drive power supply for turning on / off the C switch fails. The E_f signal is a signal that becomes L when a failure or abnormality in the switch E is detected, and is a signal similar to the C_f signal in the switch C.

  The C_f and E_f signals are input to the signal processing circuit in FIG. The output signal becomes H when C_f and E_f are both L. That is, both the switches C and E become H when a failure or abnormality occurs. An OR circuit 420 calculates the logical sum of the output of the NOR circuit 419 and the drive signal B to obtain a new drive signal B. This configuration corresponds to the seventh and eighth inventions in which B is turned on when C and E fail. When B and A or D are simultaneously turned on, the positive and negative electrodes are short-circuited. To prevent this, the signal obtained by logically inverting the drive signal B by the NOT circuit 421 and the drive signals A and D A logical operation is performed on the logical product by AND circuits 422 and 423.

  By configuring such a signal processing circuit, even if both E and C fail, by turning on the switch B, a path through which the motor current flows is secured, and a surge voltage is applied to each switch. It is unnecessary to generate. For this reason, the power converter can be safely stopped even in the case of a failure / abnormality such as an overcurrent or overvoltage of the power converter. Further, if E and C are not broken down, it is not necessary to turn on B, and it is not necessary to consume drive power for turning on the switch.

Fifth Example The fifth example describes only the differences from the previous example. In the fifth embodiment, the signal processing circuit shown in FIG. 18 is added to the signal processing circuit shown in FIG. 17. As shown in FIG. 19, 49a shows the signal processing circuit shown in FIG. 17, and 49b shows the signal processing circuit shown in FIG. Connect as. FIG. 19 shows only the U phase, and the other phases have the same configuration. In the signal processing circuit of FIG. 17, the fail_stop signal does not perform a logical operation on the drive signals B and C. Next, the signal processing circuit performs signal processing on the output of the signal processing circuit. In FIG. 18, the C # f signal is logically inverted by the NOT circuit 424, and the logical sum of the output and the drive signal E is calculated by the OR circuit 426. Similarly, the drive signal C and the E # f signal are processed using the NOT circuit 425 and the OR circuit 427. Even if the switch E is failed when the signal E is received and the switch E is turned on by receiving the fail # stop signal, the motor current flows by turning on the switch C. Secure a route and avoid the occurrence of surge voltage in each switch. For this reason, the power converter can be safely stopped even in the case of a failure / abnormality such as an overcurrent or overvoltage of the power converter. Further, when E does not break down, C and B are not turned on, and the driving power for turning on the switch is not consumed. Furthermore, when the power supply 10b to which E is connected has a larger charge capacity than the power supply 10a, by preferentially securing a path for charging the power supply 10b having a large charge capacity, Voltage rise can be suppressed. As a result, it is not necessary to use a capacitor 12 or 13 having a high withstand voltage, so that the manufacturing cost of the power converter can be reduced.

Sixth Embodiment The sixth embodiment will describe only the differences from the previous embodiments. In the sixth embodiment, normally-on elements are used for the semiconductor switches 101b, 102b, 103b, 104b, 105b, and 106b in FIG. This element is turned off by the semiconductor switch drive circuit when the switch is turned off. When the power supply to the drive circuit is cut off, the switch is kept in the on state. With such a configuration, even when the drive circuit power supply of the semiconductor switch fails, it is possible to secure a path for the motor current to flow, and it is not necessary to generate a surge voltage in each switch. For this reason, the power converter can be safely stopped even in the case of a failure / abnormality such as an overcurrent or overvoltage of the power converter.

  Although the present invention has been described based on the drawings and examples, it should be noted that those skilled in the art can easily make various modifications and corrections based on the present disclosure. Therefore, it should be noted that these variations and modifications are included in the scope of the present invention. For example, although the embodiment has been described with the configuration having two DC power supplies, the present invention functions similarly with three or more DC power supplies. The functions included in each member, each means, each step, etc. can be rearranged so that there is no logical contradiction, and a plurality of members, means, steps, etc. can be combined or divided into one. Is possible.

It is a figure which shows the structure of the motor drive system by the conventional 2 power supply of a fuel cell and a battery. It is a figure which shows the structure (structure of a prior application) of a control system. It is a figure which shows the structure of the power converter in Example 1. FIG. It is a figure which shows the triangular wave used with the PWM pulse production | generation means of a 1st Example. It is a figure which shows the structure which extracted only the U phase from FIG. It is a figure which shows the pulse generation of A and E by a triangular wave comparison. It is a figure which shows the pulse generation of D and C by a triangular wave comparison. It is a figure which shows the example of the pulse generation to which the dead time was added. 5 is a block diagram showing details of power control / modulation rate calculation 45. FIG. 4 is a block diagram showing details of current control means 42. FIG. It is a figure which shows the structure of the control system in this invention. FIG. 3 is a diagram illustrating a drive signal processing circuit according to the first embodiment. FIG. 6 is a diagram illustrating a drive signal processing circuit in Embodiment 2. It is a figure which shows the structure of the power converter in Example 2. FIG. FIG. 10 is a diagram illustrating a drive signal processing circuit in Embodiment 3. FIG. 10 is a diagram illustrating a configuration of a signal processing circuit 49b according to a fourth embodiment. It is a figure which shows the structure of the signal processing circuit 49a in Example 5. FIG. FIG. 10 is a diagram illustrating a configuration of a signal processing circuit 49b according to a fifth embodiment. 4 is a circuit configuration diagram in a drive signal processing circuit 49. FIG.

Explanation of symbols

10a power supply
10b power supply
12 Smoothing capacitor
13 Smoothing capacitor
14 Positive bus of power supply 10a
15 Common negative electrode bus
16 Power supply 10b positive bus
20 Motor
30 Power converter
40 Control unit
41 Torque control means
42 Current control means
45 Power control and modulation rate calculation
46 Modulation rate correction means
47 Pulse generation means
48 Three-phase / dq conversion means
49 Drive signal processing circuit
49a Signal processing circuit
49b Signal processing circuit
101a / 101b, 102a / 102b, 103a / 103b Semiconductor switch
104a / 104b, 105a / 105b, 106a / 106b semiconductor switch
107a, 108a, 109a Semiconductor switch
107b, 108b, 109b Diode
201 Current controller
202 dq / 3 phase converter
203 multiplier
204 Subtractor
205 multiplier
206 multiplier
209 Adder
210 Adder
211 Modulation rate offset calculator
401 NOT circuit circuit
402,403,407,408,409 AND circuit
404 NOR circuit
405,406,411,412 OR circuit
410 NOT circuit circuit
413,414,415 AND circuit
416 NOT circuit
417,418 OR circuit
416b NOT circuit
415b OR circuit
419 NOR circuit
420 OR circuit
421 NOT circuit
422,423 AND circuit
424,425 NOT circuit
426,427 OR circuit
501 Fault detector
502,503,504 Current sensor

Claims (11)

A power conversion device for driving a multiphase motor, which is connected to a plurality of DC power supplies, and generates a drive voltage for the multiphase motor by generating and synthesizing pulses from output voltages of the DC power supplies. A method for controlling a power converter,
The power converter is
A first switch for connecting and disconnecting power from the first DC power supply to the multiphase motor in a first energization path formed between a positive electrode of the first DC power supply and each phase of the multiphase motor;
A second switch for connecting / disconnecting energization from the multiphase motor to the first DC power source on the first energization path;
A third switch for connecting / disconnecting power from the second DC power supply to the multiphase motor in a second energization path formed between the positive electrode of the second DC power supply and each phase of the multiphase motor;
A fourth switch for connecting / disconnecting energization from the multiphase motor to the second DC power source on the second energization path;
The first DC power source and the second DC power source from the multi-phase motor in a third energization path formed between the negative electrode of the first DC power source and the second DC power source and each phase of the multi-phase motor. A fifth switch for connecting / disconnecting power to / from
With
When the first switch is on, turn off the fourth switch and the fifth switch;
When the third switch is on, turn off the second switch and the fifth switch;
Turning off the first switch and the third switch when the power converter is stopped , and turning on at least one of the second switch, the fourth switch, and the fifth switch;
A method for controlling a power conversion device. In the control method of the power converter device according to claim 1,
The first switch and the third switch of the first to fifth switches are turned off from the operation / stop determination signal of the power converter and the on / off signals of the first to fifth switches. be Rutotomoni, the second switch, the fourth switch, you turn on the at least one switch of said fifth switch,
A method for controlling a power conversion device. In the control method of the power converter device according to claim 1,
A failure detection means for outputting a failure detection signal at the time of failure of the power converter,
Of the first to fifth switches, the first switch and the third switch are turned off from the failure detection signal output from the failure detection means and the on / off signals of the first to fifth switches. be Rutotomoni, the second switch, the fourth switch, you turn on the at least one switch of said fifth switch,
A method for controlling a power conversion device. In the control method of the power converter device of any one of Claims 1-3,
Among from the first fifth switch, the second switch, turn on the at least one switch of said fourth switch,
A method for controlling a power conversion device. In the control method of the power converter device of any one of Claims 1-3,
Among from the first fifth switch, the fifth on the switch to Rutotomoni, the first switch, turn off the third switch,
A method for controlling a power conversion device. In the control method of the power converter device of any one of Claims 1-3,
Among from the first fifth switch, the second switch, and at least one of said fourth switch, you turn on the fifth switch,
A method for controlling a power conversion device. In the control method of the power converter device of any one of Claims 1-3,
Wherein the first based on a state of each of the fifth switch, one from the first fifth switches to make on the second switch, the fourth switch and the fifth switch, either switch ,
A method for controlling a power conversion device. In the control method of the power converter device according to claim 7,
A reflux switch failure detection means for outputting a reflux switch failure detection signal when the second switch or the fourth switch among the first to fifth switches fails;
Wherein based on the reflux switch failure detection signal outputted from the reflux switch failure detecting means, among from the first to the fifth switch, turn on the fifth switch,
A method for controlling a power conversion device. In the control method of the power converter device of any one of Claims 1-7,
The second switch, at least one of the fourth switch, switch on the path to the positive electrode of the largest DC power charging capacity among the DC power source,
A method for controlling a power conversion device. In the control method of the power converter device of any one of Claims 1-9,
Of the first to fifth switches, the second switch and the fourth switch are semiconductor switches, and the semiconductor switches are turned on by turning off the driving power of the semiconductor switches.
A method for controlling a power conversion device. In the control method of the power converter device of any one of Claims 1-9,
The on / off determination of the first to fifth switches is performed using a logical operation.
A method for controlling a power conversion device.

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