JP4842094B2 - Epitaxial silicon carbide single crystal substrate manufacturing method - Google Patents
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- 239000000758 substrate Substances 0.000 title claims description 73
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims description 53
- 229910010271 silicon carbide Inorganic materials 0.000 title claims description 51
- 239000013078 crystal Substances 0.000 title claims description 43
- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 238000000034 method Methods 0.000 claims description 19
- 239000010409 thin film Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 238000002230 thermal chemical vapour deposition Methods 0.000 claims description 3
- 239000010408 film Substances 0.000 description 22
- 239000010410 layer Substances 0.000 description 19
- 239000007789 gas Substances 0.000 description 12
- 238000005530 etching Methods 0.000 description 11
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 10
- 230000007547 defect Effects 0.000 description 10
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 4
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 4
- 238000000879 optical micrograph Methods 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000006061 abrasive grain Substances 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 description 1
- 239000005052 trichlorosilane Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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Description
本発明は、エピタキシャル炭化珪素(SiC)単結晶基板の製造方法に関するものである。 The present invention relates to a manufacturing method of the epitaxial silicon carbide (SiC) single crystal base plate.
炭化珪素(SiC)は、耐熱性及び機械的強度に優れ、物理的、化学的に安定なことから、耐環境性半導体材料として注目されている。また、近年、高周波高耐圧電子デバイス等の基板としてSiC単結晶基板の需要が高まっている。 Silicon carbide (SiC) has attracted attention as an environmentally resistant semiconductor material because it is excellent in heat resistance and mechanical strength and is physically and chemically stable. In recent years, the demand for SiC single crystal substrates has increased as a substrate for high-frequency, high-voltage electronic devices.
SiC単結晶基板を用いて、電力デバイス、高周波デバイス等を作製する場合には、通常、基板上に熱CVD法(熱化学蒸着法)と呼ばれる方法を用いてSiC薄膜をエピタキシャル成長させたり、イオン注入法により直接ドーパントを打ち込んだりするのが一般的であるが、後者の場合には、注入後に高温でのアニ−ルが必要となるため、エピタキシャル成長による薄膜形成が多用されている。 When manufacturing a power device, a high-frequency device, etc. using a SiC single crystal substrate, a SiC thin film is epitaxially grown on the substrate by a method called thermal CVD (thermochemical vapor deposition) or ion implantation is usually performed. In general, the dopant is directly implanted by the method, but in the latter case, annealing at a high temperature is required after the implantation, so that thin film formation by epitaxial growth is frequently used.
SiC単結晶基板に存在する欠陥は、螺旋転位、刃状貫通転位、基底面内転位の3つに大別される。この内、螺旋転位と刃状貫通転位はc軸に平行であり、基底面内転位は(0001)基底面に存在する。通常、SiC基板上にエピタキシャル成長を行う場合、基板としては1°より大きいオフ角度を持つものを用い、所謂ステップフロー成長を実施する。したがって、エピタキシャル成長用基板には、螺旋転位、刃状貫通転位に加え、基底面内転位もまた存在している。このような基板にエピタキシャル成長を行った際、基板の螺旋転位及び刃状貫通転位は、エピタキシャル層にそのまま引き継がれる。基板の基底面内転位は、エピタキシャル成長が開始される時、表面との相互作用により、その70〜90%は刃状貫通転位へと変換されてエピタキシャル層内に伝播するが、残りの10〜30%は依然として基底面内転位としてエピタキシャル層に引き継がれる。このようにして、エピタキシャル層内に存在する基底面内転位の密度は通常103/cm2以上であるが、近年の研究進展により、この基底面内転位がデバイスの特性劣化を引き起こすことが明らかになってきている(非特許文献1)。 Defects existing in SiC single crystal substrates are roughly classified into three types: screw dislocations, edge threading dislocations, and basal plane dislocations. Among these, the screw dislocation and the edge threading dislocation are parallel to the c-axis, and the basal plane dislocation exists on the (0001) basal plane. Normally, when epitaxial growth is performed on a SiC substrate, a substrate having an off angle larger than 1 ° is used, and so-called step flow growth is performed. Therefore, in the epitaxial growth substrate, in addition to the screw dislocation and the edge threading dislocation, the basal plane dislocation also exists. When epitaxial growth is performed on such a substrate, spiral dislocations and edge threading dislocations of the substrate are inherited as they are in the epitaxial layer. Dislocations in the basal plane of the substrate are propagated into the epitaxial layer by converting 70 to 90% of them into edge threading dislocations by the interaction with the surface when epitaxial growth is started, but the remaining 10 to 30 % Is still transferred to the epitaxial layer as dislocations in the basal plane. In this way, the density of dislocations in the basal plane existing in the epitaxial layer is usually 10 3 / cm 2 or more, but it is clear that the dislocations in the basal plane cause device characteristic deterioration due to recent research progress. (Non-Patent Document 1).
SiCエピタキシャル層の基底面内転位を低減する方法として、エピタキシャル成長を行う際に材料ガス中に含まれる炭素と珪素の原子数比(C/Si比)を上げる方法(非特許文献2)、あるいは成長速度を下げる方法(非特許文献2)が報告されており、また、SiC基板をエッチングした後にエピタキシャル成長を行う方法(非特許文献3)も報告されている。しかし、非特許文献2の方法の場合、使用する成長装置によって最適なC/Si比が異なることが懸念され、また、成長速度を下げることによる生産性の低下も問題である。非特許文献3の方法の場合には、KOH溶液でエッチングを行うため、エッチング後に多数の凸凹が生じ、このような基板上にエピタキシャル成長を行った場合、これらの凸凹がエピタキシャル成長後にも残るため、成長後に基板の再研磨が必要になり、コスト増につながる。 As a method of reducing dislocations in the basal plane of the SiC epitaxial layer, a method of increasing the atomic ratio (C / Si ratio) of carbon and silicon contained in the material gas during epitaxial growth (Non-Patent Document 2) or growth A method for reducing the speed (Non-Patent Document 2) has been reported, and a method for performing epitaxial growth after etching a SiC substrate (Non-Patent Document 3) has also been reported. However, in the case of the method of Non-Patent Document 2, there is a concern that the optimum C / Si ratio varies depending on the growth apparatus to be used, and a decrease in productivity due to a decrease in growth rate is also a problem. In the case of the method of Non-Patent Document 3, since etching is performed with a KOH solution, a large number of irregularities are generated after etching. When epitaxial growth is performed on such a substrate, these irregularities remain even after epitaxial growth. Subsequent substrate re-polishing is required, leading to increased costs.
したがって、今後デバイスへの応用が期待されるSiCエピタキシャル成長基板であるが、現状技術では、効率良く低コストで、デバイスの特性や歩留りを劣化させない102/cm2以下程度にまで基底面内転位を減少させることは困難である。一方、所謂on-axis基板を使用し、エピタキシャル成長を行えば、基板表面に基底面転位が現れないため、エピタキシャル層にも基底面転位は存在せず、上記問題は解決されると考えられる。しかし、on-axis基板を用いた場合には、ステップバンチング等による表面状態の劣化が生じ易く、このようなエピタキシャル成長基板を用いた場合には、デバイスの耐圧特性が劣化する等の別の問題が発生し、実用化の弊害となる。
本発明は、上記エピタキシャル成長において、基底面内転位の少ない高品質エピタキシャル膜（SiC単結晶薄膜）を有するエピタキシャルSiC単結晶基板の製造方法を提供するものである。 The present invention, in the epitaxial growth, there is provided a method for producing an epitaxial SiC single crystal base plate having a small inside basal plane dislocation high-quality epitaxial film (SiC single crystal thin film).
本発明は、エピタキシャル成長中に、エピタキシャル成長装置内で、成長を1回以上中断することにより、上記課題を解決できることを見出し、完成したものである。即ち、本発明は、
本発明は、エピタキシャル成長中に、エピタキシャル成長装置内で、成長を1回以上中断することにより、上記課題を解決できることを見出し、完成したものである。即ち、本発明は、
（１）炭化珪素単結晶基板上に炭化珪素単結晶薄膜をエピタキシャル成長で形成する際に、成長装置内でエピタキシャル成長を少なくとも１回中断する操作を含むエピタキシャル炭化珪素単結晶基板の製造方法であって、０．５〜１μｍのエピタキシャル成長を行って中断を実施するようにして、エピタキシャル層の厚さが５μｍに到達するまでに複数回の中断を行うことを特徴とするエピタキシャル炭化珪素単結晶基板の製造方法、
（２） 前記炭化珪素単結晶薄膜のエピタキシャル成長が、熱化学蒸着法（ＣＶＤ法）による（１）記載のエピタキシャル炭化珪素単結晶基板の製造方法、
（３） 前記炭化珪素単結晶基板のオフ角度が１°よりも大きい（１）又は（２）に記載のエピタキシャル炭化珪素単結晶基板の製造方法、
（４） 前記中断の時間が５〜３０分である（１）〜（３）のいずれか１項に記載のエピタキシャル炭化珪素単結晶基板の製造方法、
（５） 成長装置内へのSi源及びC源の材料ガスの供給を一旦止めて、エピタキシャル成長を中断させる（１）〜（４）のいずれか１項に記載のエピタキシャル炭化珪素単結晶基板の製造方法、
（６） １４００℃以下の温度に下げてから成長中断を行う（１）〜（５）のいずれか１項に記載のエピタキシャル炭化珪素単結晶基板の製造方法、
である。
The present invention has been completed by finding that the above-mentioned problems can be solved by interrupting the growth once or more in the epitaxial growth apparatus during the epitaxial growth. That is, the present invention
The present invention has been completed by finding that the above-mentioned problems can be solved by interrupting the growth once or more in the epitaxial growth apparatus during the epitaxial growth. That is, the present invention
(1) A method for producing an epitaxial silicon carbide single crystal substrate including an operation of interrupting epitaxial growth at least once in a growth apparatus when forming a silicon carbide single crystal thin film on a silicon carbide single crystal substrate by epitaxial growth , A method for producing an epitaxial silicon carbide single crystal substrate, wherein the interruption is performed by performing epitaxial growth of 0.5 to 1 μm, and the interruption is performed a plurality of times until the thickness of the epitaxial layer reaches 5 μm. ,
(2) The method for producing an epitaxial silicon carbide single crystal substrate according to (1), wherein the epitaxial growth of the silicon carbide single crystal thin film is performed by a thermal chemical vapor deposition method (CVD method),
(3) The method for producing an epitaxial silicon carbide single crystal substrate according to (1) or (2), wherein an off angle of the silicon carbide single crystal substrate is larger than 1 °.
(4) The method for producing an epitaxial silicon carbide single crystal substrate according to any one of (1) to (3), wherein the interruption time is 5 to 30 minutes,
(5) The production of the epitaxial silicon carbide single crystal substrate according to any one of (1) to (4) , wherein the supply of the material gas of the Si source and the C source into the growth apparatus is temporarily stopped to stop the epitaxial growth. Method,
(6) The method for producing an epitaxial silicon carbide single crystal substrate according to any one of (1) to (5) , wherein growth is interrupted after the temperature is lowered to 1400 ° C. or lower.
It is.
本発明によれば、基底面転位密度の少ない高品質なエピタキシャル膜を有するエピタキシャルSiC単結晶基板を提供することが可能である。 According to the present invention, it is possible to provide an epitaxial SiC single crystal substrate having a high-quality epitaxial film with a low basal plane dislocation density.
また、本発明のエピタキシャルSiC単結晶基板の製造方法においては、特にCVD法を用いてSiC単結晶薄膜をエピタキシャル成長させることで、装置構成が容易で制御性にも優れ、均一性、再現性の高いエピタキシャル膜が得られる。 In addition, in the method of manufacturing an epitaxial SiC single crystal substrate of the present invention, the SiC single crystal thin film is epitaxially grown using the CVD method in particular, so that the apparatus configuration is easy, the controllability is excellent, and the uniformity and reproducibility are high. An epitaxial film is obtained.
さらに、本発明のエピタキシャルSiC単結晶基板を用いたデバイスは、基底面転位密度の少ない高品質エピタキシャル膜上に形成されるため、その特性及び歩留りが向上する。 Furthermore, since the device using the epitaxial SiC single crystal substrate of the present invention is formed on a high quality epitaxial film having a low basal plane dislocation density, its characteristics and yield are improved.
本発明の具体的な内容について述べる。
まず、SiC単結晶基板上へのエピタキシャル成長について述べる。
本発明で好適にエピタキシャル成長に用いる装置は、横型のCVD装置である。CVD法は、装置構成が簡単であり、ガスのon/offで成長を制御できるため、エピタキシャル膜の制御性、再現性に優れた成長方法である。
The specific contents of the present invention will be described.
First, epitaxial growth on a SiC single crystal substrate will be described.
The apparatus preferably used for epitaxial growth in the present invention is a horizontal CVD apparatus. The CVD method has a simple apparatus configuration and can control growth by gas on / off, and is therefore a growth method with excellent controllability and reproducibility of the epitaxial film.
図1に、成長を行う際の典型的な成長シーケンスを、ガスの導入タイミングと併せて示す。まず、成長炉に基板をセットし、成長炉内を真空排気した後、水素ガスを導入して圧力を1×104〜3×104Paに調整する。その後、圧力を一定に保ちながら成長炉の温度を上げ、1400℃程度で10〜30分間、水素中あるいは塩化水素を導入して塩化水素中での基板のエッチングを行う。これは、研磨等に伴う基板表面の変質層を取り除き、清浄な表面を出すためのものである。その後、温度を成長温度である1500〜1600℃に上げ、材料ガスであるSiH4とC3H8を導入して成長を開始する。SiH4流量は毎分4〜5cm3、C3H8流量は毎分1〜3cm3であり、成長速度は毎時5〜6μmである。この成長速度は、通常利用されるエピタキシャル層の膜厚が10μm程度であるため、生産性を考慮して決定されたものである。一定時間成長し、所望の膜厚が得られた時点でSiH4とC3H8の導入を止め、水素ガスのみ流した状態で温度を下げる。温度が常温まで下がった後、水素ガスの導入を止め、成長室内を真空排気し、不活性ガスを成長室に導入して、成長室を大気圧に戻してから、基板を取り出す。 FIG. 1 shows a typical growth sequence for the growth, together with the gas introduction timing. First, a substrate is set in a growth furnace, the inside of the growth furnace is evacuated, and hydrogen gas is introduced to adjust the pressure to 1 × 10 4 to 3 × 10 4 Pa. Thereafter, the temperature of the growth furnace is raised while keeping the pressure constant, and the substrate is etched in hydrogen chloride by introducing hydrogen or hydrogen chloride at about 1400 ° C. for 10 to 30 minutes. This is for removing the altered layer on the surface of the substrate due to polishing or the like, and providing a clean surface. Thereafter, the temperature is increased to 1500 to 1600 ° C. which is the growth temperature, and SiH 4 and C 3 H 8 which are material gases are introduced to start the growth. The SiH 4 flow rate is 4-5 cm 3 per minute, the C 3 H 8 flow rate is 1-3 cm 3 per minute, and the growth rate is 5-6 μm per hour. This growth rate is determined in consideration of productivity because the film thickness of the normally used epitaxial layer is about 10 μm. When the film is grown for a certain period of time and a desired film thickness is obtained, the introduction of SiH 4 and C 3 H 8 is stopped, and the temperature is lowered with only hydrogen gas flowing. After the temperature has dropped to room temperature, the introduction of hydrogen gas is stopped, the growth chamber is evacuated, an inert gas is introduced into the growth chamber, the growth chamber is returned to atmospheric pressure, and the substrate is taken out.
次に、本発明の内容を図2の成長シーケンスで説明する。SiC単結晶基板をセットし、水素あるいは塩化水素中でのエッチングまでは、図1と同様である。その後、1500〜1600℃の成長温度に上げ、材料ガスであるSiH4とC3H8を流して成長を開始するが、成長膜厚が所望の値になる前に、水素ガスは流したままでSiH4とC3H8ガスの供給を一旦停止する。この成長中断時間は5〜30分の間が好ましい。これは、中断時間が5分より短いと、成長した最表面層の状態が安定せず、また30分より長いと水素ガスによる表面エッチングが顕著となり、表面荒れを起こしやすくなるためである。その後、再びSiH4とC3H8ガスを流して成長を開始し、所望の膜厚値になるまで成長を行う。成長後のシーケンスは図1と同様である。表面に現れている基底面転位は、エピタキシャル成長が開始される時に、エピタキシャル膜との相互作用によって刃状貫通転位に変換されていくため、図2のような成長シーケンスを実施することにより、成長が再開される度に刃状貫通転位に変換される数が増え、基底面転位が減少することになる。 Next, the contents of the present invention will be described with reference to the growth sequence of FIG. The process up to setting a SiC single crystal substrate and etching in hydrogen or hydrogen chloride is the same as in FIG. After that, the temperature is raised to 1500-1600 ° C., and the growth is started by flowing the material gases SiH 4 and C 3 H 8 , but the hydrogen gas is kept flowing before the growth film thickness reaches the desired value. Stop supply of SiH 4 and C 3 H 8 gases. This growth interruption time is preferably between 5 and 30 minutes. This is because when the interruption time is shorter than 5 minutes, the state of the grown outermost surface layer is not stable, and when it is longer than 30 minutes, surface etching with hydrogen gas becomes remarkable and surface roughness is likely to occur. Thereafter, SiH 4 and C 3 H 8 gases are flowed again to start growth, and growth is performed until a desired film thickness value is obtained. The sequence after growth is the same as in FIG. The basal plane dislocations appearing on the surface are converted into edge threading dislocations by the interaction with the epitaxial film when the epitaxial growth is started. Therefore, by performing the growth sequence as shown in FIG. Each time it is restarted, the number of blade threading dislocations increases, and basal plane dislocations decrease.
このような考察の基、全体で10μmのエピタキシャル成長を行う際の途中5μmの時点で、5分間成長を中断し、再び残り5μmを成長させたところ、基底面転位を低減させることができた。エピタキシャル層の厚さは、通常5〜50μmが用いられるため、成長中断は、エピタキシャル層の厚さが5μmに到達するまでに行うことが、基底面転位を低減させるのには好ましい。 Based on such considerations, when the total growth of 10 μm was performed at 5 μm, the growth was interrupted for 5 minutes and the remaining 5 μm was grown again. As a result, basal plane dislocations could be reduced. Since the thickness of the epitaxial layer is usually 5 to 50 μm, it is preferable to stop the growth until the thickness of the epitaxial layer reaches 5 μm in order to reduce the basal plane dislocation.
本発明により、エピタキシャル成長の途中で成長を中断させることで、基底面転位の発生を従来よりも低減させることが可能になったが、中断の回数は2回以上が好ましい。これは、通常の(成長の中断を行わない)方法ではエピタキシャル層中に存在する基底面転位の数が103/cm2以上であり、それをデバイス特性に影響を与えない102/cm2以下まで低減するには、成長再開時における基底面転位の刃状貫通転位への変換割合が80%程度であることから導出されるものである。さらに、複数回の成長中断を行う際には、0.5〜1μmのエピタキシャル成長を行った後に実施することが好ましい。これは、成長層が薄過ぎると、刃状貫通転位への変換割合が減少し、また厚過ぎると、上述した5μmの適正膜厚を超えるためである。特に、エピタキシャル成長の初期に成長中断を繰り返し、最後に所望の膜厚まで1度で成長することが、基底面転位の低減には有効である。また、図2においては、成長温度を保ちながら成長の中断を行っているが、成長中断時にエピタキシャル層表面が水素ガス中でエッチングされることによる表面荒れを防ぐためには、1400℃以下に温度を下げてから成長中断を行うことも有効である。成長するエピタキシャル層の厚さは任意であるが、通常形成されるデバイスの耐圧、エピタキシャル膜の生産性等を考慮した場合、5μm 以上50μm以下が好ましい。さらに、基板のオフ角については、1°以下であると、元々表面に存在する基底面欠陥が少ないため、本発明の効果が現れ難く、さらに、基板表面に存在するステップ数が少ないため、正常なエピタキシャル成長が困難になる。また、オフ角が10°を越えるとインゴットから基板を作製する際に、より斜めに切り出す必要があるため、収率が下がる。したがって、1°より大きく10°以下が望ましいが、より好ましくは4°〜8°の間である。 According to the present invention, the occurrence of basal plane dislocations can be reduced as compared with the prior art by interrupting the growth in the middle of the epitaxial growth, but the number of interruptions is preferably two or more. This (no interruption of growth) typically on how is the number of basal plane dislocations present in the epitaxial layer 10 3 / cm 2 or more, it does not affect the device characteristics 10 2 / cm 2 The reduction to the following is derived from the fact that the conversion ratio of basal plane dislocations to edge threading dislocations at the time of restarting growth is about 80%. Furthermore, it is preferable that the growth is interrupted a plurality of times after the epitaxial growth of 0.5 to 1 μm is performed. This is because if the growth layer is too thin, the ratio of conversion to edge threading dislocations decreases, and if it is too thick, the above-mentioned appropriate film thickness of 5 μm is exceeded. In particular, it is effective in reducing the basal plane dislocations to repeat the growth interruption at the initial stage of epitaxial growth and finally grow up to a desired film thickness once. In FIG. 2, the growth is interrupted while maintaining the growth temperature, but in order to prevent surface roughness due to etching of the epitaxial layer surface in hydrogen gas during the growth interruption, the temperature is set to 1400 ° C. or lower. It is also effective to suspend growth after lowering. The thickness of the epitaxial layer to be grown is arbitrary, but it is preferably 5 μm or more and 50 μm or less in consideration of the breakdown voltage of a device usually formed, the productivity of the epitaxial film, and the like. Further, when the off-angle of the substrate is 1 ° or less, since the basal plane defects originally present on the surface are few, the effect of the present invention is hardly exhibited, and furthermore, the number of steps existing on the substrate surface is small, and thus normal. Epitaxial growth becomes difficult. On the other hand, when the off angle exceeds 10 °, it is necessary to cut the substrate more obliquely when producing the substrate from the ingot. Therefore, it is desirable to be greater than 1 ° and not more than 10 °, but more preferably between 4 ° and 8 °.
このようにして成長されたエピタキシャルSiC単結晶基板上に好適に形成されるデバイスは、ショットキーバリアダイオード、PINダイオード、MOSダイオード、MOSトランジスタ等、特に電力制御用に用いられるデバイスである。 Devices suitably formed on the epitaxial SiC single crystal substrate grown in this way are devices used for power control, such as Schottky barrier diodes, PIN diodes, MOS diodes, MOS transistors, and the like.
(実施例1)
2インチ(50mm)ウェーハ用SiC単結晶インゴットから、約400μmの厚さでスライスし、粗削りとダイヤモンド砥粒による通常研磨を実施した、4H型のポリタイプを有するSiC単結晶基板のSi面に、エピタキシャル成長を実施した。基板のオフ角は8°である。基板表面の欠陥密度の典型的な値は、刃状貫通転位が2×103/cm2、基底面転位は1×104/cm2、螺旋転位が1×104/cm2である。成長の手順としては、成長炉に基板をセットし、成長炉内を真空排気した後、水素ガスを毎分16L導入しながら圧力を1.6×104 Paに調整した。その後、圧力を一定に保ちながら成長炉の温度を上げ、1400℃に到達した後、塩化水素を毎分10cm3流し、10分間基板のエッチングを行った。エッチング後、温度を1550℃まで上げ、SiH4流量を毎分4cm3、C3H8流量を毎分3cm3にしてエピタキシャル層を3μm成長した。その後、水素ガスは流したままSiH4とC3H8の導入を止め、温度は1550℃に保ちながら5分間成長を中断した。その後成長を再開し、エピタキシャル層の全体厚が6μmになった時点で再び成長を5分間中断した。さらに成長を再開し、エピタキシャル層の全体厚が10μmになるまで成長を実施した。この時の成長速度は毎時5μm程度であった。
(Example 1)
From a SiC single crystal ingot for 2 inch (50 mm) wafers, sliced at a thickness of about 400 μm, and then subjected to rough grinding and normal polishing with diamond abrasive grains, on the Si surface of the SiC single crystal substrate with 4H type polytype, Epitaxial growth was performed. The off angle of the substrate is 8 °. Typical values of the defect density of the substrate surface, edge-like threading dislocations 2 × 10 3 / cm 2, basal plane dislocation is 1 × 10 4 / cm 2, screw dislocations is 1 × 10 4 / cm 2. As a growth procedure, a substrate was set in a growth furnace, the inside of the growth furnace was evacuated, and then the pressure was adjusted to 1.6 × 10 4 Pa while introducing 16 L of hydrogen gas per minute. Thereafter, the temperature of the growth furnace was raised while keeping the pressure constant, and after reaching 1400 ° C., 10 cm 3 of hydrogen chloride was flowed per minute and the substrate was etched for 10 minutes. After etching, the temperature was raised to 1550 ° C., the SiH 4 flow rate was 4 cm 3 / min, the C 3 H 8 flow rate was 3 cm 3 / min, and an epitaxial layer was grown to 3 μm. Thereafter, the introduction of SiH 4 and C 3 H 8 was stopped while the hydrogen gas was flowing, and the growth was interrupted for 5 minutes while maintaining the temperature at 1550 ° C. Thereafter, the growth was resumed, and when the total thickness of the epitaxial layer reached 6 μm, the growth was interrupted again for 5 minutes. Furthermore, the growth was resumed, and the growth was carried out until the total thickness of the epitaxial layer became 10 μm. The growth rate at this time was about 5 μm per hour.
このようにしてエピタキシャル成長を行った膜に、KOHエッチングを実施し、エッチピットによる欠陥密度の評価を行った。エッチング後の表面の光学顕微鏡写真を図3に示す。図3において、Aが螺旋転位、Bが刃状貫通転位によって生じるエッチピットであり、後述の比較例の図4におけるCが基底面転位によって生じるエッチピットである。図3の写真では、400μm×400μmの部分を観察しているが、この部分にはCのエッチピット、即ち、基底面転位は観察されなかった。2インチウェーハ内を複数点評価した結果、基底面転位密度の平均は約80/cm2であった。このような基板を用いてPINダイオードを形成した際、ダイオードの順方向特性に、基底面転位を起点にした積層欠陥形成による経時劣化は見られず、良好な特性が得られた。 KOH etching was performed on the film epitaxially grown in this way, and the defect density due to etch pits was evaluated. An optical micrograph of the etched surface is shown in FIG. In FIG. 3, A is an etch pit generated by a screw dislocation, B is an etch pit generated by an edge threading dislocation, and C in FIG. 4 of the comparative example described later is an etch pit generated by a basal plane dislocation. In the photograph of FIG. 3, a 400 μm × 400 μm portion was observed, but no C etch pits, that is, basal plane dislocations were observed in this portion. As a result of evaluating a plurality of points in the 2-inch wafer, the average basal plane dislocation density was about 80 / cm 2 . When a PIN diode was formed using such a substrate, the forward characteristics of the diode were not deteriorated over time due to stacking fault formation starting from the basal plane dislocation, and good characteristics were obtained.
(実施例2)
実施例1と同様にスライス、粗削り、通常研磨を行った、4H型のポリタイプを有する2インチ(50mm)のSiC単結晶基板のSi面に、エピタキシャル成長を実施した。基板のオフ角は8°であり、基板表面に存在する欠陥密度は、実施例1と同様である。成長手順、ガス流量、温度等は、実施例1と同様であるが、成長開始後エピタキシャル膜厚が1μm、2μm、3μmの時点でそれぞれ5分間成長を中断した。その後成長を再開し、エピタキシャル層の全体厚が10μmになるまで成長を実施した。成長後、実施例1と同様にエッチピットによる欠陥密度の評価を行ったところ、基底面転位密度の平均は約60/cm2であった。このような基板を用いてPINダイオードを形成した際、ダイオードの順方向特性に、基底面転位を起点にした積層欠陥形成による経時劣化は見られず、良好な特性が得られた。
(Example 2)
Epitaxial growth was performed on the Si surface of a 2 inch (50 mm) SiC single crystal substrate having a 4H-type polytype, which was sliced, roughly ground, and normally polished in the same manner as in Example 1. The off angle of the substrate is 8 °, and the defect density existing on the substrate surface is the same as in Example 1. The growth procedure, gas flow rate, temperature, and the like are the same as in Example 1, but after the start of growth, the growth was interrupted for 5 minutes each when the epitaxial film thickness was 1 μm, 2 μm, and 3 μm. Thereafter, the growth was resumed, and the growth was carried out until the total thickness of the epitaxial layer became 10 μm. After the growth, the defect density by etch pits was evaluated in the same manner as in Example 1. As a result, the average basal plane dislocation density was about 60 / cm 2 . When a PIN diode was formed using such a substrate, the forward characteristics of the diode were not deteriorated over time due to stacking fault formation starting from the basal plane dislocation, and good characteristics were obtained.
(実施例3)
実施例1と同様にスライス、粗削り、通常研磨を行った、4H型のポリタイプを有する2インチ(50mm)のSiC単結晶基板のSi面に、エピタキシャル成長を実施した。基板のオフ角は8°であり、基板表面に存在する欠陥密度は、実施例1と同様である。成長手順、ガス流量、温度等のパラメータ、及び成長中断タイミングは実施例1と同様であるが、成長中断時間を20分とした。成長後、実施例1と同様にエッチピットによる欠陥密度の評価を行ったところ、基底面転位密度の平均は約80/cm2であった。このような基板を用いてPINダイオードを形成した際、ダイオードの順方向特性に、基底面転位を起点にした積層欠陥形成による経時劣化は見られず、良好な特性が得られた。
(Example 3)
Epitaxial growth was performed on the Si surface of a 2 inch (50 mm) SiC single crystal substrate having a 4H-type polytype, which was sliced, roughly ground, and normally polished in the same manner as in Example 1. The off angle of the substrate is 8 °, and the defect density existing on the substrate surface is the same as in Example 1. The growth procedure, parameters such as gas flow rate, temperature, and growth interruption timing were the same as in Example 1, but the growth interruption time was 20 minutes. After the growth, the defect density by the etch pit was evaluated in the same manner as in Example 1. As a result, the average basal plane dislocation density was about 80 / cm 2 . When a PIN diode was formed using such a substrate, the forward characteristics of the diode were not deteriorated over time due to stacking fault formation starting from the basal plane dislocation, and good characteristics were obtained.
(比較例)
比較例として、実施例1と同様にスライス、粗削り、通常研磨を行った、4H型のポリタイプを有する2インチ(50mm)のSiC単結晶基板のSi面に、エピタキシャル成長を実施した。基板のオフ角は8°であり、基板表面に存在する欠陥密度は、実施例1と同様である。成長手順、ガス流量、温度等は、実施例1と同様であるが、成長の中断は行っていない。成長を行った膜にKOHエッチングを実施し、エッチピットによる欠陥密度の評価を行った。エッチング後の表面の光学顕微鏡写真を図4に示す。観察面積は図3と同じである。図4では、A及びBのエッチピット以外に、基底面転位によるCのエッチピットが観察されており、2インチウェーハ内を複数点評価した結果、基底面転位密度の平均は約3000/cm2であった。このような基板を用いてPINダイオードを形成した際、ダイオードの順方向特性における立ち上がり電圧が時間と共に変化する経時劣化が見られた。
(Comparative example)
As a comparative example, epitaxial growth was performed on the Si surface of a 2 inch (50 mm) SiC single crystal substrate having a 4H type polytype, which was sliced, roughly ground, and normally polished as in Example 1. The off angle of the substrate is 8 °, and the defect density existing on the substrate surface is the same as in Example 1. The growth procedure, gas flow rate, temperature and the like are the same as in Example 1, but the growth is not interrupted. KOH etching was performed on the grown film, and the defect density due to etch pits was evaluated. An optical micrograph of the etched surface is shown in FIG. The observation area is the same as in FIG. In FIG. 4, in addition to the A and B etch pits, C etch pits due to basal plane dislocations are observed. As a result of evaluating multiple points in a 2-inch wafer, the average basal plane dislocation density is about 3000 / cm 2. Met. When a PIN diode was formed using such a substrate, deterioration over time was observed in which the rising voltage in the forward characteristics of the diode changed with time.
この発明によれば、SiC単結晶基板上へのエピタキシャル成長において、基底面転位の少ない高品質エピタキシャル膜を有するエピタキシャルSiC単結晶基板を作成することが可能である。そのため、このような基板上に電子デバイスを形成すればデバイスの特性及び歩留まりが向上することが期待できる。本実施例においては、材料ガスとしてSiH4及びC3H8を用いているが、Si源としてトリクロルシラン、C源としてC2H4等を用いた場合についても同様である。 According to the present invention, it is possible to produce an epitaxial SiC single crystal substrate having a high-quality epitaxial film with few basal plane dislocations during epitaxial growth on the SiC single crystal substrate. Therefore, if an electronic device is formed on such a substrate, it can be expected that the characteristics and yield of the device are improved. In this embodiment, SiH 4 and C 3 H 8 are used as the material gas, but the same applies to the case where trichlorosilane is used as the Si source, C 2 H 4 is used as the C source, and the like.
A 螺旋転位によって生じるエッチピット
B 刃状貫通転位によって生じるエッチピット
C 基底面転位によって生じるエッチピット
A Etch pit caused by screw dislocation
B Etch pit caused by edge threading dislocation
C Etch pit caused by basal plane dislocation
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