JP4826994B2 - Manufacturing method of SOI wafer - Google Patents

Description

The present invention relates to the production how the SOI wafer.

JP-A-9-64319

  In the manufacture of semiconductor devices such as CMOS-IC and high voltage IC, a silicon oxide film layer is formed on a silicon single crystal substrate (hereinafter also referred to as a base wafer), and another silicon single crystal layer is formed on the SOI. A so-called SOI wafer formed by lamination as a (Silicon on Insulator) layer is used. As a method for manufacturing an SOI wafer, a bonding method, a SIMOX method, and the like are known. In the bonding method, a base wafer made of a silicon single crystal and a bond wafer are bonded to each other through a bonding heat treatment via a silicon oxide film layer, and then the bond wafer is polished, etched, or separated by using an ion implantation layer (so-called “so-called”). This is a method of forming an SOI layer by reducing the thickness by a smart cut (registered trademark) method. On the other hand, the SIMOX method is a method in which a buried oxide film is formed by performing an internal oxidation heat treatment after implanting high-concentration oxygen ions into a silicon single crystal substrate.

  Conventionally, the SOI wafer has a drawback that the substrate is easily warped because the thermal expansion coefficients of the base wafer and SOI layer made of silicon single crystal and the silicon oxide film layer made of silicon dioxide are different from each other. When the warpage of the SOI wafer becomes large, it may be difficult to focus on the photolithography process, thereby making it difficult to form an element. This defect becomes more prominent as the integration rate of the integrated circuit increases.

  Conventionally, various warping measures have been taken for warping of the SOI wafer as described above, mainly focusing on the warping generated during the bonding heat treatment in the bonding method and the internal oxidation heat treatment in the SIMOX method. For example, Patent Document 1 discloses that a defect-free layer in which the formation density of oxygen precipitates is zero is formed in a region in contact with a silicon oxide film layer of a base wafer, and the remaining wafer region has an oxygen precipitate density higher than that of the defect-free layer. An SOI wafer structure having an oxygen precipitate layer having a thermal conductivity is disclosed, and the warpage of the wafer due to the above-described difference in thermal expansion coefficient can be prevented.

  However, as a result of investigations by the present inventors, it has been found that the cause of warping of the SOI wafer is not necessarily caused only by the difference in linear expansion coefficient between the silicon oxide film and the base wafer or silicon forming the SOI layer. . For example, the present inventors have found that a warp of an SOI wafer, in which warpage was not so remarkable in a state before being subjected to device processing, becomes apparent during heat treatment in device processing, and cannot be understood by the above warp generation mechanism. Often faced. This phenomenon is more likely to occur when the thickness of the SOI layer or silicon oxide layer is reduced (for example, each 2 μm or less) and the wafer diameter is large. This is particularly noticeable (for example, in the case of 200 mm or more).

  An object of the present invention is to provide a method for manufacturing an SOI wafer that has a relatively thin silicon oxide film and an SOI layer, and is less likely to warp during a heat treatment performed in a device process, and an SOI wafer manufactured thereby. There is to do.

In order to solve the above-described problems, the SOI wafer manufacturing method of the present invention has a structure in which an SOI layer made of a semiconductor single crystal is bonded to a first main surface of a base wafer made of a silicon single crystal via a silicon oxide film. And on the SOI layer side, a method of manufacturing an SOI wafer that performs heat treatment by infrared irradiation with a peak wavelength λ of 0.7 μm or more and 2 μm or less,
Affixing the first main surface of a base wafer made of silicon single crystal and the second main surface of a bond wafer made of semiconductor single crystal through a silicon oxide film formed on at least one of these main surfaces A bonding process, a thickness reducing process for reducing the thickness of the bond wafer to form an SOI layer, and a bonding heat treatment process for increasing the bonding of the SOI layer to the base wafer via the silicon oxide film,
The thickness t1 of the silicon oxide film after bonding and the thickness t2 of the SOI layer are defined such that the refractive index in the infrared wavelength region of SiO ₂ forming the silicon oxide film is n1, and the refractive index of the semiconductor forming the SOI layer is n2. The optical thickness t _OP in the infrared wavelength region between the silicon oxide film and the SOI layer is t _OP = n1 × t1 + n2 × t2, and 0.1λ <t _OP <2λ is satisfied, and (t1 × n1 ) / (T2 × n2) is set within the range of 0.2 to 3,
Furthermore, prior to the bonding heat treatment step, a nuclear killer heat treatment is performed to eliminate or reduce oxygen precipitate precipitation nuclei in the base wafer, and the density of the oxygen precipitate precipitation nuclei in the base wafer before the nuclear killer heat treatment. Is 1 × 10 ⁹ / cm ³ or more, and by performing the nuclear killer heat treatment, the formation density of oxygen precipitates in the base wafer after the bonding heat treatment is adjusted to less than 1 × 10 ⁹ / cm ³ ,
The heat treatment by infrared irradiation is performed by an infrared light source disposed only on the first main surface side of the SOI layer. The SOI layer in the present invention is not only a typical SOI layer made of silicon single crystal but also a SiGe layer or Ge layer represented by Si _x Ge _1-X (0 ≦ X <1), or other This means a broadly defined SOI (Semiconductor On Insulator) layer including a thin semiconductor layer.

An SOI wafer related to the present invention has a structure in which an SOI layer made of a semiconductor single crystal is bonded to a first main surface of a base wafer made of a silicon single crystal via a silicon oxide film, and the SOI wafer On the layer side, an SOI wafer on which heat treatment by infrared irradiation with a peak wavelength λ of 0.7 μm or more and 2 μm or less is scheduled,
The thickness t1 of the silicon oxide film and the thickness t2 of the SOI layer are such that the refractive index in the infrared wavelength region of SiO ₂ forming the silicon oxide film is n1, and the refractive index of the semiconductor forming the SOI layer is n2, and the silicon oxide film The optical thickness t _OP in the infrared wavelength region between the film and the SOI layer is t _OP = n1 × t1 + n2 × t2, 0.1λ <t _OP <2λ is satisfied, and (t1 × n1) / (t2 Xn2) is set within the range of 0.2 to 3,
Furthermore, it is Ru is assumed that the formation density of the oxygen precipitates in the base wafer is adjusted to less than 1 × 10 9 ^/ cm ^3.

In the present invention, the formation density of oxygen precipitates in the base wafer is determined by using an OPP (Optical Precipitate Profiler: High) which is a device using a well-known infrared interference method with the second main surface of the base wafer as a mirror polished surface. Fine precipitates with a diameter of 50 nm or more detected by Yield Technology (Bulk)
The number per 1 cm ^{3 of} Micro-Defect (BMD). Hereinafter, when simply referred to as “oxygen precipitate” in the present invention, it means BMD. In bonding, a silicon oxide film may be formed only on one of the base wafer and the bond wafer, or both the oxide films may be integrated by bonding to both. In the latter case, the thickness of the silicon oxide film after the bonding corresponds to the total thickness of the silicon oxide films formed on both sides.

As a result of detailed examination of the relationship between the heat treatment conditions when forming an SOI wafer into a device and the warpage of the generated wafer, the present inventor has come to grasp the following facts.
(1) The warpage of the SOI wafer, in which the warpage was not so remarkable in the state before being subjected to the device processing, may become apparent during the heat treatment in the device processing. Specifically, this is a case where heat treatment heating is performed by infrared irradiation from the SOI layer side.
(2) The occurrence of warpage is remarkable when the wavelength of infrared rays to be irradiated (hereinafter represented by the peak wavelength λ) and the optical thickness t _OP in the infrared wavelength region between the silicon oxide film and the SOI layer are constant. In particular, the occurrence of warping is significant when the relationship close to t _OP = 0.5λ is satisfied.
(3) The SOI wafer in which warpage has occurred has a high level of 1 × 10 ⁹ or more in the formation density of oxygen precipitates on the base wafer.

As a result of further intensive studies, when the formation density of oxygen precipitates in the entire base wafer is adjusted to less than 1 × 10 ⁹ / cm ³ , it is possible to make a device even under the above conditions (1) and (2). It has been found that the occurrence of warpage of the SOI wafer during the heat treatment can be effectively suppressed, and the present invention has been completed.

  The reason why warp was particularly likely to occur when the condition (2) was satisfied during heat treatment with infrared irradiation is considered as follows. First, a resistance heating lamp such as a halogen lamp is often used as an infrared source used for heat treatment. As shown in FIG. 12, the peak wavelength λ varies depending on the light source temperature, but most of them fall within the range of 0.7 μm to 2 μm. The optical spectrum is generally broad, but the main component in the infrared region contributing to heating is within the wavelength range of 0.5 μm to 3 μm.

In relation to the above peak wavelength λ, the optical thickness t _OP (= n1 × t1 + n2 × t2) in the infrared wavelength region between the silicon oxide film and the SOI layer satisfies 0.1λ <t _OP <2λ. In addition, the situation where (t1 × n1) / (t2 × n2) is 0.2 or more and 3 or less means that both the silicon oxide film and the SOI layer are formed with a small thickness of less than 4 μm (preferably The thickness t1 of the silicon oxide film is, for example, not less than 10 nm and not more than 500 nm, and the thickness t2 of the SOI layer is, for example, not less than 10 nm and not more than 500 nm). If the thickness of the base wafer is the same as that of a normal SOI wafer (for example, a diameter of 200 mm and not less than 600 μm and not more than 800 μm), with this thickness of silicon oxide film, the degree of warpage based on the difference in linear expansion coefficient from Si is For example, it is considered to be much smaller than the configuration described in Patent Document 1 and the like. However, in a state where the formation density of oxygen precipitates on the base wafer is high to 1 × 10 ⁹ or more, when heat treatment is performed by infrared irradiation from the SOI layer side, the warpage amount is unexpectedly large, for example, an SOI wafer having a diameter of 200 mm Then, a large warp of 200 μm to 300 μm may occur. Therefore, it is clear that the main factor of the warpage is not a difference in linear expansion coefficient between layers that has been assumed in the past. The inventor believes that the cause of this warpage is a decrease in strength of the base wafer due to the formation of oxygen precipitates and non-uniform heating due to infrared reflection on the SOI layer side. This will be described in more detail below.

  The infrared reflection on the surface of the SOI layer may be total reflection derived from the difference in refractive index between the ambient atmosphere (for example, air) and the SOI layer. This is when the incident angle of infrared rays is larger than a certain critical angle. In the case where infrared rays can be uniformly irradiated on the entire surface of the wafer with a wide light source in the plane, the problem is not so much. However, when a silicon oxide film and an SOI layer having different refractive indexes are combined, the incident direction of infrared rays is close to the surface normal direction depending on the relationship between the layer thickness and the incident infrared wavelength. Even so, very strong reflections may occur.

  For example, in the layer thickness direction of a laminate in which the refractive index changes periodically, such as a structure in which silicon oxide films and silicon layers are alternately laminated, electrons in the crystal against photoquantized electromagnetic wave energy It is known that a band structure similar to energy is formed, and electromagnetic waves having a specific wavelength corresponding to the period of change in refractive index are prevented from entering the laminate structure. Such a structure is referred to as a photonic band structure, and in the case of a multilayer film, the refractive index change is formed only in the layer thickness direction, so in a narrow sense it is also referred to as a one-dimensional photonic band gap structure.

In such a photonic band gap structure, as the number of stacking periods increases, the wavelength range in which incidence is prohibited (that is, the wavelength range in which the reflectivity increases: hereinafter referred to as the photonic band gap region) tends to become wider. Even if the number of stacking periods is 1, the photonic band gap region is only relatively narrowed, and very large reflection is generated near the gap center wavelength. A typical SOI wafer structure, that is, a structure in which a silicon oxide film and an SOI layer are formed on a base wafer one by one corresponds to this, and the conditions for generating a one-dimensional photonic band gap structure are silicon oxide. This is a case where the optical thickness t _OP = n1 × t1 + n2 × t2 in the infrared wavelength region between the film and the SOI layer satisfies ½ (that is, 0.5λ) of the wavelength λ of the incident infrared rays. Actually, the reflectance shows a maximum value in the vicinity of t _OP = 0.5λ, but the reflectance is still large even in a wavelength region slightly deviated from this condition, and the peak wavelength of the incident infrared spectrum is λ. Actually, as shown in FIG. 12, the wavelength of the incident line is distributed over a wide range including λ. Therefore, if these effects are taken into consideration, the wavelength region in which relatively strong reflection occurs is also 0.1λ <t It is expanded to about _OP <2λ. The ratio of the optical thicknesses of both layers (t1 × n1) / (t2 × n2) is likely to cause relatively strong reflection when the ratio is 0.2 or more and 3 or less, particularly when the ratio is around 1. When the optical thicknesses of the two layers are equal to each other, the wavelength range where strong reflection occurs is the widest and the reflectance is high. The refractive index n1 in the infrared wavelength region of the silicon oxide film is 1.5, the refractive index n2 of the SOI layer is 3.5 in the case of silicon single crystal, and 4.0 in the case of Ge (germanium). In the case of Si _x Ge _1-x , Si is 3.5, Ge is 4.0, and a refractive index linearly interpolated by the value of the mixed crystal ratio x is used.

FIG. 13 shows the relationship between the wavelength of the incident line and the reflectance in the combination of the SOI layer and the silicon oxide film having various thicknesses, and the total optical thickness t _{OP of} each layer and the correspondence to this. The center wavelength λ _PBG (≡2t _OP ) of the photonic band gap is also shown (incident angle is 5 °). Under any condition, it is clear that the reflectance is maximized in the vicinity of λ _PBG , but the wavelength region where reflection of 50% or more occurs is in a wide range from at least 700 nm to 1.6 μm. I understand that. The present invention, SOI wafer structure thus reflectance for the incident wavelength is maximized in the vicinity of lambda _PBG, and having a reflectivity of 50% or more in a wide wavelength region (at least 500nm or more regions) containing lambda _PBG It is extremely effective against.

If the center wavelength of the photonic band gap formed by the silicon oxide film and the SOI layer is close to the wavelength λ of the incident infrared light, even if the surface of the SOI layer is evenly irradiated with infrared light, the influence of reflection causes the wafer The heating distribution in the layer thickness direction becomes non-uniform (this non-uniformity does not necessarily occur so that the SOI layer side where reflection occurs is at a low temperature, as will be described in detail later). When temperature non-uniformity occurs in the layer thickness direction of the base wafer, the in-plane thermal stress of the base wafer is also distributed in the layer thickness direction and acts as warp generation stress. On the other hand, when oxygen precipitates are formed in the base wafer, a large number of crystal defects such as slip dislocations are introduced in the silicon single crystal bulk region constituting the wafer around the oxygen precipitates, and the strength is reduced. It is in a state. If oxygen precipitates are formed at a high density inside the base wafer, the rigidity of the base wafer cannot resist the warp stress in the layer thickness direction derived from the heating non-uniformity, and a significant warp occurs. It is considered a thing. Therefore, if the formation density of oxygen precipitates in the entire base wafer is suppressed to less than 1 × 10 ⁹ / cm ³ , strong warpage occurs in the SOI wafer after heat treatment even if heating nonuniformity occurs due to the photonic band gap effect. This can be effectively suppressed. The formation density of oxygen precipitates in the base wafer is desirably less than 5 × 10 ⁸ / cm ³ , more desirably less than 5 × 10 ⁷ / cm ³ .

  In particular, when the heat treatment of the SOI wafer is performed using a so-called single-sided heat treatment apparatus that is performed by an infrared light source disposed only on the first main surface side of the SOI layer, the effect of the present invention is particularly remarkable. Is done. In such a heat treatment apparatus, the temperature of the base wafer is usually set while the temperature of the base wafer is measured by a temperature sensor (for example, a radiation thermometer) disposed on the second main surface side of the base wafer. Heating is performed by controlling the heat generation output of the infrared light source so that the temperature is raised and maintained at the heat treatment temperature. At this time, if the SOI layer forms a photonic band gap structure together with the silicon oxide film, the following situation occurs.

That is, in the initial stage, the temperature of the base wafer detected by the temperature sensor is lower than the set temperature, so the power of the infrared light source is controlled in the increasing direction and the temperature rise starts. However, since most of the incoming infrared rays are reflected on the SOI layer side, the temperature detected on the second main surface side of the base wafer does not rise easily. As a result, the control unit of the light source increases the infrared power more and more to bring the detected temperature closer to the target value. That is, the power of the infrared light source is controlled in a state shifted to the over side as compared with a case where reflection is not so much (for example, when heat-treating a mirror-polished wafer or the like not forming an SOI layer). On the other hand, heat transfer from the SOI layer surface to the base wafer side involves not only radiant heat transfer by direct incidence of infrared rays but also heat conduction from the ambient atmosphere. If the power of the infrared light source is shifted to the over side, the temperature of the ambient atmosphere that is not affected by the reflection is abnormally increased, and the temperature on the SOI layer side that is in contact with the temperature is excessively increased. The temperature difference is also very large. As a result, the warpage of the SOI wafer is more likely to occur. However, as in the present invention, if the formation density of oxygen precipitates in the entire base wafer is suppressed to less than 1 × 10 ⁹ / cm ³ , the SOI wafer can be obtained even when heat treatment is performed using such a heating method. Can be sufficiently suppressed.

  This effect is particularly remarkable when the heat treatment set temperature is as high as 1000 ° C. or more and 1200 ° C. or less, and the rate of temperature rise to the set temperature is as high as 50 ° C./sec or more and 100 ° C./sec or less. In other words, when the heating rate is set to be large, the power of the infrared light source is increased before the heat conduction in the thickness direction of the wafer is sufficiently advanced, and the temperature is measured on the second main surface of the base wafer. The temperature rise is increasingly delayed with respect to the temperature on the SOI layer side. As a result, the power of the infrared light source is more likely to overshoot and warpage is likely to occur.

  Oxygen precipitates in the base wafer are particularly likely to occur when the base wafer is composed of a silicon single crystal having a relatively high oxygen content. Specifically, the Czochralski method (CZ method) using a quartz crucible When the wafer is manufactured by the above-described method, a large amount of oxygen precipitates that cause warpage are likely to be generated due to various thermal histories applied during the manufacturing process of the SOI wafer. Therefore, in the manufacturing process of the SOI wafer, it is desirable to appropriately perform heat treatment for reducing oxygen precipitates from the viewpoint of reducing the final density of oxygen precipitates formed on the SOI wafer.

  A silicon single crystal wafer having a relatively high oxygen concentration, such as a CZ wafer (the oxygen concentration of a bulk silicon single crystal is, for example, 12 ppma or more and 25 ppma or less) is oxygenated by cooling after crystal pulling or by high-temperature heat treatment at 1000 ° C. or more. At the time of cooling after the solid solution is formed, fine oxygen precipitates pass through a temperature range around 500 ° C., specifically, 480 ° C. slightly higher than 450 ° C. at which the thermal donor is formed. It is known that (BMD) precipitation nuclei (embryo: size is usually 1 nm or less), and the longer the holding time near the center temperature, the higher the density of precipitation nuclei formed. And when this precipitation nucleus is maintained above the nucleation temperature and below a certain critical temperature related to re-solution in the Si single crystal bulk, the nucleus grows into BMD. It is known to disappear if kept at a high temperature. In the manufacturing process of SOI wafers, it is necessary to pay attention to the bonding heat treatment for increasing the bonding strength between the SOI layer and the base wafer. The temperature is set to 1200 ° C. or lower and is performed in a batch for a plurality of SOI wafers. In this bonding heat treatment, the processing temperature is the temperature range where the nuclei disappear, but since the heat treatment is a batch heat treatment with a relatively large processing capacity, the temperature rising rate to the set processing temperature is as low as 10 to 40 ° C./min. The precipitation nuclei will grow into BMD when the temperature is raised. In this specification, the unit of oxygen concentration is shown using the standard of JEIDA (abbreviation of Japan Electronic Industry Promotion Association. Currently renamed JEITA (Japan Electronics and Information Technology Industries Association)). .

Therefore, prior to this bonding heat treatment step, if a nuclear killer heat treatment is performed to eliminate or reduce the precipitation nuclei of oxygen precipitates in the base wafer, the number of precipitation nuclei that grow into BMD during the bonding heat treatment is greatly reduced. Thus, the formation density of BMD in the base wafer of the SOI wafer obtained can be easily reduced to less than 1 × 10 ⁹ / cm ³ . This nuclear killer heat treatment needs to reach a set temperature at a higher temperature rise rate than the bonding heat treatment. Further, the heat treatment holding temperature is desirably 900 ° C. or higher and 1200 ° C. or lower. If it is less than 900 ° C., it is difficult to sufficiently re-dissolve / dissolve the precipitation nuclei, and heat treatment exceeding 1200 ° C. may lead to deformation of the SOI wafer. Further, when heating to the heat treatment holding temperature, it is desirable to raise the temperature at a rate of 5 ° C./second or more and 100) ° C./second or less. If the heating rate is less than 5 ° C./second, the precipitation nuclei may grow into BMD, and it is difficult to raise the heating rate exceeding 100 ° C./second with a normal heating apparatus. The nuclear killer heat treatment requiring such a rate of temperature increase is advantageously performed using a single wafer rapid thermal processing (RTP) apparatus using infrared lamp heating. The heating is more preferably performed by simultaneously heating both surfaces of the SOI wafer with an infrared lamp, but can also be performed by heating only one surface.

  As the atmosphere for the nuclear killer heat treatment, for example, a hydrogen atmosphere, an Ar atmosphere, or a mixed atmosphere thereof can be adopted. In this case, the heat treatment holding temperature is preferably set to 900 ° C. or higher and 1100 ° C. or lower. In the case of a hydrogen atmosphere or an Ar atmosphere, if a heat treatment exceeding 1100 ° C. is performed, the introduction of atomic vacancies (which mediate diffusion during oxygen precipitation) into the silicon single crystal is promoted during the heat treatment, and the BMD formation density This is because there is a case where it is increased on the contrary. On the other hand, the nuclear killer heat treatment can be performed in an oxygen atmosphere. Since introduction of atomic vacancies is suppressed under an oxygen atmosphere, the heat treatment holding temperature can be set at a temperature set at 900 ° C. or higher and 1200 ° C. or lower which is expanded on the high temperature side.

  Next, prior to the bonding step, the thickness reduction step includes a delamination ion implantation layer forming step for forming a delamination ion implantation layer by implanting ions from the ion implantation surface on the second main surface side of the bond wafer. Then, after the bonding step, the silicon single crystal thin layer to be the SOI layer can be implemented as including a peeling step of peeling off from the bond wafer in the peeling ion implantation layer (so-called smart cut (trade name)). Law). In this case, the nuclear killer heat treatment is desirably performed after the peeling step. When the nuclear killer heat treatment is performed before the peeling process, the silicon single crystal thin layer that should become the SOI layer once separated in the ion implantation layer for peeling is fused with the remaining part of the bond wafer, and it becomes difficult to separate again. Because there is.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 illustrates a basic embodiment of a method for manufacturing an SOI wafer according to the present invention. First, as shown in the step (a), for example, a base wafer 7 made of a silicon single crystal and a bond wafer 1 made of a silicon single crystal substrate shown in the step (b) are prepared. These silicon single crystals are manufactured by a well-known Czochralski method using a quartz crucible, and those having a relatively high initial oxygen content of, for example, 12 ppma to 25 ppma are used. Further, as the bond wafer 1, an epitaxial wafer obtained by epitaxially growing a semiconductor single crystal such as Si, SiGe, or Ge on a silicon single crystal wafer can also be used.

  Next, as shown in step (c), a silicon oxide film 2 is formed as an insulating film on at least the first main surface J side of the bond wafer 1. The silicon oxide film 2 can be formed by, for example, thermal oxidation such as wet oxidation or dry oxidation, but a method such as CVD (Chemical Vapor Deposition) can also be employed. The film thickness tx of the silicon oxide film is set to a value not less than 10 nm and not more than 500 nm, for example. Then, as shown in step (d), ions are implanted by irradiating, for example, a hydrogen ion beam with the first main surface J side of the bond wafer 1, in this embodiment, the surface of the silicon oxide film 2 as the ion implantation surface. Then, the ion implantation layer 4 for peeling is formed. The ions for forming the peeling ion implantation layer 4 can be at least one selected from an ion group consisting of hydrogen ions and rare gas (He, Ne, Ar, Kr, Xe) ions. Although hydrogen ions are used in this embodiment, the ion implantation layer 4 for peeling may be formed by implanting rare gas ions such as helium ions, neon ions, or argon ions instead of hydrogen ions.

  The bond wafer 1 and the base wafer 7 on which the ion implantation layer 4 for peeling is formed are cleaned with a cleaning solution, and further, as shown in the step (e), both wafers 1 and 7 are formed on the side where the ion implantation layer 4 is formed ( That is, bonding is performed on the first main surface J, K side). And as shown to a process (f), by carrying out the separation heat processing of the laminated body at low temperature of 400-600 degreeC, the bond wafer 1 peels in the density | concentration peak position of the above-mentioned ion implantation layer 4 for peeling, The portion remaining on the base wafer 7 side becomes the SOI layer 15 (peeling process). In some cases, the heat treatment for stripping can be omitted by increasing the amount of ion implantation when forming the ion implantation layer 4 for stripping or by activating the surface by previously performing plasma treatment on the surface to be overlapped. . Further, the remaining bond wafer portion 3 after peeling can be reused again as a bond wafer or a base wafer after re-polishing the peeled surface. In addition, the temperature range of said peeling heat processing has overlapped with the formation temperature of the precipitation nucleus of the micro oxygen precipitate (BMD) already demonstrated, and a precipitation nucleus may increase during this heat processing. However, if the nuclear killer heat treatment described later is performed thereafter, the BMD precipitation nuclei can be reduced without any problem.

The thickness of the SOI layer is 10 nm or more and 500 nm or less, and can be adjusted by the formation depth of the ion implantation layer for peeling. As shown in FIG. 10, the thickness t1 of the silicon oxide film 2 after bonding and the thickness t2 of the SOI layer 15 are such that the refractive index in the infrared wavelength region of SiO ₂ forming the silicon oxide film 2 is n1 = 1. .5, the refractive index n2 of the Si forming the SOI layer 15 was 3.5, the optical thickness _{t OP} in the infrared wavelength region between their silicon oxide film 2 and the SOI layer _{15 t OP = n1 × t1 +} n2 × t2 As follows, 0.1λ <t _OP <2λ is satisfied, and (t1 × n1) / (t2 × n2) is set in the range of 0.2 to 3.

  In order to obtain a final SOI wafer, a bonding heat treatment for firmly bonding the base wafer 7 and the SOI layer 15 via the silicon oxide film 2 is necessary after the above-described peeling step. As shown in FIG. 6, this bonding heat treatment is performed at a temperature of 1000 ° C. or more and 1250 ° C. or less in a batch type heat treatment furnace BF of a plurality of wafers 50 ′ (only one is shown in the figure). . Because of the batch heat treatment having a relatively large processing capacity, the rate of temperature rise to the set processing temperature is as low as 10 to 40 ° C./min. At the time of temperature rise, the precipitation nuclei N in the base wafer 7 are oxygen precipitates (BMD). ) Grow to P. In the silicon single crystal bulk region constituting the wafer around the oxygen precipitate P, a large number of crystal defects D such as slip dislocations are introduced and the strength is lowered.

Therefore, prior to the bonding heat treatment (and after the peeling step), a nuclear killer heat treatment as shown in FIG. 3 is performed. That is, in the state of Step A before the heat treatment, BMD nuclei N having a relatively high density (for example, 1 × 10 ⁹ / cm ³ or more) are formed in the base wafer 7 of the bonded body 50 ′. Next, in the nuclear killer heat treatment shown in Step B, the heat treatment holding temperature is 900 ° C. or higher and 1200 ° C. or lower (desirably 1000 ° C. or higher and 1200 ° C. or lower), and the temperature rise to the heat treatment holding temperature is 5 ° C./second or higher and 100 ° C./second. Do the following: This heat treatment can be performed by the RTP apparatus described above.

  FIG. 2 shows an example of a single-sided heating type RTP apparatus, in which a container 2 in which an accommodation space 14 for accommodating only one bonded body 50 ′ as an object to be processed is formed, and bonding in the accommodation space 14 are bonded. And a heating lamp 46 composed of a tungsten-halogen lamp for heating the body 50 '. The heating lamp 46 is disposed opposite to the upper surface side of the bonded body 50 ′ with the heating gap 25 interposed therebetween. On the back side of the bonded body 50 ′, the reflection plate 28 is disposed so as to face the bonded body 50 ′, and a reflection gap 35 is formed. The reflection plate 28 has an end of a glass fiber 30 (connected to a radiation thermometer (not shown)) for measuring the temperature of the back surface side of the bonded body 50 ′ (that is, the second main surface side of the base wafer). Exposed. And the heat ray taken out from the reflective space | gap 35 via the glass fiber 30 is separately detected with the known radiation thermometer which makes a temperature detection part, and is converted into a temperature signal. The plurality of heating lamps 46 arranged corresponding to the respective temperature measuring positions by the glass fiber 30 can be independently controlled in output.

Due to the rapid temperature increase as described above, as shown in Step B of FIG. 3, the precipitation nuclei N formed in the base wafer reach a temperature at which it can be dissolved in the silicon single crystal bulk before growing into BMD. Therefore, the nucleus formation density after heat treatment can be greatly reduced. As a result, since the number of precipitation nuclei N is reduced even after performing the bonding heat treatment as in Step C of FIG. 3, the formation density of the oxygen precipitates P that is manifested by the growth is 1 × 10 ^9. / Cm ³ or less (desirably, 5 × 10 ⁸ / cm ³ or less).

When the nuclear killer heat treatment is performed with the above-described single-sided RTP apparatus, as shown in FIG. 3, infrared irradiation can be performed on the SOI layer 15 side, and the viewpoint of reducing the influence of reflection on the SOI layer side. From FIG. 4, it is more desirable to irradiate infrared IR on the second main surface (back surface) side of the base wafer 7 as shown in FIG. Moreover, in order to perform more uniform heating, as shown in FIG. 5, you may make it heat by irradiating infrared rays IR to both surfaces of bonding body 50 '. The atmosphere of the nuclear killer heat treatment can be a hydrogen atmosphere, an Ar atmosphere, or a mixed atmosphere thereof (pressure is, for example, 10 ³ Pa or more and 10 ⁶ Pa or less). In this case, the holding temperature of the nuclear killer heat treatment is preferably 1100 ° C. or lower. On the other hand, an oxygen-containing atmosphere (pressure is, for example, 1 atm) can be used as the atmosphere for the nuclear killer heat treatment. In this case, the upper limit of the desirable holding temperature range can be extended to 1200 ° C. As the oxygen-containing atmosphere, for example, an O ₂ / N ₂ mixed atmosphere or an O ₂ 100% atmosphere can be used.

  The SOI wafer 50 obtained by the bonding heat treatment is subjected to various heat treatments for device fabrication. For example, when the doping region is patterned by ion implantation, since the dopant immediately after ion implantation is not activated as a carrier source, heat treatment for activating this is performed. For example, in the case of B dope, the temperature of the active heat treatment is, for example, 1100 ° C. or more and 1200 ° C. or less. This heat treatment is also performed using the same RTP apparatus 1 as in FIG. 2 (the object to be processed is an SOI wafer 50), and the rate of temperature rise to the heat treatment temperature is 50 ° C./second or more and 100 ° C./second or less (for example, Rapid heating set to 75 ° C./second). The SOI wafer 50 is arranged on the upper surface side so that the SOI layer faces the heating lamp 46 side. The infrared ray emitted from the heating lamp 46 is a near infrared ray having a continuous spectrum as shown in FIG. 12 and having a peak wavelength λ of 0.7 μm or more and 2 μm or less (the same infrared ray is also used in the nuclear killer heat treatment).

  FIG. 9 is a graph showing an example of the temperature rise profile and the power control profile of the heating lamp 46 (measurement of a plurality of points in the wafer surface) in comparison with an SOI wafer and a reference mirror wafer (silicon single crystal wafer). It is. In the mirror wafer, a temperature control profile of 75 ° C./second is realized, but the power control profile is almost 70% or less of the full power except for an instantaneous value, and the heating lamp 46 is overheated. There is no sign of doing. However, in the case of the SOI wafer, it can be seen that a remarkable overshoot exceeding 80% of the full power occurs during the temperature rising. The reason is considered as follows.

In the structure in which the silicon oxide film 2 and the SOI layer 15 are formed on the base wafer 7 one by one, as described above, the thickness t1 of the silicon oxide film 2 and the thickness t2 of the SOI layer 15 are the silicon oxide film. The refractive index in the infrared wavelength region of SiO ₂ forming ₂ is n1 = 1.5, the refractive index n2 of Si forming the SOI layer 15 is 3.5, and the silicon oxide film 2 and the SOI layer 15 are subjected to heat treatment. When the optical thickness t _OP in the infrared wavelength range to be used is t _OP = n1 × t1 + n2 × t2, the peak wavelength of the infrared to be used is λ (see FIG. 12), and 0.1λ <t _OP <2λ When the layer thicknesses t1 and t2 are selected so that both are satisfied and (t1 × n1) / (t2 × n2) is 0.2 or more and 3 or less, the above-described first order as shown in FIG. For formation of original photonic band gap structure Ri, strong reflection occurs with infrared IR in the SOI layer 15 side. In the single-sided heating type RTP apparatus 1 as shown in FIG. 2, as shown in FIG. 11, most of the incoming infrared rays are reflected on the SOI layer 15 side, so that it is detected on the second main surface side of the base wafer 7. The temperature does not rise easily. As a result, the control unit of the heating lamp 46 increases the power more and more so as to bring the detected temperature closer to the target value, and the above-described overshoot occurs. The heat transfer from the surface of the SOI layer 15 to the base wafer 7 side involves not only radiant heat transfer by direct incidence of infrared rays but also heat conduction from the surrounding atmosphere. When the power of the heating lamp 46 is shifted to the over side, the temperature of the surrounding atmosphere that is not affected by the reflection is abnormally increased, and the temperature on the SOI layer 15 side in contact with the temperature is excessively increased. The temperature difference between the front and back is also very large.

  At this time, as shown in FIG. 6, when the formation density of the oxygen precipitates P of the base wafer 7 is high, the SOI wafer 50 whose strength is reduced by introducing crystal defects around the oxygen precipitates P is shown in FIG. 11, the thermal expansion in the in-plane direction on the SOI layer 15 side, which is the high temperature side, increases, and a strong warp is generated so as to protrude upward. For example, as shown in FIG. 8, a first conductivity type ion implantation region (for example, a p-type region in the case of B) is formed by patterning by a photolithography process, and then a rapid heat treatment is performed to activate the ion implantation region. When implemented, warping occurs. If the second conductivity type ion implantation region (for example, an n-type region in the case of P) is to be formed by patterning in a state where the warp has occurred, the mask is relatively moved relative to the SOI layer due to the in-plane displacement due to the warp. There is a problem that the position of the ion-implanted region of the second conductivity type is easily shifted.

However, as shown in FIG. 3, if the formation density of the oxygen precipitates P in the entire base wafer 7 is suppressed to less than 1 × 10 ⁹ / cm ³ , heat treatment at the time of device fabrication is performed using such a heating method. Even in this case, the warpage of the SOI wafer 50 can be sufficiently suppressed, and as a result, the occurrence of defective pattern deviation as shown in FIG. 8 can be effectively suppressed.

  Hereinafter, experimental results performed to confirm the effects of the present invention will be described. First, two types of CZ silicon single crystal substrates (diameter 200 mm, thickness 625 μm) having an oxygen concentration of 16 ppma and 20 ppma were prepared as base wafers. Then, using the base wafer, the thickness t1 of the silicon oxide film is set to 0.15 μm, and the thickness t2 of the SOI layer is 0.05 μm ((t1 × n1) / (t2 × n2) = After hydrogen ion implantation was performed so as to satisfy 1.29), the bond wafer was bonded, and a peeling heat treatment (step (f) in FIG. 1) was performed at 500 ° C. Then, the bonded body after the peeling heat treatment is subjected to a nuclear killer heat treatment at various temperatures and times using an RTP apparatus in a hydrogen atmosphere, and then 1100 ° C. in a batch heat treatment furnace as shown in FIG. Various SOI wafer samples were obtained by bonding heat treatment for 120 minutes. For the base wafer after the bonding heat treatment, BMD was measured by a well-known OPP (Optical Precipitate Profiler), and the formation density was calculated. The results are shown in FIG. It can be seen that the effect of decreasing the BMD density starts to occur when the nuclear killer heat treatment temperature is 900 ° C. or higher, and particularly, the effect is most remarkable at 1000 ° C. or higher and 1100 ° C. or lower.

  Of the above SOI wafer samples, those subjected to nuclear killer heat treatment for 30 seconds, using a single-sided heating type RTP apparatus (infrared center wavelength: 1 μm) as a simulated device process, a heating rate of 75 ° C./second The temperature was raised to 1100 ° C., and after 60 seconds, the heating was stopped. Then, the amount of warpage of the SOI wafer sample for which the simulated device forming step was completed was measured with a commercially available flatness measuring machine (manufactured by ADE). The results are shown in Table 1.

  According to this result, it can be seen that the amount of warpage is significantly reduced in the sample subjected to the nuclear killer heat treatment in an appropriate temperature range.

Explanatory drawing which shows an example of the manufacturing process of an SOI wafer. The cross-sectional perspective view which shows an example of an RTP apparatus. Explanatory drawing of the effect of nuclear killer heat treatment. The schematic diagram which shows more desirable embodiment of nuclear killer heat processing. The schematic diagram which shows another more desirable embodiment of nuclear killer heat processing. The schematic diagram explaining the relationship between bond heat processing and oxygen precipitate production | generation. The graph which shows the relationship between the nuclear killer heat processing temperature and the formation density of an oxygen precipitate. 10A and 10B illustrate a problem caused by warping of an SOI substrate due to heat treatment during device fabrication. The graph which shows the relationship between the temperature rising profile by a single-sided heating type RTP apparatus, and the control profile of heating power by comparing with an SOI wafer and a mirror-polished wafer. The figure which shows typically the mode of the infrared rays reflection in the SOI layer side by formation of a photonic band gap structure. The schematic diagram explaining the mechanism in which the curvature generate | occur | produces in a SOI wafer in a single-sided heating type RTP apparatus. The figure which illustrates some spectrums of the infrared light source used for a RTP apparatus. The graph which shows the relationship between the wavelength of the incident infrared rays of the SOI layer / silicon oxide film which satisfy | fills various layer thickness relationships, and a reflectance.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Bond wafer 2 Silicon oxide film 7 Base wafer 15 SOI layer 50 SOI wafer

Claims (8)

The first main surface of a base wafer made of silicon single crystal has a structure in which an SOI layer made of a semiconductor single crystal is bonded via a silicon oxide film, and the peak wavelength λ is 0. A method for manufacturing an SOI wafer which performs a heat treatment by infrared irradiation of 7 μm or more and 2 μm or less,
Affixing the first main surface of a base wafer made of silicon single crystal and the second main surface of a bond wafer made of semiconductor single crystal through a silicon oxide film formed on at least one of these main surfaces A bonding step, a thickness reduction step for reducing the thickness of the bond wafer to form an SOI layer, and a bonding heat treatment step for increasing the bonding of the SOI layer to the base wafer via the silicon oxide film,
The thickness t1 of the silicon oxide film after bonding and the thickness t2 of the SOI layer are n1 as the refractive index in the infrared wavelength region of SiO ₂ forming the silicon oxide film, and the refractive index of the semiconductor forming the SOI layer. N2 and the optical thickness t _OP of the silicon oxide film and the SOI layer in the infrared wavelength region is t _OP = n1 × t1 + n2 × t2, and 0.1λ <t _OP <2λ is satisfied, and (T1 × n1) / (t2 × n2) is set within the range of 0.2 to 3,
Further, prior to the bonding heat treatment step, a nuclear killer heat treatment for eliminating or reducing the precipitation nuclei of the oxygen precipitates in the base wafer is performed, and the oxygen precipitates in the base wafer before the nuclear killer heat treatment are performed. The density of precipitation nuclei is 1 × 10 ⁹ / cm ³ or more, and by performing the nuclear killer heat treatment, the density of formation of oxygen precipitates in the base wafer after the bonding heat treatment is 1 × 10 ⁹ / cm ^3. Adjust to less than
A method for manufacturing an SOI wafer, wherein the heat treatment by the infrared irradiation is performed by an infrared light source disposed only on the first main surface side of the SOI layer.   2. The method of manufacturing an SOI wafer according to claim 1, wherein the SOI layer is made of a silicon single crystal.   3. The method for manufacturing an SOI wafer according to claim 1, wherein a wafer manufactured by a Czochralski method using a quartz crucible is used as the base wafer. Wherein said nuclear killer heat treatment, the heat treatment holding temperature of less 1200 ° C. 10 00 ° C. or more, and a 5 ° C. / sec or higher 100 ° C. / sec increasing the temperature at a rate at the time of heating to the heat treatment holding temperature Item 4. The method for producing an SOI wafer according to any one of Items 1 to 3 . 5. The method for manufacturing an SOI wafer according to claim 4 , wherein the nuclear killer heat treatment is performed using a single wafer rapid heat treatment apparatus using infrared lamp heating. Wherein said nuclear killer heat treatment, under a hydrogen atmosphere or Ar atmosphere or a mixed atmosphere to claim 4 or claim 5, wherein the performing by setting the heat treatment holding temperature to 10 00 ° C. or higher 1100 ° C. or less SOI wafer manufacturing method. The nuclear killer heat treatment, in an oxygen-containing atmosphere, the method for manufacturing an SOI wafer according to claim 4 or claim 5, wherein the performing by setting the heat treatment holding temperature to 10 00 ° C. or higher 1200 ° C. or less. Prior to the bonding step, the thickness reducing step is a peeling ion implantation layer forming step for forming a peeling ion implantation layer by implanting ions from the ion implantation surface on the second main surface side of the bond wafer. And after the bonding step, a peeling step of peeling the semiconductor single crystal thin layer to be the SOI layer from the bond wafer at the peeling ion implantation layer, and performing the nuclear killer heat treatment in the peeling step. method for manufacturing an SOI wafer according to any one of claims 1 to 7, characterized in that later performed.

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