JP4823184B2 - Optical disc apparatus and optical disc reproducing method - Google Patents

Description

  The present invention relates to an optical disc apparatus for reproducing information on an optical disc, and more particularly to an optical disc apparatus and an optical disc reproduction method for avoiding a malfunction of reproduction processing when an optical disc reading defect occurs.

  In recent years, optical disc apparatuses such as DVDs (Digital Versatile Discs) have become widespread, and various types of research and development have been conducted and commercialized.

  In particular, in the field of optical recording / reproducing, high-density recording has progressed, and the recording density in the linear direction has greatly increased. Further, since the laser wavelength is shortened and the aperture of the lens is increased, the deterioration of the reproduction signal quality due to the tilt has become remarkable. For this reason, PRML (Partial Response and Maximum Likelihood) signal processing methods are actively applied as countermeasures. This method is applied to an optical disk device, and it is known that the PRML signal processing method can obtain a higher signal quality even in information recorded at a high density on the optical disk than the conventional level slice method. Therefore, application to next-generation optical disk devices for the purpose of recording HD video is also being studied.

  On the other hand, in the optical disk device, since the medium to be played is a removable disk, unlike the hard disk device, the signal can be reproduced stably even on a disk with a defect such as dirt, fingerprints, or scratches on the disk. It is hoped to do. If there is a defect in the disc, the signal will be disturbed and playback will not be possible, and the effect will remain inside the filter that manages the control amount for the playback signal, so normal data will not be recovered immediately after recovery from the defect. However, there is a risk of causing a malfunction that continues to send abnormal data for a certain period of time. When a defect is detected, learning of the control amount for the reproduction signal is stopped, and the control amount holds the current value or is replaced with a coefficient at the time of the defect.

As an example of defect detection, there is known a technique for performing peak detection and bottom detection of a signal obtained from an optical disk using a low-pass filter or the like, and determining that there is a defect in the optical disk when the peak value / bottom value exceeds a threshold value. (Patent Document 1).
JP 2005-166121 A IEICE Vol. 81, No. 5, pp. 497-505, May 1998

  According to the determination method described in Patent Document 1, the peak value / bottom value may exceed the threshold value even when the quality of the reproduced signal is low rather than the defect. In such a case, if it is detected as a defect and learning of the control amount for the reproduction signal is stopped, the error rate may not be improved.

  An object of the present invention is to provide an optical disc apparatus and an optical disc reproduction method capable of continuing to learn a control amount and improving an error rate without detecting a case where the quality of a reproduction signal is poor as a defect.

An optical disc apparatus according to an embodiment includes an equalization unit that equalizes a waveform of a reproduction signal of an optical disc in accordance with a binarization characteristic of a recording / reproduction system, a maximum likelihood decoding unit that binarizes an output of the equalization unit, Control means for controlling the waveform equalization characteristics of the equalization means in accordance with an input signal to the equalization means and an output signal from the maximum likelihood decoding means, and an optical disc based on the output signal of the maximum likelihood decoding means Detection means for detecting a defect of the branch metric, the maximum likelihood decoding means for calculating a branch metric for the output of the equalization means, and a branch metric calculated by the branch metric calculation means. A path metric selection unit that selects a maximum likelihood path metric based on the memory, and a plurality of memories each including a plurality of storage elements, the path metric selection unit A path memory unit that stores the passage of time of the selection result, and the defect detection means has a number of memory elements that store the same data among the memory elements of the memory in a predetermined stage of the path memory unit being equal to or less than a predetermined number. In some cases, a defect is detected, and the predetermined number is variable depending on the number of times the defect is detected.

An optical disc reproducing method according to another embodiment includes an equalization step for equalizing a waveform of a reproduction signal of an optical disc in accordance with a binarization characteristic of a recording / reproducing system, and maximum likelihood decoding for binarizing the signal after waveform equalization. A control step for controlling the waveform equalization characteristics of the equalization step according to the signal before waveform equalization and the binarization signal, and a step for detecting a defect of the optical disc based on the binarization signal. And the defect detection step detects a defect when the number of storage elements storing the same data among the storage elements of the memory in a predetermined stage of the path memory unit is equal to or less than a predetermined number, It is variable according to the number of detections .

  According to the present invention, since the defect detection criterion is variable according to the output of the maximum likelihood decoding means, if the signal quality of the reproduction signal is low, the learning of waveform equalization is advanced without detection as a defect, and the error rate is increased. Can be improved.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a configuration example of an optical disc apparatus according to an embodiment of the present invention. An optical pickup head (PUH) 12 that irradiates a laser beam onto an optical disk 10 such as a DVD (Digital Versatile Disc) such as a DVD (Digital Versatile Disc), receives reflected light, and outputs a read signal is provided. A reproduction signal which is a weak analog signal read by the pickup head 12 is amplified by the preamplifier 14. The amplified reproduction signal is filtered by the pre-equalizer 16, and appropriate band limitation and waveform shaping as necessary are performed. The output signal of the pre-equalizer 16 is A / D converted by the A / D converter 18. The offset / gain of the output of the A / D converter 18 is controlled by the offset / gain controller 20.

  Regarding the generation of the reproduction clock input to the A / D converter 18, the clock is extracted from the reproduction waveform itself. Therefore, the output of the offset / gain controller 20 is supplied to the phase comparator 36 and the frequency comparator 38, the frequency comparator 38 detects the frequency error between the reproduction waveform and the signal frequency, and the phase comparator 36 detects the ideal sampling point. The phase error is detected. This control based on frequency error and phase error is known as PLL (Phase Locked Loop) control, and both frequency control and phase control are performed by the same loop filter 40, and A / D conversion is performed by a VCO (Voltage Controlled Oscillator) 42. A clock is supplied to the device 18. An integrator is generally used for the loop filter 40. At the time of defect, the output of the loop filter 40, that is, the control voltage of the VCO 42 is also affected, and there is a risk that the locked state of the PLL is released. Note that the output clock of the VCO 42 is also supplied to other circuits to perform timing control.

  The output of the offset / gain controller 20 is subjected to asymmetry correction by the asymmetry corrector 22 and then supplied to the adaptive equalizer 24. The optical disk apparatus according to the present embodiment employs a PRML (Partial Response and Maximum Likelihood) system as a binarization system. In this embodiment, the recording / reproducing system is assumed to have PR (h0, h1, h2, h3) characteristics. An impulse response sequence is shown in parentheses. That is, the sample value of the reproduction signal appears as a series having amplitudes h0, h1, h2, and h3 with respect to the recording bit “1”, and becomes 0 at the sample points outside it. The reproduction signal series is expressed by adding impulse responses to the respective recording bits, and the addition result is called a pass. There is a one-to-one correspondence between bit sequences and paths. The equalizer 24 is composed of an FIR type filter that adjusts (performs waveform equalization) to PR characteristics using the reproduction signal of the optical disc 10. By selecting a PR characteristic similar to the reproduction signal characteristic of the optical disc 10, amplification of noise components due to equalization is suppressed. As described above, the adaptive equalizer 24 equalizes the reproduced signal into a response waveform (partial response waveform signal) corresponding to the target PR characteristic (PR class). The equalization characteristic (coefficient of the FIR filter) at this time is adjusted by the coefficient controller 26.

  The output of the adaptive equalizer 24 is supplied to a maximum likelihood decoder (Viterbi decoder) 28. The maximum likelihood decoder 28 determines whether the reproduction signal after equalization is “0” or “1” and decodes it into a binary identification signal. Since the actual reproduction signal contains noise, it does not completely match any path. The maximum likelihood decoder 28 cumulatively adds errors between the actual reproduction signal at each sample point and all the assumed paths, and selects the path with the smallest cumulative addition value. Then, a bit sequence corresponding to the selected path is output as an identification signal. In the maximum likelihood decoder, a value is determined from a plurality of samples by using a known correlation having PR characteristics, instead of determining a value from a certain sample of the reproduced signal. Therefore, the maximum likelihood decoder is resistant to noise.

  The binary data obtained by the maximum likelihood decoder 28 is subjected to the reverse processing (demodulation) of the RLL modulation by the RLL demodulator 30, and the recorded data can be obtained. The output of the RLL demodulator 30 is supplied to the interface unit 34 via an ECC circuit 32 that performs error correction on the demodulated signal.

  The decoding result of the maximum likelihood decoder 28 is also supplied to the coefficient control unit 26 and the defect detection circuit 44. The coefficient controller 26 optimizes the equalization coefficient (tap coefficient) of the adaptive equalizer 24 based on the reproduction signal output from the asymmetry adjustment unit 22 and the identification signal output from the maximum likelihood decoder 28.

  A defect detection circuit 44 for detecting a defect of the optical disc is provided according to the output of the A / D converter 18, the output of the offset / gain adjuster 20, and the output of the maximum likelihood decoder 28. The detection result of the defect detection circuit 44 is supplied to the control unit 46. The control unit 46 controls the operation of the coefficient controller 26 and other blocks.

  Circuits other than the PUH 12, the preamplifier 14, and the pre-equalizer 16 are integrated in one semiconductor chip (controller for the optical disk device) 2. Each block is controlled through the control unit 46.

  FIG. 2 shows an example of the adaptive equalizer 24. The adaptive equalizer 24 is composed of an FIR filter, and nine multipliers (×) for amplifying the reproduction signal, which is the output of the asymmetry adjusting unit 22, with separate tap coefficients, and outputs of the multiplier (×). It consists of a multistage connection of eight sets of delay circuits (D) and adders (+) that delay and add to the output of the next multiplier (×).

  FIG. 3 shows an example of the coefficient controller 26 that controls the tap coefficient of the adaptive equalizer 24. The tap coefficient is determined according to the reproduction signal that is the output of the asymmetry adjustment unit 22 and the identification signal that is the output of the maximum likelihood decoder 28. There are various determination methods. FIG. 3 shows a case where an adaptive learning method called an LMS (Least Mean Square) algorithm is used.

  The identification signal is input to the ideal signal / error signal calculation unit 166, and an equalization error signal is calculated. The equalization error signal and the reproduction signal through the delay units 160 and 165 are supplied to each filter 161 through the multiplier 164. Each filter 161 includes a flip-flop circuit 162 and an amplifier unit 163, and calculates a tap coefficient value to be supplied to the adaptive equalizer 24.

  In this learning method, the ideal signal / error signal calculation unit 166 generates an equalization error signal for the target equalization characteristic from the output result of the maximum likelihood decoder 28, and the filter 161 calculates the mean square value of the equalization error signal. The tap coefficient value is updated so as to minimize the value, and the desired equalization characteristic is changed. Note that adaptive learning in the LMS algorithm is described in detail in Non-Patent Document 1.

  FIG. 4 shows a configuration diagram of the maximum likelihood decoder 28. The figure shows a configuration of a general Viterbi decoding circuit. The maximum likelihood decoder 28 includes a branch metric calculation circuit 52, an addition / comparison / selection circuit 54, a path memory 56, a path determination circuit 58, and a path metric memory 60. The branch metric calculation circuit 52 performs branch metric calculation using the input from the adaptive equalizer 24. The addition / comparison / selection circuit 54 adds, compares, and selects the output of the branch metric calculation circuit 52 with the path metric stored in the path metric memory 60 to determine the path and path metric. The path memory 56 stores the progress of path selection.

The configuration of the path memory 56 is shown in FIG. The path memory 56 includes a storage unit 62 and a path selection circuit 64, which are connected in multiple stages. The number of storage elements of the storage units 62 ₁ ,... 62 _n is determined by the number of states of the PR class assumed in the maximum likelihood decoding. FIG. 5 shows an example in the PR class represented by PR (h0, h1, h2, h3). Is inputted select signals from the addition, comparison and selection circuit 54, in response thereto, the path selecting circuit _{64 1,} ... _{64 n-1} switches, appropriate surviving paths each storage unit ₆₂ 1, ... 62 _n each storage element Stored in s0, s1, s3, s4, s6, and s7. When the frequency and phase acquisition is completed and the coefficient learning of the transversal filter is stabilized, the system is in a steady state, and the maximum likelihood decoding circuit outputs normal decoded data. The storage element corresponds to the state of the reproduction signal of the past 3 bits, s0 is “000”, s1 is “001”, s3 is “011”, s4 is “100”, s6 is “110”, and s7 is “111”. Indicates.

FIG. 6 shows the stored contents of the storage element 62 _n at the final stage of the path memory 56. The vertical axis corresponds to the stored contents corresponding to each state of the PR class. 6 states when the minimum run length of the code is 2 or more and PR (1, 2, 2, 1), PR (3,4, 4, 3), etc. PR (h0, h1, h2, h3), etc. Therefore, the memory element has six stages in the vertical direction as shown in the figure. The passage of time is shown in the horizontal axis direction. i to i + 5 indicate storage element contents when the system is stable and normal decoded data is output. As shown in the figure, the contents of the six storage elements are unified with 1 or 0.

  The optical disk 10 may change its reflectivity and the signal level acquired by the PUH 12 depending on dirt such as scratches and fingerprints and other conditions. In such a defect state, a circuit that moves adaptively, such as coefficient learning, stops coefficient learning and initializes it, holds the current value, or replaces it with a coefficient at the time of non-defect. Alternatively, an operation mode such as a gain change may be changed.

  A signal state different from the normal state is detected as a defect by the defect detection circuit 44, and processing such as stopping the adaptive learning processing in the coefficient controller 26 is performed through the control unit 46 and the like.

  FIG. 7 shows a waveform of a reproduction signal from a DVD-ROM in a normal state.

  FIG. 8 shows a signal waveform from a DVD-ROM mixed with a defect whose amplitude is temporarily reduced. FIG. 8A shows a reproduction waveform of the DVD-ROM. FIG. 8B shows an envelope waveform of a DVD-ROM waveform obtained by a low-pass filter. FIG. 8C shows a defect detection signal. A state where the defect detection signal is at a high level indicates that a defect has been detected. A waveform in which the envelope of such a waveform changes greatly can be detected as a defect by observing the change in the envelope using means such as using a low-pass filter as described in Patent Document 1. .

  FIG. 9 shows a DVD-ROM waveform in which a defect whose amplitude varies at a fast cycle is mixed. FIG. 9A shows the waveform of the DVD-ROM. FIG. 9B shows an envelope waveform of a DVD-ROM waveform obtained by a low-pass filter. FIG. 9C shows a defect detection signal. With a defect detection method using a low-pass filter or the like, it is difficult to detect such a defect with a small change in the envelope.

In the storage unit 62 _{n in} the final stage of the path memory 56 when the defects shown in FIGS. 8 and 9 are mixed, the contents of the six storage elements are not unified as shown in j to j + 2 of FIG. By utilizing this characteristic, it is possible to detect a defect in which the envelope does not change greatly, which has been difficult to detect in the past. FIG. 10 shows a defect detection circuit using this characteristic (this is not the defect detection circuit of FIG. 1). The coincidence search circuit 66 is connected to the storage unit 62 _{n at} the final stage of the path memory 56 or the output of the storage unit after a sufficient number of stages to determine the path.

An example of the configuration of the match search circuit 66 is shown in FIG. A signal input from the storage unit 62 _n of the path memory is received by the AND circuit 70 and the OR circuit 72. _If the contents of the storage unit 62n of the path memory are unified with 1 or 0, the output of the NOR circuit 74 to which the outputs of the AND circuit 70 and the OR circuit 72 are input is 0, and there is no defect. _If the contents of the storage unit 62 _n of the path memory are not unified with 1 or 0, the output of the NOR circuit 74 becomes 1 and can be detected as a defect.

  As the defect detection signal, the output of the NOR circuit 74 may be used as it is, or as shown in FIG. 11, an output signal of the AND circuit 76 that takes a logical product with the defect detection stop signal for stopping the detection of the defect may be used. . For example, when it is not desired to detect a defect, such as when the frequency or phase is not stable or when coefficient learning is in the middle of learning, the defect detection can be stopped using a defect detection stop signal.

  FIG. 13 shows a state of defect detection of the method in FIG. 11 under the same conditions as in FIG. FIG. 13A shows the waveform of the DVD-ROM. FIG. 13B shows an envelope waveform of a DVD-ROM waveform obtained by a low-pass filter. As shown in FIG. 13C, it is possible to detect a defect that is difficult to detect by the conventional technique using the envelope change.

Another example of the configuration of the match search circuit 66 is shown in FIG. The number of 1s and 0s input from the storage unit 62 _n of the path memory is measured using the counters 80 and 82. The measurement result is compared with a predetermined threshold by the threshold determination circuits 84 and 86, and when the measurement result is equal to or less than the threshold or smaller than the threshold, a defect detection signal is output from the output of the OR circuit 88. As in FIG. 11, the output of the OR circuit 88 may be used as it is for the defect detection signal, or the output signal of the AND circuit 90 that takes a logical product with the defect detection stop signal for stopping the detection of the defect may be used. . 12 is substantially equivalent to FIG. 11 when the thresholds of the threshold determination circuits 84 and 86 in FIG. 12 are the total number of storage elements in the storage unit of the path memory.

  The defect detection circuit shown in FIG. 10 is based on the state of the storage unit at a specific stage of the path memory 56 of the maximum likelihood decoder 28, but the state of the path memory 56 does not converge as shown in FIG. The states of the two storage elements are not unified), not only at the time of the defect, but also the quality of the reproduced signal may be poor. The quality of the playback signal is defined by the standard, but the S / N ratio of the playback signal is low when the press accuracy is low, the reflectivity is low, or interlayer interference occurs in the case of a multilayer disk even if the standard is satisfied. In some cases, the state of the storage elements of the path memory 56 may become inconsistent. As described above, when the quality of the reproduction signal is poor and the state of the storage element of the path memory 56 becomes inconsistent (k to k + 2 in FIG. 14), it may be better not to detect it as a defect. This is because when detected as a defect, the coefficient controller 26 stops the coefficient learning and holds the current value, or replaces it with a coefficient at the time of non-defect. If the quality of the reproduction signal is not defective but the quality of the reproduced signal is poor, if the coefficient learning of the adaptive equalizer 24 is advanced, the system may be stabilized and the data in the storage elements of the path memory 56 may be unified. The defect detection circuit shown in FIG. 10 is inadequate for dealing with poor signal quality.

  The defect detection circuit 44 of the present embodiment shown in FIG. 1 has a function of varying the defect / non-defect detection reference according to the quality of the input signal, and its configuration is shown in FIG.

The counters 100 and 102 are used to measure the number of “1” s and “0” s output from the storage unit 62 _n of the final stage of the path memory 56 or the storage unit after a sufficient number of stages to determine the path. To do. The measurement result is compared with a predetermined threshold by the threshold determination circuits 104 and 106, and when the measurement result is equal to or less than the threshold or less than the threshold, a defect detection signal is output from the output of the OR circuit 108. For this reason, the defect can be detected before the data in the memory element is unified to “1” or “0”. The threshold value (number of “1” or “0”) of the threshold value determination circuits 104 and 106 which is a defect / non-defect detection criterion is variable by a threshold value determination circuit 118 described later.

  The AND circuit 110 calculates the logical product of the signal output from the OR circuit 108 and the stable reproduction notification signal. The stable regeneration notification signal indicates whether or not the present device is operating stably. Specifically, the control unit 46 determines the phase of the recovered clock based on the operation results of the phase comparator 36 and the frequency detector 38, When it can be determined that the frequency is stable, a stable reproduction notification signal is output. The output of the AND circuit 110 is input to the AND circuit 112 and the non-convergence number counter 114. For this reason, the non-convergence number counter 114 counts the number of times that the path memory has not converged despite the stable reproduction.

  When the quality of the input signal is good, the value of the non-convergence number counter 114 increases only at the time of the defect. However, when the quality of the input signal is poor, the value of the non-convergence number counter 114 increases other than at the time of the defect. That is, when the count value of the non-convergence number counter 114 increases, there is a possibility that the quality of the input signal is poor.

  The output of the non-convergence number counter 114 is supplied to the threshold determination circuit 116 and compared with a predetermined threshold. When the threshold determination circuit 116 detects that the output of the non-convergence number counter 114 is greater than or exceeds the threshold, the threshold determination circuit 118 determines the thresholds of the threshold determination circuits 104 and 106 that determine the output of the counters 100 and 102 as thresholds. By changing, the criteria for determining whether or not the path memory is converged (non-defect) is relaxed so that the defect is not easily detected. That is, the upper limit value of the “1” and “0” count values of the counters 100 and 102 determined that the path memory has converged, that is, is not a defect, is decreased. For this reason, the coefficient learning of the adaptive equalizer 24 by the coefficient controller 26 proceeds, and there is a high possibility that even a low-quality reproduction signal can be reproduced stably.

  For example, when the number of states is 6, in the initial stage, the threshold value determination circuit determines that convergence has occurred when all six storage elements in the final stage of the path memory indicating the six states are the same, and determines the other as defects. The threshold values 104 and 106 are set to 6. When the threshold value determination circuit 116 determines that the count value of the non-convergence counter 114 has exceeded the threshold value, the threshold value has converged even if the state of one storage element does not match in order to advance adaptive learning or the like ( The threshold value determination circuit 118 sets the threshold value of the threshold value determination circuits 104 and 106 to 5 so that it is handled as “non-defect”. Then, it becomes difficult to detect the defect and the coefficient learning proceeds. Thereafter, the threshold determination circuits 104 and 106 do not detect the mismatch of the state due to the low quality of the reproduction signal, and it is possible to detect only the defect. FIG. 16 shows the count value of the non-convergence number counter 114 when the signal quality is poor. FIG. 16A shows an input signal, which is the same as FIG. FIG. 16B shows the count value of the counter that counts the defect detection signal output from the match search circuit shown in FIG. 11, and FIG. 16C shows the count value of the non-convergence number counter 111 shown in FIG.

  The output signal (defect detection signal) of the AND circuit 110 may be output as it is, or, similarly to the case of FIG. 11, the output signal of the AND circuit 112 that takes a logical product with the defect detection stop signal for stopping the defect detection. It may be used.

  In the conventional defect detection method by envelope detection, the defect detection circuit including the coincidence search circuit of FIG. 11, and the defect detection circuit 44 of FIG. 15, the state of the bit error rate (bER) by simulation when the input waveform is changed is shown. As shown in FIG. FIG. 17 shows the result of simulating the bit error rate for six types of input signals. It can be seen from FIG. 17 that the defect detection circuit including the coincidence search circuit for changing the threshold value of the present embodiment is effective in reducing the bit error rate.

  FIG. 18 shows a flowchart of the above operation. The threshold value determination circuit 118 initializes the threshold values of the threshold value determination circuits 104 and 106 (block # 2). At this time, the threshold value is the total number of storage elements so that a defect is detected unless all the storage elements of the storage unit of the path memory 56 match.

  Since the reproduction is started in this state and the stable reproduction notification signal is not output until this apparatus operates stably, even if the threshold determination circuits 104 and 106 have the count values of the counters 100 and 102 below or below the threshold, Even if the determination is made, the AND circuit 110 does not output a defect detection signal (block # 4).

  If the threshold determination circuit 104 or 106 determines that the count value of the counter 100 or 102 is less than or less than the threshold while the stable reproduction notification signal is output, the non-convergence counter 114 counts up (block # 6).

  When the threshold determination circuit 116 detects that the count value is greater than or equal to the first threshold (block # 8), the final stage or path of the path memory 56 is determined because the quality of the reproduction signal is low. Since the number of “1” s and “0” s output from the storage unit after a sufficient number of stages is likely to be inconsistent, the threshold value judgment circuit does not consider such a case as a defect. The threshold values of 104 and 106 are decreased by 1 (block # 10). Thus, thereafter, even if one storage element of the storage unit of the path memory 56 is not uniform, it is not detected as a defect. That is, the coefficient learning of the coefficient controller 26 is continued, and correct maximum likelihood decoding can be performed even for a low-quality reproduced signal.

  However, in order to cope with the case where the non-convergence number counter 114 further counts up, the threshold determination circuit 116 changes the determination threshold from the first threshold to the second threshold. The second threshold is a value equal to or greater than the first threshold. For this reason, when the count value of the non-convergence counter 114 further increases and it is detected that the second threshold value is exceeded or exceeded (block # 12), the threshold value of the threshold determination circuits 104 and 106 is decreased by 1 again. (Block # 14). The above operations (blocks # 12 and # 14) may be further repeated as necessary.

  Since the operation in FIG. 18 is in a state where defects are difficult to detect, there is a case where it is desired to reset this operation. For example, when a reset signal is output from the control unit 46 or when a reset signal is output by a user operation, such as when learning is incorrect or the reproduction operation is not stable, the threshold values of the threshold determination circuits 104 and 106 Returns to the initial value (block # 2).

  As described above, according to the present embodiment, even when a defect whose amplitude fluctuates in a short cycle is mixed, it is possible to detect a defect on the optical disc and perform reproduction more resistant to the defect. Furthermore, by looking at the convergence status of the path selection result stored in the path memory of the maximum likelihood decoder, a defect that has been difficult to detect in the past is detected and determined as a defect according to the quality of the input signal. Since the threshold value of the convergence state is changed statically or dynamically, adaptive learning is performed by an input signal inside the read channel, so that erroneous learning in the adaptive learning process can be prevented and necessary learning can be advanced. As a result, the bit error rate of the system output can be improved.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment. The counters 100 and 102 in FIG. 15 may be implemented by a single counter. As long as the number of “1” and “0” can be known, other implementations may be used instead of the counters 100 and 102. When determining the threshold values of the threshold determination circuits 104 and 106 in FIG. 15, various information (errors) for error correction using the decoded data from the maximum likelihood decoder 28 in FIG. 1 as input instead of using the non-convergence counter 114 or the like. The threshold value may be determined based on the number of locations and the number of corrections. Based on the detected defect information, a coefficient used for branch metric calculation in the maximum likelihood decoder 28 may be changed. The operation of the offset / gain controller 20 in FIG. 1 may be changed based on the detected defect information. Based on the detected defect information, the operation of the PLL circuit including the phase comparator 36, the frequency detector 38, the loop filter 40, and the VCO 42 may be changed.

  In the above embodiment, the adaptive learning process by the coefficient controller 26 is stopped when a defect is found on the optical disc. However, when a defect is found on the optical disc, the control unit 46 sends a control signal to the asymmetry adjustment unit 22 so that the asymmetry adjustment unit 22 performs asymmetry correction based on the adjustment amount immediately before the defect is found on the optical disc. May be. Similarly, when a defect is found in the optical disc, the control unit 46 causes the loop filter 40 to output the signal (adjustment amount) output to the oscillator 42 immediately before the defect is found in the optical disc to the oscillator 42. You may make it send a control signal to.

1 is a diagram showing a schematic configuration of an optical disc apparatus according to an embodiment of the present invention. FIG. 2 is a block diagram showing an example of the configuration of an adaptive equalizer 24 shown in FIG. FIG. 2 is a block diagram showing an example of the configuration of a coefficient controller 26 shown in FIG. FIG. 3 is a block diagram showing an example of the configuration of a maximum likelihood decoder 28 shown in FIG. FIG. 3 is a diagram illustrating an example of a configuration of a path memory 56 illustrated in FIG. 2. FIG. 6 is a diagram showing an example of the contents stored in the last stage memory of the path memory 56. The figure which shows an example of a DVD-ROM waveform. The figure which shows an example of the DVD-ROM waveform containing the defect. The figure which shows the other example of the DVD-ROM waveform containing the defect. The figure which shows an example of the defect detector which detects the defect shown in FIG. FIG. 11 is a diagram showing an example of a match search circuit shown in FIG. 10. FIG. 11 is a diagram showing another example of the match search circuit shown in FIG. 10. FIG. 12 is a diagram showing an example of the operation of the match search circuit shown in FIG. 11. The figure which shows an example of the preservation | save content of the memory of the last stage of the path memory 56 in case signal quality is bad. The figure which shows an example of a structure of the defect detector 44 shown in FIG. The figure which shows an example of operation | movement of the defect detector shown in FIG. 15 in case signal quality is bad. The figure which shows an example of the simulation result of the bit error rate of a conventional system and this invention system. The flowchart which shows the outline of the defect detection system of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Optical disk, 12 ... Optical pick-up, 16 ... Pre equalizer, 18 ... A / D converter, 24 ... Adaptive equalizer, 26 ... Coefficient controller, 28 ... Maximum likelihood decoder, 30 ... RLL demodulator, 32 ... ECC processing section 34... I / F 36... Phase comparator 38. Frequency comparator 40. Loop filter 42. Oscillator 44 44 Defect detection circuit 46 Control section.

Claims (8)

Equalizing means for equalizing the waveform of the reproduction signal of the optical disc in accordance with the binarization characteristics of the recording / reproducing system;
Maximum likelihood decoding means for binarizing the output of the equalization means;
Control means for adaptively controlling the waveform equalization characteristics of the equalization means according to the input signal to the equalization means and the output signal from the maximum likelihood decoding means;
Detecting means for detecting a defect of the optical disk based on an output signal of the maximum likelihood decoding means,
The maximum likelihood decoding means is a branch metric calculation means for calculating a branch metric for the output of the equalization means, and a path metric selection for selecting a maximum likelihood path metric based on the branch metric calculated by the branch metric calculation means. And a path memory unit that has a plurality of stages of memories each including a plurality of storage elements, and stores a passage of time of a selection result by the path metric selection unit,
The defect detection means detects a defect when the number of storage elements that store the same data among the storage elements of the memory at a predetermined stage of the path memory unit is equal to or less than a predetermined number, and the predetermined number corresponds to the number of detections of the defect. An optical disk device that is variable in response .   The defect detection means includes a first counter that counts “1” or “0” data stored in all storage elements in a memory in a final stage of the path memory unit or a stage near the final stage, and the first counter A threshold determination circuit for outputting a defect detection signal when the output of the counter is equal to or less than a first threshold; a second counter for counting the defect detection signal; and an output of the second counter equal to or greater than a second threshold 2. The optical disc apparatus according to claim 1, further comprising a threshold value determination circuit that decreases the first threshold value.   An AND circuit connected between the output of the threshold value determination circuit and the second counter and for calculating the AND of the stability notification signal output when the reproducing operation of the optical disc apparatus is stabilized and the defect detection signal; The optical disk apparatus according to claim 2, further comprising:   2. The optical disc apparatus according to claim 1, wherein when the detection means detects a defect, the control means stops an adaptive control operation of the waveform equalization characteristic and fixes the waveform equalization characteristic to a predetermined characteristic. . In an optical disk playback method,
An equalization step for equalizing the waveform of the reproduction signal of the optical disc in accordance with the binarization characteristics of the recording and reproduction system;
A maximum likelihood decoding step for binarizing the signal after waveform equalization;
A control step for adaptively controlling the waveform equalization characteristics of the equalization step according to the signal before waveform equalization and the binarized signal;
Detecting a defect of the optical disc based on the binarized signal,
The maximum likelihood decoding step includes a branch metric calculation step for calculating a branch metric for the output of the equalization step, and a path metric selection for selecting a maximum likelihood path metric based on the branch metric calculated by the branch metric calculation step. And a step of storing a time lapse of a selection result obtained by the path metric selection step in a path memory unit having a plurality of stages of memories composed of a plurality of storage elements,
The defect detection step detects a defect when the number of storage elements that store the same data among the storage elements of the memory at a predetermined stage of the path memory unit is equal to or less than a predetermined number, and the predetermined number corresponds to the number of detections of the defect. A method of reproducing an optical disc that is variable in response .   The defect detection step includes a first counter step for counting “1” or “0” data stored in all memory elements in a memory at a final stage of the path memory unit or a stage near the final stage; A threshold determination step for outputting a defect detection signal when the count value of the counter step is equal to or smaller than a first threshold, a second counter step for counting the defect detection signal, and an output of the second counter step. 6. The reproduction method according to claim 5, further comprising a threshold value determining step of decreasing the first threshold value when the threshold value is 2 or more.   7. The reproduction method according to claim 6, wherein the second counter step counts a logical product of the defect detection signal output from the threshold determination step and a stability notification signal output when the reproduction operation is stabilized. .   6. The reproducing method according to claim 5, wherein when the detection step detects a defect, the control step stops the adaptive control operation of the waveform equalization characteristic and fixes the waveform equalization characteristic to a predetermined specific. .

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