JP4812554B2 - SEMICONDUCTOR INTEGRATED CIRCUIT, ELECTRONIC CONTROL DEVICE, AND ELECTRONIC CONTROLLED DEVICE CONTROL METHOD - Google Patents

Description

  The present invention outputs a predetermined voltage signal based on an arbitrary communication signal transmitted from a microcomputer in a moving body such as a vehicle, and drives an output driver circuit with the voltage signal, thereby various electronic controlled devices ( For example, the present invention relates to a semiconductor integrated circuit configured to control an air bag, an electronically controlled engine, and the like, an electronic control device including the semiconductor integrated circuit, and a method for controlling the electronic controlled device.

  2. Description of the Related Art Generally, an electronic control device having a microcomputer and an integrated ASIC (Application Specific Integrated Circuit) (sometimes simply referred to as an ASIC) is provided in a moving body such as a vehicle. Such an electronic control device is usually called an ECU (Electronic Control Unit). In this ECU, when it is detected that a collision of a vehicle or the like or some failure has occurred in a part of the ECU, in order to reduce the influence of such a collision of the vehicle or a part of the ECU as much as possible. In addition, it is required to correctly control electronic controlled devices (for example, an air bag, an electronically controlled engine, etc.) in the moving body by using a microcomputer and an integrated ASIC to execute fail-safe processing. Here, “fail-safe processing” refers to damage caused by collision or failure by causing the electronically controlled device in the moving body to act on the safe side in the event of a vehicle collision or some failure in the ECU. It means to perform processing to minimize the.

  For this reason, conventionally, the integrated ASIC incorporates a two-channel extended output circuit for appropriately processing a serial communication format communication signal input from a microcomputer and driving an output driver circuit.

  More specifically, in a two-channel extended output circuit built in a conventional integrated ASIC, when a vehicle or the like is running normally under the control of the ECU, a normal input from the microcomputer to one channel is performed. A serial communication format communication signal is output as it is and supplied to the output driver circuit. On the other hand, when it is detected by the microcomputer that a vehicle has collided or some part of the ECU has occurred, instead of outputting a normal serial communication format communication signal as it is on one channel, In this channel, a signal obtained by performing predetermined protocol conversion on the communication signal is output and supplied to the output driver circuit. As a result, when a collision of a vehicle or the like or a partial failure of the ECU is detected, an output driver circuit having a MOS transistor element is driven and an appropriate level voltage signal is supplied to the electronic controlled device in the moving body. Therefore, these electronic controlled devices can be controlled to perform fail-safe processing.

  However, the conventional 2-channel extended output circuit is configured to operate independently, and cannot output signals from both channels at once. Therefore, when the microcomputer detects a collision of a vehicle or a part of the ECU, the extension output circuit of the other channel must be selected by inputting a predetermined control signal from the microcomputer each time. Don't be. For this reason, in the event of a vehicle collision or a partial failure of the ECU, the load on the microcomputer increases. Therefore, the electronic device to be controlled in the moving body can be controlled quickly and accurately to perform fail-safe processing. The problem that it becomes difficult to execute without error occurs.

  On the other hand, some users such as drivers and other passengers want to monitor two types of signals output from the two-channel extended output circuit at a time. Even in this case, only a signal output from one of the channels can be monitored within a certain period.

  Further, in the conventional two-channel extended output circuit, the scale of the circuit in the ASIC increases, and there is a problem that the occupied area of the ASIC increases and its manufacturing cost increases.

  Here, for reference, five prior art documents (Patent Documents 1 to 5) in which technical contents related to a conventional extended output circuit are described are presented.

  In Japanese Patent Laid-Open No. 2000-101651, data of various protocols can be converted, and protocol conversion for converting an input signal of a certain protocol into an output signal of another protocol is performed. An ASIC configuration is disclosed.

  In Patent Document 2 (utility model registration No. 3071607), data of a signal transmitted from a personal computer as a host to the ASIC of the printer is stored, and the mode of the stored data is determined. A configuration of a computer peripheral device and a printer device that processes the data based on the mode determination result is disclosed.

  Japanese Patent Laid-Open No. 2001-333139 discloses a configuration of a PIAFS protocol monitor device that switches a communication protocol when a timing at which a communication speed is switched is detected.

  Japanese Patent Laid-Open No. 8-56241 discloses a configuration of a modem device that switches a communication protocol according to a frequency pattern of a received signal.

  Japanese Patent Laid-Open No. 5-160871 discloses a configuration of a communication control apparatus that switches communication protocols in accordance with a flag state of a signal pattern.

  However, in any of Patent Documents 1 to 5, when a collision of a vehicle or the like or a partial failure of the ECU occurs, the electronic device to be controlled in the moving body is quickly and accurately controlled to perform fail-safe processing. It does not mention a specific method to execute without error. Therefore, in any of Patent Documents 1 to 5, problems similar to those of the conventional extended output circuit as described above still remain.

JP 2000-101651 A Utility Model Registration No. 3071607 JP 2001-333139 A JP-A-8-56241 Japanese Patent Laid-Open No. 5-160871

  The present invention has been made in view of the above problems, and when a collision of a vehicle or the like or a partial failure of an electronic control device (for example, an ECU provided in the vehicle or the like) occurs, the load on the microcomputer is reduced. Occupied area and manufacturing cost of ASIC and the like for performing fail-safe processing without error by controlling electronic controlled devices in a moving body quickly and accurately without increasing, and outputting communication signals input from a microcomputer It is an object of the present invention to provide a method for controlling a semiconductor integrated circuit, an electronic control device, and an electronic controlled apparatus that can reduce the power consumption.

In order to solve the above problems, the present invention inputs a communication signal transmitted from a microcomputer, outputs a predetermined voltage signal, and drives an output driver circuit to drive an electronic controlled device (for example, an airbag). A dedicated bit reading means for reading a dedicated bit included in the communication signal in advance, and the state of the dedicated bit read by the dedicated bit reading means. On the basis of the above, the communication signal is passed as it is to set to a through output mode to be supplied to the output driver circuit, or the communication signal is converted to the communication signal after the protocol conversion is performed according to a predetermined protocol. Semiconductor having an output switching means for switching whether to set the protocol output mode supplied to the output driver circuit Product circuit (e.g., ASIC) provides. Here, the dedicated bit reading means and the output switching means can be constituted by an extended output circuit of one channel.
The present invention also relates to a semiconductor integrated circuit configured to control an electronic controlled device by inputting a communication signal transmitted from a microcomputer, outputting a predetermined voltage signal, and driving an output driver circuit. A dedicated bit reading means for reading a dedicated bit included in the communication signal in advance, and the output driver circuit by passing the communication signal as it is based on the state of the dedicated bit read by the dedicated bit reading means. Whether to set to the through output mode to be supplied to the communication signal or to set the protocol output mode to supply the communication signal to the output driver circuit after performing the protocol conversion on the communication signal according to a predetermined protocol. Output switching means for switching, and the microcomputer and the semiconductor integrated circuit When the serial communication line is broken, and wherein the forcibly be switched to the through-output mode.

  Preferably, in the semiconductor integrated circuit of the present invention, when the through output mode is set by the output switching means, an arbitrary bit value of the communication signal from the microcomputer is passed as it is without being changed. Yes.

  Further preferably, in the semiconductor integrated circuit of the present invention, when the protocol switching mode is set by the output switching unit, the plurality of types of signal patterns included in the protocol are selected according to the state of the dedicated bit. According to the selected signal pattern, the value of an arbitrary bit of the communication signal from the microcomputer is converted.

  Further preferably, in the semiconductor integrated circuit of the present invention, the plurality of types of signal patterns include a normal signal indicating that the electronic controlled device is in a normal state, and the electronic controlled device is in an abnormal state. A first detection signal for detecting that there has been a change in the state of the electronic controlled device, and a second detection for detecting that a fail-safe process has been performed on the electronic controlled device And at least a previous state holding signal indicating that the previous state of the electronic controlled device is held.

  Further preferably, in the semiconductor integrated circuit of the present invention, switching from the normal signal, the first detection signal or the second detection signal to the abnormal signal is performed by the normal signal, the first detection signal or The second detection signal is immediately executed without waiting for the end of the period of one frame, and on the other hand, switching from the normal signal to the first detection signal or the second detection signal is performed by the normal signal. It is executed immediately without waiting for the end of the period of one frame.

  Further preferably, in the semiconductor integrated circuit of the present invention, the switching from the first detection signal or the second detection signal to the normal signal is 1 in the first detection signal or the second detection signal. It is executed after waiting for the end of the frame period. On the other hand, the switching from the second detection signal to the first detection signal waits for the end of one frame period in the second detection signal. Is executed from.

  Further preferably, in the semiconductor integrated circuit of the present invention, when the serial communication line between the microcomputer having the small number of dedicated bits and the semiconductor integrated circuit is disconnected, the through output mode is forcibly switched. It has become.

  Further preferably, in the semiconductor integrated circuit of the present invention, when the serial communication line between the microcomputer and the semiconductor integrated circuit is disconnected, an abnormality due to the disconnection of the serial communication line has occurred. A signal for discrimination by the circuit is output from the output driver circuit.

  Further preferably, in the semiconductor integrated circuit of the present invention, when the power supply of the output driver circuit is short-circuited, a predetermined time has elapsed after the power supply short-circuit detecting unit detects the power supply short-circuit of the output driver circuit. The output driver circuit is set in an off state, and the output driver circuit is kept in an off state until a system reset of the entire system including the semiconductor integrated circuit is performed.

  Furthermore, the present invention provides an electronic control device (for example, an ECU provided in a vehicle or the like) including the semiconductor integrated circuit having the above-described configuration and a microcomputer connected to the semiconductor integrated circuit.

Furthermore, the present invention provides a step of reading a dedicated bit previously included in a communication signal transmitted from a microcomputer, and passes the communication signal as it is based on the read state of the dedicated bit to the output driver circuit. Switch between setting the through output mode to be supplied or setting the protocol output mode to supply the communication signal to the output driver circuit after performing protocol conversion on the communication signal using a predefined protocol. An electronic controlled device comprising: a step of controlling the electronic controlled device by outputting a predetermined voltage signal in a state set in the through output mode or the protocol output mode and driving the output driver circuit A control method is provided.
The electronic controlled device control method according to the present invention includes a step of reading a dedicated bit previously included in a communication signal transmitted from a microcomputer, and the communication signal based on the read state of the dedicated bit. A protocol for setting the through output mode to pass through as it is and supplying it to the output driver circuit, or for performing the protocol conversion on the communication signal according to a predefined protocol and supplying the communication signal to the output driver circuit A step of switching whether to set the output mode, and outputting a predetermined voltage signal in a state set to the through output mode or the protocol output mode, and driving the output driver circuit to control the electronic controlled device Controlling the step, the microcomputer, and the electronic controlled device. When the serial communication line between the semiconductor integrated circuit is configured to have broken, characterized in that a step of switching the forced in through output mode.

  In summary, according to the present invention, in the extended output circuit of one channel built in a semiconductor integrated circuit such as an ASIC, the state of the dedicated bit previously included in the communication signal transmitted from the microcomputer in the mobile body is set. Depending on whether the communication signal is set to the through output mode that passes and outputs, or the communication signal is converted to the protocol output mode that outputs the communication signal after the protocol conversion specified in advance. Is to be switched.

  Therefore, according to the present invention, when the microcomputer detects that a collision of a vehicle or the like or a partial failure of the ECU has occurred, the dedicated bit set by the communication signal from the microcomputer is set. Since the protocol output mode can be automatically switched according to the state, fail-safe processing is erroneously performed by quickly and accurately controlling electronic controlled devices in the mobile body without increasing the load on the microcomputer. It becomes possible to execute without.

  Furthermore, according to the present invention, since the extension output circuit of one channel in the ASIC is controlled so as to switch between the through output mode and the protocol output mode, the conventional two-channel extension output circuit can be used. As a result, the area occupied by the ASIC and the manufacturing cost can be reduced.

  Furthermore, according to the present invention, since it is controlled so that switching between the through output mode and the protocol protocol output mode is performed in one channel in the ASIC, a communication signal output in the through output mode, and Both communication signals output in the protocol output mode can be monitored at a time.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings (FIGS. 1 to 10).

  FIG. 1 is a block diagram showing the configuration of an integrated ASIC and ECU according to an embodiment of the present invention. However, here, the configuration of a semiconductor integrated circuit represented by the ASIC 8 and the configuration of the ECU 80 including the ASIC 8 are shown in a simplified manner. Hereinafter, the same components as those described above are denoted by the same reference numerals.

  As shown in FIG. 1, an ECU 80 having a microcomputer 9 and an integrated ASIC 8 is provided in a moving body such as a vehicle. The ECU 80 detects an electronic controlled device (for example, an air bag or an electronic control type) in a moving body by the microcomputer 9 and the integrated ASIC 8 when it is detected that a vehicle crash or some trouble has occurred in a part of the ECU 80. The engine (not shown here) has a function of correctly controlling the engine and executing a fail-safe process. More specifically, the ECU 80 appropriately executes the fail-safe process by appropriately controlling the ignition timing of the airbag, the fuel injection amount of the electronically controlled engine, and the like by the microcomputer 9 and the integrated ASIC 8. Configured as follows.

  In the embodiment of FIG. 1, the integrated ASIC 8 recognizes a serial communication format communication signal transmitted from the microcomputer 9 and performs bidirectional communication with the microcomputer 9, and this serial communication. In accordance with a dedicated bit included in the communication signal Scom from the unit 6 in advance, the communication signal Scom is set to a through output mode for passing and output as it is, or a protocol defined in advance for the communication signal Scom. And an extended output circuit 10 having a function of switching whether to set the protocol output mode for outputting the communication signal Scom after performing the protocol conversion. Here, it should be noted that, unlike the case of the conventional extended output circuit, only the extended output circuit 10 of one channel is formed in the ASIC 8.

  Further, the integrated ASIC 8 is driven by the communication signal Scom output from the extension output circuit 10 (here, the output signal DRMOSD from the inside of the extension output circuit 10) and sends the voltage signal DRVO of an appropriate level to the electronic controlled device. An output driver circuit 7 to be supplied is formed. The output driver circuit 7 performs an on / off operation according to the output signal DRMOSD, and supplies a voltage signal DRVO of “H (High)” level or “L (Low)” level to the electronic controlled device. 27 and a noise suppression resistor 17 for suppressing noise entering the MOS transistor element 27.

  Here, when bidirectional communication is performed between the microcomputer 9 and the serial communication unit 6, the clock signal COMCLK, the chip enable signal CE, and the through output mode / protocol output mode, which are basic communication, are switched. A serial communication signal COMIN including a dedicated bit (for example, a command bit) is transferred from the microcomputer 9 to the serial communication unit 6, and a serial communication signal COMOUT for notifying the microcomputer 9 of an abnormality in the ECU 80 is serial. The data is transferred from the communication unit 6 to the microcomputer 9.

  More specifically, the extended output circuit 10 according to the embodiment of FIG. 1 includes a dedicated bit reading unit 1 that reads a dedicated bit included in a communication signal in a serial communication format in advance, and the dedicated bit reading unit 1 reads the dedicated bit. Based on the state of the dedicated bit, it is set to a through output mode in which the communication signal Scom is passed and outputted as it is, or the communication signal Scom is subjected to protocol conversion by a protocol defined by the protocol conversion unit 3 The output switching control unit 2 for switching and selecting whether to set the protocol output mode for outputting the communication signal Scom from, and either the through output mode or the protocol output mode according to the switching selection operation by the output switching control unit 2 The output signal DRMMOS is supplied to the output driver circuit 7 in the state set to the mode And an order of the output switching unit 20. The dedicated bit reading unit 1 corresponds to the dedicated bit reading unit of the present invention, and the output switching control unit 2 and the output switching switch unit 20 correspond to the output switching unit of the present invention.

  Further, the extended output circuit 10 includes an interface 4 that performs arithmetic processing of various data related to the communication signal Scom and processes arbitrary signals input from the outside. On the other hand, the interface 4 has a function of communicating with the serial communication unit 6 by the control signal Ssc and communicating with the microcomputer 9 by the control signal Smc.

  Further, the extended output circuit 10 includes a timer 5 for setting a time for turning on or off the MOS transistor element 27 of the output driver circuit 7.

  Here, if the microcomputer 9 detects that the electronic controlled device in the moving body is operating normally under the control of the ECU 80 (that is, that the vehicle or the like is operating normally), that fact is indicated. A communication signal in a serial communication format including a dedicated bit indicating “” is input to the extended output circuit 10. At this time, the extended output circuit 10 switches to the through output mode by the output switching control unit 2 and the output switching switch unit 20 based on the state of the dedicated bit read by the dedicated bit reading unit 1, thereby It operates so as to supply the output driver circuit 7 with an output signal DRVOSD obtained by passing an arbitrary bit value (for example, a specific bit value) without changing it.

  On the other hand, when the microcomputer 9 detects a collision of a vehicle or the like or some failure in a part of the ECU, a serial communication type communication signal including a dedicated bit indicating the fact is sent to the extended output circuit 10. Is input. At this time, the extended output circuit 10 switches the protocol conversion unit 3 by switching to the protocol output mode by the output switching control unit 2 and the output switching switch unit 20 based on the state of the dedicated bit read by the dedicated bit reading unit 1. The output signal DRVOSD obtained by converting the value of an arbitrary bit of the communication signal in accordance with the signal pattern selected according to the state of the dedicated bit from among a plurality of types of signal patterns included in the protocol defined by Is supplied to the output driver circuit 7.

  Preferably, as a plurality of types of signal patterns as described above, a normal signal indicating that the electronic controlled device in the moving body is in a normal state as a detection result by the microcomputer 9, and an electronic coverage as the detection result by the microcomputer 9. An abnormal signal indicating that the control device is in an abnormal state, a first for detecting that the state of the electronic controlled device has changed due to a collision of a vehicle or the like (for example, an abnormality has occurred) Detection signal, a second detection signal for detecting that fail-safe processing has been performed on the electronic controlled device, and a previous state holding signal indicating that the state immediately before the electronic controlled device is held as it is Is mentioned. However, if there is no signal pattern corresponding to the state of the dedicated bit read by the dedicated bit reading unit among the plurality of types of signal patterns (here, five signal patterns), the protocol output It is desirable to output the communication signal in the current through output mode without switching to the mode.

  Further, preferably, logic for executing the functions of the dedicated bit reading unit 1, the output switching control unit 2, and the output switching switch unit 20 as described above is stored in the interface 4. Therefore, the dedicated bit reading unit 1, the output switching control unit 2, and the output switching switch unit 20 described above can be realized by operating the interface 4.

  Further, as shown in FIG. 1, in the integrated ASIC 8, a system reset detection unit 11 that detects that a system reset of the entire computer system (for example, ECU) including the extended output circuit 10 has been performed and the system has been cleared. Is formed. The system reset detection unit 11 can be configured by a logic circuit for detecting the level (“H” level or “L” level) of a control signal for system reset.

  Here, regarding the initial value of the communication signal input from the microcomputer 8 after the system clear state of the entire computer system is canceled, it is desirable to set the through output mode. The reason for this is that immediately after the system clear state is canceled and the microcomputer 9 is started up, the microcomputer 9 may not be operating normally. Until the microcomputer 9 operates normally. For example, it is necessary to prevent the strange signal from being supplied to the output driver circuit 7 by setting the through output mode. More specifically, the output switching control unit 2 and the output switching switch unit 20 until the fixed time elapses after the detection signal Srd output from the system reset detection unit 11 is supplied to the output switching control unit 2. It can be switched to the through output mode.

  Further, as shown in FIG. 1, the integrated ASIC 8 flows through the output driver circuit 7 when a short circuit occurs between the power supply (power supply voltage VDD) of the output driver circuit 7 and the ground (ground level voltage DRVGND). A current limiting unit 70 for limiting the maximum current value is formed. Preferably, the current limiter 70 keeps the maximum value of the current constant in order to prevent the current flowing through the output driver circuit 7 from rapidly increasing and the MOS transistor element 27 and thus the integrated ASIC 8 from burning out. Consists of a current source.

  Further, as shown in FIG. 1, the integrated ASIC 8 includes a power supply short-circuit detecting unit 12 that detects that the current flowing through the output driver circuit 7 has increased to reach the maximum value. Preferably, the power supply short detection unit 12 includes a first resistor (not shown) connected in series to the current limiting circuit 70 and a second resistor (not shown) connected in parallel to the first resistor. In other words, the occurrence of a short circuit between the power source of the output driver circuit 7 and the ground is detected by detecting that the current flowing through the output driver circuit 7 is increased.

  Further, as shown in FIG. 1, in the integrated ASIC 8, the drain voltage of the MOS transistor element 27 in the output driver circuit 7 (that is, the voltage of the output terminal of the MOS transistor element 27) and a predetermined reference power supply 74 are supplied. The comparator 72 for comparing the reference voltage Vref, the input resistor 76 connected between the inverting input terminal (−) of the comparator 72 and the drain of the MOS transistor element 27, the inverting input terminal (−) of the comparator 72, and the ground And an auxiliary resistor 75 connected between the two.

  More specifically, when the power supply of the output driver circuit 7 is short-circuited when the MOS transistor element 27 in the output driver circuit is on, the power supply short-circuit detection unit 12 detects that the current flowing through the output driver circuit 7 has increased. Then, the detection signal Ssd output from the power supply short detection unit 12 is supplied to the output switching control unit 2.

  At this time, the input voltage of the inverting input terminal (−) of the comparator 72 becomes lower than the reference voltage Vref of the non-inverting input terminal (+), and the comparison result output signal DRVFAIL of the comparator 72 becomes “L” level. This “L” level comparison result output signal DRVFAIL is input to the interface 4 via the timer 5. The interface 4 sets the level of the output signal (input signal of the output driver circuit 7) DRMOSD of the extended output circuit 10 to "L" level after a fixed time set by the timer 5 has elapsed. In this manner, the voltage at the output terminal of the MOS transistor element 27 in the output driver circuit becomes “H” level, the MOS transistor element 27 is turned off, and the current of the output driver circuit 7 does not flow. Thereafter, the MOS transistor element 27 in the output driver circuit is kept off until a system reset of the entire computer system including the extended output circuit 10 is performed. In other words, the output driver circuit 7 is configured not to return until the computer system itself is reset and the power supply of the output driver circuit 7 disappears.

  On the other hand, when the serial communication line between the microcomputer 9 and the extended output circuit 10 is disconnected, the communication signal Scom from the serial communication unit 6 remains at the “H” level (or “L” level). Is notified to the output switching control unit 2 to forcibly switch to the through output mode. This is because, when the protocol output mode is set, a strange signal may not be supplied to the output driver circuit 7.

  Further, when the serial communication line between the microcomputer 9 and the extended output circuit 10 is disconnected and the serial communication line does not function, the voltage level of the output terminal of the MOS transistor 27 in the output driver circuit is indefinite. It has become. If the voltage level of the output terminal of the MOS transistor 27 remains indefinite within a predetermined time (time set by the timer 5), an extended output indicates that an abnormality has occurred due to the disconnection of the serial communication line. A signal for determination by the circuit 10 is output from the MOS transistor 27 in the output driver circuit and detected by the comparator 72.

  The signal detected by the comparator 72 is input to the interface 4 in the extended output circuit 10 via the timer 5. The interface 4 feeds back to the microcomputer 9 that the serial communication line between the microcomputer 9 and the extended output circuit 10 has been disconnected after a predetermined time set by the timer 5 has elapsed, and also outputs the extended output circuit 10. The level of the output signal DRMOSD is fixed to the “L” level. In this way, the voltage at the output terminal of the MOS transistor element 27 in the output driver circuit is fixed at the “H” level, the MOS transistor element 27 is fixed in the off state, and the current of the output driver circuit 7 does not flow. Thereafter, until the serial communication line is connected between the microcomputer 9 and the extended output circuit 10 and the system reset of the entire computer system including the extended output circuit 10 is performed, the MOS transistor elements in the output driver circuit 27 is kept off.

  As described above, in the embodiment of FIG. 1, in the extended output circuit of one channel in the ASIC, the state of the dedicated bit previously included in the communication signal transmitted from the microcomputer via the serial communication unit is set. Accordingly, it is possible to easily switch between the through output mode and the protocol output mode.

  Therefore, according to the embodiment shown in FIG. 1, when a microcomputer detects that a vehicle collision or the like, a disconnection of a serial communication line in an ASIC, a short circuit of a power source, or the like has occurred, communication from the microcomputer is performed. Since the protocol output mode can be automatically switched according to the state of the dedicated bit set by the signal, the electronic controlled device in the moving body can be quickly and without increasing the load on the microcomputer. It becomes possible to execute the fail-safe process without error by controlling accurately.

  Further, according to the embodiment of FIG. 1, since the switching between the through output mode and the protocol output mode is controlled by the expansion output circuit of one channel in the ASIC, the conventional two-channel expansion is performed. It is possible to reduce the area occupied by the ASIC and the manufacturing cost compared to the output circuit.

  Further, according to the embodiment of FIG. 1, since control is performed so that switching between the through output mode and the protocol protocol output mode is performed on one channel in the ASIC, the communication output in the through output mode. Both the signal and the communication signal output in the protocol output mode can be monitored at a time.

  FIG. 2 is a bit configuration diagram showing dedicated bits for switching the through output mode / protocol output mode in the communication signal.

  As shown in FIG. 2, the serial dedicated bit included in advance in the communication signal in the serial communication format is composed of two bits, DS1 and DS2. More specifically, in the case of switching to the through output mode (for example, the initial value after the system reset of the entire computer system is canceled), the bit configuration is such that two “0” s are continuously arranged. When switching to the protocol output mode, the bit configuration is such that two “1” s are consecutively arranged. Typically, in the protocol output mode, it is set to the fuel cut mode for detecting the collision of the vehicle or the like and stopping the fuel supply to prevent the vehicle or the like from burning, or the collision of the vehicle or the like is detected. It is set to the HV cut (hybrid cut) mode for detecting and shutting off the high voltage power supply relay to prevent electric shock of the passenger and rescue crew. In the bit configuration other than the above, the mode immediately before the ASIC, the electronic controlled device, etc. is held (previous state holding mode).

  As described above, by setting the dedicated bit to 2 bits, even if an error due to garbled 1 bit occurs, switching between the through output mode and the protocol output mode due to erroneous judgment of the microcomputer does not occur. It has become. When the dedicated bit has a 3-bit configuration, the reliability regarding switching between the through output mode and the protocol output mode is further improved.

  FIG. 3 is a bit configuration diagram showing dedicated bits in the case of the through output mode in the communication signal.

  As shown in FIG. 3, the serial dedicated bit when the two bits of DS1 and DS2 are switched to the through output mode by the bit configuration in which “2” is continuously “0” is configured by one bit of DR1. ing. In the through output mode, the value of the dedicated bit of DR1 is output as it is. More specifically, when the value of the dedicated bit of DR1 is “0”, the output signal DRMOSD from the inside of the communication signal output control device is set to “H” level, and the output signal (voltage signal DRVO) of the output driver circuit is set. ) Is set to the “L” level. On the other hand, when the value of the dedicated bit of DR1 is “1”, the output signal DRMOSD from the inside of the communication signal output control device is set to “L” level, and the output signal of the output driver circuit is set to “H” level. Is set. The output signal of the output driver circuit is set to the “H” level as an initial value after the system reset of the entire computer system is cancelled.

  FIG. 4 is a bit configuration diagram showing dedicated bits in the protocol output mode in the communication signal.

  As shown in FIG. 4, when the protocol output mode is switched to the protocol output mode by the bit configuration in which the two bits of DS1 and DS2 are continuously “1”, the serial dedicated bits are DR1, FC1, and FC2. It consists of bits. In the protocol output mode, a plurality of types of signal patterns included in a predetermined protocol are switched and selected in accordance with the state of the three dedicated bits input from the microcomputer.

  Here, the value of the specific bit of the communication signal from the microcomputer is converted according to the signal pattern selected according to the state of the dedicated bit of 3 bits from the 5 signal patterns included in the protocol. It has become. In this way, the output signal (voltage signal DRVO) of the output driver circuit that has been subjected to protocol conversion in accordance with the corresponding signal pattern is supplied to the electronic device in the moving body.

  More specifically, as shown in the table of FIG. 4, when all of the serial dedicated bits DR1, FC1, and FC2 are “0”, the electronic controlled device in the moving body is in a normal state as a detection result by the microcomputer. A normal signal (for example, an initial value after switching to the protocol output mode) indicating that the serial dedicated bits DR1, FC1, and FC2 are “1”, “0”, and “1” is output. In such a case, an abnormal signal indicating that the electronic controlled device is in an abnormal state is output as a detection result by the microcomputer. On the other hand, when the serial dedicated bits DR1, FC1, and FC2 are “0”, “1”, and “1”, it is detected that the state of the electronic controlled device has changed due to the collision of the vehicle or the like. When the first detection signal is output and the serial dedicated bits DR1, FC1, and FC2 are “1”, “1”, and “0”, fail-safe processing is performed on the electronic controlled device. A second detection signal for detecting this is output. In the bit configuration other than the above, a signal is output in a state in which the previous state of the ASIC, the electronic controlled device, or the like is held (previous state hold state).

  Next, when the protocol output mode is set based on FIGS. 5 to 9, one signal among a plurality of signal patterns (here, five signal patterns) included in the predefined protocol is used. A state in which the output from the pattern is switched to the output by another signal pattern will be described.

  FIG. 5 is a signal waveform diagram showing a state of switching from normal signal output to abnormal signal output. As shown in the signal waveform diagram for time t (arbitrary unit) in FIG. 5, in the signal pattern of the normal signal, the “H” level period and the “L” level period in one frame (Tfn) are substantially the same. A certain signal pattern of a plurality of frames is repeated infinitely. In the signal pattern of the subsequent abnormal signal, it remains at “H” level.

  Further, as apparent from the switching timing from the normal signal to the abnormal signal in FIG. 5, the switching from the signal pattern of the normal signal to the signal pattern of the abnormal signal is the end of the period of one frame (Tfn) in the normal signal. It is executed immediately without waiting. The reason for this is that when an electronically controlled device in the moving body becomes abnormal due to a collision of a vehicle or the like (that is, a user in the moving body is in a dangerous state), it is necessary to immediately notify the integrated ASIC or the like of the abnormal state. It is possible that there is.

  FIG. 6 is a signal waveform diagram showing a state of switching from the first detection signal output or the second detection signal output to the abnormal signal output. However, here, the state of switching from the first detection signal output to the abnormal signal output is shown.

  As shown in the signal waveform diagram for time t in FIG. 6, the first detection signal includes two “H” level pulses (positive pulses) having different pulse widths in one frame (Tfd1). Yes. The second detection signal also includes two “H” level pulses having different pulse widths in one frame (Tfd2). However, as will be described later with reference to FIG. 9, the first detection signal and the second detection signal have different pulse widths of one “H” level pulse. In both the first detection signal and the second detection signal, the signal pattern of a plurality of frames having the signal waveform as described above for one frame is repeated infinitely. In the signal pattern of the subsequent abnormal signal, it remains at “H” level.

  Further, as is apparent from the timing of switching from the first detection signal (or second detection signal) to the abnormal signal in FIG. 6, the signal pattern of the first detection signal (or second detection signal) is abnormal. The switching of the signal to the signal pattern is performed immediately without waiting for the end of the period of one frame (Tfd1 (or Tdf2)) in the first detection signal (or the second detection signal). Also in this case, for the same reason as in FIG. 5 described above, when a state change occurs in the electronic controlled device in the moving body due to the collision of the vehicle or the like, the abnormal state is quickly integrated. The ASIC must be notified.

  FIG. 7 is a signal waveform diagram showing a state of switching from normal signal output to first detection signal output or second detection signal output. However, here, the state of switching from normal signal output to first detection signal output is shown as a representative.

  As shown in the signal waveform diagram with respect to time t in FIG. 7 and the switching timing from the normal signal to the first detection signal (or the second detection signal), the normal signal to the first detection signal (or the second detection signal). Switching to the detection signal is performed after waiting for the end of the period of one frame (Tfn) in the normal signal. The reason for this is that when the electronic controlled device in the moving body changes to a normal state, the detection related to the change in the state of the electronic controlled device due to the collision of the vehicle or the like (for example, the occurrence of an abnormality) is completed. The safety of the vehicle must be assured by promptly confirming whether or not the device is in a safe state or detecting whether or not the fail-safe process has been completed for the electronically controlled device. Can be considered.

  FIG. 8 is a signal waveform diagram showing a state of switching from the first detection signal output or the second detection signal output to the normal signal output. However, here, the state of switching from the first detection signal output to the normal signal output is shown as a representative.

  As shown in the signal waveform diagram with respect to time t in FIG. 8 and the timing of switching from the first detection signal (or second detection signal) to the normal signal, the first detection signal (or second detection signal). The switching from the normal signal to the normal signal is performed after the end of the period of one frame (Tfd1 (or Tdf2)) in the first detection signal or the second detection signal. The reason for this is that the microcomputer and the communication signal output control device determine that the first detection signal (or the second detection signal) is properly sent to the electronic controlled device, and then switch to the normal signal. It may be necessary to do this.

  FIG. 9 is a signal waveform diagram showing a state of switching from the second detection signal output to the first detection signal output.

  As shown in the signal waveform diagram for time t in FIG. 9, the second detection signal includes two “H” level pulses (positive pulses) having different pulse widths in one frame (Tfd2). Yes. Further, an interval (“L” level period) Pc between the first “H” level pulse and the second “H” level pulse is defined, and the second “H” level is defined. The pulse width Pd of the level pulse is defined. On the other hand, in the first detection signal, two “H” level pulses having different pulse widths are included in one frame (Tfd1). Further, an interval (“L” level period) Pa between the first “H” level pulse and the second “H” level pulse is defined, and the second “H” level is defined. The pulse width Pb of the level pulse is defined. The values of the interval Pc and the pulse width Pd in the second detection signal are different from the values of the interval Pa and the pulse width Pb in the first detection signal. Thereby, the electronic controlled device in the moving body can distinguish the first detection signal and the second detection signal from each other. Here, the pulse width of the first “H” level pulse in the second detection signal is the same as the pulse width of the first “H” level pulse in the first detection signal. Yes.

  Furthermore, as is apparent from the timing of switching from the second detection signal to the first detection signal in FIG. 9, switching from the second detection signal to the first detection signal is 1 in the second detection signal. It is executed after waiting for the end of the period of the frame (Tfd2). The reason for this is that it is possible to immediately confirm whether or not the detection relating to the change in the state of the electronic controlled device due to the collision of the vehicle or the like (for example, the occurrence of an abnormality) has been completed or the electronic controlled device On the other hand, when the detection of whether or not the fail-safe process has been completed is immediately performed, communication by the second detection signal related to the fail-safe process for the electronic controlled device is properly established. It may be necessary to switch to the first detection signal related to the detection that an abnormality has occurred in the electronic controlled device due to a collision of a vehicle or the like.

  FIG. 10 is a flowchart for explaining the control flow of the electronic controlled device according to the present invention. Here, by operating the interface (see FIG. 1) in the integrated ASIC according to the control method of the electronic controlled device according to the present invention, the communication signal input from the microcomputer in the moving body is set to the through output mode. A control flow for driving the output driver circuit by switching whether to set to the protocol output mode will be described.

  As shown in step S1 of FIG. 10, first, a communication signal in the serial communication format is input from the microcomputer in the moving body to the integrated ASIC.

  Next, as shown in step S2, a dedicated bit (for example, a command bit having a 2-bit configuration) included in advance in the communication signal in the serial communication format is read.

  Further, as shown in step S3, the interface in the integrated ASIC is set to the through output mode in which the communication signal in the serial communication format is passed as it is and output based on the state of the dedicated bit read in step S2. Or switching between selecting whether to set the protocol output mode for outputting the communication signal after performing the protocol conversion by the protocol defined in advance for the communication signal in the serial communication format.

  Further, as shown in step S4, it is determined whether or not the through output mode is currently set or the protocol output mode is set.

  Here, when the through output mode is set in step S4 described above, as shown in step S5, a communication signal whose specific bit value does not change is output by passing the communication signal in the serial communication format as it is. Is done.

  On the other hand, when the protocol output mode is set in step S4, communication is performed according to a signal pattern selected from several signal patterns included in a predefined protocol as shown in step S6. By converting the value of the specific bit of the signal, the communication signal after the protocol conversion is output.

  Finally, as shown in step S7, to control the electronic controlled device in the moving body by driving the output driver circuit with the communication signal output in the state set to the through output mode or the protocol output mode. A voltage signal of a predetermined level is output.

  A semiconductor integrated circuit, an electronic control device, and an electronic controlled apparatus control method according to the present invention are provided in an ECU provided in a moving body such as a vehicle in order to control an electronic controlled apparatus such as an airbag or an electronically controlled engine. It is possible to apply. In particular, the method for controlling a semiconductor integrated circuit, an electronic control device, and an electronic controlled device according to the present invention minimizes damage caused by a collision or failure when a vehicle collision or some failure occurs in a part of an ECU. Therefore, it can be used in a computer system for accurately controlling an electronic controlled device in a moving body and executing a fail-safe process.

It is a block diagram which shows the structure of integrated ASIC and ECU which concern on one Example of this invention. It is a bit block diagram which shows the exclusive bit for switching through output mode / protocol output mode in a communication signal. It is a bit block diagram which shows a dedicated bit in the case of a through output mode in a communication signal. It is a bit block diagram which shows a dedicated bit in the case of protocol output mode in a communication signal. It is a signal waveform diagram showing a state of switching from normal signal output to abnormal signal output. It is a signal waveform diagram showing a state of switching from the first detection signal output or the second detection signal output to the abnormal signal output. It is a signal waveform diagram showing a state of switching from normal signal output to first detection signal output or second detection signal output. It is a signal waveform diagram showing a state of switching from the first detection signal output or the second detection signal output to the normal signal output. It is a signal waveform diagram which shows the mode of switching from a 2nd detection signal output to a 1st detection signal output. It is a flowchart for demonstrating the control flow of the electronic controlled apparatus which concerns on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Dedicated bit reading part 2 Output switching control part 3 Protocol conversion part 4 Interface 5 Timer 6 Serial communication part 7 Output driver circuit 8 Integrated ASIC
DESCRIPTION OF SYMBOLS 9 Microcomputer 10 Extended output circuit 11 System reset detection part 12 Power supply short detection part 17 Noise suppression resistor 20 Output changeover switch part 27 MOS transistor element 70 Current limiting part 72 Comparator 80 ECU

Claims (10)

In a semiconductor integrated circuit configured to control an electronic controlled device by inputting a communication signal transmitted from a microcomputer and outputting a predetermined voltage signal to drive an output driver circuit.
Dedicated bit reading means for reading a dedicated bit included in advance in the communication signal;
Based on the state of the dedicated bit read by the dedicated bit reading means, the communication signal is passed as it is to set to a through output mode to be supplied to the output driver circuit, or in advance for the communication signal Bei example an output switching means from performing a defined protocol by protocol conversion switches whether to set the communication signal supplied protocol output mode to the output driver circuit, a,
Wherein when the serial communication line between the microcomputer and the semiconductor integrated circuit is broken, the semiconductor integrated circuit according to claim Rukoto forcibly switched to the through-output mode.   2. The semiconductor integrated circuit according to claim 1, wherein when the through output mode is set by the output switching means, an arbitrary bit value of a communication signal from the microcomputer is passed as it is without change.   When the protocol output mode is set by the output switching means, communication from the microcomputer is performed according to a signal pattern selected according to the state of the dedicated bit from among a plurality of types of signal patterns included in the protocol. 2. The semiconductor integrated circuit according to claim 1, wherein a value of an arbitrary bit of the signal is converted.   The plurality of types of signal patterns include a normal signal indicating that the electronic controlled device is in a normal state, an abnormal signal indicating that the electronic controlled device is in an abnormal state, and a status of the electronic controlled device. A first detection signal for detecting that there has been a change, a second detection signal for detecting that a fail-safe process has been performed on the electronic controlled device, and a state immediately before the electronic controlled device. 4. The semiconductor integrated circuit according to claim 3, further comprising at least a previous state holding signal indicating holding.   Switching from the normal signal, the first detection signal, or the second detection signal to the abnormal signal is the end of a period of one frame in the normal signal, the first detection signal, or the second detection signal. On the other hand, switching from the normal signal to the first detection signal or the second detection signal is performed immediately without waiting for the end of the one frame period in the normal signal. 5. The semiconductor integrated circuit according to claim 4, wherein:   The switching from the first detection signal or the second detection signal to the normal signal is executed after waiting for the end of one frame period in the first detection signal or the second detection signal, and On the other hand, the switching from the second detection signal to the first detection signal is performed after waiting for the end of one frame period in the second detection signal. Semiconductor integrated circuit. When the serial communication line between the microcomputer and the semiconductor integrated circuit is disconnected, a signal for determining in the semiconductor integrated circuit that an abnormality has occurred due to the disconnection of the serial communication line is the output driver 2. The semiconductor integrated circuit according to claim 1 , wherein the semiconductor integrated circuit is output from a circuit.   When the power supply of the output driver circuit is short-circuited, the output driver circuit is set to an off state after a predetermined time has elapsed since the detection of a power supply short-circuit of the output driver circuit by a power supply short-circuit detection unit. 2. The semiconductor integrated circuit according to claim 1, wherein the output driver circuit is kept off until a system reset of the entire system including the semiconductor integrated circuit is performed. A semiconductor integrated circuit according to any one of claims 1 to 8, the electronic control apparatus characterized by comprising a microcomputer connected to said semiconductor integrated circuit. Reading a dedicated bit included in advance in a communication signal transmitted from the microcomputer;
Based on the state of the read dedicated bit, set the through output mode to pass the communication signal as it is and supply it to the output driver circuit, or convert the communication signal according to a protocol defined in advance. Switching to set the protocol output mode to supply the communication signal to the output driver circuit after performing,
Outputting a predetermined voltage signal in a state set to the through output mode or the protocol output mode, and controlling the electronic controlled device by driving the output driver circuit ;
Forcibly switching to the through output mode when a serial communication line between the microcomputer and a semiconductor integrated circuit configured to control the electronic controlled device is disconnected. And a method of controlling an electronic controlled device.

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