JP4799051B2 - Semiconductor circuit - Google Patents

Description

  The present invention relates to a semiconductor circuit having a cascode operational amplifier circuit structure.

  FIG. 5 is a diagram showing a circuit configuration of a conventional folded cascode operational amplifier. As shown in FIG. 5, this circuit is composed of transistors having a combination of mirror ratios with the current source circuit 101 as a reference, and drains of transistors M533 and M534 connected to the differential input terminals VINP and VINM. By connecting to the drains of the transistors M502 and M512 of the output circuit 104, high-speed operation is realized while ensuring a dynamic range.

  In addition, it has two independent current controls: a current control by the gate of the transistor 105 connected to a power supply section called a common gate, and a current source circuit 101 having a mirror structure at the bottom of the circuit. The upper common gate transistor 105 is not only a current control circuit but also an operation offset voltage control circuit (see, for example, Non-Patent Document 1).

Rudy J. van de Plassche, 2 other authors, “Analog Circuit Design (High-Speed Analog-to-Digital Converters; Mixed-Signal Design; PLL's and Synthesizers)”, Kluwer Academic Publishers, September 2000, p. 196-197

  FIG. 6 is a diagram illustrating control voltage-output voltage characteristics of a folded cascode operational amplifier. In the above circuit, the output voltage VOP / VOM of the differential output terminals VOP and VOM with respect to the control voltage VCM for the gate of the transistor 105 normally operates substantially linearly as shown by the characteristic C1 in FIG. The output voltage center point is stably controlled to ensure a stable operating range. For this reason, a constant voltage is applied here, and operation is performed at a current value defined by the lower current source.

  However, in this semiconductor circuit having the two control circuits of the common gate transistor 105 and the current source circuit 101, once the balance is lost, the operation center point of the output signal greatly fluctuates even for the same applied voltage with respect to the input signal. Resulting in.

  As an example, when a parasitic resistance is generated under the transistor M531 of the input signal circuit 103, the characteristic is shown in the characteristic C2 in FIG. 6 according to the relationship between the parasitic resistance value and the current ratio. It changes a lot. In such a state, the control range of the control voltage VCM that secures a stable operation is remarkably reduced, and is very vulnerable to voltage fluctuations. This characteristic variation occurs due to the process of the semiconductor in particular, so that the control characteristic varies greatly due to the variation.

  Thus, since the circuit configuration is composed of only transistors, any one of the mirror current source circuit 101, the reference current circuit 102, the input circuit 103, and the output circuit 104, in particular, the reference current circuit 102 and the input. If a difference in parasitic resistance or operating resistance occurs due to process or other factors between the circuits 103, even if the same control voltage VCM is applied to the common mode transistor control terminal VCM, the ratio control is performed with respect to the differential input terminals VINP and VINM. The slope of becomes steep. Therefore, the stable operation range is remarkably narrowed, and there is a situation in which the outputs of the differential output terminals VOM and VOP are significantly offset and have a difference in the operation center point due to minute fluctuations.

  The present invention has been made in view of the above-described conventional circumstances, and has a circuit structure of a cascode operational amplifier capable of absorbing offset fluctuations caused by manufacturing variations and stabilizing control characteristics. An object is to provide a semiconductor circuit.

The semiconductor circuit of the present invention is a semiconductor circuit having a cascode-type operational amplifier circuit structure, one of which is connected to a power source and the other is connected to a first current source, one of which is connected to the power source and the other An output unit to which a second current source is connected, and an input unit to which one of the two is connected to the power source and the output unit and the second current source are connected to the other. And the second current source has a mirror structure having a predetermined mirror ratio, and the reference current circuit unit, the output unit, and the input unit include a P-type transistor and a gate grounded transistor connected to the power source. a resistance is provided between the front Symbol respective P-type transistor and the respective gate-grounded transistor.

  This configuration prevents the inserted resistor from losing the balance of the current mirror structure due to process variations, etc., and it is possible to adjust the amount of fluctuation after manufacturing in hardware, so stable high speed while maintaining performance An operational amplifier can be realized.

  In the semiconductor circuit of the present invention, each of the resistors has a resistance value that approximates the reciprocal of the current ratio of the currents flowing through the plurality of P-type transistors.

  With this configuration, it is possible to realize a structure that most effectively suppresses offset fluctuation due to process fluctuation and other factors.

  In the semiconductor circuit of the present invention, the transistor is a 3-WELL structure or a transistor having a back gate, and has a structure in which the back gate is source-connected.

  With this configuration, the stability of a semiconductor structure that is susceptible to threshold voltage fluctuation, such as a 3-WELL structure, which is a semiconductor substrate separation technology for creating a mixed LSI of digital and analog circuits, is improved. A structure that can be adjusted later is added, and an operational amplifier with stable performance can be realized.

  In the semiconductor circuit of the present invention, the reference current circuit unit and the output circuit unit each include a transistor inserted for bias control.

  With this configuration, an operational point control structure is provided, and a structure that can be adjusted after manufacture is added while having many fluctuation factors, so that an operational amplifier with stable performance can be realized.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor circuit which has the circuit structure of the cascode type | mold operational amplifier which can absorb the offset fluctuation | variation resulting from the dispersion | variation at the time of manufacture, etc., and can stabilize a control characteristic can be provided.

(First embodiment)
FIG. 1 is a diagram showing a circuit configuration of a folded cascode fully differential operational amplifier according to the first embodiment of the present invention. As shown in FIG. 1, the current source circuit 1 according to the first embodiment, a reference current circuit 2, an input circuit 3, and an output circuit 4 are provided.

  One side of the current source circuit 1 is grounded and has a mirror structure, and a current corresponding to a mirror ratio corresponding to the number of transistors constituting the mirror circuit flows in each of the current sources I1 to I3. The reference current circuit 2, the input circuit 3, and the output circuit 4 operate at a current ratio controlled by this mirror ratio.

  One of the reference current circuits 2 is connected to the power supply Vdd, and the other is connected to the current source I3 of the current source circuit 1. And it has the P-type transistor M121 by which the control voltage VCM is input into a gate, and the P-type transistor M122. Note that m in the figure indicates the number of transistors connected in parallel.

  One of the input circuits 3 is connected to the power supply Vdd, and the other is connected to the current source circuit 1 and the output circuit 4. Then, a P-type transistor M131 whose gate receives the control voltage VCM, a P-type transistor M132 mirror-connected to the P-type transistor M122, and P-type transistors 133 and 134 connected to the differential input terminals VINM and VINP, Have. The transistors M121 and M131 constitute the common gate transistor 5.

  One of the output circuits 4 is connected to the power supply Vdd, and the other is connected to the current sources I1 and I2 of the current source circuit 1. The P-type transistors M101 and M111 and the P-type transistors M102 and 102 mirror-connected to the P-type transistor M121 are included. Differential output terminals VOM and VOP are connected to the drains of the transistors M102 and M112.

  In the present embodiment, a resistor 6 (R0 to R3) that also serves as a buffer is provided between the P-type transistors M101, M111, M121, and M131 and the next-stage circuit. In the resistor 6, it is not necessary to provide all of R0 to R3, and at least one resistor may be provided.

  The operation of the semiconductor circuit configured as described above will be described.

  First, in the differential output type operational amplifier, it is necessary to maintain the midpoint output potential at an appropriate potential. This control is performed by the VCM control terminal. The upper common gate transistor 5 is controlled so as to be detected by some means so as to be the optimum point of operation and to have an appropriate set potential. A folded cascode circuit is often used as a means for realizing an output voltage range of an operational amplifier of a differential output type while suppressing a potential difference from an input voltage.

  Transistors M133 and M134 of the input circuit 3 are a differential pair that converts a voltage change of an input signal into a current change. Transistors M102 and M112 of the output circuit 4 are gate-grounded transistors and are biased by the current source circuit 1. .

  Of the transistors M102 and M112, the current flowing through the transistor connected to the node where the current flows from the transistors M133 and M134 increases, and accordingly, the cascode action can be realized.

  At this time, if there is a difference in the operating resistance value of the common gate transistor 5 controlled by the VCM control terminal due to manufacturing variation, the balance with respect to the current conversion of the input signal is lost, and the differential that should originally operate at the same voltage midpoint. A potential difference is generated between the input signal VINP / VINM at the input terminal and the output signal VOP / VOM at the differential output terminal.

  Since this is a variation caused by the layout of the process and the semiconductor design, in the present embodiment, it is possible to correct the original stable state by inserting the resistor 6 having an amount for correcting the deterioration of the balance. .

  FIG. 2 is a diagram showing control voltage-output voltage characteristics of the circuit according to the first embodiment of the present invention. FIG. 2 shows characteristics C10, C20, C30, and C40 by changing the value of the resistance R2 from the deterioration characteristic C0 due to the threshold voltage Vt fluctuation of the P-type transistor. Therefore, the resistor 6 is inserted at the time of circuit manufacture, and after the manufacture, the resistance value is adjusted by hardware by laser trimming or the like, thereby absorbing process variations such as regulation resistance generated in the transistor, and the circuit current mirror. The balance of the structure can be prevented.

Note that the resistance value of the resistor 6 preferably has a relationship approximate to the reciprocal of the ratio of the current passing through the same-stage transistor flowing from the power supply unit Vdd to the ground unit GND in each circuit. Thereby, the structure which suppresses the offset fluctuation | variation by process fluctuation | variation most effectively is realizable.
As an example of the resistance value of the resistor 6, when the current ratio is 1: 2: 3, the reciprocal thereof is 1: 0.5: 0.3. Therefore, R1, R2, and R3 are as follows: It is preferable to have a relationship.
(0.5-0.1) R1 <R2 <(0.5 + 0.1) R1
(0.3-0.1) R1 <R3 <(0.3 + 0.1) R1

  According to the semiconductor circuit of the first embodiment of the present invention as described above, some or all of the P-type transistor connected to the power source and the circuit of the next stage are also used as a buffer. This prevents the current mirror structure from being out of balance due to process variations due to parasitic resistance generated in the transistor, etc., and has a hardware structure that adjusts the amount of fluctuation after manufacturing, maintaining high performance and maintaining high speed An operational amplifier can be realized.

(Second Embodiment)
FIG. 3 is a diagram showing a circuit configuration of a folded cascode fully differential operational amplifier according to the second embodiment of the present invention. In the figure, the same reference numerals are given to the same parts as those in FIG. 1 described in the first embodiment, and the description thereof is omitted.

  In this embodiment, the transistors M201, M211, M221, M231, M202, M212, M222, and M232 are transistors each having a 3-WELL structure or having a back gate. In these transistors, the back gate is connected to the source in order to suppress the fluctuation of the manufacturing threshold voltage VT.

  With this configuration, the stability of a semiconductor structure that is susceptible to threshold voltage fluctuation, such as a 3-WELL structure, which is a semiconductor substrate separation technique for making a mixed LSI of a digital circuit and an analog circuit, is improved. Further, by adjusting the resistor 6, a structure that can be adjusted after manufacture is added, and an operational amplifier with stable performance can be realized.

(Third embodiment)
FIG. 4 is a diagram showing a circuit configuration of a folded cascode fully differential operational amplifier according to the third embodiment of the present invention. In the figure, the same reference numerals are given to the same parts as those in FIG. 3 described in the second embodiment, and the description thereof is omitted.

  As shown in FIG. 4, the semiconductor circuit of this embodiment includes two bias control circuits 7 and 8 that can correct the operating bias point due to environmental fluctuations and external factors. The bias circuit 7 is a control circuit on the power supply side of the output operating point, and is configured to include P-type transistors M203, M213, and M223 to which a control voltage VBHI is applied at the gate. The bias circuit 8 is a control circuit on the ground side of the output-side operating point, and includes N-type transistors M204, M214, and M224 to which a control voltage VBLO is applied at the gate.

  With this configuration, an operational point control structure is provided, and a structure that can be adjusted after manufacture is added while having many fluctuation factors, so that an operational amplifier with stable performance can be realized.

  The present invention has an effect of absorbing offset fluctuation due to manufacturing variations and stabilizing control characteristics, and is useful for a cascode operational amplifier or the like.

The figure which shows the circuit structure of the folded cascode type | mold fully differential operational amplifier which concerns on the 1st Embodiment of this invention. The figure which shows the control voltage-output voltage characteristic of the circuit which concerns on the 1st Embodiment of this invention The figure which shows the circuit structure of the folded cascode type | mold fully differential operational amplifier which concerns on the 2nd Embodiment of this invention. The figure which shows the circuit structure of the folded cascode type | mold fully differential operational amplifier which concerns on the 3rd Embodiment of this invention. Diagram showing the circuit configuration of a conventional folded cascode operational amplifier The figure which shows the control voltage-output voltage characteristic of the folded cascode type operational amplifier

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Current source circuit 2 Reference current circuit 3 Input circuit 4 Output circuit 5 Common gate transistor 6 Resistor for buffer 7, 8 Bias control circuit

Claims (4)

A semiconductor circuit having a cascode operational amplifier circuit structure,
A reference current circuit unit in which one is connected to the power source and the first current source is connected to the other;
One output to the power supply and the other to which the second current source is connected;
One is connected to the power supply, and the other is provided with an input unit to which the output unit and the second current source are connected,
The first current source and the second current source include a mirror structure having a predetermined mirror ratio,
The reference current circuit unit, the output unit, and the input unit have a P-type transistor and a grounded gate transistor connected to the power source,
Before Symbol semiconductor circuit resistance is provided between the respective P-type transistor and the respective gate-grounded transistor. The semiconductor circuit according to claim 1,
Each of the resistors is a semiconductor circuit having a resistance value that approximates the reciprocal of a current ratio of currents flowing through the plurality of P-type transistors. A semiconductor circuit according to claim 1 or 2,
The transistor is a transistor having a 3-WELL structure or a back gate, and having a structure in which the back gate is source-connected. A semiconductor circuit according to claim 3,
The reference current circuit unit and the output circuit unit are semiconductor circuits including transistors inserted for bias control.

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