JP4797680B2 - Information processing apparatus and information processing method - Google Patents

Description

  The present invention relates to an information processing device and an information processing method, and more particularly to an information processing device and an information processing method for overwriting and erasing data stored in a storage device.

  Conventionally, in an information processing apparatus, input data is temporarily stored in a non-volatile storage device such as a hard disk, and the stored data is read from the storage device and predetermined processing is executed. If the data stored in this storage device leaks, there is a problem of confidentiality, so the data is overwritten and erased.

  As a method for overwriting and erasing data on the hard disk, the US National Security Agency (NSA) recommended method (the first and second times are overwritten with random number data and the third is overwritten with fixed value data) is generally known. It has been. Also, a method for increasing the erasing effect by increasing the number of overwriting is generally known, and in that case, in order to further enhance the erasing effect, overwriting is performed with different erasing data every time overwriting is performed. .

Also, there is known a digital image forming apparatus in which when data on a hard disk is overwritten and erased, the data for erasing is developed on the memory and overwritten with the data for erasing on the memory (Patent Document 1).
JP-A-2005-18567

  However, in the digital image forming apparatus described in Patent Document 1, when the number of overwriting is increased, if the erasing data developed on the memory is updated according to the number of overwriting, it takes time to update the erasing data. In addition, if a plurality of erasing data are expanded on a memory in advance, there is a problem that a large memory area is required.

  The present invention has been made to solve the above-mentioned problems, and it is possible to suppress the increase in the memory area necessary for storing the erasing data and to shorten the time of the overwriting process, thereby erasing the data. An object of the present invention is to provide an information processing apparatus and an information processing method capable of performing overwriting and erasing with high effect.

In order to achieve the above object, an information processing apparatus according to the present invention includes an overwritable non-volatile storage device storing data and erasure data for overwriting and erasing data stored in the storage device . When erasing data storage means storing random number data and the data stored in the storage device are overwritten and erased a plurality of times, the order of addresses read in the erasing data storage means and the memory each time overwriting is performed It includes at least one of the order of addresses to be overwritten on the apparatus, reads the erasure data from the erasure data storage means, and overwrites erasure means for overwriting and erasing the storage apparatus.

An information processing method according to the present invention is an information processing method in an information processing apparatus provided with an overwritable non-volatile storage device storing data for overwriting and erasing data stored in the storage device. Random number data as erasure data is stored, and when the data stored in the storage device is overwritten and erased a plurality of times, each time the overwriting is performed, the order of addresses to be read from the stored erasure data and the It is characterized in that at least one of the order of addresses overwritten in the storage device is changed, the stored data for erasure is read out, and the storage device is overwritten and erased.

  According to the present invention, when erasing data for overwriting and erasing data stored in the storage device is stored, and the data stored in the storage device is overwritten and erased a plurality of times, the data is stored every time overwriting is performed. At least one of the order of addresses for reading out the erased data and the order of addresses overwritten in the storage device are changed, the stored erase data is read out and overwritten in the storage device.

  Therefore, each time overwriting is performed, by changing at least one of the order of addresses for reading the erasing data and the order of the addresses to be overwritten, overwriting erasing with different erasing data is realized. It is possible to suppress an increase in the memory area required for storing and shorten the time for the overwrite erasing process, thereby performing overwrite erasure with a high erasure effect.

  The overwrite erasure unit according to the present invention changes the read start address in the erasure data storage unit every time overwriting is performed, sequentially reads the erasure data from the erasure data storage unit, and overwrites the storage device. can do. As a result, overwrite erasure with different erasure data can be realized, and since only the read start address needs to be changed, the overwrite erasure process can be performed at high speed.

  In addition, each time overwriting is performed, the overwrite erasure unit according to the present invention changes the overwrite start address to be overwritten in the storage device, sequentially reads the erasure data from the erase data storage unit, and overwrites the storage device. Can be erased. As a result, overwrite erasure with different erasure data can be realized, and since only the overwrite start address needs to be changed, the overwrite erasure process can be performed at high speed.

In addition, the erasing data of the above, shall be the random number data. As a result, the erasing effect can be enhanced, and since random number data is not generated every time overwriting is performed, it is possible to prevent an increase in overwriting time.

  Further, the erasing data storage means according to the present invention can be a non-volatile memory in which erasing data is stored in advance. This eliminates the need to generate erasure data during the overwrite erasure process, thereby speeding up the overwrite erasure process and eliminating the possibility of erasure data being tampered with, thus ensuring the erasure effect. Can be increased.

  In addition, the overwriting erasure unit according to the present invention can be realized as a circuit, which allows the CPU to instruct the overwriting unit to perform overwriting processing, thereby reducing the load on the CPU and illegal The possibility that the erasing process is performed is reduced. In addition, the erasing data storage means according to the present invention can be realized as a memory in the above-described circuit, thereby providing a sufficient bus bandwidth for transferring data to the storage means, and erasing data can be stored. The possibility of tampering is reduced.

  As described above, according to the information processing apparatus and the information processing method of the present invention, every time overwriting is performed, by changing at least one of the order of reading addresses for erasing data and the order of addresses to be overwritten, Overwriting with different erasing data has been realized, so it is possible to suppress the increase in memory area required to store the erasing data and to shorten the time of overwriting process, thereby overwriting with high erasing effect. The effect that erasing can be performed is obtained.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In this embodiment, a case where the present invention is applied to a copying machine will be described.

  As shown in FIG. 1, the copying machine 10 according to the first embodiment of the present invention includes a ROM 12 that stores various programs, parameters, and the like, a CPU 14 that executes various programs, and a work performed when the CPU 14 executes various programs. A RAM 16 used as an area or the like, an HDD 22 in which image data and a program for executing a data erasing process routine to be described later are stored, and a bus 20 for connecting them to each other are provided.

  The RAM 16 is provided with a random number data storage area in which a plurality of random number data as erasure data corresponding to a data write unit to the HDD 22 (for example, a storage capacity of 512 bytes per sector) is stored. The data is generated by the CPU 14 during the initialization process of the copying machine 10 and stored in the random number data storage area.

  The copier 10 further includes a scanner 24 that reads an original to generate image data, and records an electrostatic latent image on a photoconductor based on the image data. The electrostatic latent image is printed with monochrome toner or color toner. There are provided a printing unit 26 that develops and develops the image, transfers the developed image to a recording sheet, and outputs, and an operation panel unit 28 including operation buttons and an operation panel for instructing various processes of the copying machine 10. These are also connected to the bus 20.

  The copying machine 10 only needs to have a general configuration of a conventionally known copying machine, and the description of the other configuration and general processing of the copying machine 10 is omitted in this embodiment.

  Next, the operation of the first embodiment will be described.

  First, when a user sets a plurality of documents on the scanner 24 and operates the operation panel unit 28 to instruct to start copying, image data generated by the scanner 24 reading the document is temporarily stored in the HDD 22. Then, the image data is read from the HDD 22, and the image data is printed on the recording paper by the printing unit 26.

  When the user operates the operation panel unit 28 to give an instruction to overwrite the data stored in the HDD 22, the CPU 14 executes a data erasing process routine shown in FIG.

  First, in step 100, m, which is a variable indicating the number of times of overwriting, is set to an initial value of 1. In step 102, a variable for identifying a plurality of random number data stored in the random number data storage area of the RAM 16 is used. A value of m is set in a certain n, and in step 104, the write destination address for the data storage area of the HDD 22 is set as the head address (address of the head sector).

  In step 106, the random number data n is read from the address of the random number data storage area of the RAM 22 (the address obtained by adding the address of 512 × (n−1) bytes from the head address). In step 108, the random number data n Is written in the data storage area of the HDD 22 and the image data is overwritten.

  In the next step 110, it is determined whether or not the value of n is less than N indicating the number of random number data stored in the random number data storage area. The value of n is incremented and the process proceeds to step 116. On the other hand, if there is no next random number data, the value of n is returned to 1 and the process proceeds to step 116.

  In step 116, it is determined whether or not the set write destination address of the HDD 22 is the final address (last sector address) of the data storage area. If there is a next write destination address in the data storage area, In step 118, the write destination address is set to the next address (the address of the next sector), and the process returns to step 106. On the other hand, if random number data is written in all the data storage areas and there is no next write destination address, it is determined in step 120 whether or not the value of m is less than the set overwrite count M, and M times. If not overwritten, m is incremented in step 122, the process returns to step 102, the value of m is set in n, the random number data to be read out is shifted by one, and the above steps 104 to 118 are performed. Execute. If it is determined in step 120 that the data has been overwritten M times, the data erasure processing routine is terminated.

  When the overwriting process is performed as described above, as shown in FIG. 3, in the first overwriting process, the random number data is read sequentially from the top address of the random number data storage area of the RAM 16, and the data storage area of the HDD 22 is read. Is written to. Subsequently, in the second overwriting process, random number data is sequentially read from the second random number data in the random number data storage area of the RAM 16 and written to the HDD 22. Thereafter, in accordance with the number of overwriting processes, the reading start address is changed so that the random number data for starting reading is shifted one by one, and the overwriting process is performed a plurality of times.

    As described above, according to the copier according to the first embodiment, each time overwriting is performed, the random number data read start address is changed, so that overwriting is performed with different random number data for each number of overwriting. Since the erasure is performed, it is possible to suppress an increase in the memory area necessary for storing the random number data, reduce the time for the overwrite erasure process, and perform the overwrite erasure with a high erasure effect.

  Further, since it is only necessary to change the read start address of the random number data and read the random number data in order, the overwrite erasure process can be performed at high speed.

  Further, by performing overwriting with random number data, the erasing effect can be enhanced, and random number data is not generated each time overwriting is performed, so that it is possible to prevent an increase in overwriting time.

  In the above embodiment, the case where the read start address for random number data is changed to change the order of read random number data has been described as an example. May be changed randomly to change the order of random number data to be read.

  In addition, the case where the read start address is changed so as to shift the random number data to be read one by one every time overwriting processing is described as an example, but the present invention is not limited to this. Alternatively, the random number data may be shifted plurally to be the read start random number data, or the read start random number data may be changed according to other rules to change the read start address.

  The random number data stored in the RAM may be updated every time a predetermined number of overwriting processes are performed. Thereby, the erasing effect can be further enhanced.

  Next, a second embodiment will be described. Note that the configuration of the copier according to the second embodiment is the same as that of the first embodiment, and therefore, the same reference numerals are given and description of the configuration is omitted.

  The second embodiment is different from the first embodiment in that in the overwriting process, the write start address of the data storage area of the HDD is changed every time the overwriting process is performed.

  Next, a data erasing process routine according to the second embodiment will be described with reference to FIG. Note that the same processes as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  First, in step 100, m, which is a variable indicating the number of times of overwriting, is set to an initial value 1, and in step 200, n is a variable for identifying random number data stored in the random number data storage area of the RAM 16. Is set to an initial value of 1, and in step 202, s, which is a variable indicating a sector of the data storage area of the HDD 22, is set to a value of m, and the write start sector is set to sector m.

  In step 106, the random number data n is read from the random number data storage area of the RAM 22. In step 204, the write destination address is set to the address of the sector s. In step 108, the random number data n is stored in the data storage of the HDD 22. Write to the sector s in the area and overwrite the image data.

  In the next step 206, it is determined whether or not the value of s is less than S indicating the number of sectors in the data storage area of the HDD 22. If there is a next sector, the value of s is incremented in step 208. On the other hand, if the sector s is the last sector and there is no next sector, the value of s is returned to 1 to be the first sector of the data storage area, and the process proceeds to step 212.

  In step 212, it is determined whether or not s is equal to the value of m. If the sector s is not the sector m from which writing has started, the value of n is incremented in step 214, and the processing returns to step 106. Is overwritten in the data recording area of the HDD 22. On the other hand, if random data is overwritten on all sectors in the data storage area and it is determined that sector s is the sector m from which writing has started, the value of m is less than the set number M of overwrites in step 120. If it has not been overwritten M times, m is incremented in step 122, the process returns to step 200, n is set to 1, and s is incremented in step 202. And the above-described processing is executed by shifting the writing start sector by one. If it is determined in step 120 that the data has been overwritten M times, the data erasure processing routine is terminated.

  When the overwriting process is performed as described above, in the first overwriting process, the random number data stored in the random number data storage area of the RAM 16 is sequentially read and written in order from the first sector of the data storage area of the HDD 22. . Subsequently, in the second overwriting process, random number data is written in order from the second sector of the data storage area of the HDD 22. Thereafter, the write start address is changed so that the sector to start writing is shifted one by one in accordance with the number of overwriting processes.

  As described above, according to the copier according to the second embodiment, each time overwrite is performed, the random number data write start sector is changed, so that overwrite is performed with different random number data for each number of overwrites. Since the erasure is performed, it is possible to suppress an increase in the memory area necessary for storing the random number data, reduce the time for the overwrite erasure process, and perform the overwrite erasure with a high erasure effect.

  Further, since it is only necessary to change the random number data write start sector and sequentially write the random number data, the overwrite erasure process can be performed at high speed.

  In the above-described embodiment, the case where the random number data write start address in the HDD is changed to change the order of the random number data to be written has been described as an example. The order of random number data to be written may be changed by randomly setting the address to be written.

  Next, a third embodiment will be described. In addition, about the part which becomes the structure similar to 1st Embodiment, the same code | symbol is attached | subjected and description is abbreviate | omitted.

  The third embodiment is different from the first embodiment in that the overwriting process is performed not by the CPU but by a circuit having a function of controlling the overwriting process.

  As shown in FIG. 5, the copying machine 310 according to the third embodiment includes a data processing device 312 that controls input / output of data in the HDD 22 and performs an overwrite erasing process of image data stored in the HDD 22. The data processing device 312 is connected to the bus 20, and the HDD 22 is connected to the bus 20 via the data processing device 312.

  As shown in FIG. 6, the data processing device 312 includes a bus interface 314 that controls data input / output with the bus 20, an HDD interface 316 that controls data input / output with the HDD 22, and instructions from the CPU 14. And an erasure control circuit 318 for performing overwrite erasure processing on the HDD 22 based on the above.

  The erasure control circuit 318 is mounted so as to execute the same processing as the data erasure processing routine described with reference to FIG. 2, and the bus interface 314 has a DMA transfer function. In response to the instruction, predetermined data can be read from the RAM 16.

  The data processing device 312 is configured by a semiconductor circuit and is mounted as an ASIC (Application Specific Integrated Circuit).

  Next, the operation according to the third embodiment will be described. When the user operates the operation panel unit 28 to instruct to overwrite the image data stored in the HDD 22, the CPU 14 causes the erase control circuit 318 to overwrite the random number data in the data storage area of the HDD 22 multiple times. An instruction for erasure processing is given, and the erasure control circuit 318 executes the data erasure processing routine described with reference to FIG.

  As the first overwriting process, random number data is read in order from the top address of the random number data storage area of the RAM 16 and written to the data storage area of the HDD 22. Subsequently, in the second overwriting process, the second random number data in the random number data storage area of the RAM 16 is sequentially read and written to the HDD 22. Thereafter, the read start address is changed so as to shift the random number data to be read one by one in accordance with the number of overwriting processes.

  As described above, according to the copying machine according to the third embodiment, since the data processing apparatus is mounted as an ASIC, the CPU only needs to instruct the data processing apparatus to perform the overwriting process. The load on the CPU can be reduced.

  In addition, even if there is a possibility that illegal processing is performed by the CPU due to viruses, software bugs, malicious software intentionally created by malicious developers, the data processing device is overwritten. Since the erasure process is executed, it is possible to reduce the possibility that an illegal overwrite erasure process is performed.

  Next, a fourth embodiment will be described. In addition, about the part which has the structure similar to 1st Embodiment and 3rd Embodiment, the same code | symbol is attached | subjected and description is abbreviate | omitted.

  The fourth embodiment is different from the first embodiment and the third embodiment in that random number data is stored in a memory provided in the data processing apparatus.

  As shown in FIG. 7, the data processing apparatus 412 of the copier according to the fourth embodiment performs overwrite erasure processing on the HDD 22 based on instructions from the bus interface 314, the HDD interface 316, and the CPU 14. An erasure control circuit 418 that controls to perform, a random number data storage memory 420 that stores random number data, a read circuit 422 that reads random number data from the random number data storage memory 420 based on an instruction from the erasure control circuit 418, and a bus The selector 424 selects either one of the data transferred from the interface 314 and the random number data output from the reading circuit 422 and outputs the selected data to the HDD interface 316.

  The erase control circuit 418 is mounted so as to execute the same process as the data erase process routine described with reference to FIG.

  The random number data stored in the random number data storage memory 420 is generated by the CPU 14 and stored via the bus interface 314, or is generated by an internal circuit (not shown) of the data processing device 412. Has been memorized.

  The data processing device 412 is constituted by a semiconductor circuit and is mounted as an ASIC.

  Next, the operation according to the fourth embodiment will be described. When the user operates the operation panel unit 28 to instruct to overwrite the image data stored in the HDD 22, the CPU 14 causes the erase control circuit 418 to overwrite the random number data in the data storage area of the HDD 22 a plurality of times. An instruction for erasure processing is given, and the erasure control circuit 418 executes processing similar to the data erasure processing routine described with reference to FIG.

  As the first overwriting process, the read circuit 422 reads the random number data in order from the head address of the random number data storage memory 420, and the selector 424 controls to select the random number data output from the read circuit 422. Write to the data storage area. Subsequently, in the second overwriting process, the reading circuit 422 sequentially reads the second random number data from the random number data storage memory 420 and writes it to the HDD 22. Thereafter, the read start address on the random number data storage memory 420 is changed so as to shift the random number data to be read one by one in accordance with the number of overwriting processes.

  As described above, according to the fourth embodiment, by providing the random number data storage memory in the data processing device, the bus bandwidth for transferring data can be afforded, and the random number data has been tampered with. The possibility of being reduced can be reduced.

  Next, a fifth embodiment will be described.

  The fifth embodiment is different from the fourth embodiment in that the random number data storage memory for storing random number data is a nonvolatile memory, and the random number data storage memory in the data processing device includes: Pre-generated random number data is stored.

  As a result, the possibility that the random number data is falsified is further reduced, and it is not necessary to generate random number data during the overwrite erasure process, so that the overwrite erasure process can be speeded up.

  Next, a sixth embodiment will be described. In addition, about the part which has the structure similar to 1st Embodiment and 4th Embodiment, the same code | symbol is attached | subjected and description is abbreviate | omitted.

  In the sixth embodiment, there are random number data and fixed value data as erasure data, and the overwriting process is performed by the random number data and the fixed value data, in the first embodiment and the fourth embodiment. Is different.

  As shown in FIG. 8, the data processing apparatus 512 of the copier according to the fifth embodiment is provided with an erasing data storage memory 520 for storing erasing data. Fixed value data is stored.

  Note that the random number data and fixed value data stored in the erasing data storage memory 520 are generated by the CPU 14 and stored via the bus interface 314, or an internal circuit of the data processing device 512 ( (Not shown) and generated and stored.

  Next, the operation according to the sixth embodiment will be described. When the user operates the operation panel unit 28 to instruct to overwrite the image data stored in the HDD 22, the CPU 14 causes the erase control circuit 418 to overwrite the random number data in the data storage area of the HDD 22 a plurality of times. An erasure process and a fixed value data overwrite erasure process are instructed, and the erasure control circuit 418 executes a data erasure process routine shown in FIG. Note that the same processes as those in the data erasing process routine according to the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. Further, a case will be described as an example in which the overwrite processing of fixed value data is executed after the random number data overwrite processing is repeated M times.

  First, in step 100, m, which is a variable indicating the number of overwriting, is set to an initial value of 1. In step 102, the value of m is set to n. In step 104, the write destination address for the data storage area of the HDD 22 is set. Set to the start address.

  In step 600, it is determined whether m is less than M + 1, which is the sum of the set random number data overwrite count M and the fixed value data overwrite count, and random number data overwrite processing is performed M times. If not, the random number data n is read from the random number data storage area of the RAM 22 in step 106, and the random number data n is written in the data storage area of the HDD 22 in step 108 to overwrite the image data.

  In the next step 110, it is determined whether or not the value of n is less than N. If there is next random number data, the value of n is incremented in step 112 and the process proceeds to step 116. If there is no next random number data, the value of n is returned to 1 and the process proceeds to step 116. In step 116, it is determined whether or not the set write destination address of the HDD 22 is the final address. If there is a next write destination address, the write destination address is set to the next address in step 118. Return to step 106. On the other hand, if there is no next write destination address in the data storage area, it is determined in step 604 whether or not the value of m is less than M + 1. If the writing process has not been performed, m is incremented in step 122 and the process returns to step 600.

  If it is determined in step 600 that the M-time random number data overwrite process is performed and the M + 1th overwrite process is performed, in step 602, the fixed value data is stored from the fixed value data storage area of the erasure data storage memory 520. And the fixed value data is overwritten in the data storage area of the HDD 22, and the process proceeds to step 118.

  If it is determined in step 604 that M random number data overwrite processing and fixed value data overwrite processing have been performed and M + 1 number overwrite processing has been performed, the data erasure processing routine is terminated.

  When the overwriting process is performed as described above, as the first overwriting process, the read circuit 422 reads the random number data in order from the leading address of the random number data storage area of the erasing data storage memory 520, and the HDD 22 Written to the data storage area. Subsequently, in the second overwriting process, the read circuit 422 sequentially reads the second random number data in the random number data storage area of the erasing data storage memory 520 and writes it to the HDD 22. Thereafter, the read start address on the random number data storage area of the erasing data storage memory 520 is changed so that the random number data to be read start is shifted one by one according to the number of overwriting processes. Then, when the random number data overwriting process is completed a plurality of times, the fixed value data stored in the fixed value data storage area of the erasing data storage memory 520 is read and written to the data storage area of the HDD 22.

  As described above, according to the copier according to the sixth embodiment, since the HDD is overwritten and erased with the random number data and the fixed value data, the erasing effect can be further enhanced.

  In the above embodiment, the case where the fixed value data is stored in the erasing data storage memory has been described as an example. However, the fixed value data may be generated every time the fixed value data is overwritten. Good. In this case, a circuit for generating fixed data may be provided inside the data processing apparatus.

1 is a schematic diagram showing a configuration of a copier according to a first embodiment of the present invention. 3 is a flowchart showing the contents of a data erasure processing routine of the copying machine according to the first embodiment of the present invention. It is an image figure which shows the mode of the random number data overwritten in multiple times by HDD concerning the 1st Embodiment of this invention. 6 is a flowchart showing the contents of a data erasure processing routine of a copying machine according to a second embodiment of the present invention. It is the schematic which shows the structure of the copying machine which concerns on the 3rd Embodiment of this invention. It is a block diagram which shows the structure of the data processor of the copying machine which concerns on the 3rd Embodiment of this invention. It is a block diagram which shows the structure of the data processing apparatus of the copying machine which concerns on the 4th Embodiment of this invention. It is a block diagram which shows the structure of the data processor of the copying machine which concerns on the 6th Embodiment of this invention. It is a flowchart which shows the content of the data deletion processing routine of the copying machine which concerns on the 6th Embodiment of this invention.

Explanation of symbols

10, 310 Copier 12 ROM
14 CPU
16 RAM
22 HDD
312, 412, 512 Data processing device 314 Bus interface 316 HDD interface 318, 418 Erase control circuit 420 Random number data storage memory 520 Erase data storage memory

Claims (5)

An overwritable non-volatile storage device storing data;
Erasure data storage means for storing random number data as erasure data for overwriting and erasing data stored in the storage device;
When overwriting and erasing data stored in the storage device a plurality of times, at least one of the order of addresses to be read in the erasing data storage means and the order of addresses to be overwritten in the storage device is changed each time overwriting is performed. Then, the erasure data storage means reads out the erasure data, and overwrites and erases the storage device; and
An information processing apparatus including:   The overwrite erasure unit changes the read start address in the erasure data storage unit each time overwriting is performed, sequentially reads the erasure data from the erasure data storage unit, and overwrites the storage device. The information processing apparatus according to claim 1, which is erased.   The overwrite erasure unit changes the overwrite start address to be overwritten on the storage device each time overwriting is performed, sequentially reads the erasure data from the erasure data storage unit, and overwrites the storage device. The information processing apparatus according to claim 1 or 2. The information processing apparatus according to any one of claims 1 to 3 , wherein the erasing data storage means is a nonvolatile memory in which the erasing data is stored in advance. An information processing method in an information processing apparatus including an overwritable nonvolatile storage device storing data,
Storing random number data as erasure data for overwriting and erasing the data stored in the storage device;
When overwriting and erasing data stored in the storage device a plurality of times, each time overwriting is performed, at least one of the order of addresses read from the stored erasing data and the order of addresses overwritten in the storage device is determined. An information processing method comprising: changing, reading the stored erasure data, and overwriting the storage device.

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