JP4774845B2 - Demodulator circuit - Google Patents

Description

  The present invention relates to a demodulation circuit for an amplitude modulation signal, and more particularly to a demodulation circuit that stably demodulates an ASK (amplitude shift keying) signal having a modulation rate as small as several percent.

As a conventional demodulation circuit for an ASK signal, for example, there is one disclosed in Patent Document 1 below. In principle, each of the demodulation circuits disclosed in this document rectifies an ASK modulation signal, attenuates the carrier component of the rectified ASK signal by an integration circuit, and extracts a baseband signal component. Then, the value of the baseband signal is determined by comparing the extracted signal component with a threshold value in a comparator, and converted into a binary digital signal. In this method, when the modulation rate of the ASK signal is relatively large, for example, when the ratio of the baseband signal component to the carrier component (hereinafter referred to as BC ratio) is about 10% or more, sufficient demodulation with a simple configuration is sufficient. There is a feature that characteristics can be obtained.
JP 2001-292183 A (FIG. 5 on page 5 and FIG. 1 on page 4)

  However, when trying to demodulate a signal with a smaller BC ratio, for example, an ASK signal with a BC ratio of about 1%, the circuit of Patent Document 1 is not accurate due to insufficient sensitivity of the comparator or variations in the input offset voltage. There was a problem that the demodulation operation could not be performed. In order to avoid these problems, a method of amplifying only the signal wave component after sufficiently suppressing the carrier component by installing a low-pass filter or amplifier having a large attenuation factor in front of the comparator can be considered. However, this method requires a high-order low-pass filter to sufficiently suppress the carrier component without affecting the shape of the signal wave, and the circuit scale becomes large. Absent.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a demodulation circuit capable of stably demodulating an amplitude modulation signal having a small modulation rate with a circuit having a relatively simple configuration.

Demodulator of the amplitude modulation signal according to the present invention inputs a level adjusting unit, the amplitude modulation signal by the amplitude and / or DC level is adjusted by the level adjusting unit, the level of the input signal is within a predetermined range The input signal is amplified and output, and if not included in the predetermined range, the amplification unit that fixes the level of the output signal to a predetermined upper limit value or lower limit value, and the output signal of the amplification unit having a filter unit for outputting the separated signal component corresponding to the baseband signal of the amplitude-modulated signal.
The level adjusting unit includes a first resistor and a variable resistor whose resistance value changes according to an output signal of the filter unit, and the first resistor and the variable resistor are connected in series, The amplitude modulation signal is input to both ends of the connected circuit, and the signal whose level is adjusted from both ends of the variable resistor so that one of the two envelopes of the amplitude modulation signal is included in the predetermined range is amplified. Output to the section.

  According to the demodulation circuit of the present invention, when the level of the amplitude modulation signal input to the amplification unit is within a predetermined range, a signal obtained by amplifying the input amplitude modulation signal is output from the amplification unit. . On the other hand, when the level of the input amplitude modulation signal is not included in the predetermined range, the output signal level of the amplification unit is fixed to a predetermined upper limit value or lower limit value. In the filter unit, a signal component corresponding to the baseband signal of the amplitude modulation signal is separated from the output signal of the amplification unit and output. In the level adjustment unit, the level of the amplitude modulation signal input to the amplification unit is adjusted according to the output signal of the filter unit. At this time, the level adjustment unit performs the level adjustment so that one of the two envelopes of the amplitude modulation signal input to the amplification unit is included in the predetermined range.

  According to the present invention, since the component corresponding to the baseband signal is separated from the signal obtained by amplifying the envelope portion of the amplitude modulation signal, it is possible to stably demodulate even the amplitude modulation signal having a small modulation rate.

FIG. 1 is a diagram showing an example of the configuration of an ASK signal demodulation circuit according to an embodiment of the present invention.
For example, as shown in FIG. 1, the demodulation circuit according to the present embodiment includes an amplification unit 103, a filter unit 107, and a level adjustment unit 115.
The amplifying unit 103 is an embodiment of the amplifying unit of the present invention.
The filter unit 107 is an embodiment of the filter unit of the present invention.
The level adjustment unit 115 is an embodiment of the level adjustment unit of the present invention.

The amplification unit 103 receives an ASK signal that has been subjected to level adjustment described later in the level adjustment unit 115, and amplifies it. However, the range of input signals that can be amplified by the amplification unit 103 is limited. When a signal that deviates from this range is input, the output signal of the amplification unit 103 is clipped.
That is, when the input signal is included in the predetermined range, the amplifying unit 103 amplifies and outputs the input signal. When the input signal is not included in the predetermined range, the amplification unit 103 sets the level of the output signal to a predetermined upper limit value or lower limit. Fixed to a value. In the latter case, since the output signal is constant even if the input signal changes, the amplifying unit 103 stops amplifying operation.

  For example, as illustrated in FIG. 1, the amplifying unit 103 includes a transistor 105 corresponding to the first transistor of the present invention, a resistor 104 corresponding to the third resistor of the present invention, and a resistor 106.

  The transistor 105 is, for example, an enhancement type n-channel MOS transistor, the drain of which is connected to the supply line of the power supply voltage VDD (hereinafter referred to as VDD line) through the resistor 104, and the source of the transistor 105 through the resistor 106. The signal is connected to a reference voltage VSS supply line (hereinafter referred to as VSS line), and a signal from the level adjusting unit 115 is input to the gate thereof.

  When the gate voltage of the transistor 105 (the voltage of the signal input from the level adjustment unit 115) becomes higher than the threshold voltage Vth with respect to the source voltage, the transistor 105 operates in the active region. In this case, a current that changes in accordance with the gate voltage flows through the drain of the transistor 105. When the gate voltage increases, the drain current increases, the voltage drop of the resistor 104 increases, and the drain voltage decreases. Further, when the gate voltage is lowered, the drain current is reduced, the voltage drop of the resistor 104 is reduced, and the drain voltage is lowered. Therefore, a signal that changes in phase opposite to the signal input to the gate is generated at the drain of the transistor 105.

  When the gate voltage of the transistor 105 is lower than the threshold voltage Vth with respect to the source voltage, the drain current becomes substantially zero. In this case, the drain voltage becomes substantially equal to the power supply voltage VDD, and even if the gate voltage is brought close to zero, the drain voltage does not increase any more.

When the gate voltage of the transistor 105 reaches a predetermined voltage Vm higher than the threshold voltage Vth, the voltage generated between the resistors 104 and 106 causes the voltage between the drain and source of the transistor to become minute, and the operating point of the transistor 105 Moves to the saturation region. In this case, since the drain current hardly changes even when the gate voltage is changed, the drain voltage is fixed to a certain lower limit value.
When the resistance value of the resistor 104 is “R104”, the resistance value of the resistor 106 is “R106”, and the reference voltage VSS is 0 [V], the voltage Vm is approximately expressed by the following equation.

(Equation 1)
Vm = Vth + VDD × R106 / (R104 + R106) (1)

  The filter unit 107 separates a signal component corresponding to the baseband signal of the ASK signal from the output signal of the amplification unit 103, and outputs this to the terminal 114. For example, the carrier signal component of the ASK signal is attenuated, and a baseband signal component having a lower frequency is extracted.

  For example, as shown in FIG. 1, the filter unit 107 includes a transistor 111 corresponding to the second transistor of the present invention, a resistor 110 corresponding to the fourth resistor of the present invention, and a capacitor 109 corresponding to the first capacitor of the present invention. And a resistor 112 corresponding to the fifth resistor of the present invention and a resistor 108.

  The transistor 111 is, for example, an enhancement type p-channel MOS transistor, and its source is connected to the VDD line via the resistor 108, its drain is connected to the VSS line via the resistor 112, and its gate is connected to the resistor 110. To the drain of the transistor 105. The capacitor 109 is connected between the gate of the transistor 111 and the VDD line.

The filter unit 107 integrates the output signal of the amplifying unit 103 by a circuit composed of a resistor 110 and a capacitor 109, and outputs the integrated signal to a terminal 114 through a phase inverting amplifier composed of a transistor 111 and resistors 112 and 108. To do.
The operation of the transistor 111 is similar to that of the transistor 105 and is almost the same except that the polarity is reversed. That is, when the voltage of the capacitor 109 exceeds the threshold voltage Vth of the transistor 105, the transistor 105 operates in the active region, and the drain current changes according to the gate voltage. When the voltage of the capacitor 109 does not reach the threshold voltage Vth, the drain current becomes substantially zero, and the drain voltage becomes substantially equal to the reference voltage VSS.

  The level adjustment unit 115 adjusts the level of the ASK signal input from the terminal 101 to the amplification unit 103 according to the output signal of the filter unit 107 (signal of the output terminal 114). Further, the level adjustment unit 115 determines the level of the ASK signal so that the upper envelope or the lower envelope of the ASK signal input to the amplification unit 103 is included in a predetermined range that can be amplified by the amplification unit 103. Adjust.

  For example, when the amplifying unit 103 has the configuration shown in FIG. 1, the level adjusting unit 115 is configured such that the upper envelope or the lower envelope of the ASK signal input to the gate of the transistor 105 is larger than the threshold voltage Vth of the transistor 105. In addition, the level of the ASK signal is adjusted so as to be smaller than the voltage Vm (formula (1)). In other words, the level of the ASK signal is adjusted so that the upper envelope portion or the lower envelope portion of the ASK signal input to the amplification unit 103 is amplified in the active region of the transistor 105.

For example, the level adjustment unit 115 adjusts the amplitude and DC level of the ASK signal input to the amplification unit 103 according to the output signal of the filter unit 107.
In this case, the level adjustment unit 115 may adjust only the amplitude while keeping the DC level of the ASK signal input to the amplification unit 103 constant, or conversely, only the DC level while keeping the amplitude constant. May be adjusted, or both may be adjusted.

  For example, as shown in FIG. 1, the level adjusting unit 115 corresponds to the resistor 102 corresponding to the first resistor of the present invention, the variable voltage source 116 corresponding to the variable voltage source of the present invention, and the variable resistor of the present invention. And a variable resistor 117.

  The variable voltage source 116 and the variable resistor 117 are connected in series, and a voltage generated at both ends of the series circuit is input to the amplifying unit 103. That is, one terminal of the series circuit (116, 117) is connected to the input terminal of the amplifier 103 (the gate of the transistor 105), and the other terminal is connected to the VSS line.

  The resistor 102 is further connected in series with a series circuit of the variable voltage source 116 and the variable resistor 117, and an ASK signal is input to both ends of the entire series circuit (102, 116, 117). That is, one terminal of the resistor 102 is connected to the ASK signal input terminal 101, and the other terminal is connected to the VSS line via a series circuit of the variable voltage source 116 and the variable resistor 117.

  The variable voltage source 116 changes the voltage generated at both ends in accordance with the signal output from the terminal 114 of the filter unit 107. For example, in the circuit configuration shown in FIG. 1, the variable voltage source 116 decreases the voltage at both ends when the voltage at the terminal 114 increases, and increases the voltage at both ends when the voltage at the terminal 114 decreases. When the voltage changes in this way, negative feedback control described later works, and the envelope portion of the ASK signal input to the amplifying unit 103 converges to a certain range.

  The variable resistor 117 changes its resistance value according to the signal output from the terminal 114 of the filter unit 107. For example, in the circuit configuration shown in FIG. 1, the variable resistor 117 decreases the resistance value at both ends when the voltage at the terminal 114 increases, and increases the resistance at both ends when the voltage at the terminal 114 decreases. When the resistance value changes in this way, negative feedback control described later works, and the envelope portion of the ASK signal input to the amplifying unit 103 converges to a certain range.

  The variable resistor 117 can be configured using, for example, an n-channel MOS transistor. That is, the voltage of the terminal 114 is applied to the gate of an n-channel MOS transistor, and the space between the source and drain is used as a variable MOS resistance element. Thus, when the voltage at the terminal 114 increases, the value of the variable MOS resistance element decreases, and when the voltage at the terminal 114 decreases, the value of the variable MOS resistance element increases.

  Here, the operation of the demodulation circuit shown in FIG. 1 having the above-described configuration will be described.

  For example, as shown in FIG. 2, a signal obtained by extracting only the positive side by half-wave rectification of the ASK signal is input to the input terminal 101. This signal does not necessarily have to be half-wave rectified, but in the following, in order to facilitate understanding of the operation, it will be described as having only a positive half-wave rectified waveform as shown in FIG.

  Note that the envelope 201 on the upper side of the ASK signal corresponds to the baseband signal of the ASK signal. As shown in FIG. 2, there are two types of amplitudes in the ASK signal. For example, a small amplitude corresponds to “0” of the baseband signal, and a large amplitude corresponds to “1” of the baseband signal.

  The half-wave rectified wave of the ASK signal applied to the input terminal 101 is input to the gate of the transistor 105 through the resistor 102. At this time, signals as shown in FIG. 3 are generated at the drain and the source of the transistor 105.

  FIG. 3 is a diagram illustrating an example of waveforms of the drain voltage ‘V1’ and the source voltage ‘V2’ of the transistor 105 when the half-wave rectified wave illustrated in FIG. 2 is input to the input terminal 101. In the example of FIG. 3, the power supply voltage VDD is 3 [V], and the reference voltage VSS is 0 [V].

When the gate voltage of the transistor 105 is included in a predetermined range (Vth to Vm), the drain voltage changes according to the gate voltage, and signal amplification is performed. On the other hand, if the gate voltage is out of this range, the drain voltage is fixed to a constant value (VDD = 3 [V] or VSS = 0 [V]) regardless of the change in the gate voltage, and the signal is not amplified. .
Therefore, when a half-wave rectified wave as shown in FIG. 2 is input to the gate of the transistor 105, a positive half of the gate voltage is higher than the threshold voltage vth, as shown in FIG. The signal appears only in the period below the cycle. In other periods, the drain voltage of the transistor 105 is fixed to the power supply voltage VDD (= 3 [V]) and the source voltage is fixed to the reference voltage VSS (= 0 [V]), so that no signal appears.
This operation is a non-linear analog amplification operation with phase inversion, and corresponds to a so-called class C operation in which the current flow angle is smaller than 180 degrees.

  The voltage input from the drain of the transistor 105 to the filter unit 107 is a half-wave rectified wave having a flow angle smaller than 180 degrees as shown in FIG. In the filter unit 107, the amplitude of the carrier component included in the half-wave rectified wave is suppressed, and the DC component corresponding to the average value of the carrier component and the component of the baseband signal that is the component of the amplitude change are extracted from the terminal 114. It is.

A signal output from the terminal 114 of the filter unit 107 is input to the level adjustment unit 115.
When the envelope of the half-wave rectified wave input to the gate of the transistor 105 changes in a direction that deviates from a predetermined range (Vth to Vm), the level adjuster 115 causes the half-wave rectified wave to cancel the change. The level of is adjusted.

For example, when the envelope of the half-wave rectified wave input to the gate of the transistor 105 increases, the average voltage at the drain of the transistor 105 decreases, and thus the voltage at the terminal 114 connected to the drain of the transistor 111 increases. In this case, the level adjustment unit 115 performs level adjustment so that the envelope of the half-wave rectified wave input to the gate of the transistor 105 is lowered. That is, the resistance value of the variable resistor 117 decreases, and the voltage across the variable voltage source 116 decreases.
Conversely, when the envelope of the half-wave rectified wave input to the gate of the transistor 105 decreases, the voltage at the terminal 114 decreases. In this case, the level adjustment unit 115 performs level adjustment so that the envelope of the half-wave rectified wave input to the gate of the transistor 105 increases. That is, the resistance value of the variable resistor 117 increases and the voltage across the variable voltage source 116 increases.
By such negative feedback control, the envelope of the half-wave rectified wave input to the gate of the transistor 105 converges to a certain voltage. This voltage is included in a predetermined range (Vth to Vm) in which the amplification operation is performed without clipping the output signal waveform in the amplification unit 103.

When negative feedback control is performed so that the envelope of the half-wave rectified wave input to the amplifier 103 is always included in a predetermined range (Vth to Vm), the envelope of the half-wave rectified wave is output in the amplifier 103. Changes are amplified.
What is important here is that the envelope part is amplified without distortion in the amplifying unit 103, and the other carrier signal part has an upper limit value (VDD = 3 [V]) or a lower limit value (shown in FIG. 3). Even if it is clipped with VSS = 0 [V]), it does not matter. Since the baseband signal to be demodulated and extracted from the ASK signal corresponds to the envelope of the ASK signal, the amplifier 103 only needs to amplify the envelope.

  Thus, in the amplifying unit 103, an envelope portion in particular is amplified in the entire half-wave rectified wave that is input. Therefore, the amplitude of the baseband signal component extracted by the filter unit 107 is greatly amplified as compared with the input waveform shown in FIG.

FIG. 4 is a diagram illustrating an example of a waveform of a signal output from the output terminal 114 of the filter unit 107.
When the signal waveform of the output terminal 114 shown in FIG. 4 is compared with the signal waveform of the input terminal 101 shown in FIG. 2, the carrier waveform is suppressed and the baseband signal component is amplified in the signal waveform of the terminal 114. The BC ratio is greatly improved.

  Next, a circuit for converting a signal (FIG. 4) extracted from the output terminal 114 of the filter unit 107 into a digital signal of “1” / “0” will be described.

FIG. 5 is a diagram illustrating an example of a circuit that converts a signal output from the demodulation circuit illustrated in FIG. 1 into a digital signal.
The circuit illustrated in FIG. 5 includes a filter unit 502, a capacitor 505, an amplification unit 506, and an inverter 510.

The filter unit 502 further attenuates the carrier component of the signal output from the output terminal 114 of the filter unit 107 and extracts the baseband signal component.
The filter unit 502 may be a low-pass filter including a resistor 503 and a capacitor 504, as shown in FIG. One terminal of the resistor 503 is connected to the input terminal 501 (= output terminal 114), and the other terminal is connected to the VSS line via the capacitor 504.

  In the example of FIG. 5, the simplest RC type first-order low-pass filter is used, but a higher-order filter or a filter having another configuration may be used as necessary.

  The output of filter unit 502 is coupled to the input of amplifying unit 506 via capacitor 505. The capacitor 505 is a coupling capacitance for operating the filter unit 502 and the amplification unit 506 by AC coupling.

The amplifying unit 506 is a circuit that amplifies the baseband signal component input from the filter unit 502 via the capacitor 505. For example, as shown in FIG. 5, a resistor 509 is used between the input and output of the inverters (507, 508). An inverter amplifier with a simple configuration connected may be used.
For example, as illustrated in FIG. 5, the amplifying unit 506 includes a p-channel MOS transistor 507, an n-channel MOS transistor 508, and a resistor 509. The source of the transistor 507 is connected to the VDD line, the source of the transistor 508 is connected to the VSS line, the drains of the transistors 507 and 508 are commonly connected to the output of the amplifying unit 506, and the gates of the transistors 507 and 508 are connected to the amplifying unit 506. Commonly connected to input. A resistor 509 is connected between the input and the output. The input DC bias voltage is set by the resistor 509 to be equal to the output voltage.

The inverter 510 outputs a high level (VDD) signal when the signal amplified by the amplifying unit 506 is lower than a predetermined logical threshold, and outputs a low level (VSS) signal when the signal is higher than the logical threshold.
For example, as shown in FIG. 5, the inverter 510 includes a p-channel MOS transistor 511 and an n-channel MOS transistor 512 connected in series. The transistors 511 and 512 have the same connection relationship as the transistors 507 and 508 in the amplifying unit 506.

  According to the circuit shown in FIG. 5, the carrier component remaining in the output signal (FIG. 4) of the filter unit 107 is removed by the filter unit 502, and its waveform is shaped. Only the alternating current component of the signal shaped by the filter unit 502 is input to the amplifying unit 506 through the capacitor 505 and subjected to analog amplification. The signal amplified by the amplifying unit 506 is compared with a logic threshold value in the inverter 510, converted into a high level (“1”) or low level (“0”) digital signal, and output from a terminal 513.

FIG. 6 is a diagram showing an example of signal waveforms at various parts of the circuit shown in FIG.
In FIG. 6, the symbol “V4” indicates the input signal of the amplifier 506, the symbol “V5” indicates the output signal of the amplifier 506, and the symbol “V6” indicates the waveform of the output signal of the inverter 510.
In the example of FIG. 6, the input signal V4 of the amplifying unit 506 is very weak, but when this is amplified by the amplifying unit 506, a signal V5 having an amplitude of about 0.1 [V] is obtained. The direct current level of the signal V5 is about 1.5 [V], which is substantially equal to the logic threshold value of the inverter 510. Therefore, the output signal V6 of the inverter 510 is switched to a high level or a low level according to the level change of the signal V5.

  In the example of FIG. 5, the amplification unit 506 is provided with a single-stage inverter amplifier. However, if sufficient gain cannot be obtained with only one stage, a plurality of stages of inverter amplifiers are connected in series as necessary. You may do it. The same applies to the inverter 510, and a plurality of inverters connected in series may be provided.

As described above, according to the demodulation circuit according to the present embodiment, when the level of the ASK signal input to the amplification unit 103 is included in the predetermined range (Vth to Vm), the signal output from the amplification unit 103 is The input ASK signal is amplified. On the other hand, when the level of the input ASK signal is not included in the predetermined range (Vth to Vm), the output signal of the amplifying unit 103 is fixed to a predetermined upper limit value (VDD) or a lower limit value (VSS). A carrier component of the signal output from the amplifying unit 103 is suppressed by the filter unit 107, and a signal component corresponding to the baseband signal is separated from the output signal. The level adjusting unit 115 adjusts the level of the ASK signal input to the amplifying unit 103 according to the signal component separated by the filter unit 107. At this time, the level adjustment unit 115 adjusts the level of the input ASK signal so that one of the two envelopes of the ASK signal input to the amplification unit 103 is included in the predetermined range (Vth to Vm). The
Therefore, in the amplifying unit 103, in particular, the envelope portion of the entire input ASK signal is amplified, and the component of the baseband signal is extracted from this amplified signal. As a result, a minute baseband signal included in the ASK signal can be amplified and a large-amplitude baseband signal can be extracted, so that an ASK signal with a small modulation rate can be demodulated stably.

In the demodulation circuit according to the present embodiment, it is only necessary to amplify only the envelope portion of the entire ASK signal input to the amplifying unit 103, and other portions may not be amplified. Therefore, it is not necessary to increase or decrease the gain of the amplification unit 103 in accordance with the amplitude of the carrier component, and the amplification unit 103 can perform high gain amplification.
Therefore, even with an ASK signal whose baseband signal component has a very small amplitude compared to the carrier component (that is, the modulation rate is very small), the baseband signal component is efficiently amplified with a high gain, and a stable demodulated signal is obtained. be able to.

  As described above, even an ASK signal with a small modulation rate can be demodulated stably, so that, for example, when applied to a system that exchanges ASK signals wirelessly, such as a non-contact IC card, a highly reliable system can be constructed. It becomes.

  Moreover, the demodulation circuit according to the present embodiment has a relatively simple circuit configuration as shown in FIG. 1, and can be realized with a relatively small analog circuit if implemented as a CMOS LSI, for example. It is possible to build a high system.

Furthermore, according to the demodulation circuit according to the present embodiment, even if the overall amplitude of the ASK signal varies, the envelope of the ASK signal input to the amplification unit 103 is always included in the predetermined range (Vth to Vm). Since the negative feedback control works, the demodulation can be performed stably.
Therefore, if this embodiment is applied to a system in which the amplitude of the ASK signal varies greatly, such as a non-contact IC card, it is possible to perform stable communication over a wide range from a short distance to a long distance.

Further, according to the demodulating circuit according to the present embodiment, it is only necessary to amplify only the envelope portion of the entire ASK signal. Therefore, the amplifying unit 103 stops the amplifying operation every half cycle of the carrier frequency. The ASK signal can be amplified by the operation.
If the amplification unit 103 amplifies the ASK signal by a class A linear operation, the relationship between the gain and phase characteristics of the negative feedback loop of the system becomes a problem. That is, when the phase shift at a frequency at which the gain of the negative feedback loop becomes 0 dB exceeds 180 degrees, there arises a disadvantage that the system oscillates.
In the present embodiment, since the ASK signal can be amplified not by the class A linear operation but by the class C nonlinear operation, the possibility of oscillation as described above is reduced, and a stable control operation can be expected.

  Up to this point, one embodiment of the present invention has been described, but the present invention is not limited to the above-described embodiment, and includes various variations.

  In the example of FIG. 1, the resistor 106 connected between the source of the transistor 105 and the VSS line is a resistor for stabilizing the operation, and may be omitted depending on circumstances.

  In the example of FIG. 1, the capacitor 109 is connected between the gate of the transistor 111 and the VDD line. However, since the AC impedance between the VDD line and the VSS line is very small, the capacitor 109 is connected to the gate of the transistor 111. You may connect between VSS lines.

  In the example of FIG. 1, the circuit configuration for adjusting both the amplitude and the DC level of the ASK signal in the level adjusting unit 115 is shown, but the present invention is not limited to this. For example, when only the amplitude is adjusted, the variable voltage source 116 may be deleted, and when only the DC level is adjusted, the variable resistor 117 may be replaced with a fixed value resistor.

  In the example of FIG. 1, the negative feedback control is performed so that the upper envelope of the ASK signal input to the amplifying unit 103 is included in a predetermined range (Vth to Vm), but the present invention is not limited to this. Since the amplification unit 103 only needs to amplify the component of the baseband signal, negative feedback control may be performed so that the lower envelope of the ASK signal is included in the predetermined range.

  In the above-described embodiment, a circuit that demodulates an ASK signal is described as an example. However, the present invention is not limited to this. For example, the present invention is also applied to a circuit that demodulates a signal (AM signal) obtained by amplitude-modulating a carrier signal with an analog signal. Is possible.

  The signal waveforms shown in FIGS. 2 to 4 are merely examples. In an actual design, the gain and bias setting of the amplification unit 103, the transfer function of the filter unit 107, the input / output of the level adjustment unit 115, and the like are comprehensively optimized. By optimizing, it is possible to construct an optimum system that matches the input signal conditions, and depending on the conditions, the BC ratio at the output terminal 114 can be made larger than shown in the figure.

It is a figure which shows an example of a structure of the demodulation circuit of the ASK signal which concerns on embodiment of this invention. It is a figure which shows an example of the half-wave rectification waveform of the ASK signal input into the demodulation circuit shown in FIG. It is a figure which shows an example of the signal waveform of each part of the amplification part in case the half-wave rectification wave shown in FIG. 2 is input into the demodulation circuit shown in FIG. It is a figure which shows an example of the waveform of the signal output from a filter part. It is a figure which shows an example of the circuit which converts the signal output from the demodulation circuit shown in FIG. 1 into a digital signal. FIG. 6 is a diagram illustrating an example of a signal waveform of each part of the circuit illustrated in FIG. 5.

Explanation of symbols

103, 506... Amplifier section, 107, 502... Filter section, 115... Level adjustment section, 105, 508, 512... N-channel MOS transistor, 111, 507, 511 ... p-channel MOS transistor, 102, 104, 106, 108, 110, 112, 503, 509 ... resistors, 109, 505 ... capacitors, 117 ... variable resistors, 116 ... variable voltage sources

Claims (4)

A level adjuster;
An amplitude modulation signal whose amplitude and / or DC level is adjusted by the level adjustment unit is input, and when the level of the input signal is included in a predetermined range, the input signal is amplified and output, and the predetermined range An amplification unit that fixes the level of the output signal to a predetermined upper limit value or lower limit value,
A filter unit for separating and outputting a signal component corresponding to the baseband signal of the amplitude modulation signal from the output signal of the amplification unit;
Have
The level adjuster
A first resistor;
Including a variable resistor whose resistance value changes according to the output signal of the filter unit,
The first resistor and the variable resistor are connected in series;
The amplitude modulation signal is input to both ends of the series-connected circuit,
A demodulating circuit that outputs a signal whose level is adjusted so that one of two envelopes of the amplitude-modulated signal is included in the predetermined range from both ends of the variable resistor to the amplifying unit. A level adjuster;
An amplitude modulation signal whose amplitude and / or DC level is adjusted by the level adjustment unit is input, and when the level of the input signal is included in a predetermined range, the input signal is amplified and output, and the predetermined range An amplification unit that fixes the level of the output signal to a predetermined upper limit value or lower limit value,
A filter unit for separating and outputting a signal component corresponding to the baseband signal of the amplitude modulation signal from the output signal of the amplification unit;
Have
The level adjuster
A first resistor;
A variable voltage source whose voltage changes according to the output signal of the filter unit;
A second resistor connected in series to the variable voltage source,
The first resistor is further connected in series with a series circuit of the variable voltage source and the second resistor,
The amplitude modulation signal is input to both ends of a series circuit of the first resistor, the variable voltage source, and the second resistor,
From both ends of the series circuit of the variable voltage source and the second resistor, a signal whose level is adjusted so that one of the two envelopes of the amplitude modulation signal is included in the predetermined range is output to the amplifier.
Demodulator circuit. The second resistor includes a variable resistor whose resistance value changes according to an output signal of the filter unit.
The demodulation circuit according to claim 2. When an amplitude modulation signal to be demodulated is input, and the level of the input signal is included in a predetermined range, the input signal is amplified and output. When the level is not included in the predetermined range, the level of the output signal is set to a predetermined level. An amplifying unit that fixes the upper limit value or the lower limit value;
A filter unit for separating and outputting a signal component corresponding to the baseband signal of the amplitude modulation signal from the output signal of the amplification unit;
The level of the amplitude modulation signal is adjusted according to the output signal of the filter unit so that one of the two envelopes of the amplitude modulation signal is included in the predetermined range, and the level-adjusted signal is adjusted to the amplification unit A level adjustment unit for inputting to
The amplification unit is
A first transistor of a first conductivity type connected between a first power supply line for supplying a first voltage and a second power supply line for supplying a second voltage;
A third resistor inserted in a path connecting the first transistor and the first power line;
The filter part is
A second transistor of a second conductivity type connected between the first power line and the second power line;
A node connecting the first transistor and the third resistor;
A fourth resistor connected between the control terminal of the second transistor;
A first capacitor connected between a control terminal of the second transistor and the first power line or the second power line;
A fifth resistor inserted in a path connecting the second transistor and the second power supply line;
Demodulator circuit.

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