JP4768990B2 - オンチップ・システム用の構成可能アドレス・マッピングと保護アーキテクチャ及びハードウエアに関する方法及び装置 - Google Patents

オンチップ・システム用の構成可能アドレス・マッピングと保護アーキテクチャ及びハードウエアに関する方法及び装置 Download PDF

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JP4768990B2
JP4768990B2 JP2004551691A JP2004551691A JP4768990B2 JP 4768990 B2 JP4768990 B2 JP 4768990B2 JP 2004551691 A JP2004551691 A JP 2004551691A JP 2004551691 A JP2004551691 A JP 2004551691A JP 4768990 B2 JP4768990 B2 JP 4768990B2
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address
register
protection
hardware
service module
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チョウ，チャン−チュン
トムリンソン，ジェイ・エス
ウェバー，ウォルフ−ディートリッヒ
ウィンガード，ドリュー・イー
カセッティ，スリカラン
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ソニックス・インコーポレーテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Storage Device Security (AREA)
JP2004551691A 2002-11-05 2003-11-03 オンチップ・システム用の構成可能アドレス・マッピングと保護アーキテクチャ及びハードウエアに関する方法及び装置 Expired - Lifetime JP4768990B2 (ja)

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US10/288,973 2002-11-05
US10/288,973 US7266786B2 (en) 2002-11-05 2002-11-05 Method and apparatus for configurable address mapping and protection architecture and hardware for on-chip systems
PCT/US2003/035022 WO2004044681A2 (en) 2002-11-05 2003-11-03 A method for configurable address mapping

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JP2006505867A JP2006505867A (ja) 2006-02-16
JP2006505867A5 JP2006505867A5 (enExample) 2006-12-14
JP4768990B2 true JP4768990B2 (ja) 2011-09-07

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US (3) US7266786B2 (enExample)
EP (1) EP1561175B1 (enExample)
JP (1) JP4768990B2 (enExample)
KR (1) KR100982145B1 (enExample)
AU (1) AU2003287494A1 (enExample)
WO (1) WO2004044681A2 (enExample)

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Publication number Publication date
AU2003287494A1 (en) 2004-06-03
US20060129747A1 (en) 2006-06-15
US7793345B2 (en) 2010-09-07
AU2003287494A8 (en) 2004-06-03
EP1561175B1 (en) 2017-03-22
US20040088566A1 (en) 2004-05-06
WO2004044681A3 (en) 2004-09-23
WO2004044681B1 (en) 2004-11-18
US7266786B2 (en) 2007-09-04
US20110067114A1 (en) 2011-03-17
KR100982145B1 (ko) 2010-09-14
WO2004044681A2 (en) 2004-05-27
JP2006505867A (ja) 2006-02-16
KR20050084639A (ko) 2005-08-26
EP1561175A2 (en) 2005-08-10
US8443422B2 (en) 2013-05-14
EP1561175A4 (en) 2008-12-24

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