JP4716185B2 - Wireless communication device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform excellent directivity control even when the output frequency of a VCO varies. <P>SOLUTION: A radio communication device includes the VCO 305 which oscillates at a frequency based on a control voltage to generate a carrier, a frequency divider/phase comparator 302 which compares the phase of the oscillation output of the VCO 305 with the phase of a reference signal from a reference oscillator 301, and a loop filter 304 which smoothes the output of the phase comparator 302 and outputs the resulting output to the VCO 305, and the radio communication device has a PLL circuit 300 which performs PLL control, variable gain amplifiers 208A to 208C which modulate the carrier generated by the VCO 305, transmitting antennas 21A to 21C which transmit modulated carriers to a radio tag circuit element To, and a receiving antenna 20 for receiving reply signals based on the transmission signals. On the basis of the operation state of the VCO 305, directivities of the transmitting antennas 21A to 21C are controlled. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  The present invention relates to a wireless communication apparatus that performs wireless communication of information with the outside.

  An RFID (Radio Frequency Identification) system that reads / writes information of a wireless tag by transmitting and receiving an inquiry and receiving a response from a reader / writer as a wireless communication device to a small wireless tag. Are known.

  For example, a wireless tag circuit element included in a label-like wireless tag includes an IC circuit unit that stores predetermined wireless tag information and an antenna that is connected to the IC circuit unit and transmits / receives information. The IC circuit unit demodulates and interprets the signal received by the antenna, modulates and reflects the received carrier wave based on the information signal stored in the memory, and returns it to the wireless communication apparatus via the antenna.

  As such a wireless communication device, a device disclosed in, for example, Patent Document 1 is conventionally known. In this prior art, a radio wave modulated by a radio wave transmission means equipped with a high frequency generation circuit and an antenna is transmitted to a radio tag circuit element to be communicated, and a response signal from the corresponding radio tag circuit element is transmitted from the antenna. Information is transmitted and received by being received and demodulated. At this time, in order to perform the demodulation processing with high sensitivity, a method of controlling the directivity (particularly the main lobe) by the antenna is performed.

  That is, in this prior art, a so-called array antenna having a plurality of antenna elements is used as an antenna, and as a directivity control, the directivity synthesized by the plurality of antenna elements is sequentially strengthened only in one direction. By changing the direction and performing a predetermined calculation process according to the signal strength and phase difference of each antenna element in each direction (a technique based on so-called phased array antenna control), the existence direction of the RFID tag circuit element to be searched and its direction The position is detected.

JP 2002-271229 A

  When a high frequency generation circuit is used in a wireless communication apparatus as in the above prior art, a PLL (Phase Locked Loop) circuit may be used. In this case, the carrier wave output from the VCO (Voltage Controlled Oscillator) of the PLL circuit as the oscillator is modulated by the carrier wave modulation means and transmitted from the antenna to the RFID tag circuit element to be communicated.

  Here, the VCO of the PLL circuit has a property that when the output intensity of the amplifier connected to the output side thereof changes, the output frequency of the VCO changes accordingly. Due to such disturbance, when the amplitude modulation such as ASK modulation accompanied by the change of the output intensity is used in the carrier wave modulation means, the frequency of the signal transmitted from the antenna changes with the change of the output frequency of the VCO. .

  When the frequency changes in this way, the wavelength changes accordingly, so the phase difference value for controlling the phase difference in the plurality of antenna elements and directing the main lobe in the desired direction when the phased array control is executed. Will be different. As a result, it is difficult to perform good directivity control, and communication accuracy may be deteriorated.

  An object of the present invention is to provide a wireless communication apparatus that can perform good directivity control even when the output frequency of a VCO changes.

  In order to achieve the above object, the first invention provides a VCO that oscillates at a frequency corresponding to an applied control voltage and generates a carrier wave for accessing a communication target, an oscillation output of the VCO, and a reference oscillator. A phase comparator that compares the phase of the reference signal with the reference signal and a loop filter that smoothes the output of the phase comparator and outputs it to the VCO, and controls the VCO according to the comparison result of the phase comparator. A PLL circuit that executes PLL control for outputting a voltage, a carrier wave modulation unit that modulates the carrier wave generated from the VCO of the PLL circuit, and the carrier wave output from the carrier wave modulation unit is transmitted to the communication target Transmitting antenna means for receiving, a receiving antenna means for receiving a response signal from the communication object according to a transmission signal from the transmitting antenna means, and Based on the operating state of the CO, and having a directional control means for controlling at least one of directivity of the transmitting antenna means and said receiving antenna means.

  In the first invention of this application, the carrier wave output from the VCO of the PLL circuit is modulated by the carrier wave modulation means, transmitted from the transmission antenna means to the communication target, and a response signal from the communication target corresponding thereto is received by the reception antenna means. As a result, information is transmitted to and received from the communication target. At this time, the directivity control means controls the directivity of the transmission antenna means or the reception antenna means, thereby controlling the directivity of the transmission antenna means or the reception antenna means in the direction in which the gain in communication with the communication target is the largest. can do.

  Here, the VCO of the PLL circuit has a property that when the output intensity of the amplifier connected to the output side thereof changes, the output frequency of the VCO changes accordingly. Due to such disturbance, when amplitude modulation such as ASK modulation with change in output intensity is used in the carrier wave modulation means, the signal transmitted from the transmission antenna means is changed along with the change in the output frequency of the VCO. The frequency changes. In general, directivity control is performed by controlling the phase difference in a plurality of antenna elements and directing the direction of the main lobe in a desired direction, but when the frequency changes as described above, the wavelength changes accordingly. As a result, the value of the phase difference when the main lobe is directed in an arbitrary direction is different.

  In the first invention of the present application, when the directivity control means controls the directivity of the transmitting antenna means or the receiving antenna means based on the operating state of the VCO, the output frequency of the VCO changes as described above. Correspondingly, directivity control can be performed using the phase difference appropriately corrected. As a result, high-accuracy communication can be performed by avoiding the above-described adverse effects and performing good directivity control.

  In a second aspect based on the first aspect, the directivity control means increases the directivity of a plurality of antenna elements provided in at least one of the transmission antenna means and the reception antenna means in only one direction. It is characterized by comprising a direction switching means for sequentially changing the direction while holding it.

  The direction switching means sequentially changes the direction while increasing the directivity synthesized by a plurality of antenna elements in only one direction, and performs predetermined calculation processing according to the signal strength and phase difference of each antenna element in each direction. By performing (a method by so-called phased array antenna control), the directivity of the transmitting antenna means or the receiving antenna means can be controlled in the direction in which the gain in communication with the communication target is the largest.

In a third aspect based on the second aspect, the direction switching means includes a transmission-side phase shifter that variably sets the phase of the transmission radio wave signal in the transmission antenna means , frequency information of the oscillation output of the VCO, Transmission-side first control means for controlling a transmission-side first phase control signal to the transmission-side phase shifter based on a predetermined correlation with a direction of a main lobe by the plurality of antenna elements of the transmission antenna means; It is characterized by having.

By variably setting the phase of the transmission radio signal with the transmission-side phase shifter and controlling the phase difference in the plurality of antenna elements, the direction of the main lobe is changed to the desired direction and the directivity by the plurality of antenna elements is changed. be able to.
Further, every time the oscillation frequency of the VCO changes, the transmission-side first control means calculates a transmission-side first phase control signal for directing the main lobe direction by a plurality of antenna elements in each direction based on a predetermined correlation. And by outputting this to a transmission side phase shifter, the directivity by the said several antenna element can be changed.

In a fourth aspect based on the second aspect , the direction switching means includes a reception-side phase shifter that variably sets the phase of the received radio wave signal in the reception antenna means , frequency information of the oscillation output of the VCO, Receiving-side first control means for controlling a receiving-side first phase control signal to the receiving-side phase shifter based on a predetermined correlation with a direction of a main lobe by the plurality of antenna elements of the receiving antenna means ; It is characterized by having.

By variably setting the phase of the received radio signal with the reception-side phase shifter and controlling the phase difference between the multiple antenna elements, the direction of the main lobe is changed to the desired direction and the directivity of the multiple antenna elements is changed. be able to.
Further, every time the VCO oscillation frequency changes , the reception-side first control means calculates a reception-side first phase control signal for directing the main lobe direction of the plurality of antenna elements in each direction based on a predetermined correlation. Then, by outputting this to the reception-side phase shifter , the directivity by the plurality of antenna elements can be changed.

In a fifth aspect based on the third or fourth aspect , the first control means on the transmission side or the reception side is based on a predetermined approximate expression relating to the frequency information and the direction of the main lobe as the predetermined correlation. The transmission-side or reception-side first phase control signal is controlled.

First control means calculates a first phase control signal for directing the main lobe direction by a plurality of antenna elements using a predetermined approximation equation every time the oscillation frequency of the VCO varies in each direction, the transmission side it By outputting to the phase shifter or the reception-side phase shifter , the directivity by the plurality of antenna elements can be changed.

  A sixth invention is characterized in that, in the fourth or fifth invention, a storage means for storing and holding the predetermined correlation is provided.

Each time the first control means changes the oscillation frequency of the VCO, it calculates a first phase control signal using a predetermined correlation stored and held in the storage means, and this is used as a transmission-side phase shifter or reception-side phase shift. By outputting to the device , the directivity can be changed by directing the main lobe direction of the plurality of antenna elements in each direction.

  According to a seventh invention, in any one of the second to sixth inventions, each of the transmission antenna means and the reception antenna means includes the plurality of antenna elements, and the direction switching means includes the transmission antenna means. The transmission direction switching means for sequentially changing the direction while maintaining the directivity by the plurality of antenna elements to be strong in only one direction, and the directivity by the plurality of antenna elements of the reception antenna means in one direction And receiving direction switching means for sequentially changing the direction while holding it to be strong.

  As a result, it is possible to execute communication by a so-called phased array antenna control method at the time of transmission and reception, and to control the directivity of the transmission antenna means and the antenna means in the direction in which the gain in communication with the communication target is the largest. .

  An eighth invention according to any one of the first to seventh inventions, further comprising PLL stop control means capable of stopping execution of the PLL control by the PLL circuit when the response signal is received by the reception antenna means. It is characterized by.

  When the output frequency of the VCO changes, the phase comparison result of the phase comparator changes due to the PLL control. The control voltage changes corresponding to the deviation at the time of change, and the output frequency of the VCO is controlled to a predetermined frequency in accordance with this. In this way, when returning to the occurrence of disturbance by PLL control, there is a possibility that a large amount of noise is generated particularly when receiving by the receiving antenna means. Even when the frequency is constant, there may be phase noise whose phase fluctuates, and in this case as well, there is a possibility of receiving noise. These phase noises are factors that limit the sensitivity. In the eighth invention of the present application, when the PLL stop control means receives the response signal by the receiving antenna means, the PLL control by the PLL circuit is performed. Stop execution. As a result, the above adverse effects can be avoided, and a highly accurate response signal free from noise can be acquired.

  In a ninth aspect based on the eighth aspect, the directivity control means controls the directivity of at least one of the transmission antenna means and the reception antenna means in accordance with an output from the loop filter. It is characterized by doing.

  Thereby, when the frequency control function by the PLL control is stopped to prevent noise generation due to a sudden change in the VCO output frequency, the control voltage from the phase comparator in a state where the PLL control is stopped is acquired via the loop filter. As a result, fluctuations in the VCO output can be detected at the voltage level, and directivity control corresponding to this can be performed by the directivity control means.

  A tenth invention is the above-mentioned eighth invention, wherein the PLL stop control means is a switch means for cutting off output transmission from the phase comparator of the PLL circuit to the loop filter, and is substantially the same as the loop filter. A detection filter to which an output from the phase comparator is input is provided, and the directivity control unit is configured to select one of the transmission antenna unit and the reception antenna unit according to an output voltage of the detection filter. At least one of the directivities is controlled.

  By using the switch means, when the response signal is received by the receiving antenna means, the output transmission from the phase comparator to the loop filter can be cut off, thereby reliably stopping the frequency control function by the PLL control and suddenly changing the VCO output frequency. It is possible to reliably prevent noise from being generated. Further, by using the output voltage of the detection filter having substantially the same configuration as that of the loop filter, it is possible to detect a change in the VCO output by converting it to a voltage level, and to perform directivity control according to this.

  In an eleventh aspect based on the eighth aspect, the PLL stop control means is a switch means for interrupting output transmission from the phase comparator of the PLL circuit to the loop filter, and outputs from the phase comparator. Pulse width detecting means for detecting the pulse width of the transmitting antenna means and the directivity control means according to a detection result of the pulse width detecting means. It is characterized by controlling.

  By using the switch means, it is possible to cut off the output transmission from the PLL circuit to the loop filter when receiving the response signal by the receiving antenna means, thereby reliably stopping the frequency control function by the PLL control, and by sudden change of the VCO output frequency Noise generation can be reliably prevented. Further, by using the pulse width of the phase comparator detected by the pulse width detecting means, it is possible to detect the fluctuation of the VCO output in the form of the pulse width and perform directivity control according to this.

  In a twelfth aspect according to any one of the eighth to eleventh aspects, the output frequency from the PLL circuit is out of a predetermined range when the PLL stop control means stops executing the PLL control. The directivity control means controls the directivity of at least one of the transmission antenna means and the reception antenna means according to the detection result of the frequency detection means. It is characterized by.

  When the PLL control for stabilizing the output frequency is stopped, the output frequency from the VCO gradually changes, and there is a possibility that it will deviate greatly from the original frequency. Accordingly, in the twelfth aspect of the present invention, the frequency detection means detects the output frequency of the PLL circuit, and the directivity control means controls the directivity of the transmission antenna means or the reception antenna means according to the detection result. As a result, it is possible to prevent the directivity from changing greatly due to the carrier frequency deviating greatly from the beginning as described above.

  In a thirteenth aspect according to any one of the first to twelfth aspects, the transmission signal from the transmission antenna means is received when the response signal is received by the reception antenna means in accordance with the input second phase control signal. A canceling phase shifter for variably setting the phase of a canceling wave for canceling an unnecessary wave that may be generated based on the control signal, and controlling the second phase control signal to the canceling phase shifter based on an operating state of the VCO. And a second control means.

  The carrier wave output from the VCO of the PLL circuit is modulated by the carrier wave modulation means, transmitted from the transmission antenna means to the communication target, and when a response signal from the communication target corresponding thereto is received by the reception antenna means, The sneak to the receiving antenna means side due to the unnecessary wave component can occur. This unnecessary wave component can be canceled by a canceling wave whose phase is adjusted by a canceling phase shifter. In the thirteenth invention of the present application, the second control means calculates the second phase control signal every time the oscillation frequency of the VCO changes, and outputs the second phase control signal to the canceling phase shifter. Follow-up and reliable cancellation of unwanted waves can be performed.

  According to the present invention, good directivity control can be performed even when the output frequency of the VCO changes.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a system configuration diagram illustrating a wireless tag communication system including the wireless tag communication device (wireless communication device) of the present embodiment.

  In FIG. 1, the wireless tag communication system 100 includes at least one wireless tag T attached to (or bundled with) an object (article or the like) as described above, and wireless communication with the wireless tag T, respectively. The reader / writer 1 is a wireless communication device that detects wireless tag information including the tag ID.

  The wireless tag T has a wireless tag circuit element To including a tag-side antenna 151 and an IC circuit unit 150, and the wireless tag circuit element To is provided on a base material or the like not specifically shown ( The wireless tag circuit element To will be described in detail later).

  The reader / writer 1 has a main body control unit 2 and an antenna 3 (transmission antenna means, reception antenna means). The main body control unit 2 includes a CPU 4, a memory 6 including, for example, a RAM and a ROM, an operation unit (operation unit) 7 for inputting instructions and information from an operator, and a display unit 8 for displaying various information and messages. And an RF communication control unit 9 that controls wireless communication with the wireless tag T via the antenna 3.

  FIG. 2 is a functional block diagram illustrating a schematic configuration of the CPU 4, the RF communication control unit 9, and the antenna 3 in the reader / writer 1.

  In FIG. 2, the antenna unit 3 is composed of three transmission antennas (antenna elements) 21A, 21B, and 21C and one reception antenna (antenna element) 20 in this example.

  The RF communication control unit 9 accesses information (RFID tag information including a tag ID) of the IC circuit unit 150 of the RFID circuit element To via the antenna 3, and the CPU 4 of the reader / writer 1 is wirelessly connected. A signal read from the IC circuit unit 150 of the tag circuit element To is processed to read information, and a response request command (details will be described later) for accessing the IC circuit unit 150 of the RFID tag circuit element To is generated. Is.

  That is, the RF communication control unit 9 includes a transmission unit 212 that transmits a signal to the RFID circuit element To via the antenna 3 and a reception unit that inputs a response wave from the RFID circuit element To received by the antenna 3. 213 and phase control units 203A, 203B, and 203C related to the transmission antennas 21A, 21B, and 21C, respectively.

  The transmission unit 212 includes a PLL (Phase Locked Loop) circuit 300 that generates a signal having a predetermined frequency under the control of the CPU 4. The generated carrier wave uses, for example, a UHF band, a microwave band, or a short wave band, and the output of the PLL circuit 300 is transmitted to the antenna 3 via the phase control units 203A to 203C and wirelessly transmitted. This is supplied to the IC circuit section 150 of the tag circuit element To. Note that the RFID tag information is not limited to the signal modulated as described above, but may be only a carrier wave.

  The receiving unit 213 multiplies the response wave from the RFID circuit element To received by the antenna 3 and the generated carrier wave and demodulates the received first multiplication circuit 218 (demodulation means), and the reception first A first band pass filter 219 for extracting only a signal of a necessary band from the output of the multiplier circuit 218, a reception first amplifier 221 that amplifies the output of the first band pass filter 219, and the reception first amplifier 221 The first limiter 220 that further amplifies the output and converts it into a digital signal, the response wave from the RFID tag circuit element To received by the antenna 3, and the phase shifter 227 after the generation, delay the phase by 90 °. A reception second multiplication circuit 222 (demodulation means) that multiplies and demodulates the carrier wave, and a signal in a necessary band is extracted from the output of the reception second multiplication circuit 222. The second bandpass filter 223, a reception second amplifier 225 that amplifies the output of the second bandpass filter 223, and a second limiter 224 that further amplifies the output of the reception second amplifier 225 and converts it into a digital signal. And. The signal “RXS-I” output from the first limiter 220 and the signal “RXS-Q” output from the second limiter 224 are input to the CPU 4 and processed.

  The outputs of the reception first amplifier 221 and the reception second amplifier 225 are also input to an RSSI (Received Signal Strength Indicator) circuit 226 as intensity detection means, and a signal “RSSI” indicating the intensity of these signals is input to the CPU 4. It is designed to be entered. In this way, in the reader / writer 1, the response wave from the RFID circuit element To is demodulated by homodyne detection (in this example, in particular, IQ orthogonal demodulation) in which the signal received by the antenna 3 is demodulated using the transmission carrier wave. Is done.

  The phase control units 203A, 203B, and 203C include phase shifters 206A, 206B, and 206C that are operation-controlled based on a phase control signal / amplitude control signal from the CPU 4, and variable gain amplifiers (amplification variable amplifiers, carrier modulation means) 208A, 208B and 208C are provided.

  FIG. 3 is a functional block diagram illustrating a detailed configuration of a main part of the transmission unit 212 illustrated in FIG. In FIG. 3, the PLL circuit 300 provided in the transmission unit 212 accesses a reference oscillator 301 that generates a reference wave, and a RFID circuit element To that is a communication target and oscillates at a frequency according to an applied control voltage. A VCO (Voltage Controlled Oscillator) 305 that generates a carrier wave to perform a phase comparison, a frequency divider / phase comparator 302 for phase comparison of the oscillation output of the VCO 305 and the reference signal from the reference oscillator 301, and the frequency division A loop filter 304 for smoothing the output of the frequency divider / phase comparator 302, and a switch 303 capable of interrupting output transmission from the frequency divider / phase comparator 302 to the loop filter 304.

  The frequency divider / phase comparator 302 outputs a control voltage to the VCO 305 in accordance with the phase comparison result (note that the control voltage based on this phase comparison can be controlled based on the setting control signal from the CPU 4). Thus, the PLL control by the entire PLL circuit 300 is executed (see step S250 in FIG. 12 described later).

  The switch 303 is based on a control signal from the CPU 4 (see the flow of FIG. 12 described later), and when the antenna 3 receives a response signal from the RFID circuit element To corresponding to the transmission after transmission of the transmission signal by the antenna 3. The execution of PLL control by the PLL circuit 300 can be stopped. As a result, when the response signal is received from the RFID circuit element To by the antenna 3, execution of the PLL control by the PLL circuit 300 is stopped (details will be described later).

  Further, the transmission unit 212 further has substantially the same configuration as the loop filter 304, a filter circuit 310 (detection filter) to which an output from the frequency divider / phase comparator 302 is input, and an output of the filter circuit 310 And an A / D converter 322 for digitally converting the signal to the CPU 4.

  In the CPU 4, based on the input signal from the A / D converter 322, the transmission antennas 21A, 21B, 21C correspond to the operation state of the VCO 305 (in this example, the fluctuation of the output frequency) (to correct this). A phase control signal / amplitude control signal for controlling the directivity of the main lobe is generated (based on a phase table described later) and output to the D / A converters 351, 352, and 353. The D / A converters 351, 352, and 353 output signals such as “TX_ASK” and “TX_PWR” signals corresponding to the phase control signal and amplitude control signal to the phase control units 203A, 203B, and 203C.

  Thus, the phase shifters 206A, 206B, 206C variably set the phase of the transmission radio wave signal in the transmission antennas 21A, 21B, 21C according to the signals input to the phase control units 203A, 203B, 203C. The variable gain amplifiers 208A, 208B, and 208C modulate the carrier waves generated from the phase shifters 206A, 206B, and 206C (in this example, amplitude modulation based on the “TX_ASK” signal) and amplify the modulated waves ( In this example, the amplification factor is determined by the “TX_PWR” signal) and output to the transmitting antennas 21A, 21B, and 21C.

  On the other hand, the CPU 4 also determines that the output frequency of the VCO 305 is within a predetermined range (for example, within a range from a lower limit value to an upper limit value determined to comply with laws and regulations) based on the input signal from the A / D converter 322. Detecting / determining whether or not there is a phase control signal for controlling the phase shifters 206A to 206C of the phase control units 203A, 203B, 203C in response to the detection / determination. To the phase control units 203A, 203B, and 203C (details will be described later). As a result, the output frequency from the PLL circuit 300 is out of the predetermined range when the switch 303 stops executing the PLL control as described above by the CPU 4 via the filter circuit 310 and the A / D converter 322. When the output voltage of the filter circuit 310 becomes larger than the upper limit voltage or smaller than the lower limit voltage, the phase control based on the phase table is performed. By changing (switching) the signal, directivity control is favorably performed (details will be described later).

  FIG. 4 is a circuit diagram illustrating an example of a specific configuration of the loop filter 304. In FIG. 4, in this example, the loop filter 304 includes capacitors C <b> 1 and C <b> 2 connected in parallel to the VCO 305. The capacitors C1 and C2 are set so that the discharge time constant is equal to or longer than the reception time by the antenna 3. This time constant will be described below.

  In general, a discharge time constant τ is used as a constant indicating the length of time required for discharge. For a simple circuit made only of capacitors of capacitance C (capacitors C1, C2 in the example of FIG. 4) and resistors of resistance R (resistors R1, R2, R3 in the example of FIG. 4), the discharge time constant τ is set as the capacitance. As shown in FIG. 5, this value is known to be 0.37 times the voltage at the start of discharge. In the present embodiment, by configuring as shown in FIG. 4, when the switch 303 is cut off, the discharge time constant of the circuit formed by the loop filter 304 and the VCO 305 is lengthened, thereby changing the frequency. It can be made gentle.

  FIG. 6 is a circuit diagram showing an equivalent circuit when the switch 303 is cut off in the configuration of FIG. When the output of the frequency divider / phase comparator 302 is cut off and turned off, power supply to the circuit constituted by the loop filter 304 and the VCO 305 is lost. As a result, the charges charged in the capacitors C1 and C2 of the loop filter 304 are consumed and discharged by the resistors R2 and R3 in the loop filter and the input terminal resistor R0 of the VCO 305. Therefore, by making the resistance values of the resistors R2 and R3 relatively small and the capacitances of the capacitors C1 and C2 relatively large, the discharge time constant is increased and the discharge time is known in advance (or assumed). The loop filter 304 can be designed so as to be longer than the reception time of the antenna 3.

  FIG. 7 is a block diagram showing an example of a functional configuration of the RFID circuit element To provided in the RFID tag T.

  In FIG. 7, the RFID circuit element To transmits and receives signals in a non-contact manner using the antenna 3 on the reader / writer 1 side and a high frequency such as a short wave band (eg, 13.56 MHz), UHF band, and microwave band. A tag-side antenna 151 and the IC circuit unit 150 connected to the tag-side antenna 151 are provided.

  The IC circuit unit 150 includes a rectifying unit 152 that rectifies the carrier wave received by the tag-side antenna 151, a power source unit 153 that accumulates energy of the carrier wave rectified by the rectifying unit 152, and serves as a driving power source. A clock extraction unit 154 that extracts a clock signal from a carrier wave received by the side antenna 151 and supplies the clock signal to the control unit 157, and a memory that functions as an information storage unit that can store a predetermined information signal such as a tag ID of the wireless tag T Unit 155, a modulation / demodulation unit 156 that is connected to the tag-side antenna 151 and modulates and demodulates signals, the rectification unit 152, the clock extraction unit 154, the modulation / demodulation unit 156, etc. And a control unit 157 for controlling the operation.

  The modem 156 demodulates the communication signal received from the antenna 3 of the reader / writer 1 received by the tag antenna 151 and modulates the carrier wave received by the antenna 151 based on the return signal from the controller 157. Then, it is retransmitted as a reflected wave from the antenna 151.

  The control unit 157 performs control for storing the predetermined information in the memory unit 155 by communicating with the reader / writer 1, and transmits the interrogation wave (response request command) received by the tag-side antenna 151 to the modulation / demodulation unit. In 156, basic control such as control for returning a response wave from the tag-side antenna 151 by performing a response wave (response signal) after modulation based on the information signal stored in the memory unit 155 is executed.

  The clock extraction unit 154 extracts a clock component from the received signal and extracts the clock to the control unit 157, and supplies a clock corresponding to the speed of the clock component of the received signal to the control unit 157.

  The position of the reader / writer 1 in the present embodiment is detected with respect to the RFID tag T including the RFID circuit element To having the above-described configuration. That is, in the antenna unit 3 of the reader / writer 1, when three interrogation signals propagate from the antenna unit 3 from each of the transmission antennas 21 </ b> A, 21 </ b> B, and 21 </ b> C, The presence position of the wireless tag T is detected by utilizing the fact that the phase difference is propagated at an oblique angle equal to the path length difference.

  FIG. 8 is a flowchart showing an example of a control procedure executed by the CPU 4. In FIG. 8, first, in step S110, the direction of the transmission antennas 21A, 21B, and 21C (transmission) directivity (= direction of the main lobe) is changed in a single direction while searching (details will be described later). ) Is set to θ = θSTART as an initial value of an angle (hereinafter referred to as a directivity angle) θ in a directivity direction from a certain reference position (for example, 0 ° on the right side direction of the reader / writer 1). Note that the value of θSTART may be stored in advance in the memory 6 of the main body control unit 2 or may be stored in a rewritable manner, or may be input from the operation unit 7 at each search. It may be.

  Next, the process proceeds to step S120, where a frequency divider is converted in accordance with the phase difference monitor voltage (corresponding to the control voltage of the VCO 305) that is voltage-converted by the filter circuit 310 and input via the A / D converter 322 as described above. The frequency setting value (controlled by the setting control signal) in the phase comparator 302 is determined. Then, based on the frequency setting value and the directivity angle θ, the phases related to the antennas 21A, 21B, and 21C are determined by referring to the phase table previously stored in the memory 6 in the form of correlation, and corresponding to this. The phase control signals (specifically, control voltages of the phase shifters 206A, 206B, and 206C) are output to the phase control units 203A, 203B, and 203C via the D / A converters 351, 352, and 353, respectively. This procedure will be described in more detail with reference to FIG.

FIG. 9 is a diagram illustrating a procedure for determining a phase when the directivity angle is 45 ° as an example. In FIG. 9, the path length difference 1 [m] between the transmitting antennas 21A, 21B, and 21C is expressed as follows.
l = d × sin 45 °
= D × (1 / √2)
It is represented by

When the wavelength of the transmission wave is λ [m], a phase difference φ expressed by the following equation may be given between the phase shifters 206A, 206B, and 206C.
φ = 2π × (d / √2) × (1 / λ)
As for the angles of the directivity angle θ other than 45 °, the corresponding phase difference φ is given between the phase shifters 206A, 206B, and 206C based on the value of the directivity angle θ in the same manner as described above. Good.

  Here, the control signal (control voltage) for giving the phase difference φ to the phase shifters 206A, 206B, 206C is stored as a correlation in the memory 6 (storage means) in advance in the form of a table, for example.

  FIG. 10 is a diagram illustrating an example of this table. In FIG. 10, in this example, the cases of θ = 0 ° and θ = 10 ° are shown as examples of the directivity angle θ. Since the value of the wavelength λ varies depending on the value of the frequency of the transmission wave (that is, the output frequency of the VCO), a plurality of types of frequencies f1, f2,... Fx set in advance (for example, at predetermined frequency intervals). Control voltages to the phase shifters 206A, 206B and 206C for realizing the phase difference φ for giving the directivity angle θ (“ANT1 phase shifter control voltage” and “ANT2 phase shifter control voltage”, respectively). (Represented by “ANT3 phase shifter control voltage”) is stored and held. In the figure, the output voltage (control voltage) of the VCO corresponding to each of the frequencies f1, f2,.

  Note that the correlation of the directivity angle θ, the frequencies f1, f2,..., And the phase difference φ set in this table may use a large number of discretely measured (or calculated) values, or a plurality of values. Based on each point value, an intermediate value between them may be calculated based on a predetermined relational expression obtained in advance (for example, an approximate expression such as linear interpolation).

  Returning to FIG. 8, when step S120 is completed using the table stored in the memory 6 as described above, the process proceeds to step S130.

  In step S130, the signal is a call signal for the search target RFID tag T from the transmission antenna 21 under the condition that the phases of the transmission antennas 21A, 21B, and 21C are set as described above (in other words, the directivity angle θ is set). Scroll ID signal is output. More specifically, a “TX_ASK” signal corresponding to the tag ID of the RFID tag T to be searched (for example, a setting input in the operation unit 7 or stored in the memory 6 in advance) is generated, and the D / A converters 351 and 352 are generated. , 353 to the phase control units 203A, 203B, and 203C, the corresponding amplitude modulation is performed by the variable gain amplifiers 208A, 208B, and 208C, and a “Scroll ID” signal is obtained as access information. The CPU 4 generates a “TX_PWR” signal and outputs it to the phase control units 203A, 203B, and 203C via the D / A converters 351, 352, and 353, and the variable gain amplifiers 208A, 208B, and 208C generate the “TX_PWR” signal. Signal amplification is performed at the amplification factor based on the result, and finally transmitted via the transmission antennas 21A, 21B, and 21C, and a response from the RFID circuit element To of the RFID tag T to be searched is urged.

  Thereafter, in step S200, the “TX_ASK” signal is turned off, and only the “TX_PWR” signal is output to the variable gain amplifiers 208A to 208C of the phase control units 203A to 203C. In this way, the modulation by the variable gain amplifiers 208A to 208C is stopped, and the non-modulated wave is output from the phase control units 203A to 203C and transmitted through the antenna 3 (= Reply Window). Correspondingly, a response signal (= reply signal; RFID tag information including a tag ID) transmitted from the RFID circuit element To of the RFID tag T to be searched is received from the receiving antenna 20 and taken in via the receiving unit 213. At this time, the PLL control by the PLL circuit 300 is turned off, and the voltage (= phase difference monitor voltage, corresponding to the control voltage of the VCO 305, in other words, the oscillation frequency) input through the A / D converter 322 due to the fluctuation of the VCO 305 oscillation frequency. When deviating from the predetermined range, the frequency setting is switched (changed) in the frequency divider / phase comparator 302 as necessary (see FIG. 12 described later for details).

  Note that the received signal strength signal “RSSI” from the RSSI circuit 226 at this time is also input to the CPU 4, and the value is an appropriate storage unit such as a RAM in the memory 6 (or an external storage unit outside the CPU 4 in step S 150). Or may be non-volatile).

  In step S160, it is determined whether or not θ is equal to θEND (for example, a directivity angle θ change range) set in advance as a final value when the directivity angle θ is sequentially changed. Since θ = θSTART is initially satisfied, the determination is not satisfied, and only θSTEP predetermined in step S170 is added, and the process returns to step S120 and the same procedure is repeated.

  Thus, steps S120 to S170 are repeated to add θSTEP to the value of θ in small increments, while maintaining the directivity generated by all the transmitting antennas 21A, 21B, and 21C in a single direction while gradually changing the directivity angle θ, Signal transmission and reception are repeated and the received signal is stored each time. If θ = θEND, the determination at step S160 is satisfied, and the routine goes to step S180.

  In step S180, the direction in which the wireless tag T exists is determined based on the signal strength stored in step S150 during the above-described repetition (except in the case of unsuccessful search) (for example, the direction of the pointing angle with the highest signal strength) To do). Thereafter, in step S190, the distance between the reader / writer 1 and the wireless tag T is similarly determined (identified) based on the signal intensity. As shown in FIG. 11 for example, this is performed by using the characteristic that the distance to the RFID circuit element To tends to increase as the signal strength “RSSI” of the response signal decreases. And the positional information based on the result of said step S180 and step S190 is output to the display part 8 by step S195, and this flow is complete | finished. Note that the RSSI circuit 226 of the receiving unit 213 and step S190 in FIG. 8 constitute a distance detection unit that detects the distance to the wireless tag T. As the distance detection unit, the transmission output is varied (for example, gradually increased). It is also possible to use a method of obtaining a distance from an output value when communication is performed for the first time and communication is successful. Step S180 constitutes a direction detection unit that detects the direction to the wireless tag T.

  When the response signal (tag ID) from the search target wireless tag T is not obtained during the repetition of steps S120 to S170 described above (or when a sufficiently large response signal is not obtained). ) Is regarded as an unsuccessful search (or unsearchable), the direction and distance are not calculated in step S180 and step S190 (or even if an error is calculated), for example, a corresponding error display is displayed on the display unit 8 Done in

  FIG. 12 is a flowchart showing a detailed procedure of the reply signal reception process in step S200.

  In FIG. 12, first, in step S210, it is determined whether or not a transmission state of an unmodulated carrier wave (= Reply Window) for receiving a reply signal subsequent to the “Scroll ID” signal is determined. If Reply Window has been started, the determination is satisfied, and the routine goes to Step S220.

  In step S220, a control signal is output to the switch 303 of the PLL circuit 300, and the circuit is turned off (OFF). As a result, the output voltage from the frequency divider / phase comparator 302 to the loop filter 304 is cut off, and the PLL control in the PLL circuit 300 is turned off. As a result, the electric charge charged in the capacitor of the loop filter 304 is discharged to the ground through the resistor and the capacitor in the loop filter.

  At this time, the pulse signal corresponding to the output of the VCO 305 output by the frequency divider / phase comparator 302 is smoothed by the filter circuit 310, and the output voltage is within the range corresponding to the frequency set in step S120 described above. In this case, the determination at step S230 is satisfied, and the routine goes to step S240 described later. On the other hand, if the output voltage of the filter circuit 310 corresponding to the output of the VCO 305 is not within the range set in step S120 described above (= function as a frequency detection means) in step S230, the determination in step S230 is not satisfied, It is considered that the output frequency of the VCO 305 has greatly fluctuated, and the process proceeds to step S250.

  In step S250, the frequency previously set in step S120 is reset to another relatively close value, and a corresponding setting control signal is output to the frequency divider / phase comparator 302, and the above-described table is referred to. Then, the control voltage is switched to the control voltage of the phase shifters 206A to 206C corresponding to the reset frequency, the process returns to step S230, and the same procedure is repeated. In this way, until the output voltage of the filter circuit 310 falls within the range corresponding to the set frequency and the determination in step S230 is satisfied, the change of the set value of the frequency and the control voltage to the phase shifters 206A to 206C corresponding thereto are performed. Switch.

  When the determination in step S230 is satisfied as described above, the process proceeds to step S240, and it is determined whether the Reply Window transmission is completed. This determination is not satisfied until the Reply Window is completed, and the process returns to step S230 and the same procedure is repeated.

  If the Reply Window transmission has been completed, the determination is satisfied, the reception of the reply signal is considered to have been completed, the process proceeds to Step S260, a control signal is output to the switch 303 of the PLL circuit 300, and the conduction state (ON). The routine is terminated.

  In the above, the control voltage output from the CPU 4 to the phase shifters 206A to 206C of the phase control units 203A to 203C via the D / A converters 351 and 352 is transmitted to the transmission side phase shifter according to each claim. Steps S110 to S130 and Steps S150 to S170 of the control flow executed by the CPU 4 correspond to the frequency information of the VCO oscillation output and the main lobe by the plurality of antenna elements of the transmitting antenna means. The first control means for controlling the first phase control signal to the transmission-side phase shifter is configured based on a predetermined correlation with the direction of. In addition, these procedures, the phase shifters 206A to 206C, and the D / A converters 351, 352, and 353 maintain the directivity by the plurality of antenna elements of the transmitting antenna means so as to increase only in one direction. In addition to configuring a transmission direction switching unit that sequentially changes its direction, it also configures a direction switching unit, and also configures a directivity control unit that controls the directivity of the transmission antenna unit based on the operating state of the VCO.

  Further, the switch 303 constitutes switch means for cutting off the output transmission from the phase comparator of the PLL circuit to the loop filter, and this and step S220 of the flow shown in FIG. A PLL stop control means that can stop the execution of the PLL control by the PLL circuit when receiving the signal is configured.

  As described above, in the reader / writer 1 of the present embodiment, the carrier wave output from the VCO 305 of the PLL circuit 300 is modulated by the variable gain amplifiers 208A to 208C of the phase control units 203A to 203C, and the transmission antennas 21A, 21B, 21C is transmitted to the RFID circuit element To, and a response signal from the RFID circuit element To corresponding thereto is received by the receiving antenna 20, whereby information transmission / reception with the RFID circuit element To is performed. At this time, the phase control signals are output to the phase shifters 206A to 206C via the D / A converters 351 to 353 in step S110 to step S130, step S150 to step S170, etc. of the control flow of FIG. By controlling the directivity of the transmission antennas 21A to 21C, the direction of the main lobe of the transmission antennas 21A to 21C can be controlled in the direction in which the gain in communication with the RFID tag circuit element To to be communicated is the largest.

  Here, in general, the VCO 305 of the PLL circuit 300 has a property that when the output intensity of the amplifier connected to the output side thereof changes, the output frequency of the VCO 305 changes accordingly. Because of such disturbance, when amplitude modulation such as ASK modulation accompanied by a change in output intensity is performed by the variable gain amplifier 217, the signal is transmitted from the antenna 3 along with a change in the output frequency of the VCO 305 at the time of transmission from the antenna 3. The signal frequency changes. When phase control is performed by controlling the phase difference in a plurality of antenna elements and directing the direction of the main lobe in a desired direction as in this embodiment, if the frequency changes as described above, the transmission wave The wavelength changes, and as a result, the value of the phase difference when the main lobe is directed in an arbitrary direction is different (see FIG. 9).

  Therefore, in this embodiment, the directivities of the transmission antennas 21A to 21C are controlled based on the operating state of the VCO 305 in steps S230 and S250 of the flow of FIG. Specifically, if the control voltage of the VCO 305 deviates from the value range corresponding to the set frequency at that time, it is considered that the oscillation frequency of the VCO 305 has greatly fluctuated, and the set frequency to the frequency divider / phase comparator 302 is reset. Further, based on the correlation in the phase table of FIG. 10, the control voltage for directing the main lobe direction by the transmission antennas 21A to 21C to each direction is changed and output to the phase shifters 206A to 206C. In this manner, even when the output frequency of the VCO 305 changes as described above, the directivity control of the transmission antennas 21A to 21C can be performed using the phase difference appropriately corrected in accordance with this. As a result, high-accuracy communication can be performed by avoiding the above-described adverse effects and performing good directivity control.

  At this time, in particular, in this embodiment, in steps S110 to S130 and S150 to S170 in the control flow of FIG. 8, the directivity synthesized by the transmission antennas 21A to 21C is sequentially increased while increasing only one direction. The direction is changed, and predetermined calculation processing is performed in accordance with the signal intensity and phase difference of each antenna element in each direction (a method based on so-called phased array antenna control). Thereby, it is possible to control the directivities of the transmission antennas 21A to 21C in the direction in which the gain in communication with the RFID circuit element To to be communicated is the largest.

  On the other hand, when the output frequency of the VCO 305 changes as described above, the phase comparison result of the frequency divider / phase comparator 302 changes due to PLL control. The control voltage changes corresponding to the deviation at the time of the change, and the output frequency of the VCO 305 is controlled to a predetermined frequency according to this change. Thus, when returning by PLL control with respect to the occurrence of a disturbance, there is a possibility that a large amount of noise is generated particularly when receiving by the receiving antenna 20. Further, even when the frequency is constant, there is a possibility that phase noise whose phase fluctuates exists, and in this case, there is a possibility that reception noise is generated. Although these phase noises are factors that limit sensitivity, in this embodiment, when the reception signal of the RFID tag circuit element To is received by the receiving antenna 20, the PLL circuit 300 causes the PLL circuit 300 to switch the PLL circuit 300. Stop execution of control. As a result, the above adverse effects can be avoided, and a highly accurate response signal free from noise can be acquired. In particular, by using the switch 300, the transmission of the output from the frequency divider / phase comparator 302 to the loop filter 304 can be cut off when the response signal is received by the receiving antenna 20, thereby reliably stopping the frequency control function by the PLL control. Thus, noise generation due to a sudden change in the VCO output frequency can be reliably prevented.

  At this time, if the PLL control for stabilizing the output frequency is stopped, the carrier frequency from the VCO 305 of the PLL circuit 300 gradually changes, and there is a possibility of deviating greatly from the initial frequency as it is. Therefore, in the present embodiment, the CPU 4 detects the output frequency of the PLL circuit 300 in step S230 of FIG. 12 as frequency detection means, and also responds to the detection result (corrected / reset the set frequency) from the CPU 4 The directivity control of the transmitting antennas 21A to 21C is performed using the phase control signal. As a result, it is possible to prevent the directivity from changing greatly due to the carrier frequency deviating greatly from the beginning as described above. Further, in this frequency detection, by using the output voltage of the filter circuit 310 having substantially the same configuration as the loop filter 304, it is possible to detect a change in the VCO output by converting it to a voltage level, and to perform directivity control corresponding to this. it can.

  The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit and technical idea of the present invention. Hereinafter, such modifications will be described.

(1) When no filter circuit is used In the above embodiment, the switch 303 is used and the output of the filter circuit 310 is A / D converted and input to the CPU 4 to detect the frequency. However, the filter circuit 310 is not used. You can also

  FIG. 13 is a functional block diagram showing a detailed configuration of a main part of the transmission unit 212A provided in the RF communication control unit 9 of such a modification, and corresponds to FIG. Components equivalent to those in FIG. 3 are denoted by the same reference numerals, and description thereof is omitted or simplified as appropriate.

  In FIG. 13, in the transmission unit 212 </ b> A of this modification, the output from the frequency divider / phase comparator 302 is converted into a pull-up circuit 341 including a diode 344 and a resistor 340, and a pull-down circuit including a diode 345 and a resistor 342. 342. That is, at the output terminal of the frequency divider / phase comparator 302, the divided signal of the high frequency signal is compared with the divided signal of the reference frequency signal from the reference oscillator 301, and when the phase of the high frequency signal is delayed, “High” output, “Low” output when the phase is advanced, and “Z” when there is no phase difference. Therefore, the signal (P1) obtained by pulling up the output signal from the frequency divider / phase comparator 302 by the pull-up circuit 341 and the signal (P2) pulled down by the pull-down circuit 343 are input to the CPU 4 and shown in FIG. As described above, the CPU 4 can detect the logical product (AND) of the P1 signal and the P2 signal to detect the high pulse width, and the negative logical sum (NOR) to detect the low pulse width ( Pulse width detection means). Therefore, the phase shift with respect to the reference frequency signal from the reference oscillator 301 can be calculated from these two calculation results, and the output frequency of the VCO 305 can be monitored (detected) based on this result. When the pulse width generated as a result of the AND calculation or NOR calculation exceeds a certain value, the output frequency deviates from the predetermined voltage range corresponding to the set frequency in the frequency divider / phase comparator 302. It is detected and determined (= frequency detection means).

  According to the present modification, the variation in the VCO output is detected in the form of the pulse width of the frequency divider / phase comparator 302, and directivity control corresponding to this is performed, thereby providing substantially the same effect as in the above embodiment. obtain.

(2) When switch means is not used In the above embodiment and the modified example of (1), output transmission from the frequency divider / phase comparator 302 to the loop filter 304 can be cut off as part of the PLL stop control means. Although the switch 303 is provided, this is not necessarily provided.

  FIG. 15 is a functional block diagram showing the detailed configuration of the main part of the transmission unit 212B provided in the RF communication control unit 9 of such a modification, and corresponds to FIG. 3 and FIG. Components equivalent to those in FIG. 3 and the like are denoted by the same reference numerals, and description thereof is omitted or simplified as appropriate.

  15, the switch 303 and the filter circuit 310 are omitted in the transmission unit 212B of this modification. Then, assuming that the output from the loop filter 304 (the voltage at the control terminal of the VCO 305) is substantially proportional to the output voltage of the VCO 305, it is directly input to the CPU 4 via the A / D converter 332, whereby the output frequency is A deviation from a predetermined voltage range corresponding to the set frequency in the frequency divider / phase comparator 302 is detected and determined (frequency detecting means).

  In addition to the setting control signal for setting the frequency, a control signal (PLLON / OFF switching control signal) for directly controlling ON / OFF of the PLL control is sent from the CPU 4 to the frequency divider / phase comparator 302. This is output (see step S220A and step S260A in FIG. 16 described later).

  FIG. 16 is a flowchart showing an example of a control procedure executed by the CPU 4 of this modification, and corresponds to FIG. 12 of the above embodiment. The same steps as those in FIG. 12 are denoted by the same reference numerals, and description thereof is omitted or simplified.

  In FIG. 16, in this flow, steps S220A and S260A are newly provided in place of steps S220 and S260 in FIG. In step S220A, as described above, a control signal (PLLOFF switching control signal) for turning off the PLL control is output to the frequency divider / phase comparator 302 (= PLL stop control means). As a result, the frequency divider / phase comparator 302 is stopped (paused), and the output terminal from the frequency divider / phase comparator 302 to the loop filter 304 is in a high impedance state. As a result, it is possible to obtain the same effect as when the switch 303 provided between the frequency divider / phase comparator 302 and the loop filter 304 is cut off in the above embodiment. In step S260A, contrary to the above, a control signal (PLLON switching control signal) for returning the PLL control to ON is output to the frequency divider / phase comparator 302. Others are almost the same as FIG.

  Also by this modification, the same effect as the above-mentioned embodiment is acquired.

(3) In the case where the cancel circuit is provided FIG. 17 is a functional block diagram showing the detailed configuration of the main parts of the transmission unit 212C and the cancel circuit 370 provided in the RF communication control unit 9 of this modification, and is a diagram of the above embodiment FIG. Components equivalent to those in FIG. 3 are denoted by the same reference numerals, and description thereof is omitted or simplified as appropriate.

  In FIG. 17, in this modified example, when a signal is received by the receiving unit 213, a cancel signal (cancellation wave) for canceling an unnecessary wave (around signal) that can be generated based on the transmission signal from the transmission unit 213 </ b> C is generated. A cancel circuit (cancellation wave generating means) 370 is provided.

  The cancel circuit 370 functions as a cancel signal amplitude adjustment unit that controls the amplitude and phase of the cancel signal, which is the canceling wave based on the carrier wave distributed and supplied from the PLL circuit 300 of the transmission unit 212C. An amplifier 372, a variable resistor 373, and a phase shifter 371 (cancellation phase shifter) as a cancel signal phase adjustment unit are provided.

  The receiving unit 213 combines a cancel signal generated by the amplifier 372, the variable resistor 373, and the phase shifter 371 of the cancel circuit 370 and a signal received by the receiving antenna 20 with a multiplexer (not shown). The reception first multiplication circuit 218 and the reception second multiplication circuit 222 multiply the combined signal and the carrier wave generated by the transmission unit 212C to perform homodyne detection.

  In addition to the outputs of the reception first amplifier 221 and the reception second amplifier 225, the combined signal is also input to an RSSI circuit (Received Signal Strength Indicator) 226, and the strength (reception) of those signals is received. A signal “RSSI” indicating (signal strength) is input to the CPU 4. The CPU 4 performs a predetermined calculation based on the RSSI signal (corresponding to the output signal from the multiplexer 203) from the RSSI circuit 226, and according to the calculation processing result, the CPU 4 and the variable resistor 373 and the transfer circuit 370. An amplitude control signal and a phase control signal (second phase control signal) are output to the phase shifter 371 via the D / A converters 362 and 361, respectively.

  FIG. 18 is a diagram illustrating the correlation stored in the memory 6 in the form of a table in the present modification, and corresponds to FIG. 10 of the above embodiment. In FIG. 18, as in FIG. 10, as examples of the directivity angle θ, the cases of θ = 0 ° and θ = 10 ° are shown. Then, for each of a plurality of types of frequencies f1, f2,... Fx set in advance (for example, at a predetermined frequency interval), a phase shifter 206A for realizing a phase difference φ for giving the directivity angle θ. 206B and 206C are represented by control voltages “ANT1 phase shifter control voltage”, “ANT2 phase shifter control voltage” and “ANT3 phase shifter control voltage”), and a variable resistor for generating an optimum canceling wave at that time An amplitude control signal (represented by “Cancel_ATT control voltage”) to 373 and a phase control signal (represented by “Cancel phase shifter control voltage”) to the phase shifter 371 are stored and held.

  FIG. 19 is a flowchart illustrating an example of a control procedure executed by the CPU 4 of the present modification, and corresponds to FIG. 8 of the above embodiment. The same steps as those in FIG. 8 are denoted by the same reference numerals, and the description thereof is omitted. In FIG. 19, step S120A and step S200A are provided instead of S120 and step S200 in the flow of FIG.

  In step S120A, the frequency setting value in the frequency divider / phase comparator 302 is determined in accordance with the phase difference monitor voltage that is voltage-converted by the filter circuit 310 and input via the A / D converter 322, as described above. Then, based on the frequency setting value and the directivity angle θ, the phase of the antennas 21A, 21B, and 21C is determined with reference to the table of the memory 6 and the corresponding phase control signal (control voltage) is converted to D / A. The signals are output to the phase control units 203A, 203B, and 203C via the converters 351, 352, and 353. Similarly, the resistance value to be generated by the variable resistor 373 and the phase related to the phase shifter 371 are determined by referring to the table of the memory 6 based on the frequency setting value and the directivity angle θ, and corresponding to this. The amplitude control signal (control voltage) and the phase control signal (control voltage) are output to the variable resistor 373 and the phase shifter 371 via the D / A converters 362 and 361, respectively (second control means).

  FIG. 20 is a flowchart showing the detailed procedure of step S200A, and corresponds to FIG. The same steps as those in FIG. 12 are denoted by the same reference numerals. In FIG. 20, step S250A is provided instead of step S250 shown in FIG. In this step S250A, the frequency previously set in step S120 is reset to another relatively close value and the corresponding setting control signal is output to the frequency divider / phase comparator 302, and the above-mentioned table is referred to. Then, the control voltage is switched to the control voltage of the phase shifters 206A to 206C, the variable resistor 373, and the phase shifter 371 corresponding to the reset frequency, and the process returns to step S230 to repeat the same procedure. In this way, until the output voltage of the filter circuit 310 is within the range corresponding to the set frequency and the determination in step S230 is satisfied, the frequency set value is changed and the phase shifters 206A to 206C and the variable resistor 373 corresponding thereto are changed. The control voltage to the phase shifter 371 is switched.

  In the above, step S110, step S120A to step S130, and step S150 to step S170 of the control flow of FIG. 19 executed by the CPU 4 are the frequency information of the oscillation output of the VCO and the main lobe by the plurality of antenna elements of the transmitting antenna means. The first control means for controlling the first phase control signal to the transmission-side phase shifter is configured based on a predetermined correlation with the direction, and these procedures, the phase shifters 206A to 206C and the D / A The converters 351, 352, and 353 constitute transmission direction switching means for sequentially changing the direction while maintaining the directivity of the plurality of antenna elements of the transmission antenna means so as to increase only in one direction, and change the direction. And directivity control means for controlling the directivity of the transmitting antenna means based on the operating state of the VCO. To.

  In this modification, in addition to the same effects as in the above embodiment, the following effects are further obtained. That is, the carrier wave output from the VCO 305 of the PLL circuit 300 is modulated by the variable gain amplifiers 208A to 208C, transmitted from the transmitting antennas 21A to 21C to the RFID circuit element To, and the response from the RFID circuit element To corresponding thereto When a signal is received by the receiving antenna 20, wraparound to the receiving antenna 20 side due to an unnecessary wave component based on the transmission signal may occur. This unnecessary wave component can be canceled by a cancellation wave whose phase is adjusted by the phase shifter 371 using the cancel circuit 370. In this modification, every time the oscillation frequency of the VCO 305 changes, the phase control signal to the phase shifter 371 is switched at step S250A and step S120A, and this is output to the phase shifter 371. Follow-up, and can cancel out unwanted waves reliably.

  Also in this modification, the PLL stop control may be performed without using the switch means as in the modification (2).

(4) When the frequency deviation is calculated and the current frequency is estimated In the above embodiment, the output of the current VCO 305 is detected by the phase difference monitor voltage signal detected by the filter circuit 310 and input via the A / D converter 322. Although the frequency was detected and directivity control was performed according to this, the present invention is not limited to this. That is, a deviation from the initial setting value of the current output frequency of the VCO 305 may be calculated based on the phase difference monitor voltage signal, and the initial frequency may be corrected based on this deviation to estimate and use the current frequency. .

  FIG. 21 is a diagram showing the correlation stored in the form of a table in the memory 6 in this modification, and corresponds to FIG. 10 of the above embodiment. In FIG. 21, as in FIG. 10, the cases of θ = 0 ° and θ = 10 ° are shown as examples of the directivity angle θ. Then, for each of a plurality of types of frequencies f1, f2,... Fx set in advance (for example, at a predetermined frequency interval), a phase shifter 206A for realizing a phase difference φ for giving the directivity angle θ. Control voltages “ANT1 phase shifter control voltage”, “ANT2 phase shifter control voltage”, and “ANT3 phase shifter control voltage” are stored and held. In addition, in this modified example, separately from these, the value of the phase difference monitor voltage signal detected by the filter circuit 310 and input via the A / D converter 322 (in this example, it is divided for each predetermined range having a width). And a correlation with a deviation value from the frequency initial setting value corresponding to each value is also stored and held.

  FIG. 22 is a flowchart illustrating an example of a control procedure executed by the CPU 4 of the present modification, and corresponds to FIG. 8 of the above embodiment. The same steps as those in FIG. 8 are denoted by the same reference numerals, and the description thereof is omitted. In FIG. 22, step S125 is newly provided between S120 and step S130 in the flow of FIG. 8, and step S200B is provided instead of step S200.

  In step S120, the frequency setting value in the frequency divider / phase comparator 302 is determined according to the phase difference monitor voltage as described above, and the table of the memory 6 is determined based on the frequency setting value and the directivity angle θ. The phase control signal is output to the phase control units 203A, 203B, 203C with reference to FIG. In step S125, 0 is set as an initial value in a frequency shift holding register that sequentially stores the above-described frequency shift values in a replaceable manner. When step S125 ends, the process proceeds to step S130 similar to that described above.

  FIG. 23 is a flowchart showing the detailed procedure of step S200B, and corresponds to FIG. The same steps as those in FIG. 12 are denoted by the same reference numerals. In FIG. 23, step S230A is provided instead of step S230 shown in FIG. 12, and step S235 is newly provided between step S220 and step S230A, and step S245 is newly provided between step S230A and step S250. ing.

  In step S220, as described above, the switch 303 of the PLL circuit 300 is turned off (OFF), a voltage corresponding to the output of the VCO 305 at this time is input to the filter circuit 310, and the output voltage is the phase difference monitor voltage. In step S235, based on the phase difference monitor voltage, how much the current frequency deviates from the frequency set in step S120 with reference to the table of FIG. 21 (index value. FIG. 21). “−2a”, “−a”, “0”, “a”, and “2a”).

  Thereafter, the process proceeds to step S230A, and it is determined whether or not the current frequency deviation value derived in step S235 matches the value stored in the register at this time (initially “0” set in step S125). (= Frequency detection means).

  If they match, the determination is satisfied, and the process proceeds to step S240 and subsequent steps similar to those described above. If they do not match, the process moves to step S245, and the current frequency shift value derived in step S235 is newly stored in the register and updated.

  Thereafter, the process proceeds to step S250, and similarly to the above, the frequency set in step S120 is reset to another relatively close value, and the corresponding setting control signal is output to the frequency divider / phase comparator 302. At the same time, the control voltage of the phase shifters 206A to 206C corresponding to the reset frequency is switched with reference to the above-described table, the process returns to step S235, and the same procedure is repeated. In this way, the frequency set value is changed and the response is made until the frequency shift amount calculated based on the output voltage of the filter circuit 310 matches the value stored in the register and the determination in step S230A is satisfied. The control voltage is switched to the phase shifters 206A to 206C.

  In the above, step S110, step S120, step S125, step S130, and step S150 to step S170 of the control flow of FIG. 22 executed by the CPU 4 are performed by the frequency information of the oscillation output of the VCO and the plurality of antenna elements of the transmitting antenna means. Based on a predetermined correlation with the direction of the main lobe, the first control means for controlling the first phase control signal to the transmission-side phase shifter is configured, and these procedures, the phase shifters 206A to 206C, The D / A converters 351, 352, and 353 constitute transmission direction switching means for sequentially changing the direction while maintaining the directivity of the plurality of antenna elements of the transmission antenna means so as to be strong only in one direction. The direction switching means is also configured to control the directivity of the transmitting antenna means based on the operating state of the VCO. Also constitutes the control means.

  Also in this modification, the same effect as the above embodiment is obtained.

  Also in this modification, the PLL stop control may be performed without using the switch means as in the modification (2). Further, similarly to the modification (3) above, a cancel circuit may be provided to reduce unnecessary waves.

(5) When directivity control is performed also on the receiving side In the above, directivity control (particularly phased array antenna control) is performed only on the transmitting antenna side. However, the present invention is not limited to this, and only on the receiving antenna side (in this case) The transmission antenna may have a single element configuration as in the case of the reception antenna 20), or may be performed for both the transmission antenna and the reception antenna.

  FIG. 24 is a functional block diagram showing a detailed configuration of a main part of the transmission unit 212D and the like provided in the RF communication control unit 9 of a modified example in which directivity control is performed on both the transmission antenna and the reception antenna. It is a figure equivalent to FIG. 15 of the modification of 1). Portions equivalent to those in FIG. 15 are denoted by the same reference numerals, and description thereof is omitted or simplified as appropriate.

  In FIG. 24, in this modification, instead of transmitting antennas 21A, 21B, and 21C, antennas 21A ', 21B', and 21C 'that are used for both transmission and reception (= transmitting antenna means and receiving antenna means) are used. Transmission / reception separators 22A, 22B, and 22C are provided between the variable gain amplifiers 208A, 208B, and 208C of 203B and 203C and the antennas 21A ', 21B', and 21C. A phase control unit on the reception side is configured between the transmission / reception separators 22A, 22B, and 22C and the reception unit 213 (having functions equivalent to those of the phase shifters 206A, 206, and 206C on the transmission side). Phase shifters 204A, 204B, and 204C are provided.

  The transmission / reception separators 22A, 22B, and 22C are constituted by, for example, a circular radar, and the like. The variable gain amplifiers 208A to 208C of the phase control units 203A to 203C on the transmission side or the phase shifters 204A to 204C on the reception side and the antenna 21A ′. To C ′ in one direction (signals from the variable gain amplifiers 208A to 208C are transmitted to the antennas 21A ′ to 21C ′ and signals received by the antennas 21A ′ to 21C ′ are simultaneously transmitted to the phase shifters 204A to C respectively).

  The phase shifters 204A to 204C on the receiving side receive a phase control signal from the CPU I4 via the D / A converters 361, 362, and 363, and the phase of the received radio wave signal at the antennas 21A 'to 21C' is changed accordingly. And directivity control similar to that on the transmission side (especially phased array antenna control in this example) is performed (reception direction switching means). The receiving unit 213 receives the reflected wave from the RFID circuit element To received by the antennas 21A ′ to 21C ′, and summed by the adder (not shown) via the receiving side phase shifters 204A to 204C, and is generated by the transmitting unit 212. The above-described demodulation (especially homodyne detection) is performed by multiplying the received carrier wave.

  Also by this modification, the same effect as the above-mentioned embodiment is acquired. In addition, at the time of transmission and at the time of reception, communication by a method based on so-called phased array antenna control is executed, and the directivity of the antennas 21A ′ to C ′ is set in the direction in which the gain in communication with the RFID circuit element To that is the communication target is the largest Can be controlled.

  It is assumed that the “Scroll ID” signal and the like used above comply with the specifications formulated by EPC global. EPC global is a non-profit corporation established jointly by the International EAN Association, which is an international organization of distribution codes, and the United Code Code Council (UCC), which is an American distribution code organization. Note that signals conforming to other standards may be used as long as they perform the same function.

  In addition to those already described above, the methods according to the above-described embodiments and modifications may be used in appropriate combination.

  In addition, although not illustrated one by one, the present invention is implemented with various modifications within a range not departing from the gist thereof.

1 is a system configuration diagram illustrating a wireless tag communication system including a wireless tag communication device of the present embodiment. It is a functional block diagram showing schematic structure of CPU in a reader / writer, RF communication control part, and an antenna. It is a functional block diagram showing the principal part detailed structure of a transmission part. It is a circuit diagram showing an example of a specific configuration of a loop filter. It is a figure showing the behavior of the discharge time constant of the circuit containing a capacitor | condenser and resistance. FIG. 5 is a circuit diagram showing an equivalent circuit when a switch is cut off in the configuration of FIG. 4. It is a block diagram showing an example of a functional structure of the radio | wireless tag circuit element with which the radio | wireless tag was equipped. It is a flowchart showing an example of the control procedure which CPU performs. It is a figure showing the procedure of the phase determination in the case of 45 degrees of directivity angles. It is a figure showing an example of the table of the control signal for giving a phase difference to a phase shifter. It is a figure showing the relationship between signal strength and the distance between a reader / writer and a wireless tag. It is a flowchart showing the detailed procedure of the reply signal reception process of step S200. It is a functional block diagram showing the principal part detailed structure of the transmission part with which RF communication control part of the modification which does not use a filter circuit was equipped. It is explanatory drawing explaining the method of calculating a pulse width by calculating based on the logical product of P1 signal and P2 signal. It is a functional block diagram showing the principal part detailed structure of the transmission part with which the RF communication control part of the modification which does not use a switch means was equipped. It is a flowchart showing an example of the control procedure which CPU performs. It is a functional block diagram showing the principal part detailed structure of the transmission part with which the RF communication control part of the modification provided with a cancellation circuit and the cancellation circuit were equipped. It is a figure showing the correlation memorize | stored in the form of the table in memory. It is a flowchart showing an example of the control procedure which CPU performs. It is a flowchart showing the detailed procedure of step S200A. It is a figure showing the correlation memorize | stored in the form of the table in memory with the modification which calculates a frequency shift and estimates the present frequency. It is a flowchart showing an example of the control procedure which CPU performs. It is a flowchart showing the detailed procedure of step S200B. It is a functional block diagram showing principal part detailed structures, such as a transmission part with which the RF communication control part of the modification which performs directivity control to both a transmission antenna and a receiving antenna was equipped.

Explanation of symbols

1 Reader / Writer (wireless communication device)
3 Antenna (transmitting antenna means, receiving antenna means)
6 Memory (memory means)
7 Operation part (operation means)
20 Receiving antenna (antenna element)
21A-C Transmitting antenna (antenna element)
21A'-C 'Transmitting / receiving antenna (transmitting antenna means, receiving antenna means)
204A-C Reception side phase shifter (reception direction switching means, direction switching means, directivity control means)
206A-C Transmission-side phase shifter (transmission direction switching means, direction switching means, directivity control means)
208A to C Variable gain amplifier (carrier modulation means)
218 First multiplication circuit (demodulation means)
222 Second multiplication circuit (demodulation means)
300 PLL circuit 302 Frequency divider / phase comparator (phase comparator)
303 switch (switch means, PLL stop control means)
304 Loop filter 305 VCO
310 Filter circuit (detection filter)
351 D / A converter (transmission direction switching means, direction switching means, directivity control means)
352 D / A converter (transmission direction switching means, direction switching means, directivity control means)
353 D / A converter (transmission direction switching means, direction switching means, directivity control means)
370 cancel circuit (cancellation wave generating means)
371 Phase shifter (cancellation phase shifter)
θ Direction angle (main lobe direction)

Claims (13)

A VCO that oscillates at a frequency according to an applied control voltage and generates a carrier wave for accessing a communication target, a phase comparator that compares the phase of the oscillation output of the VCO and a reference signal from a reference transmitter, and A loop filter that smoothes the output of the phase comparator and outputs it to the VCO, and executes a PLL control that outputs the control voltage to the VCO according to the comparison result of the phase comparator;
Carrier modulation means for modulating the carrier generated from the VCO of the PLL circuit;
Transmitting antenna means for transmitting the carrier wave output from the carrier wave modulating means to the communication target;
Receiving antenna means for receiving a response signal from the communication object according to a transmission signal from the transmitting antenna means;
A radio communication apparatus comprising: directivity control means for controlling directivity of at least one of the transmission antenna means and the reception antenna means based on an operating state of the VCO. The wireless communication device according to claim 1, wherein
The directivity control means sequentially changes the direction while maintaining the directivity by a plurality of antenna elements provided in at least one of the transmission antenna means and the reception antenna means so as to be strong in only one direction. A wireless communication apparatus comprising a direction switching means for causing the wireless communication apparatus to switch. The wireless communication device according to claim 2, wherein
The direction switching means is
A transmission-side phase shifter that variably sets the phase of a transmission radio signal in the transmission antenna means ;
Controls the transmission-side first phase control signal to the transmission-side phase shifter based on a predetermined correlation between the frequency information of the oscillation output of the VCO and the direction of the main lobe by the plurality of antenna elements of the transmission antenna means Transmitting side first control means,
A wireless communication apparatus comprising: The wireless communication device according to claim 2, wherein
The direction switching means is
A receiving-side phase shifter that variably sets the phase of the received radio wave signal in the receiving antenna means;
Control the reception-side first phase control signal to the reception-side phase shifter based on a predetermined correlation between the frequency information of the oscillation output of the VCO and the direction of the main lobe by the plurality of antenna elements of the reception antenna means Receiving-side first control means,
A wireless communication apparatus comprising: The wireless communication device according to claim 3 or 4 ,
The transmission side or reception side first control means is:
A wireless communication apparatus that controls a transmission-side or reception-side first phase control signal based on a predetermined approximate expression relating to the frequency information and the direction of the main lobe as the predetermined correlation. The wireless communication device according to any one of claims 3 to 5 ,
A wireless communication apparatus comprising storage means for storing and holding the predetermined correlation. The wireless communication device according to any one of claims 2 to 6,
The transmitting antenna means and the receiving antenna means each include the plurality of antenna elements;
The direction switching means is
Transmission direction switching means for sequentially changing the direction while maintaining the directivity of the plurality of antenna elements of the transmission antenna means to be strong in only one direction,
A radio communication apparatus comprising: a reception direction switching unit that sequentially changes the direction of the reception antenna unit while maintaining the directivity of the plurality of antenna elements so as to be strong in only one direction. The wireless communication apparatus according to any one of claims 1 to 7,
A wireless communication apparatus comprising PLL stop control means capable of stopping execution of the PLL control by the PLL circuit when the response signal is received by the reception antenna means. The wireless communication apparatus according to claim 8, wherein
The directivity control means includes
A radio communication apparatus that controls the directivity of at least one of the transmission antenna means and the reception antenna means in accordance with an output from the loop filter. The wireless communication apparatus according to claim 8, wherein
The PLL stop control means includes:
Switch means for blocking output transmission from the phase comparator of the PLL circuit to the loop filter;
Provided with a detection filter that has substantially the same configuration as the loop filter, and that receives an output from the phase comparator,
The directivity control means includes
A radio communication apparatus that controls directivity of at least one of the transmission antenna means and the reception antenna means in accordance with an output voltage of the detection filter. The wireless communication apparatus according to claim 8, wherein
The PLL stop control means includes:
Switch means for blocking output transmission from the phase comparator of the PLL circuit to the loop filter;
Providing a pulse width detecting means for detecting the pulse width of the output from the phase comparator;
The directivity control means includes
A radio communication apparatus that controls directivity of at least one of the transmission antenna means and the reception antenna means in accordance with a detection result of the pulse width detection means. The wireless communication device according to any one of claims 8 to 11,
When the PLL stop control means stops execution of the PLL control, the PLL stop control means has a frequency detection means for detecting that the output frequency from the PLL circuit is out of a predetermined range,
The directivity control means includes
A radio communication apparatus that controls directivity of at least one of the transmission antenna means and the reception antenna means according to a detection result of the frequency detection means. The wireless communication apparatus according to any one of claims 1 to 12,
In accordance with the input second phase control signal, the phase of the cancellation wave for canceling the unnecessary wave that can be generated based on the transmission signal from the transmission antenna means when the response signal is received by the reception antenna means is variably set A canceling phase shifter,
And a second control means for controlling the second phase control signal to the canceling phase shifter based on an operating state of the VCO.

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