JP4701887B2 - Plasma display panel - Google Patents

Description

  The present invention relates to a plasma display panel used for a large-screen thin and light display device.

  In recent years, plasma display panels (hereinafter abbreviated as “panels”) have grown rapidly and have come to be widely used as large flat display devices.

  The panel includes a discharge space partitioned by a partition wall between a front plate and a back plate arranged to face each other. The front plate includes a pair of display electrodes composed of scan electrodes and sustain electrodes, and a front-side dielectric layer covering the display electrode pair. The display electrode pairs are arranged so that the gap between two adjacent display electrode pairs is the same. The back plate includes a plurality of address electrodes arranged in a direction crossing the display electrode pair, and a back side dielectric layer covering the address electrodes. A discharge cell is formed in the discharge space at the intersection of the address electrode and the display electrode pair.

  Then, a driving voltage is alternately applied to each of the display electrode pairs of the panel to discharge a desired discharge cell to emit light and display an image.

  In order to drive such a panel stably, an aging process is performed in the manufacturing process of the panel. The aging process is performed by alternately applying an aging pulse having a voltage higher than a normal driving voltage to each of the display electrode pairs for a long time.

However, the front-side dielectric layer and the back-side dielectric layer may break down during the aging process. In order to prevent this dielectric breakdown, a method has been proposed in which the thickness of the dielectric layer formed in the vicinity of the sealing portion for sealing the front plate and the back plate is made thicker than the thickness of the other regions ( For example, see Patent Document 1).
Japanese Patent Laid-Open No. 10-275563

  The method of thickening part of the front-side dielectric layer and the back-side dielectric layer is effective for suppressing dielectric breakdown that occurs in the vicinity of the sealing portion. However, since these dielectric layers cannot be thickened in the screen display area, the dielectric breakdown of the front-side dielectric layer and the back-side dielectric layer that occurs in the peripheral area of the screen display area cannot be suppressed, and the manufacturing yield is reduced. It was decreasing.

  The present invention solves such a conventional problem, and suppresses the dielectric breakdown of the front-side dielectric layer and the back-side dielectric layer that occur during aging, and improves the manufacturing yield during aging. It aims at providing the panel which can do.

The present invention relates to a front plate having a plurality of pairs of display electrodes each consisting of scan electrodes and sustain electrodes arranged in parallel and a front-side dielectric layer covering the pairs, and arranged in a direction intersecting the display electrode pairs. A back plate having a plurality of address electrodes and a back side dielectric layer covering the plurality of address electrodes, and having a screen display region arranged to face the front plate and displaying an image , a panel pitch is the same sequence of display electrode pairs over the entire surface, located between the boundary between the inner region and the peripheral region adjacent coupling cormorants Viewing electrode pair of the screen display area, the display electrode pairs adjacent The gap is characterized in that the peripheral area of the screen display area is wider than the internal area of the screen display area. With this configuration, it is possible to suppress the dielectric breakdown of the front-side dielectric layer and the back-side dielectric layer that occur during aging, and to improve the manufacturing yield during aging.

In the panel of the present invention, in the peripheral region of the screen display region, the gap between adjacent display electrode pairs may be increased stepwise from the inner region side of the screen display region toward the end of the screen display region. Good. With this configuration, the luminance change in the peripheral area of the screen display area is smooth and the boundary with the internal area can be made inconspicuous, so that the image display quality is not impaired.

  The present invention can suppress the dielectric breakdown of the front-side dielectric layer and the back-side dielectric layer that occur during aging, and improve the manufacturing yield during aging.

  Hereinafter, a panel according to an embodiment of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a cross-sectional perspective view showing a schematic configuration of a panel according to a first embodiment of the present invention. The panel has a configuration in which a front plate 1 and a rear plate 2 arranged to face each other are sealed with end portions (not shown), and a discharge space 22 in which a discharge gas is sealed in a gap is formed.

  The front plate 1 has a display electrode pair 14 composed of a scanning electrode 12 having a transparent electrode 121 and a metal electrode 122 and a sustaining electrode 13 having a transparent electrode 131 and a metal electrode 132 on a front substrate 11 made of glass. These are formed in parallel with each other. A front-side dielectric layer 15 is formed so as to cover them. On the other hand, in the back plate 2, a plurality of address electrodes 18 extending in a direction orthogonal to the display electrode pair 14 are formed on a back substrate 17 made of glass, and a back side dielectric layer 19 is formed so as to cover them. . Further, a plurality of partition walls 20 are formed in parallel with the address electrodes 18 on the back side dielectric layer 19. In addition, the shape of a partition is not restricted to this, A cross-girder-like structure may be sufficient. On the side surfaces of the back-side dielectric layer 19 and the partition 20 on each address electrode 18, one of red (R), green (G), and blue (B) phosphor layers 21 corresponding to the address electrodes 18. Is formed. A discharge cell 23 is formed in the discharge space 22 where the address electrode 18 and the display electrode pair 14 intersect.

  Next, a method for displaying an image using such a panel will be described. First, an address pulse is applied to the address electrode 18 and simultaneously, a scan pulse is applied to one of the scan electrodes 12. Then, a discharge cell at a portion where these electrodes intersect is selected, an address discharge is generated in the discharge cell, and wall charges are accumulated on the front-side dielectric layer 15 and the back-side dielectric layer 19. The voltage generated by the wall charges accumulated on the dielectric layer and the like in this manner is hereinafter abbreviated as “wall voltage”. Next, sustain pulses are alternately applied to the scan electrodes 12 and the sustain electrodes 13, that is, the display electrode pairs 14. Then, in the discharge cell in which the address discharge is generated, the wall voltage accumulated by the address discharge is added to the sustain pulse voltage applied to the display electrode pair 14 and exceeds the discharge start voltage of the discharge cell, so that the sustain discharge is generated. Then, the phosphor layer 21 is excited by vacuum ultraviolet rays generated by discharge to generate visible light. On the other hand, no sustain discharge occurs in the discharge cells where no address discharge has occurred.

Next, the arrangement of the display electrode pairs 14 which is a point of the configuration of the present invention will be described. FIG. 2A is a plan view of the panel according to the first embodiment of the present invention as viewed from the front plate side. For the following description, for convenience, the screen display area 100 for displaying an image is divided into an internal area 110 and a peripheral area 120 on the upper side and lower side of the screen. FIG. 2B is an enlarged view showing the electrode arrangement of the display electrode pair 14 in the internal region 110 of the panel, and FIG. 2C is an enlarged view showing the electrode arrangement of the display electrode pair 14 in the peripheral region 120 of the panel. FIG.

The discharge gap 30 between the scan electrode 12 and the sustain electrode 13 constituting the display electrode pair 14 and the pitch 60 of the arrangement of the display electrode pair 14 are arranged so as to have the same value over the entire screen display region 100. ing. This is because the drive voltage and the pixel pitch are made constant over the entire screen display area 100. However, in the present embodiment, the gap 40 between the adjacent display electrode pairs 14 is different between the internal region 110 and the peripheral region 120. That is, the gap 40 between the display electrode pairs 14 adjacent, in the internal region 110 narrow, has a configuration having an array of display electrode pairs 14 to be wider in the peripheral region 120. For example, in the case of a 42-inch high-definition panel (horizontal 1024 trio pitch × vertical 768 lines), the discharge gap 30 and the pitch 60 of the display electrode pair 14 are set to 80 μm and 675 μm, respectively, over the entire surface of the screen display region 100, The gap 40 between the adjacent display electrode pairs 14 is set to 200 μm in the internal region 110 and 250 μm in the peripheral region 120. The width of the peripheral area 120 is set to 20 mm for both the upper side and the lower side of the screen display area 100.

As described above, the panel according to the embodiment of the present invention has a configuration in which the gap 40 between the adjacent display electrode pairs 14 is arranged to be narrow in the internal region 110 and wide in the peripheral region 120.

Next, the reason why dielectric breakdown can be suppressed by the above configuration will be described. FIG. 3 shows a discharge cell 23 _k having a k-th (k = integer) display electrode pair 14 among a plurality of display electrode pairs 14 and an adjacent (k−1) -th display electrode pair 14. It is sectional drawing which showed typically the discharge cell 23 _k-1 which has and the discharge cell 23 _{k + 1} which has the (k + 1) th display electrode pair 14 so that the state at the time of aging discharge may be understood. In the figure, with the address electrode 18 grounded, one electrode of the display electrode pair 14, for example, the scanning electrode 12 is grounded, and the positive aging pulse voltage Vs is applied to the other electrode and the sustain electrode 13. The state immediately after is shown. Thus, when the aging discharge starts in each of the discharge cells 23 _k−1 , 23 _k , and 23 _{k + 1} , a flow of electrons and ions is generated, and the flow of these charged particles flows in the direction indicated by the thick solid line arrows. Cause the flow of. The main flow of current associated with such discharge is limited within each discharge cell, but there is a slight flow of charged particles across the discharge cells. In FIG. 3, such a current across the discharge cells is indicated by a thin solid line arrow.

  When the aging pulse applied to the display electrode pair 14 is reversed, that is, when the positive aging pulse voltage Vs is applied to the scan electrode 12 and the sustain electrode 13 is grounded, the direction of the current flow accompanying the discharge is also reversed. . In FIG. 3, the currents in this case are indicated by thick broken arrows and thin broken arrows, respectively. Therefore, if the shape of the discharge cell is completely symmetrical with respect to the display electrode pair 14 and the aging pulse applied to the display electrode pair 14 is completely the same except for the phase, the aging pulse is applied to each display electrode pair 14. By alternately applying, the charge transfer due to these currents should be canceled and there should be no net charge transfer across the discharge cells. However, if there is an asymmetry of the discharge cell such as a difference in electrode width between the scan electrode 12 and the sustain electrode 13 or an imbalance such as an impedance of a drive circuit for driving the scan electrode 12 and the sustain electrode 13, the charge due to the discharge This movement is not canceled, and a net charge movement across the discharge cells occurs. In this case, by repeatedly applying an aging pulse to the display electrode pair 14 alternately, charges accompanying net charge transfer are accumulated in each discharge cell. When charges are accumulated inside the discharge cell, the potential inside the discharge cell also changes according to the accumulation amount. When the electric potential inside the discharge cell exceeds the dielectric strength voltage of the front-side dielectric layer 15 or the back-side dielectric layer 19, dielectric breakdown occurs there.

  FIG. 4 is a diagram schematically showing an example of the amount of charge inside each discharge cell accumulated by net charge transfer across the discharge cells. The horizontal axis indicates the position of the discharge cell. The left side corresponds to the peripheral area 120 on the upper side of the screen, the right side corresponds to the peripheral area 120 on the lower side of the screen, and the center corresponds to the internal area 110. The vertical axis represents the amount of charge accumulated in the discharge cells, and is proportional to the potential inside each discharge cell.

In the figure, as a result of the net charge transfer from the lower discharge cell toward the upper discharge cell, positive charge is accumulated in the upper discharge cell of the screen display region 100, and the bottom of the screen display region 100 is shown. Two examples are shown in which negative charges accumulate in the discharge cells on the side. In the example shown by the broken line 71, the absolute value of the potential inside the discharge cell exceeds the dielectric strength voltage in the peripheral region 120 on the upper side of the screen and the peripheral region 120 on the lower side of the screen, so that dielectric breakdown occurs in the peripheral region 120. On the other hand, in the example shown by the solid line 70, the dielectric breakdown voltage is not exceeded over the entire screen display region 100, so that dielectric breakdown does not occur.

As described above, it is considered that dielectric breakdown occurs when the electric potential inside the discharge cell rises due to the net charge transfer between the discharge cells and exceeds the withstand voltage of the front-side dielectric layer 15 or the back-side dielectric layer 19. It is done. Therefore, in order to prevent dielectric breakdown, it is only necessary to suppress the net charge transfer across the discharge cells. It can be also reduced charge transfer amount of the net between the set wider gap 40 between the display electrode pairs 14 adjacent discharge cells during the display electrode pairs 14 while the pitch 60 was kept at a constant array of display electrode pairs 14 If the gap 40 is set wide, the width of the display electrode pair, that is, the effective light emitting area is also narrowed, and the luminance is lowered.

However, in the panel according to the present embodiment, since the gap 40 between the adjacent display electrode pairs 14 is set wide only in the peripheral region 120 where it is difficult to visually recognize the decrease in luminance, there is no substantial decrease in luminance. Then, the net charge transfer in the peripheral region 120 can be suppressed, and the potential increase inside the discharge cell in this region can be suppressed low. Therefore, as shown by a solid line 70 in FIG. 4, it becomes possible to suppress the potential inside the discharge cell below the withstand voltage across the entire screen display region 100, thereby suppressing dielectric breakdown and improving the manufacturing yield during aging. Can do.

  Further, according to the above configuration, the amount of charge that moves to the non-display area outside the screen display area 100 is also reduced, and thus the amount of charge that is accumulated therein is also reduced. For this reason, the dielectric breakdown due to the accumulated charge in the non-display area is also suppressed.

  The above-described increase in potential inside the discharge cell can be measured as follows. The display electrode pair corresponding to the discharge cell to be measured is floated, and an aging pulse is alternately applied to the other display electrode pairs, and aging is performed for about 30 minutes. Thereafter, the voltage of the electrode in the float state is measured using, for example, an oscilloscope. At this time, if the capacitance between the electrode and the inside of the discharge cell, the impedance of the voltage measurement system, and the like are known, the potential inside the discharge cell can be obtained.

  In the present embodiment, a panel having stripe-shaped partition walls has been described as an example, but a similar effect can be obtained even with a panel having cross-shaped partition walls. Further, it is desirable to optimize the value of the gap between the display electrode pair and the width of the peripheral region according to the shape of the discharge cell, the discharge characteristics, and the like.

(Second Embodiment)
FIG. 5 is a plan view showing the electrode arrangement of the panel according to the second embodiment of the present invention. In addition, about what has the structure similar to 1st Embodiment, the same code | symbol is attached | subjected and the description is abbreviate | omitted.

The difference from the first embodiment is that in the peripheral region 120, the gap 40 between the adjacent display electrode pairs 14 is gradually increased from the inner region 110 side toward the end of the screen display region 100. It is a point. Specifically, for example, when a 42-inch high-definition panel, a width of 200μm gap 40 between the display electrode pairs 14 of the inner region 110, 2 [mu] m gap 40 between the display electrode pairs 1 4 in the peripheral region 120 followed by The configuration was made wider.

  That is, the gap 40 between the display electrode pairs 14 at the boundary between the inner region 110 and the peripheral region 120 is 202 μm, the gap 40 between the display electrode pairs 14 in the subsequent peripheral region 120 is 204 μm, and the adjacent display electrode pair 14. The gap 40 therebetween is increased by 206 μm by 2 μm, and the gap 40 between the outermost display electrode pair 14 is 260 μm. Here, the width of the peripheral region 120 is about 20 mm, and 30 discharge cells are arranged in the meantime.

As described above, in the present embodiment, in the peripheral region 120, the gap 40 between the adjacent display electrode pairs 14 is gradually increased from the inner region 110 side toward the end of the screen display region 100. Yes. With this configuration, the width of the display electrode pair 14, that is, the effective light emitting area continuously decreases, so that the luminance change becomes smooth and the boundary between the inner region 110 and the peripheral region 120 is defined. Since it can be made inconspicuous, image display quality is not impaired.

In the above-described embodiment, the gap 40 between the display electrode pairs 14 in the peripheral region 120 has been described to uniformly increase by 2 μm. However, the present invention is not limited to this, and for example, 1 μm or 3 μm. Further, the number of the gaps 40 between the display electrode pairs 14 may be the same value for several pairs. In addition, the gap 40 between the display electrode pairs 14 may be arranged to increase in a quadratic function or S-shaped function.

  Furthermore, in the above embodiment, specific numerical values have been described using an example of a 42-inch high-definition panel. However, these numerical values may be optimized according to the shape of the discharge cell and driving conditions. desirable.

  The present invention has the effect of suppressing the dielectric breakdown of the front-side dielectric layer and the back-side dielectric layer that occurs during aging, and improving the manufacturing yield during aging, and has a large screen, a thin and lightweight display device It is useful as a plasma display panel used in the above.

Sectional perspective view which shows schematic structure of the panel in the 1st Embodiment of this invention (A) is a plan view of the panel according to the first embodiment of the present invention as viewed from the front plate side. (B) is an enlarged view showing the electrode arrangement of the display electrode pair in the inner region of the panel. Enlarged view showing the electrode arrangement of the display electrode pair in the peripheral region of Cross-sectional view schematically showing the discharge cell so that the state during aging discharge can be understood The figure which shows typically an example of the electric charge amount inside each discharge cell accumulate | stored by the net charge transfer across discharge cells The top view which shows the electrode arrangement | positioning of the panel in the 2nd Embodiment of this invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Front plate 2 Back plate 12 Scan electrode 13 Sustain electrode 14 Display electrode pair 15 Front side dielectric layer 18 Address electrode 19 Back side dielectric layer 20 Bulkhead 22 Discharge space 23 Discharge cell 30 Discharge gap 40 (between display electrode pair) Gap 60 (Place of display electrode pair) 100 Screen display area 110 Internal area 120 Peripheral area

Claims (2)

A front plate having a plurality of pairs of display electrodes consisting of scan electrodes and sustain electrodes arranged in parallel, and a front-side dielectric layer covering the display electrode pairs;
A plurality of address electrodes arranged in a direction intersecting the display electrode pair, and a back plate having a back side dielectric layer covering the address electrodes,
The plasma display panel is provided with a screen display region for displaying an image, the rear plate being disposed so as to face the front plate, and the pitch of the arrangement of the display electrode pairs is the same over the entire screen display region. ,
The boundary between the inner region of the screen display region and the peripheral region is located between the adjacent display electrode pairs, and the gap between the adjacent display electrode pairs is the inner region of the screen display region in the peripheral region of the screen display region. A plasma display panel that is wider than the area. In the peripheral region of the screen display region, the gap between the adjacent display electrode pairs is gradually increased from the inner region side of the screen display region toward the end of the screen display region. The plasma display panel according to claim 1.

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