JP4697579B2 - Power converter and phase loss detection method - Google Patents

Power converter and phase loss detection method Download PDF

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JP4697579B2
JP4697579B2 JP2004354008A JP2004354008A JP4697579B2 JP 4697579 B2 JP4697579 B2 JP 4697579B2 JP 2004354008 A JP2004354008 A JP 2004354008A JP 2004354008 A JP2004354008 A JP 2004354008A JP 4697579 B2 JP4697579 B2 JP 4697579B2
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diode
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JP2006166590A (en
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雅人 樋口
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Yaskawa Electric Corp
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Description

本発明は、欠相検出手段をもった電力変換装置とその欠相検出方法に関する。   The present invention relates to a power conversion device having phase loss detection means and a phase loss detection method thereof.

従来技術では、電力変換装置の各出力相の電流を計測し、各相電流状態が正常であるかどうかを判別し、欠相と判定している。   In the prior art, the current of each output phase of the power conversion device is measured to determine whether each phase current state is normal, and is determined to be a missing phase.

従来の欠相検出手段をもった電力変換装置の例には特許文献1がある。図3は、従来技術を示したものであり、各出力相の出力電流を電流検出器であるCTで検出する場合の電力変換装置である。図中のPおよびNは直流電源の正極および負極をあらわし、21,22,23は直流電源の正極側に接続された半導体スイッチング素子、27,28,29は各半導体スイッチング素子に逆並列接続された還流ダイオードである。24,25,26は直流電源負極側に接続された半導体スイッチング素子、30,31,32は各半導体スイッチング素子に逆並列接続された還流ダイオードである。33,34,35は、各出力相の電流を検出するためのCTであり、CT出力信号を比較演算回路37,38,39と、極性演算回路40,41,42と、AND回路43,44,45を介し判定演算回路46へと接続される欠相検出回路を備え、CT33,34,35の検出値の零点通過点近傍にAND回路43,44,45により生成される信号のパルス幅を計測し、この計測値が所定の値を超えたことを判定演算回路46で検知し、欠相信号を出力する。36は、この電力変換装置に接続された負荷である。CTの電流検出回路とCTを貫通する電力変換装置の出力線は、CT内部で絶縁を施した構造であるため、CTと演算回路の間に絶縁を目的とした回路を設ける必要はない。   Patent Document 1 is an example of a power converter having a conventional phase loss detection means. FIG. 3 shows a conventional technique, which is a power conversion apparatus in the case where the output current of each output phase is detected by a CT that is a current detector. In the figure, P and N represent the positive and negative electrodes of the DC power supply, 21, 22 and 23 are semiconductor switching elements connected to the positive electrode side of the DC power supply, and 27, 28 and 29 are connected in reverse parallel to the respective semiconductor switching elements. Freewheeling diode. Reference numerals 24, 25, and 26 denote semiconductor switching elements connected to the negative side of the DC power source, and reference numerals 30, 31, and 32 denote free-wheeling diodes connected in reverse parallel to the respective semiconductor switching elements. Reference numerals 33, 34, and 35 denote CTs for detecting the currents of the respective output phases. The CT output signals are converted into comparison operation circuits 37, 38, 39, polarity operation circuits 40, 41, 42, and AND circuits 43, 44. , 45 is connected to the judgment operation circuit 46 via the phase detection circuit 46, and the pulse widths of the signals generated by the AND circuits 43, 44, 45 in the vicinity of the zero point passing points of the detected values of CT33, 34, 35 are provided. Measurement is performed, and the determination calculation circuit 46 detects that the measured value exceeds a predetermined value, and an open phase signal is output. Reference numeral 36 denotes a load connected to the power converter. Since the CT current detection circuit and the output line of the power converter that penetrates the CT are insulated from each other inside the CT, there is no need to provide a circuit for insulation between the CT and the arithmetic circuit.

図4は、各出力相の電流をシャント抵抗の電圧降下を利用し電流検出する方式である。
図4は、図3の21〜32までの素子及び回路を省略しており、51、52、53は、各出力相の電流を検出するためのシャント抵抗、54はこの電力変換装置に接続された負荷、55、56、57は各シャント抵抗の両端子間電圧を増幅する増幅器、58、59、60は各出力相の電位を基準とした55、56、57の増幅器の出力信号を、基準電位が異なる演算器61へ伝送するための絶縁型電圧変換器、61は、前記絶縁型電圧変換器から出力されたシャント抵抗端子電圧増幅値を受け、欠相判定を行う演算器である。
特開2001−309669号公報(8頁、図1)
FIG. 4 shows a method of detecting the current of each output phase using the voltage drop of the shunt resistor.
4 omits elements and circuits up to 21 to 32 in FIG. 3, 51, 52, and 53 are shunt resistors for detecting the current of each output phase, and 54 is connected to this power converter. 55, 56, 57 are amplifiers that amplify the voltage between both terminals of each shunt resistor, 58, 59, 60 are reference signals for the output signals of the amplifiers 55, 56, 57 based on the potential of each output phase. An insulated voltage converter 61 for transmitting to the computing unit 61 having a different potential is a computing unit that receives the shunt resistance terminal voltage amplification value output from the insulated voltage converter and performs the phase loss determination.
JP 2001-309669 A (page 8, FIG. 1)

従来技術のように電流検出器を利用し出力欠相検出を行う場合、全ての出力相の電流を検出する必要があるため、どの相にも高価な電流検出器を備える必要がある。例えば図3のCT方式では、CTのパッケージサイズが大きい、CT部品単価が高価、図4のシャント抵抗方式では、回路構成上部品点数が多く実装面積が大、部品合計価格が高価、絶縁型電圧変換器としてフォトカプラを使用すると寿命が短い、部品単価が高価のため部品合計価格がさらにアップするという問題がある。   When performing output phase loss detection using a current detector as in the prior art, it is necessary to detect the current of all output phases, and therefore it is necessary to provide an expensive current detector for every phase. For example, in the CT method of FIG. 3, the CT package size is large and the CT component unit price is expensive. In the shunt resistor method of FIG. 4, the number of parts is large due to the circuit configuration, the mounting area is large, the total component price is expensive, and the insulation voltage When a photocoupler is used as a converter, there is a problem in that the lifetime is short and the total unit price is further increased due to the high cost of parts.

本発明はこのような問題点に鑑みてなされたものであり、部品実装面積が小さく安価な回路構成の出力欠相検出手段を搭載した電力変換装置と欠相検出方法を提供することを目的とする。   The present invention has been made in view of such problems, and an object of the present invention is to provide a power conversion device equipped with an output phase loss detection means having a small component mounting area and an inexpensive circuit configuration, and a phase loss detection method. To do.

請求項1記載の本発明は、半導体スイッチング素子と逆並列接続されたダイオードとの並
列接続体を2個直列接続してなる直列接続体の接続部を出力端子としてなるアームを1相
とし、アームを直流電源の正極と負極間に2個以上並列接続して多相とし、各半導体スイ
ッチング素子をオン・オフ制御する電力変換装置において、出力端子電位の状態により負荷との接続が断たれた出力欠相と判定する欠相検出手段を備えるようにしたものである。
According to the first aspect of the present invention, an arm having an output terminal as a connection portion of a series connection body in which two parallel connection bodies of a semiconductor switching element and a diode connected in reverse parallel are connected in series is defined as an arm. In a power converter that controls on / off of each semiconductor switching element by connecting two or more of them in parallel between the positive and negative electrodes of a DC power supply, the output that is disconnected from the load depending on the state of the output terminal potential Phase loss detection means for determining phase loss is provided.

請求項2記載の本発明は、請求項1の電力変換装置において、欠相検出手段は、出力端
子電位が出力周波数の1周期内で、直流電源の負極の電位と、直流電源の負極の電位よりダイオードの順電圧降下分だけ低い電位との間の第1の所定電位以下の電位が現れないとき出力欠相と判定するようにしたものである。
According to a second aspect of the present invention, there is provided the power converter according to the first aspect, wherein the phase loss detection means is configured such that the output terminal potential is within one cycle of the output frequency, and the negative potential of the direct current power source and the negative potential of the direct current power source. When no potential lower than the first predetermined potential between the potential lower than the forward voltage drop of the diode appears, it is determined that the output phase is missing.

請求項3記載の本発明は、請求項1記載の電力変換装置において、欠相検出手段は、出力
端子電位が出力周波数の1周期内で、直流電源の正極の電位と、直流電源の正極の電位よりダイオードの順電圧降下分だけ高い電位との間の第2の所定電位以上の電位が現れないとき出力欠相と判定するようにしたものである。
According to a third aspect of the present invention, there is provided the power converter according to the first aspect, wherein the phase loss detecting means is configured such that the output terminal potential is within one cycle of the output frequency and the positive potential of the direct current power supply When no potential higher than the second predetermined potential between the potential higher than the potential by the forward voltage drop of the diode does not appear, it is determined that the output phase is missing.

請求項記載の本発明は、請求項1記載の電力変換装置において、欠相検出手段は、出
力端子に直列に接続したダイオードと抵抗とコンデンサと、コンデンサの電位を所定電位
と比較する比較器からなるようにしたものである。
According to a fourth aspect of the present invention, there is provided the power converter according to the first aspect, wherein the phase loss detecting means includes a diode, a resistor, a capacitor connected in series to the output terminal, and a comparator for comparing the potential of the capacitor with a predetermined potential. It is made up of.

請求項記載の本発明は、請求項記載の電力変換装置において、比較器のパルス出力
が出力周波数の1周期中にローレベルかハイレベルで飽和した時、またはパルス出力が歯
抜け状態となった時、負荷との接続が断たれた出力欠相と判定するようにしたものである。
According to a fifth aspect of the present invention, in the power converter according to the fourth aspect , when the pulse output of the comparator is saturated at a low level or a high level during one cycle of the output frequency, or the pulse output When this happens, it is determined that the output phase has been disconnected from the load .

請求項記載の本発明は、請求項1記載の電力変換装置において、欠相検出手段を各相
に設けるようにしたものである。
According to a sixth aspect of the present invention, in the power conversion device according to the first aspect, an open phase detecting means is provided in each phase.

請求項記載の本発明は、半導体スイッチング素子と逆並列接続されたダイオードとの
並列接続体を2個直列接続してなる直列接続体の接続部を出力としてなるアームを1相と
し、アームを直流電源の正極と負極間に2個以上並列接続して多相とし、各半導体スイッ
チング素子をオン・オフ制御する電力変換装置の欠相検出方法において、出力端子電位を
所定の時間、前記直流電源の負極の電位と、前記直流電源の負極の電位より前記ダイオードの順電圧降下分だけ低い電位との間の第1の所定の電圧以下の電位が現れることを検出し、及び出力端子電位を所定の時間、前記直流電源の正極の電位と、前記直流電源の正極の電位より前記ダイオードの順電圧降下分だけ高い電位との間の第2の所定の電圧以上の電位が現れることを検出した場合を正常と判定し、前記出力端子電位が第1の所定の電圧以下の電位が現れず、かつ、前記第1の所定電圧よりも高い第2の所定電圧以上の電位が現れないとき負荷との接続が断たれた出力欠相と判定するようにしたものである。
According to the seventh aspect of the present invention, an arm that outputs a connection portion of a series connection body formed by connecting two parallel connection bodies of a semiconductor switching element and a diode connected in antiparallel in series is set as one phase, connected in parallel two or more between the positive electrode and the negative electrode of the DC power source and polyphase, in open phase detection method of a power conversion device for controlling on and off the semiconductor switching devices, the time the output terminal potential of the predetermined, the DC power supply That a potential equal to or lower than a first predetermined voltage between the negative electrode potential and a potential lower than the negative electrode potential of the DC power source by a forward voltage drop of the diode appears, and the output terminal potential is set to a predetermined value. time, the potential of the positive electrode of the DC power source, a second predetermined field which is detected that the voltage or potential appearing between the forward voltage drop by high potential of the diode than the potential of the positive electrode of the DC power source Was determined to be normal, the output terminal potential does not appear the first predetermined voltage potential below, and the load when said first high second predetermined voltage or more potential than the predetermined voltage does not appear It is determined that the output phase is disconnected .

本発明によれば、部品実装面積が小さく安価な回路構成の出力欠相検出手段と出力欠相検出方法を提供できる。   According to the present invention, it is possible to provide an output phase loss detection means and an output phase loss detection method that have a small component mounting area and an inexpensive circuit configuration.

以下、本発明の実施の形態について図1を参照して説明する。   Hereinafter, an embodiment of the present invention will be described with reference to FIG.

請求項1に記載の出力端子電位の状態より出力欠相を判別できる原理から説明する。
図2は、図3の出力相の1回路分を抜き出した図である。半導体スイッチング素子2がOFF状態、1がON状態でかつ1を介して直流電源正極のP極から出力端子へ電流14が流れ出る場合、1がオフすると、出力端子に接続された負荷のインダクタンス特性により還流ダイオード4を介して直流電源負極のN極から出力端子へ電流15が流れ出る。この時、N極電位を基準とし出力端子電圧を見ると、還流ダイオードの順電圧降下分をVfとするとN極電位よりVfだけ低下する。出力が欠相し負荷との接続が断たれた場合、電流14が流れないため負荷のインダクタンス特性から生じる電流15も流れず、N極電位を基準とした出力端子電圧は不定電圧、もしくは1がONの時は半導体スイッチング素子のオン電圧をVceonとするとP極電位Vp−Vceon、2がONの時はVceonの電位が現れる。欠相の場合は、1及び2には電流は殆ど流れないため前記Vceonは極小となり、1がONの時はP極電位近傍、2がONの時はゼロ近傍の電位が現れ、N極電位より低下する現象は無くなる。この現象を利用すれば、出力欠相検出が可能となる。第1の所定電圧はN極電位を基準として0vよりも小さく−Vfよりも大きく設定し、第2の所定電圧はP極電位を基準として0Vよりも大きくVfよりも小さく設定する。
An explanation will be given from the principle that the output phase loss can be determined from the state of the output terminal potential described in claim 1.
FIG. 2 is a diagram in which one circuit of the output phase of FIG. 3 is extracted. When the semiconductor switching element 2 is in the OFF state, 1 is in the ON state, and the current 14 flows from the P pole of the DC power source positive electrode to the output terminal via 1, when 1 is turned off, the inductance characteristic of the load connected to the output terminal A current 15 flows from the N pole of the DC power supply negative electrode to the output terminal via the reflux diode 4. At this time, looking at the output terminal voltage with reference to the N-pole potential, if the forward voltage drop of the freewheeling diode is Vf, it is lower than the N-pole potential by Vf. When the output is lost and the connection with the load is disconnected, the current 14 does not flow, so the current 15 resulting from the inductance characteristics of the load does not flow, and the output terminal voltage based on the N pole potential is an indefinite voltage or 1 When the ON voltage of the semiconductor switching element is Vceon when ON, the P-pole potential Vp−Vceon and 2 when VON is ON, the potential of Vceon appears. In the case of an open phase, almost no current flows in 1 and 2, so that Vceon is minimal, when 1 is ON, near the P pole potential, and when 2 is ON, a potential near zero appears, and the N pole potential. The phenomenon of lowering is eliminated. If this phenomenon is used, output phase loss can be detected. The first predetermined voltage is set to be smaller than 0 V and larger than −Vf with respect to the N pole potential, and the second predetermined voltage is set to be larger than 0 V and smaller than Vf with the P pole potential as a reference.

次に出力欠相を検出する方法について説明する。
図1は、出力端子電圧を監視する実施例を示した図である。出力端子に出力欠相検出器に含まれるダイオード5を接続することにより、簡単に出力端子電圧の状態を検出することが可能である。出力欠相検出器はN極電位を基準電位とした回路とすると、出力端子電位の変化に対し、図中のVisの電位も変化する。以下に、出力端子電位とVisの電位の関係について、3パターン説明する。
パターン1は半導体スイッチング素子2に電流が流れ、出力端子電圧にほぼN極電位が現れた場合で、ダイオード5の順電圧降下をVd、抵抗7と8の抵抗値をR7,R8とした場合、Visは((Vceon+Vd)・R8+5・R7))/(R7+R8)になる。
パターン2は還流ダイオード4に電流が流れ、出力端子電位に還流ダイオード4の順電圧分の負電位−Vfが現れた場合で、Visの電位は前記出力端子電圧がN極電位の場合よりさらに還流ダイオード4の順電圧だけ低下するので、Visは((−Vf+Vd)・R8+5・R7)/(R7+R8)になる。
パターン3は半導体スイッチング素子1に電流が流れ、出力端子電位にほぼP極電位が現れた場合で、ダイオード5の逆電圧特性により抵抗7に殆ど電流がながれないため、Visは抵抗8を介した直流電源電圧の+5Vとなる。
前記3パターンでVis電位の低い順番に並べると、パターン2→パターン1→パターン3となる。パターン2とパターン1のVisの中間電位(R8・(−Vf+2・Vd+Vceon)+10・R7)/2・(R7+R8)を比較12の−側に、Visを+側に入力すると、パターン2の時の比較器12の出力は、ローレベル出力になり、パターン1及び3の時の比較器12の出力は、ハイレベル出力になる。
半導体スイッチング素子のオンオフ時のdi/dtと配線のインダクタンスでノイズ電圧が発生するので、欠相検出の誤動作を防止するため、抵抗8とコンデンサ6の充電時定数を長めに、抵抗7とコンデンサ6の放電時定数を短めに設定してノイズ電圧をフィルタリングする。出力電流Ioutが正弦波出力の場合、図1の下方の図の通り、比較器12の出力Vkoは出力電流周波数に同調したパルス出力となる。
電力変換装置が出力運転中にも関わらず比較器12の出力Vkoが常にハイレベルで飽和状態となった時、出力欠相状態と判別できる。
Next, a method for detecting output phase loss will be described.
FIG. 1 is a diagram showing an embodiment in which the output terminal voltage is monitored. By connecting the diode 5 included in the output phase loss detector to the output terminal, it is possible to easily detect the state of the output terminal voltage. If the output phase loss detector is a circuit using the N-pole potential as a reference potential, the potential of Vis in the figure also changes as the output terminal potential changes. Hereinafter, three patterns of the relationship between the output terminal potential and the Vis potential will be described.
Pattern 1 is when a current flows through the semiconductor switching element 2 and an N-pole potential appears in the output terminal voltage. When the forward voltage drop of the diode 5 is Vd and the resistance values of the resistors 7 and 8 are R7 and R8, Vis becomes ((Vceon + Vd) · R8 + 5 · R7)) / (R7 + R8).
Pattern 2 is a case where a current flows through the freewheeling diode 4 and a negative potential −Vf corresponding to the forward voltage of the freewheeling diode 4 appears in the output terminal potential. The Vis potential is further returned as compared with the case where the output terminal voltage is the N-pole potential. Since the voltage drops by the forward voltage of the diode 4, Vis becomes ((−Vf + Vd) · R8 + 5 · R7) / (R7 + R8).
Pattern 3 is a case where a current flows through the semiconductor switching element 1 and a P-pole potential appears at the output terminal potential. Since almost no current flows through the resistor 7 due to the reverse voltage characteristics of the diode 5, Vis passes through the resistor 8. The DC power supply voltage is + 5V.
If the three patterns are arranged in the order of the low Vis potential, pattern 2 → pattern 1 → pattern 3 is obtained. If the intermediate potential (R8 · (−Vf + 2 · Vd + Vceon) + 10 · R7) / 2 · (R7 + R8) between pattern 2 and pattern 1 is input to the negative side of comparison 12 and Vis is input to the positive side, The output of the comparator 12 is a low level output, and the output of the comparator 12 at the time of patterns 1 and 3 is a high level output.
Since noise voltage is generated due to di / dt and wiring inductance when the semiconductor switching element is turned on and off, in order to prevent malfunction of phase loss detection, the charging time constant of the resistor 8 and the capacitor 6 is lengthened, and the resistor 7 and the capacitor 6 The noise voltage is filtered by setting a short discharge time constant. When the output current Iout is a sine wave output, the output Vko of the comparator 12 is a pulse output tuned to the output current frequency as shown in the lower diagram of FIG.
When the output Vko of the comparator 12 is always at a high level and saturated even though the power conversion device is in output operation, it can be determined that the output is in an open phase state.

図5は3相電力変換器のU相が欠相した時のシミュレーションであり、図6は時間軸を拡大したものである。Vsは比較器の負端子に入力される基準電圧で比較器の電源5Vから抵抗分割により、0.5Vを得ている。また、Visは電力変換器の出力電圧をフォワードドロップVf0.2Vのダイオード、抵抗330Ω、コンデンサ0.01μFで受けたコンデンサの電圧である。図5の中央付近でU相が欠相し、これ以後比較器の出力がプラス側に飽和している。欠相前は比較器の出力は出力1周期内でLowレベルになるが欠相以後はLowレベルになることはない。   FIG. 5 is a simulation when the U phase of the three-phase power converter is lost, and FIG. 6 is an enlarged view of the time axis. Vs is a reference voltage input to the negative terminal of the comparator, and 0.5 V is obtained from the power source 5 V of the comparator by resistance division. Vis is a voltage of a capacitor that receives the output voltage of the power converter with a diode having a forward drop Vf of 0.2 V, a resistance of 330Ω, and a capacitor of 0.01 μF. In the vicinity of the center of FIG. 5, the U phase is lost, and the output of the comparator is saturated to the positive side thereafter. Before the phase loss, the output of the comparator becomes a low level within one output cycle, but does not become a low level after the phase loss.

図7は、出力欠相検出方法を示すフローチャートである。図7において、ステップST1は予め決めた所定の時間を計測し、所定の時間が経過したら次のステップST2に進む。ステップST2では、所定の時間内に出力電圧があらかじめ決めた第1の所定の電圧よりも下がったかどうか判定する。一度でも下がれば正常である。下がらなかった場合は次のステップST3に進む。ステップST3では、出力電圧が第2の所定の電圧以上に上がったかどうか判定する。一度でも上がれば正常である。上がらなかった場合は欠相と判定する。
このように、電流検出器を使用せずに簡単な回路を追加することで出力欠相検出が可能である。
FIG. 7 is a flowchart showing an output phase loss detection method. In FIG. 7, step ST1 measures a predetermined time, and proceeds to the next step ST2 when the predetermined time has elapsed. In step ST2, it is determined whether or not the output voltage has fallen below a predetermined first voltage within a predetermined time. It is normal if it goes down even once. If not, the process proceeds to the next step ST3. In step ST3, it is determined whether or not the output voltage has risen above a second predetermined voltage. It is normal if it goes up even once. If it does not rise, it is determined that the phase is missing.
In this way, output phase loss can be detected by adding a simple circuit without using a current detector.

本発明は、工作機械、ロボット、一般産業機械などインバータおよびサーボが使用される用途に適用できる。   The present invention can be applied to applications in which inverters and servos are used, such as machine tools, robots, and general industrial machines.

本発明の実施例Examples of the present invention 本発明の欠相検出器原理説明図Principle of phase loss detector of the present invention 従来の欠相検出回路(特許文献1に関する図)Conventional phase loss detection circuit (Figure relating to Patent Document 1) 従来の欠相検出回路Conventional phase loss detection circuit 本発明をシミュレーションした図The figure which simulated this invention 本発明をシミュレーションした図Figure simulating the present invention 本発明の出力欠相検出方法のフローチャートFlowchart of output phase loss detection method of the present invention

符号の説明Explanation of symbols

1、2 半導体スイッチング素子
3、4 還流ダイオード
5 ダイオード
6 コンデンサ
7〜11 抵抗器
12 比較器
13 演算器
14 P極から半導体スイッチング素子1を介して流れ出る出力電流
15 N極から還流ダイオード4を介して流れ出る出力電流
21〜26 半導体スイッチング素子
27〜32 還流ダイオード
33〜35 電流検出用CT
36 負荷機
37〜39 比較演算回路
40〜42 極性演算回路
43〜45 AND回路
46 判定演算回路
51〜53 シャント抵抗
54 負荷機
55〜57 増幅器
58〜60 絶縁型電圧変換器
61 A/Dコンバータまたはパルス列入力機能内蔵演算器
DESCRIPTION OF SYMBOLS 1, 2 Semiconductor switching element 3, 4 Free-wheeling diode 5 Diode 6 Capacitor 7-11 Resistor 12 Comparator 13 Calculator 14 Output current 15 flowing out from P pole through the semiconductor switching element 1 From N pole through free-wheeling diode 4 Flowing output currents 21 to 26 Semiconductor switching elements 27 to 32 Freewheeling diodes 33 to 35 Current detection CT
36 Load machines 37 to 39 Comparison operation circuits 40 to 42 Polarity operation circuits 43 to 45 AND circuit 46 Determination operation circuits 51 to 53 Shunt resistor 54 Load machines 55 to 57 Amplifier 58 to 60 Insulation type voltage converter 61 A / D converter or Pulse train input function built-in calculator

Claims (7)

半導体スイッチング素子と逆並列接続されたダイオードとの並列接続体を2個直列接続してなる直列接続体の接続部を出力端子としてなるアームを1相とし、前記アームを直流電源の正極と負極間に2個以上並列接続して多相とし、前記各半導体スイッチング素子をオン・オフ制御する電力変換装置において、
前記アームの前記半導体スイッチング素子をオン・オフ制御中に、前記出力端子電位の状態により前記出力端子と負荷とが接続されているか否かを検出して、接続されていない場合を出力欠相と判定する欠相検出手段を備えることを特徴とする電力変換装置。
An arm having a connection part of a series connection body formed by connecting two parallel connection bodies of a semiconductor switching element and an anti-parallel connected diode in series as an output terminal is defined as one phase, and the arm is connected between a positive electrode and a negative electrode of a DC power source. In a power converter for controlling on / off of each semiconductor switching element by connecting two or more in parallel to form a multi-phase,
During the on / off control of the semiconductor switching element of the arm, it is detected whether or not the output terminal and the load are connected according to the state of the output terminal potential. A power conversion device comprising: a phase loss detection unit for determining.
前記欠相検出手段は、前記出力端子電位が出力周波数の1周期内で、前記直流電源の負極の電位と、前記直流電源の負極の電位より前記ダイオードの順電圧降下分だけ低い電位との間の第1の所定電位以下の電位が現れないとき前記出力欠相と判定することを特徴とする請求項1記載の電力変換装置。 The phase loss detection means is configured such that the output terminal potential is between the negative electrode potential of the DC power supply and a potential lower by the forward voltage drop of the diode than the negative electrode potential of the DC power supply within one cycle of the output frequency. The power conversion device according to claim 1, wherein the output phase loss is determined when a potential equal to or lower than the first predetermined potential does not appear. 前記欠相検出手段は、前記出力端子電位が出力周波数の1周期内で、前記直流電源の正極の電位と、前記直流電源の正極の電位より前記ダイオードの順電圧降下分だけ高い電位との間の第2の所定電位以上の電位が現れないとき前記出力欠相と判することを特徴とする請求項1記載の電力変換装置。 The phase loss detection means is configured such that the output terminal potential is between a positive electrode potential of the DC power supply and a potential higher than the positive electrode potential of the DC power supply by a forward voltage drop within one cycle of the output frequency. second power converter according to claim 1, characterized in that the output phase and determine the constant time does not appear the predetermined potential above the potential of. 前記欠相検出手段は、前記出力端子に直列に接続したダイオードと抵抗とコンデンサと、前記コンデンサの電位を所定の電圧と比較する比較器からなることを特徴とする請求項1記載の電力変換装置。   2. The power conversion device according to claim 1, wherein the phase loss detection means includes a diode, a resistor, a capacitor connected in series to the output terminal, and a comparator that compares the potential of the capacitor with a predetermined voltage. . 前記欠相検出手段は、前記比較器のパルス出力が出力周波数の1周期中にローレベルがハイレベルで飽和した時、またはパルス出力が歯抜け状態となった時、前記出力端子と負荷との接続されていない出力欠相と判定することを特徴とする請求項記載の電力変換装置。 The open phase detection means, when when the low level during one period of the pulse outputs output frequency of the comparator is saturated at a high level, or pulse output becomes toothless state, and said output terminal and the load The power conversion device according to claim 4, wherein it is determined that the output phase is not connected . 前記欠相検出手段を各相に設けたことを特徴とする請求項1記載の電力変換装置。   The power conversion device according to claim 1, wherein the phase loss detection means is provided for each phase. 半導体スイッチング素子と逆並列接続されたダイオードとの並列接続体を2個直列接続してなる直列接続体の接続部を出力端子としてなるアームを1相とし、前記アームを直流電源の正極と負極間に2個以上並列接続して多相とし、前記各半導体スイッチング素子をオン・オフ制御する電力変換装置の欠相検出方法において、
出力端子電位を所定の時間、第1の所定の電圧以上の電位が現れることを検出した場合を正常と判定し、前記出力端子電位が、前記直流電源の負極の電位と、前記直流電源の負極の電位より前記ダイオードの順電圧降下分だけ低い電位との間の第1の所定の電圧以下の電位が現れず、かつ、前記直流電源の正極の電位と、前記直流電源の正極の電位より前記ダイオードの順電圧降下分だけ高い電位との間の第2の所定電圧以上の電位が現れないとき前記出力端子と負荷とが接続されない出力欠相と判定することを特徴とする欠相検出方法。
An arm having a connection part of a series connection body formed by connecting two parallel connection bodies of a semiconductor switching element and an anti-parallel connected diode in series as an output terminal is defined as one phase, and the arm is connected between a positive electrode and a negative electrode of a DC power source. In the method for detecting the phase loss of the power converter for controlling the on / off of each semiconductor switching element by connecting two or more in parallel to each other to form a multi-phase,
The output terminal potential is determined to be normal when it is detected that a potential equal to or higher than the first predetermined voltage appears for a predetermined time, and the output terminal potential is the negative potential of the DC power source and the negative polarity of the DC power source. A potential lower than the first predetermined voltage between the potential of the diode and the potential lower than the potential of the diode by the forward voltage drop does not appear, and the potential of the positive electrode of the DC power supply and the potential of the positive electrode of the DC power supply An open phase detection method comprising: determining that an output open phase is not connected between the output terminal and a load when a potential equal to or higher than a second predetermined voltage between potentials higher by a forward voltage drop of the diode does not appear.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001309669A (en) * 2000-04-20 2001-11-02 Fuji Electric Co Ltd Phase failure sensing method for voltage source type inverter and its circuit
JP2002180895A (en) * 2000-12-14 2002-06-26 Mitsubishi Electric Corp Abnormality detector of on-vehicle electric load driving system
JP2004088861A (en) * 2002-08-26 2004-03-18 Toshiba Corp Power conversion device

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JP2001309669A (en) * 2000-04-20 2001-11-02 Fuji Electric Co Ltd Phase failure sensing method for voltage source type inverter and its circuit
JP2002180895A (en) * 2000-12-14 2002-06-26 Mitsubishi Electric Corp Abnormality detector of on-vehicle electric load driving system
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