JP4694524B2 - Isolated analog input device - Google Patents

Description

  The present invention relates to an isolated analog input device used in an analog signal acquisition device that removes the influence of a ground of a signal source and collects an analog signal at low cost.

  In order to remove the influence of the ground of the signal source and collect an analog signal at low cost, an analog signal collecting apparatus using an isolated analog input device in which each point of the analog signal is insulated from the ground has been conventionally used.

  Insulated analog input devices used in conventional analog signal acquisition devices input analog signals isolated from the ground, so it is necessary to add analog signals choppered with FET switches to the primary side of the analog signal isolation transformer. There is a method in which the primary side of the drive insulating transformer is driven during the period in which the FET switch is driven.

  For example, Patent Document 1 shows a configuration of a primary side FET switch of various analog signal isolation transformers, and also shows that a drive isolation transformer is pulse-driven. Japanese Patent Application Laid-Open No. 2004-259561 discloses that an FET switch is inserted in each line of an analog differential signal to drive a negative pulse and a positive pulse corresponding to the analog signal voltage.

Japanese Patent Publication No. 60-10449 JP 58-99013 A

  However, the conventional isolated analog input device requires a drive pulse for a certain period necessary for obtaining a pulse voltage corresponding to the analog signal voltage and performing stable AD conversion. On the other hand, when the drive insulation transformer is downsized, the sag becomes large, and when the drive insulation transformer is further downsized, the transformer causes magnetic saturation, and analog data cannot be normally collected. Due to the miniaturization of the transformer, it has enough voltage to exceed the threshold voltage of the FET switch at the start of driving, but in the latter half of driving, the voltage drops due to saturation of the sag and transformer and cannot exceed the threshold voltage, and the FET switch can be turned on. It will disappear.

  Further, if the drive time of the transformer is simply shortened, the pulse width of the analog signal is narrowed, so that the response time of the connected amplifier is insufficient, so that the settling cannot be performed sufficiently and the AD conversion accuracy is deteriorated.

  The present invention has been made to solve the above-described problems, and provides a small and highly accurate isolated analog input device that does not cause magnetic saturation even when an ultra-small transformer is used and has a wide operating temperature range. The purpose is to do.

  An insulated analog input device according to the present invention is an insulated analog input device for isolating and driving an FET provided on the primary side of an analog signal insulating transformer to which an analog signal is input. A drive isolation transformer to which a divided drive pulse train is supplied and a drive winding transformer connected to the secondary winding side of the drive isolation transformer to restore the output from the drive isolation transformer to a predetermined value between the gate and source of the FET And a pulse restoration circuit for supplying the drive pulse.

  According to the present invention, the drive pulse is divided into a plurality of pulse trains and applied to the transformer, so that even when an ultra-small transformer is used, magnetic saturation does not occur, and a small and highly accurate isolated analog input with a wide operating temperature range A device can be obtained.

Embodiment 1 FIG.
1 is a block diagram showing an isolated analog input device according to Embodiment 1 of the present invention.
The isolated analog input device shown in FIG. 1 supplies a drive pulse to an FET 2 (field effect transistor) provided on the primary side of an analog signal insulating transformer T2 to which an analog signal from a signal source Va is input. FET 1 that is turned ON / OFF according to the generation timing of a drive pulse train divided into a plurality of pulses output from the plurality of pulse generation circuits 1, and a drive insulation transformer T1 that is excited and controlled according to ON / OFF from FET 1. A pulse restoration circuit 2 is provided that applies the output V2 restored by restoring the output pulse V1 from the transformer T1 between the gate and the source of the FET2. In FIG. 1, 3 is an amplifier connected to the secondary winding side of the analog signal isolation transformer T2, and R1 and R2 are resistors.

Next, the operation of the isolated analog input device according to the first embodiment will be described with reference to the waveforms shown in FIG. In the configuration of FIG. 1, is input via the analog signal is FET2 from the signal source Va to the primary side of an analog signal insulation transformer T2, the voltage of the analog input signal on the secondary side line l ₃ of the transformer T2 through FET2 Drive A pulse having an amplitude as a value is generated and supplied to the amplifier 3. Therefore, by taking the configuration shown in FIG. 1, analog data can be isolated and multiplexed to collect analog data.

In Figure 1, the output signals from the plurality pulse generating circuit 1 (see FIG. 2 (a)) is generated in the signal line _{l 3,} the transformer T1 is excited by performing ON / OFF FET1 is in accordance with the timing, the transformer T1 A pulse is generated at the output V1 (see FIG. 2B). The pulse of the output V1 is input to the pulse restoration circuit 2, and the pulse restoration circuit 2 rectifies this pulse and discharges it with an appropriate time constant to obtain an output V2 (see FIG. 2C).

  Here, the pulse restoration circuit 2 is constant between the time when the drive pulse train that drives the primary winding of the drive isolation transformer T1 stops and the time when the drive of the FET2 stops by appropriately selecting the discharge time constant. Output (time corresponding to the time difference τ shown in FIG. 2C) is ensured. In this way, when the analog pulse output of the analog signal isolation transformer T2 is sampled and held, the induction of noise from the plurality of pulses can be avoided because the plurality of pulses that drive the transformer T2 are stopped. This is particularly effective when it is affected by noise such as a very low level input such as a thermocouple.

When the output waveform of the pulse restoration circuit 2 is applied between the gate and the source of the FET 2, the FET 2 is turned on when a voltage larger than the gate threshold voltage Vth is applied, and the FET 2 is turned off when a voltage smaller than the gate threshold voltage Vth is applied. (See FIG. 2D). That is, since the analog signal from the signal source Va drives the transformer T2 only during the period when the FET2 is ON, the voltage of the analog signal input (see FIG. 2 (e)) is applied to the secondary side of the transformer T2. In response to the voltage (voltages indicated by V _t1 and V _t2 in FIG. 2F).

  Therefore, according to the first embodiment, the drive pulse is divided into a plurality of pulse trains and applied to the transformer, so that even when an ultra-small transformer is used, magnetic saturation does not occur, and the small and high-precision with a wide operating temperature range. Insulated analog input device can be obtained.

Embodiment 2. FIG.
FIG. 3 is a circuit diagram according to the second embodiment showing the configuration of the internal circuit of the pulse restoration circuit described above. The pulse restoration circuit 2A shown in FIG. 3 includes a diode D1 that shapes the output from the drive isolation transformer T1, and an FET2 that is turned on based on the output that is connected between the gate and source of the FET2 and rectified through the diode D1. The time constant circuit which comprises the parallel circuit of the resistor R3 and the capacitor | condenser C1 which controls / OFF is provided.

  That is, the pulse restoration circuit 2A has a diode D1 whose anode side is connected to one end side of the secondary winding of the drive insulation transformer T1 and shapes the output from the drive insulation transformer T1, and one end is the cathode side of the diode D1. Is connected to the other end of the secondary winding of the drive isolation transformer T1, and controls the ON / OFF of the FET 2 based on the output rectified through the diode D1. And a time constant circuit composed of a parallel circuit of the capacitor C1, and both ends of the capacitor C1 are connected to the gate and source of the FET2.

A pulse of the voltage V1 shown in FIG. 2B is generated on the secondary side of the transformer T1, and the diode D1 rectifies this pulse and supplies it to the parallel circuit of the resistor R3 and the capacitor C1. The resistor R3 and the capacitor C1 form a time constant circuit, and the time constant Trc is given by equation (1).
Trc = R3 × C1
The parallel circuit of the resistor R3 and the capacitor C1 is connected between the gate and the source of the FET 2, and ON / OFF of the FET 2 is controlled by this signal. That is, a series of waveforms as shown in FIG. 2 can be realized, and the multiplexer drive operation is performed.

Embodiment 3 FIG.
FIG. 4 is a circuit diagram according to the third embodiment showing the configuration of the internal circuit of the pulse restoration circuit described above. The pulse restoration circuit 2B shown in FIG. 4 has two capacitors C2 and C3, one end of which is connected in parallel to one end of the secondary winding of the drive isolation transformer T1, and the other end of the two capacitors C2 and C3. Two diodes D2 and D3 and a resistor R4 connected in series to each other, a connection point of the two diodes D2 and D3 is connected to the other end side of the secondary winding of the drive isolation transformer T1, and a resistor It is configured by connecting both ends of R4 to the gate and source of FET2.

  A pulse of the voltage V1 shown in FIG. 2B is generated on the secondary side of the transformer T1, and the pulse of the voltage V1 is rectified by a circuit formed by diodes D2 and D3 and capacitors C2 and C3. The waveform from which fine pulses have been removed is supplied to the resistor R4 (see FIG. 2C). The resistor R4 is connected between the gate and the source of the FET 2, and ON / OFF of the FET 2 is controlled by this signal. That is, a series of waveforms as shown in FIG. 2 can be realized, and a multiplexer drive operation is performed.

Embodiment 4 FIG.
FIG. 5 is a block diagram showing an insulated analog input device according to Embodiment 4 of the present invention. In the isolated analog input device shown in FIG. 5, the same parts as those of the isolated analog input device according to the first embodiment shown in FIG. In the isolated analog input device shown in FIG. 5, the polarity is inverted between the hot side and the cold side of the primary winding of the drive insulation transformer T1 with respect to the isolated analog input device according to the first embodiment shown in FIG. A gate element G1 and an inverter gate element G2 for supplying the drive pulse train are provided, and a capacitor C4 is inserted between the hot side of the primary winding of the drive insulating transformer T1 and the gate element G1. R5 and R6 are resistors.

In the configuration shown in FIG. 5, a description because with respect to the operation of the pulse is generated to the voltage value of the analog input signal and amplitude to the secondary line l ₃ of the analog signal insulation transformer T2, which is the same as in the first embodiment Omitted.

  Next, the operation of the isolated analog input device according to the fourth embodiment will be described with reference to the waveforms shown in FIG. In FIG. 5, an output signal (see FIG. 6 (a)) from the multiple pulse generation circuit 1 is applied to the gate elements G1 and G2, and pulses having opposite phases pass through the capacitor C4, the resistor R5, and the resistor R6. Applied to the primary side of the transformer T1. This pulse excites the transformer T1, and a voltage V1 pulse is generated from the transformer T1 (see FIG. 6B). The pulse of the voltage V1 is input to the pulse restoration circuit 2, and the pulse restoration circuit 2 rectifies and discharges the pulse with an appropriate time constant and outputs the output V2 (see FIG. 6C). Since this waveform is applied between the gate and the source of the FET 2 and the operation of turning the FET 2 on and off (see FIG. 6D) is the same as that of the first embodiment, description thereof is omitted.

Embodiment 5 FIG.
FIG. 7 is a block diagram showing an isolated analog input device according to Embodiment 5 of the present invention. In the isolated analog input device shown in FIG. 7, the same parts as those of the isolated analog input device according to the fourth embodiment shown in FIG. In the insulated analog input device shown in FIG. 7, the gates provided on the hot side and the cold side of the primary winding of the drive insulation transformer T1 with respect to the insulated analog input device according to the fourth embodiment shown in FIG. A plurality of pulse generation circuits 1A and 1B are provided in the elements G1 and G2, respectively, so that the phases of drive pulse trains divided into a plurality of pulses having a duty of 50% or less are shifted by 180 degrees.

  Next, the operation of the isolated analog input device according to the fifth embodiment will be described with reference to the waveforms shown in FIG. In FIG. 7, the output signal from the multiple pulse generation circuit 1A and the output signal from the multiple pulse generation circuit 1B (see FIGS. 8A and 8B) are applied to the gate elements G1 and G2, respectively. These pulses are 180 degrees out of phase and are applied to the primary side of the transformer T1 via the capacitor C4 and the resistors R5 and R6. This pulse excites the transformer T1, and a pulse of voltage V1 is generated from the transformer T1 (see FIG. 8C). The pulse of the voltage V1 is input to the pulse restoration circuit 2, and the pulse restoration circuit 2 rectifies and discharges the pulse with an appropriate time constant and outputs the output V2 (see FIG. 8D). Since this waveform is applied between the gate and the source of the FET 2 and the operation of turning the FET 2 on and off (see FIG. 8E) is the same as that of the first embodiment, description thereof is omitted.

Embodiment 6 FIG.
FIG. 9 is a block diagram showing an isolated analog input device according to Embodiment 6 of the present invention. In the isolated analog input device shown in FIG. 9, the same parts as those of the isolated analog input device according to the first embodiment shown in FIG. 9 is different from the isolated analog input device according to the first embodiment shown in FIG. 1 in that the FET is composed of two FETs 2 and 3 and is an analog on the primary side of the analog signal insulating transformer T2. One is inserted in each signal line of the signal differential input, and the pulse restoration circuit is provided with two pulse restoration circuits 2A and 2B corresponding to each FET2 and FET3, and the timing for turning on each FET2 and FET3 is shifted. Drive pulses to drive sequentially. Similarly, a plurality of pulse generation circuits 1A and 1B, FETs 4 and 5, and drive insulating transformers T3 and T4 are provided. R3, R4, R7, and R8 indicate resistors.

  In the configuration shown in FIG. 9, an analog signal is input to the primary side of the analog signal isolation transformer T2 via the FET2 and FET3, and the voltage value of the analog input signal is applied to the secondary side of the transformer T2 by driving the FET2 and FET3. A pulse with an amplitude is generated. In the first embodiment, the FET 2 is included in one of the analog differential signals. In the sixth embodiment, an FET is inserted in each signal line of the analog differential signal. The circuit for driving these FET2 and FET3 has two circuits in the first embodiment.

  Next, the operation of the isolated analog input device according to the sixth embodiment will be described with reference to the waveforms shown in FIG. In FIG. 9, an output signal from the multiple pulse generation circuit 1A and an output signal from the multiple pulse generation circuit 1B (see FIGS. 10A and 10B) are applied to the gates of the FET4 and FET5, respectively. These pulses are set so that the timings at which each FET is turned on are shifted, and the transformers T3 and T4 are excited when the FETs 4 and 5 are turned on and off according to those timings, and the outputs of the transformers T3 and T4 are pulse restored. Input to the circuits 2A and 2B, the pulse restoration circuits 2A and 2B rectify and discharge the pulses with an appropriate time constant (see FIG. 10C).

  When the output waveforms of the pulse restoration circuits 2A and 2B are applied between the gate and source of the FET2 and FET3, when a voltage higher than the gate threshold voltage Vth is applied, the FET2 and FET3 are turned on and a voltage lower than the gate threshold voltage Vth is applied. When this happens, the FET2 and FET3 are turned off (see FIG. 10D). That is, since the analog signal from the signal source Va drives the transformer T2 only during the period in which the FET2 and FET3 are ON, the analog signal is input to the secondary side of the transformer T2 (see FIG. 10 (e)). A pulse voltage corresponding to the voltage is generated.

  With this configuration, as shown in FIG. 10, it is possible to sequentially drive the FET 2 and FET 3 at different timings, and shorten the transformer magnetization recovery time (see FIG. 10E). be able to.

Embodiment 7 FIG.
FIG. 11 is a block diagram showing an isolated analog input device according to Embodiment 7 of the present invention. In the isolated analog input device shown in FIG. 11, the same parts as those of the isolated analog input device according to the first embodiment shown in FIG. In the isolated analog input device shown in FIG. 11, the FET is between the windings obtained by dividing the primary winding of the analog signal insulating transformer T2 into two compared to the isolated analog input device according to the first embodiment shown in FIG. It is composed of two FETs 4 and 5 that are inserted in series so that their sources are connected in common and whose gates are connected in common, and the pulse restoration circuit 2 is connected between the gates and sources of the two FETs 4 and 5 that are connected in series. A predetermined drive pulse is supplied to the.

  This circuit configuration has an excellent balance when viewed from the analog signal differential input. The drive circuit components by the multiple pulse generation circuit 1, the FET 1, the transformer T1, and the pulse restoration circuit 2 are the same as in the first embodiment, and the operation of the drive system is the same as in the first embodiment. Omitted.

It is a block diagram which shows the insulated analog input device which concerns on Embodiment 1 of this invention. FIG. 2 is an operation waveform diagram of each part of FIG. 1. It is a circuit diagram of the pulse restoration circuit concerning Embodiment 2 of this invention. It is a circuit diagram of a pulse restoration circuit according to Embodiment 3 of the present invention. It is a block diagram which shows the insulated analog input device which concerns on Embodiment 4 of this invention. FIG. 6 is an operation waveform diagram of each part of FIG. 5. It is a block diagram which shows the insulated analog input device which concerns on Embodiment 5 of this invention. FIG. 8 is an operation waveform diagram of each part of FIG. 7. It is a block diagram which shows the insulated analog input device which concerns on Embodiment 6 of this invention. FIG. 10 is an operation waveform diagram of each part of FIG. 9. It is a block diagram which shows the insulated analog input device which concerns on Embodiment 7 of this invention.

Explanation of symbols

  Va signal source, T2 analog signal isolation transformer, 1, 1A, 1B multiple pulse generator, FET1, FET2, FET3, FET4, FET5 field effect transistor, T1, T3, T4 drive isolation transformer, 2, 2A, 2B pulse Restoration circuit, 3 amplifier, R1, R2, R3, R4, R5, R6 resistor, D1, D2, D3 diode, C1, C2, C3, C4 capacitor, G1 gate element, G2 inverter gate element.

Claims (8)

An insulating analog input device for insulating and driving an FET provided on a primary side of an analog signal insulating transformer to which an analog signal is input,
A drive isolation transformer to which a drive pulse train divided into a plurality of pulses is supplied; and
A pulse restoration circuit connected to the secondary winding side of the drive insulation transformer to restore the output from the drive insulation transformer and supply a predetermined drive pulse between the gate and source of the FET. An isolated analog input device. The isolated analog input device according to claim 1,
The pulse restoration circuit has a discharge time constant that secures an output for a certain period of time after the drive pulse train that drives the primary winding of the drive isolation transformer stops until the FET drive stops. An isolated analog input device. The isolated analog input device according to claim 1,
The pulse restoration circuit has a diode whose anode side is connected to one terminal side of the secondary winding of the drive isolation transformer and shapes the output from the drive isolation transformer, and one end connected to the cathode side of the diode. The other end is connected to the other end side of the secondary winding of the drive insulation transformer, and controls the ON / OFF of the FET based on the output rectified through the diode. An insulated analog input device comprising: a time constant circuit formed of a parallel circuit; and both ends of the capacitor connected to the gate and source of the FET. The isolated analog input device according to claim 1,
The pulse restoration circuit includes two capacitors, one end of which is connected in parallel to one terminal side of the secondary winding of the drive isolation transformer, two diodes connected in series between the other ends of the two capacitors, and A connection point between the two diodes connected to the other end of the secondary winding of the drive isolation transformer, and both ends of the resistor connected to the gate and source of the FET. Features an isolated analog input device. The isolated analog input device according to claim 1,
A gate element is provided on each of the hot side and the cold side of the primary winding of the drive isolation transformer for supplying drive pulse trains having opposite polarities, and the hot side of the primary winding of the drive isolation transformer And an insulating analog input device, wherein a capacitor is inserted between the gate element and the gate element. The isolated analog input device according to claim 5,
The drive pulse train divided into a plurality of pulses having a duty of 50% or less is supplied to the gate elements provided on the hot side and the cold side of the primary winding of the drive isolation transformer by mutually shifting the phase by 180 degrees. An isolated analog input device comprising a plurality of pulse generation circuits. The isolated analog input device according to claim 1,
The FET is inserted one by one in each signal line of the analog signal differential input on the primary side of the analog signal isolation transformer,
2. The insulated analog input device according to claim 1, wherein two pulse restoration circuits are provided corresponding to each FET, and supply drive pulses for sequentially driving each FET at different timings to be turned on. The isolated analog input device according to claim 1,
The FETs are two FETs that are inserted in series so that the sources are connected in common between the windings obtained by dividing the primary winding of the analog signal isolation transformer in two, and the gates are connected in common. Become
The insulated analog input device, wherein the pulse restoration circuit supplies a predetermined drive pulse between the gate and source of the two FETs connected in series.

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