JP4626032B2 - Program conversion apparatus, program conversion method, and recording medium - Google Patents

Description

[0001]
The present invention relates to a recording medium recording a program for an object code generated to Help program conversion apparatus the file to produce a program transformation method and the object code files for the RISC CPU from source Sukodo file.
[0002]
[Prior art]
Currently, the development of programs such as CPUs and microcomputers is generally performed using high-level languages such as C language and C ++ language. The source code described in a high-level language is converted into a program (compiled) by a compiler, and an object code in an instruction format (machine language) that can be directly executed by a CPU or the like is generated. The object code generated by the compiler is stored in a program memory, and is read out by a CPU or the like, so that an intended process is executed.
[0003]
By the way, a RISC (Reduced Instruction Set Computer) type CPU makes it possible to use only instructions having a simple function and a short execution time, and each stage (fetch, decode, execute, write, etc.) in a process accompanying execution of a plurality of instructions. The program execution speed is increased by executing in parallel by a plurality of instruction pipelines. Therefore, the capacity of the object code generated by the compiler from the source code tends to be larger than that of a CISC (Complex Instruction Set Computer) type CPU.
[0004]
FIG. 7 is a program list showing an example of object code (expressed in mnemonics) generated by a conventional compiler. The source code is
bit1 = bit2 & bit3 (1)
Suppose that That is, it is a bit operation of substituting the result of logical product of the bit variable bit2 and the bit variable bit3 into the bit variable bit1. Each bit variable bit1 to bit3 is a variable arranged in the fourth bit (the third bit from the LSB) of the 8-bit variable BIT1 to BIT3.
FIG. 8 is a flowchart showing a process when the compiler converts the source code of the bit operation of equation (1).
[0005]
In FIG. 7, in the portion (1) of the object code, for example, the contents of the 8-bit variable BIT2 arranged in the memory are read to the general register reg1, and then reg1 is shifted right by 3 bits, and the fourth bit is set to LSB. Position. Then, by taking the logical product of the register reg1 and the mask data $ 0001 ("$" is a symbol indicating a hexadecimal number), bits other than the LSB of the register reg1 are cleared. The steps so far correspond to step A1 in FIG. In the portion (2) of the object code, the same processing is performed for the 8-bit variable BIT3, which corresponds to step A2 in FIG.
[0006]
In the object code {circle around (3)}, the logical product operation of the registers reg1 and reg2 is performed (corresponding to step A3 in FIG. 8). In the subsequent object code {circle over (4)}, when the register reg1 storing the result of the logical product operation is shifted left by 3 bits, the contents of the 8-bit variable BIT1 are read into the register reg2, and the register reg2 and the mask data $ fff7 Is performed, the fourth bit of the register reg2 to be substituted is cleared, and the other bits are saved. Then, the logical sum operation of the registers reg1 and reg2 is performed, and the content of the register reg2 storing the logical product operation result is transferred to the 8-bit variable BIT1 on the memory (corresponding to step A4 in FIG. 8). The calculation process ends.
[0007]
[Problems to be solved by the invention]
As described above, since the RISC type CPU has a small number of instructions and no dedicated instruction for reading the value of the bit variable, the code conversion is performed so that a desired process is executed by a combination of other plural instructions. As a result, 18 steps are required in the object code to execute the bit operation described in one step in the source code. Accordingly, there is a problem that a larger program storage area of the CPU is required, and the processing speed is reduced by the increase in the number of steps.
[0008]
The present invention has been made in view of the above circumstances, and its object is able smaller program size and the processing speed can be faster to generate object code files Help program conversion apparatus, the program conversion method And providing a recording medium on which a program for generating the object code file is recorded .
[0009]
According to the program conversion apparatus according to claim 1, the bit arithmetic expression is described in a source Sukodo, conditions determined composed determination instruction value of each bit variable is the bit arithmetic expression operand An object code that is converted into an expression and branches according to whether the condition determination expression is true or false is output . The object of the configuration including the assignment instruction where the condition determination expression results in response to people husband and when the case and false true and substituted into different immediate bit variable the result of bit operation is stored Generate an object code file by generating code .
[0010]
For example, a bit operation in which a bit operation assigns a result obtained by performing an AND operation between the bit variable a and the bit variable b to the bit variable c, that is,
c = a & b (2)
If the result of the bit operation expression “a & b” described on the right side of the expression (2) is “1”, it is in the case of “a = 1” and “b = 1”. If it is expressed by a condition judgment expression used in an if sentence or a while sentence,
a == 1 && b == 1 (3)
It becomes. That is, equation (2) substitutes “1” for the bit variable c on the left side of equation (2) when condition judgment equation (3) is true, and bit when condition judgment equation (3) is false. This is equivalent to substituting “0” for the variable c, and the bit operation expression can be replaced with a condition determination expression.
[0011]
Therefore, for the bit operation expression described in the source code, the value of each bit variable is determined based on the replaced condition determination expression, and conditional branching is performed based on the result of each determination. If the object code is generated so that different immediate values “0, 1” are substituted into the bit variable in which the result of the bit operation is stored, processing equivalent to the bit operation can be performed.
[0012]
That is, by generating the object code in this way for the bit operation, the number of steps of the instruction executed by the RISC type CPU becomes shorter than before. In general, since the frequency of performing bit operations in a CPU program is relatively high, the amount of object code generated as a whole program can be reduced. In addition, the capacity (size) of the program can be made smaller than before, and the processing speed when the RISC type CPU executes the bit operation can be increased.
[0013]
According to the program conversion apparatus according to claim 2, a set of a plurality of bits variable is referred to as a so-called bit field, Runode assigned to a register incorporated in the RISC CPU as a register variable, the user performs programming variety Therefore, the processing by the RISC type CPU can be performed efficiently.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described below with reference to FIGS. FIG. 4 is a diagram showing the configuration of the program conversion apparatus. A compiler 2 is installed in a personal computer (personal computer) or workstation 1 as a program conversion apparatus. Specifically, the program file of the compiler 2 is stored in a storage device (storage means) such as a hard disk built in the main body 1a of the personal computer 1.
[0023]
As shown in FIG. 5, a source code file 3 written by a user in a high-level language such as C language is also stored in the storage device built in the main body 1a. Then, the user activates the program of the compiler 2 on the personal computer 1 to convert and generate the object code file 4 from the source code file 3. When the compiler 2 reads the C language source code described in the source code file 3 and interprets the contents, the object code is generated so that the CPU or the like can execute the processing corresponding to the specific instruction most efficiently. Compile as follows.
[0024]
A ROM writer 5 is connected to the main body 1a of the personal computer 1, and both can communicate with each other by a serial communication protocol such as RS-232C. When the object code file 4 generated by the compiler 2 is transferred to the ROM writer 5, it is stored as binary data in a program memory 7 (see FIG. 6) built in the microcomputer 6 set in the ROM writer 5. It is to be written.
[0025]
FIG. 6 is a functional block diagram showing an electrical configuration of the microcomputer 6. The microcomputer 6 includes a RISC type CPU 8, a program memory 7 composed of an EEPROM, a flash ROM, etc., and an internal memory 9 composed of an SRAM, etc., and is configured as a one-chip microcomputer. Further, an external memory 10 composed of a DRAM or the like is connected to the outside of the microcomputer 6. The CPU 8, the program memory 7, the internal memory 9 and the external memory 10 are connected via an address bus 11 and a data bus 12.
[0026]
Inside the CPU 8, an arithmetic unit (ALU (Alithmetic Logical Unit)) 13 for performing arithmetic operations, a register unit 14 in which a plurality of registers used when the arithmetic unit 13 performs arithmetic operations, and the like, A control unit 15 and the like for controlling load / store and the like are arranged in the register unit 14 and the like.
[0027]
Further, the CPU 8 sends at least a command unique to the premise configuration,
Bit test instruction: tst (.b / w / l)
Bit set instruction: set (.b / w / l)
Bit clear instruction: clr (.b / w / l)
It has.
[0028]
The bit test instruction is an instruction for testing (determining) the value of a designated bit variable, and the test result “0, 1” is stored in the Z flag of the condition code register (CCR) in the register unit 14 of the CPU 8. It is reflected by the control unit 15. That is, if the test result is “0”, the Z flag of the CCR is set, and if the test result is “1”, the Z flag is cleared.
[0029]
The bit test instruction can be executed regardless of whether a bit variable is allocated to the memory or a general-purpose register in the register unit 14 according to a user definition. It is. (.B / w / l) designates an access size when testing a bit variable on a memory, and corresponds to (byte (8) / word (16) / long word (32)). . When testing a bit variable on the register, the access size need not be specified.
The bit set instruction is an instruction for assigning an immediate value “1” to a designated bit variable, and the bit clear instruction is an instruction for assigning an immediate value “0” to a designated bit variable.
[0030]
Next, the operation of the present embodiment will be described with reference to FIGS. FIG. 1 is a flowchart showing a process when the compiler 2 performs a compile process related to a bit operation. First, the compiler 2 interprets (decodes) the bit operation expression on the right side described in the C language, and converts it into a condition determination expression that results in 1 (true) or 0 (false) based on the Boolean algebra rule. Then, an object code corresponding to the condition determination formula is output (step S1).
[0031]
Next, when the condition judgment expression is true, the compiler 2 assigns a code for assigning “1” or “0” (different immediate value) to the bit variable on the left side to which the result of the bit operation expression is assigned. Then, a code for branching to the end of the process is generated (step S2). Then, when the condition judgment expression is false, a code for substituting “0” or “1” into the bit variable on the left side to which the result of the bit operation expression is assigned is generated (step S3). End.
[0032]
Here, FIG. 2 is a flowchart in the case where object code is generated by specifically compiling the bit operation of the expression (1) based on the flowchart of FIG. 1, and FIG. 3 follows the flowchart of FIG. It is a program list which shows the object code produced | generated by a compile process by mnemonic.
[0033]
The result of the bit operation expression “bit2 & bit3” described on the right side of the expression (1) is “1” in the case of “bit2 = 1” and “bit3 = 1”, and is expressed by a condition determination expression in C language. Then
bit2 == 1 && bit3 == 1 (4)
It becomes. Therefore, the expression (1) substitutes “1” for the bit variable bit1 on the left side of the expression (1) when the condition determination expression (4) is true, and the bit when the condition determination expression (4) is false. This is equivalent to substituting “0” into the variable bit1.
[0034]
Therefore, in FIG. 2, first, the value of the bit variable bit2 is determined (step B1). If the value is “0”, “0” is written in the bit variable bit1 (step B3), and the process is terminated. If the value of the bit variable bit2 is “1”, the value of the bit variable bit1 is determined (step B2). If the value is “0”, the process proceeds to step B3, and the value of the bit variable bit1 is “0”. If “1”, “1” is written in the bit variable bit1 (step B4), and the process is terminated.
[0035]
That is, in the flowchart of FIG. 2, when steps B1 and B2 are processing based on step S1 of FIG. 1, the condition determination formula (4) is false in the case of shifting to either step B1 or B2 to step B3 Corresponding to Step B3 is processing based on step S3 in FIG. Further, the case where the process proceeds from step B2 to step B4 corresponds to the case where the condition determination formula (4) is true, and step B4 is a process based on step S2 in FIG.
[0036]
Next, referring to FIG. 3 which is a program list of actual compilation processing results, the value of the bit variable bit2 is determined in step {circle around (1)}. If the value is “0” in step {circle around (2)}, the label LOO1 is displayed. Branch (corresponding to step B1). For example, if the value of the bit variable bit2 is “0”, as described above, the Z flag of the CCR in the register unit 14 of the CPU 8 is set, and the condition determination in step (2) becomes true.
[0037]
In the next steps (3) and (4), the same processing as in steps (1) and (2) is performed for the bit variable bit3 (corresponding to step B2). Steps {circle around (1)} to {circle around (4)} above are the results of executing step S1 in FIG. 1, and become the object code output corresponding to the condition determination formula (4). Then, the case of branching to the label LOO1 in any one of steps (2) and (4) corresponds to the case where the result of the condition determination formula is false. Further, the case of executing the next step (5) without branching to the label LOO1 in any of the steps (2) and (4) corresponds to the case where the result of the condition determination formula is true.
[0038]
In step {circle around (5)} corresponding to the case where the result of the condition judgment expression is true, “1” is set to the bit variable bit1, and the process branches to the label LOO2 to end this bit operation processing (step {circle around (6)}). This part is the result of executing step S2 in FIG. 1, and corresponds to step B4 in FIG.
In step {circle around (7)} corresponding to the case where the result of the condition determination expression is false, bit 1 is cleared to zero and the process is terminated. This part is the result of executing step S3 in FIG. 1, and corresponds to step B3 in FIG.
[0039]
Thus, the size of the object code generated by the compiler 2 is greatly reduced as compared with the size of the code generated by the conventional compiler shown in FIG.
[0040]
As described above, the object code file 4 generated as a result of the compiling process by the compiler 2 is transferred from the personal computer 1 to the ROM writer 5 as described above, and the program memory built in the microcomputer 6 set in the ROM writer 5 is used. 7 is written as binary data.
[0041]
Then, the CPU 8 of the microcomputer 6 reads out and executes the object code stored in the program memory 7 as a program. The bit variables bit1 to bit3 may be arranged in any of the internal memory 9, the external memory 10 and the general-purpose register in the register unit 14 as defined by the user. When the bit variable is allocated on the general-purpose register, for example, “tst bit 2” is generated as the object code instead of “tst.b bit 2” in step (1) in FIG.
[0042]
By the way, for example, when the bit variable bit 2 is arranged on the internal memory 9, when “tst.b bit 2” in step (1) in FIG. The contents of bit2 are read and a determination is made. In this case, for example, if an instruction such as “mov BIT2, reg1” in the code shown in FIG. 6 can be executed in one clock (the operation clock of the CPU 8), the execution of “tst.b bit2” requires 2-3. Although a clock is required, since the entire code size is greatly reduced, the total processing time is shortened.
[0043]
As described above, according to the present embodiment, the compiler 2 installed in the main body 1a of the personal computer 1 uses the bit arithmetic expression described in the source code of the source code file 3 described as a program as an operation target. A condition is determined based on the value of each bit variable bit2 and bit3, and converted into an expression for determining the condition, and the result of the bit operation is stored corresponding to the case where the result of the determination expression is true or false. The object code is generated so as to perform the process of substituting different immediate values “0, 1” for the bit variable bit 1 to be output, and the optimal object code file 4 is output to the RISC type CPU 8.
[0044]
Accordingly, the number of steps executed by the CPU 8 is shorter than before, and the amount of object code generated as a whole program is reduced. Therefore, the capacity of the program can be made smaller than before, and the CPU 8 can perform bit operations. It is possible to increase the processing speed when executing.
[0045]
Further, the program memory 7 of the microcomputer 6 stores the program converted by the compiler 2, and the CPU 8 of the microcomputer 6 reads and executes the object code stored in the program memory 7 as a program. The number of steps of the instruction to be performed becomes shorter than before, the amount of object code generated as a whole program is reduced, and the capacity of the program memory 7 can be made smaller than before. Since the processing speed when the CPU 8 executes the bit operation is increased, the processing capability of the microcomputer 6 can be improved.
[0046]
The present invention is not limited to the embodiments described above and illustrated in the drawings, and the following modifications or expansions are possible.
The bit arithmetic expression is not limited to the logical product but may be a logical sum or an exclusive logical sum. In this case, “bne (not equal)” or the like may be generated as an object code instead of the conditional branch command “beq” according to the difference in logic.
Even if a set of bit variables in the source code, a so-called bit field, is assigned to the register unit 14 of the CPU 8 as a register variable, the compiler 2 uses the bit test instruction for each bit variable of the bit field. Output code to determine value. Therefore, the user can perform various programming, and the processing by the CPU 8 can be efficiently performed.
[0047]
Writing program data to the program memory 7 is not limited to using the ROM writer 5. For example, a serial communication interface such as RS-232C may be provided on the microcomputer 6 side, and the program data may be directly written to the microcomputer 6 from the personal computer 1 side so that the CPU 8 can write the program data into the program memory 7. .
The program of the compiler 2 may be stored in a recording medium such as a CD-ROM, a floppy disk, or an MO disk, and the program is stored on the main memory of the personal computer 1 while being stored in such a recording medium. It may be read and compiled.
The microcomputer is not limited to a one-chip microcomputer such as the microcomputer 6, but is a microcomputer in which the CPU 8 and the program memory 7 are formed as independent chips and mounted on the same printed circuit board. Also good. In this case, the program data may be written to the ROM writer 5 by connecting only the program memory 7.
The program memory is not limited to a rewritable memory, and a non-rewritable memory such as a mask ROM may be used.
[Brief description of the drawings]
FIG. 1 is a flowchart showing a process in a case where a compiler performs a compile process related to a bit operation according to an embodiment of the present invention. FIG. 2 is a flowchart illustrating a bit operation of an expression (1) based on the flowchart of FIG. Flowchart when generating object code by compiling processing [FIG. 3] FIG. 4 is a program list showing mnemonic object code generated by compiling processing according to the flowchart of FIG. 2 [FIG. 4] Configuration of personal computer or workstation as program conversion device FIG. 5 is a diagram conceptually showing a process in which a compiler converts and generates an object code file from a source code file. FIG. 6 is a functional block diagram showing an electrical configuration of a microcomputer. Figure 3 equivalent figure 8 (1) the source code for bit operations expression, the flowchart [code indicating the process where conventional compiler converts]
1 is a personal computer or workstation (program conversion device), 2 is a compiler, 3 is a source code file, 4 is an object code file, 6 is a microcomputer, 7 is a program memory, and 8 is a CPU.

Claims (6)

Reads the source code from the source over the scan code file for the RISC CPU with at least includes instruction sets and assignment instruction for assigning the immediate relative judgment instruction and before Symbol bit variable determines the value of the bit variable In a program conversion device for generating an object code file ,
The bit arithmetic expression that is described in the source code, and converts the bit arithmetic expression condition judgment equation configured with determination instruction value of each bit variable which is the operation target of the condition determination formula Output the object code of the structure that branches according to authenticity,
And the condition determination expression results corresponding to s husband and when the case and the false true, object code of the configuration including the assignment instruction where the result of the bitwise operation is entering a different immediate bit variables stored cash by generating,
A program conversion apparatus for generating the object code file . A set of a plurality of bit variables, as a register variable, the program conversion apparatus according to claim 1, wherein that you have allocated to a register incorporated in the RISC type CPU. Read the source code from the source code file and generate an object code file for a RISC type CPU having an instruction set including at least a determination instruction for determining the value of the bit variable and an assignment instruction for assigning an immediate value to the bit variable. In a program conversion method executed by a computer,
The bit operation expression described in the source code is converted into a condition determination expression configured by a determination instruction for determining the value of each bit variable that is an operation target of the bit operation expression, and the condition determination expression A step of outputting an object code configured to branch according to authenticity;
Corresponding to the case where the result of the condition judgment expression is true and the case where it is false, an object code including an assignment instruction for assigning a different immediate value to a bit variable in which the result of the bit operation is stored Generating step;
To generate the object code file . 4. The program conversion method according to claim 3, wherein a set of a plurality of bit variables is assigned as a register variable to a register built in the RISC type CPU . A RISC type CPU having an instruction set including at least a determination instruction for reading a source code from a source code file and determining a value of a bit variable and an assignment instruction for assigning an immediate value to the bit variable. In a computer-readable recording medium on which a program for generating an object code file is recorded,
The program is stored in the computer.
The bit operation expression described in the source code is converted into a condition determination expression configured by a determination instruction for determining the value of each bit variable that is an operation target of the bit operation expression, and the condition determination expression A step of outputting an object code configured to branch according to authenticity;
Corresponding to the case where the result of the condition judgment expression is true and the case where it is false, an object code including an assignment instruction for assigning a different immediate value to a bit variable in which the result of the bit operation is stored Generating step;
A recording medium for generating the object code file by executing 6. The recording medium according to claim 5, wherein a set of a plurality of bit variables is assigned as a register variable to a register built in the RISC type CPU .

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