JP4622526B2 - Manufacturing method of solid-state imaging device - Google Patents

Description

The present invention relates to a method of manufacturing a solid-state imaging device in which an on-chip microlens is provided above a pixel array section via various laminated films.

Conventionally, solid-state image pickup devices such as CCD image sensors and CMOS image sensors have been widely used in various image pickup systems. Particularly, in recent years, modules with a lens for mobile image pickup devices such as mobile phones are required to be further downsized. It has been.
When such a module is used, the distance between the lens and the image sensor (exit pupil distance) is shortened, and the amount of light incident on the central pixel of the pixel array portion and the amount of light incident on the peripheral pixels. The difference is gradually increasing. In this way, the phenomenon in which sensitivity unevenness occurs in the center and the periphery of an image is called shading, and it is an extremely important issue to take effective shading countermeasures under the design conditions in which the exit pupil distance gradually decreases as described above. It has become.

FIG. 6 is a plan view showing a conventional solid-state imaging device.
As shown in the figure, a pixel array unit 110 in which a large number of pixels are arranged in a two-dimensional direction is formed at the center of the semiconductor chip 100. An OPB portion 111 in which light-shielding pixels for taking optical black (OPB) are arranged is formed on the outer peripheral portion of the pixel array portion 110, and an effective pixel portion 112 that performs actual imaging is formed on the inner side. ing.
Further, around the pixel array unit 110, vertical shift registers 120A and 120B and a horizontal shift register 130 for performing scanning and the like for sequentially reading out the signals of the respective pixels are provided, and a signal processing circuit 140 and an input / output terminal are provided outside thereof. 150 etc. are arranged.
An on-chip microlens, a subject lens, and the like are provided on the semiconductor chip 100 to constitute a small camera module.

7 and 8 are schematic diagrams for explaining the change in shading with respect to the exit pupil distance.
FIG. 7 virtually shows a surface 152 where the light from the subject (light source) 151 has the same brightness with respect to the flat on-chip microlens 150, and the position of the surface 152 is the center of the pixel array section. In the case of matching with the pixels of the part, the pixels arranged in the peripheral part are farther from the surface 152.
FIG. 8 shows the angle of incident light with respect to each pixel in a module having a different exit pupil distance. FIG. 8B shows a smaller exit pupil distance than that in FIG. 8A where the exit pupil distance is large. In this case, the inclination angle of the light incident on the pixels in the peripheral portion of the pixel array portion becomes larger.
(For example, refer to Patent Document 1).

And, as a conventional shading countermeasure, the on-chip micro lens (OCL) arranged on the upper part of the image sensor, the inner lens (INL) arranged in the layer of the image sensor, or the metal wiring pattern of the image sensor is adjusted. The pupil correction is performed.
FIG. 9 shows an example of pupil correction of an on-chip microlens. As shown in the figure, pupil correction is performed by reducing the pattern of the on-chip microlens 150 as a whole toward the center of the pixel array unit 110.
FIG. 10 is a cross-sectional view showing an optical path of light incident on each pixel by such pupil correction. As shown in the figure, a transfer electrode 162 is provided on a silicon substrate 160 provided with a photoelectric conversion portion (photodiode) 161 and the like via a gate insulating film (not shown), and a plurality of wirings 163 are formed thereon. The interlayer insulating film 164, various plugs 165, and the like are stacked, and a color filter (not shown) is disposed on the uppermost insulating film 164, and an on-chip microlens 168 is provided thereon.
In the center pixel of the pixel array portion shown in FIG. 10B, the microlens 168 is disposed directly above the photoelectric conversion portion 161, and incident light is incident on the photoelectric conversion portion 161 perpendicularly. In the pixels in the peripheral portion of the pixel array portion shown in FIG. 10A, the microlens 168 is disposed obliquely above the photoelectric conversion portion 161, and incident light is incident on the photoelectric conversion portion 161 obliquely.
JP 2003-264281 A

  However, since the conventional pupil correction is a two-dimensional correction, the effect is limited, and in order to perform appropriate pupil correction, the shift amount of the microlens is previously set according to the pupil distance for each module. Since it is necessary to make a decision and there are many difficult points in actual design, it is not possible to obtain sufficient shading characteristics with the conventional measures using pupil correction.

Accordingly, an object of the present invention is to provide a method for manufacturing a solid-state imaging device capable of realizing good shading characteristics even in a module having a short exit pupil distance.

Order to achieve the above object, a method for manufacturing a solid-state imaging device of the present invention includes the steps of forming an upper layer film including the wiring and the insulating film on a semiconductor substrate on which the pixel array unit is formed comprising a plurality of pixels, polishing step of polishing the upper surface of the upper layer film by CMP, or to Yes and etching process for forming a curved surface the upper surface of the upper layer film is etched, and forming an on-chip microlens on the upper layer film. Then, in the polishing process, by controlling the polishing rate by adjusting the wiring pattern in the upper layer, to form a top surface of the upper layer film on the curved surface, along the on-chip microlens on the curved surface Form . Alternatively, in the etching step, the upper surface of the upper film is formed into a curved surface. Then, characterized in that varied according to the distance between the multiple pixels and on-chip microlens to the position of the pixels in the pixel array unit.

According to the solid-state imaging device according to the manufacturing method of the present invention, the upper surface of the upper layer film serving as the base of the on-chip microlens is formed on the curved surface, and the on-chip microlens is formed along the curved surface of the upper layer film. Since the distance between the pixel and the on-chip microlens changes according to the position of the pixel in the pixel array, the pupil correction, which was previously only two-dimensional correction, can be corrected three-dimensionally and more effectively. There is an effect that it is possible to obtain a shading suppression effect.
Further, for example, the curved surface of the upper layer film is formed in a three-dimensional curved shape that is recessed on the center side of the pixel array unit, and the distance between the plurality of pixels and the on-chip microlens is small on the center side of the pixel array unit. By being large on the peripheral side of the part, it is possible to perform appropriate pupil correction and to improve the sensitivity.
Furthermore, for example, by arranging a low dielectric constant film between the on-chip microlens and the pixel array unit, it is possible to improve the light collection efficiency of each pixel to the photoelectric conversion unit.

Further, according to the method for manufacturing a solid-state imaging device of the present invention, the upper surface of the upper layer film serving as a base of the on-chip microlens is formed on the curved surface, the on-chip microlens is formed along the curved surface of the upper layer film, Since the distance between multiple pixels and the on-chip microlens is changed according to the position of the pixel in the pixel array unit, the pupil correction, which was previously only two-dimensional correction, can be corrected to three dimensions, making it more effective. It is possible to produce a solid-state imaging device having a good shading suppression effect.
Further, for example, the curved surface of the upper layer film is formed in a three-dimensional curved shape that is recessed on the center side of the pixel array unit, and the distance between the plurality of pixels and the on-chip microlens is small on the center side of the pixel array unit. By forming it to be large on the peripheral side of the part, it is possible to perform appropriate pupil correction of the solid-state imaging device, and to improve the sensitivity.
Further, in the polishing process for polishing the upper surface of the upper layer film by the CMP method, the curved surface is formed by adjusting the wiring pattern in the upper layer film and controlling the polishing rate without increasing the number of work steps. There is an advantage that can be realized at low cost.
Alternatively, there is an advantage that an appropriate curved surface can be freely formed by forming the curved surface by etching the upper surface of the upper layer film.

In the embodiment of the present invention, when a wiring or an interlayer insulating film is laminated on a semiconductor substrate provided with a pixel array portion and an uppermost insulating film (protective film) is formed, a pixel array is formed on the upper surface of the upper layer film. By forming a curved surface having a three-dimensional curved shape that is recessed on the center side of the portion, and forming an on-chip microlens along the curved surface, the distance between each pixel of the pixel array portion and the on-chip microlens The pupil correction in a three-dimensional direction is performed by reducing the size on the center side of the array portion and increasing the size on the peripheral side of the pixel array portion.
Here, as a method for forming the curved surface, for example, in the step of polishing and planarizing the upper surface of the upper layer film by CMP, it can be formed by utilizing the difference in the polishing rate. Note that the difference in polishing rate is caused by the CMP method being affected by the base pattern, and by adjusting the base pattern by some method, the polishing rate is differentiated to form a curved surface. As the film to be bent, a plurality of interlayer insulating films are appropriately selected and bent.
The curved shape may be controlled by appropriately changing the base pattern, or may be controlled according to the CMP conditions. Moreover, by combining a low dielectric constant material with the interlayer insulating film as necessary, the condensed light is refracted in the direction of the photoelectric conversion unit, and the collected light efficiently reaches the photoelectric conversion unit.
Instead of adjusting the polishing rate of the CMP method, the curved surface may be formed by applying various etching methods, for example.

1A and 1B are diagrams showing a solid-state imaging device according to an embodiment of the present invention. FIG. 1A shows a cross section of an on-chip microlens, and FIG. Show. The overall configuration of the solid-state imaging device and the configuration of the pixel at the center of the pixel array unit are the same as those in the conventional example, and are not shown.
As shown in FIG. 1A, the solid-state imaging device of this embodiment uses a curved on-chip microlens 10, and a pixel array portion is formed on an upper layer film disposed below the on-chip microlens 10. By forming a three-dimensional curved curved surface that is concave on the center side of the, and forming an on-chip microlens 10 thereon, the distance between each pixel of the pixel array unit and the on-chip microlens can be determined. It is small on the center side and large on the peripheral side of the pixel array portion, and pupil correction is performed in a three-dimensional direction. As a result, the position of each microlens 10A of the on-chip microlens 10 is arranged along the surface 12 where the light from the subject (light source) 11 has the same brightness.
Therefore, as shown in FIG. 1B, in the pixels in the peripheral portion of the pixel array portion, the microlenses 10A are arranged to be inclined in the three-dimensional direction, and incident light is efficiently supplied to the pixels. Although not shown, the pixel at the center of the pixel array is arranged perpendicular to the optical axis as in the conventional case.

Further, as shown in FIG. 1B, the element structure of this example is similar to the conventional example described above. First, gate insulation is provided on a silicon substrate 20 provided with a photoelectric conversion portion (photodiode) 21 and the like. A transfer electrode 22 is provided through a film (not shown), and a plurality of wirings (polysilicon film, aluminum film, etc.) 23, an interlayer insulating film (silicon oxide film, etc.) 24, and various plugs (tungsten, etc.) on the upper layer. 25, etc. are stacked, a color filter (not shown) is disposed on the uppermost insulating film (protective film) 24, and the on-chip microlens 10 is provided thereon.
In this embodiment, the three-dimensional curved surface 24A is formed in the insulating film 24 below the on-chip microlens 10, and the color filter and the on-chip microlens 10 are formed along the curved surface 24A. An on-chip microlens 10 having a three-dimensional curved structure as shown in 1 (A) is obtained.
FIG. 2 is a perspective view schematically showing a film thickness distribution of a semiconductor chip having such a three-dimensional curved structure on-chip microlens 10.
As shown in the figure, the semiconductor chip 30 is formed in a flat plate shape as a whole. However, only the pixel array section 31 is formed with a three-dimensional curved surface 31A recessed in a hemispherical shape or an aspherical shape, and is turned on on the surface. A chip microlens (not shown in FIG. 2) is arranged.

Next, such a curved surface can be efficiently formed by the method described below.
First, the first method is a step of polishing and flattening the upper surface of the upper layer film (insulating film 24) by a CMP method, utilizing the difference in polishing rate. That is, in the CMP method, a difference occurs in the polishing rate due to the influence of the base pattern. Therefore, the ground pattern of the insulating film to be curved is intentionally adjusted to make a difference in the polishing rate to form a curved surface.
FIG. 3 is a cross-sectional view showing a specific example of adjusting the base pattern.
As shown in the figure, for example, in the wiring pattern of the uppermost layer, a density difference is given by the wiring 23A on the pixel array unit 40 side and the wiring 23B on the peripheral circuit unit 41 (outside of the pixel array unit), and the wiring width on the peripheral circuit unit side A dense pattern is obtained by such adjustment, and a pattern with a low density is formed in the pixel array section. As a result, the uppermost insulating film 24 stacked on the wiring 23 is formed with unevenness 24B having a sparse density corresponding to the base pattern on the upper surface. When CMP polishing is performed on this upper surface, the unevenness of the unevenness 24B is reduced. A corresponding polishing rate is generated, and the above-described three-dimensional curved surface is formed. Therefore, the on-chip microlens 10 that is curved in the three-dimensional direction can be formed by forming the on-chip microlens 10 on this via a color filter.

In this example, when adjusting the underlying wiring pattern, the density is changed between the pixel array unit and the peripheral circuit unit. However, in the pixel array unit, the density is gradually decreased from the periphery to the center. Such a pattern may be used.
That is, the curved shape of the on-chip microlens may be controlled by appropriately changing the base pattern, or may be controlled by CMP conditions.
In this example, only the density pattern of the uppermost wiring is adjusted, but density patterns of other films may be adjusted. For example, when a sufficient change cannot be given only by adjusting the pattern of one layer, it is possible to adjust the pattern of a plurality of layers to obtain an effective density state.

Various etching techniques can be applied as a second method of forming a curved surface in the base insulating film.
FIG. 4 is a sectional view showing an example. First, FIG. 4A shows a state in which an etching protective film 50 is disposed on the uppermost insulating film 24. The etching protective film 50 has an opening 50A having a smaller diameter than the pixel array portion.
Then, isotropic etching (dry etching or wet etching) is performed using the etching protective film 50 as a mask, thereby forming a three-dimensional curved surface 24A on the upper surface of the insulating film 24.
Note that the shape of the curved surface can be appropriately adjusted by selecting a mask and etching conditions.

FIG. 5 shows an example in which a low dielectric constant film (Low K) is provided in addition to the configuration shown in FIG. That is, in the example shown in FIG. 5, the low dielectric constant film 60 is provided on the uppermost insulating film 24, and the color filter and the on-chip microlens 10 are provided thereon. Although FIG. 5 shows the structure of the pixels around the pixel array portion, it is assumed that low dielectric constant films are similarly disposed in other pixels.
In this way, by combining the insulating film and the low dielectric constant material, it is possible to refract the collected light in the direction of the photoelectric conversion unit and efficiently reach the photoelectric conversion unit.
The position where the low dielectric constant film is provided is not limited to the example shown in FIG.

As described above, in the embodiment of the present invention, it is possible to correct the pupil correction, which was conventionally only two-dimensional correction, to three-dimensional, and to obtain a more effective shading suppression effect.
Further, there is an advantage that it can be realized at a low cost without increasing the number of work steps.

It is sectional drawing which shows the structure of the pixel of the peripheral part of the on-chip microlens and pixel array part of the solid-state image sensor by the Example of this invention. It is a perspective view which shows the chip | tip shape of the solid-state image sensor shown in FIG. It is sectional drawing which shows the example of adjustment of the specific base pattern in the case of implement | achieving the solid-state image sensor shown in FIG. It is sectional drawing which shows the etching process in the case of implement | achieving the solid-state image sensor shown in FIG. It is sectional drawing which shows the other pixel structure example of the solid-state image sensor shown in FIG. It is a top view which shows the element structure of the conventional solid-state image sensor. It is sectional drawing which shows the mode of the incident light with respect to the on-chip microlens provided in the conventional solid-state image sensor. It is sectional drawing explaining the change of the shading with respect to the exit pupil distance. It is explanatory drawing which shows the pupil correction | amendment in the conventional solid-state image sensor. It is sectional drawing which shows the structure of the pixel in the conventional solid-state image sensor.

Explanation of symbols

  10 ... On-chip microlens, 20 ... Silicon substrate, 21 ... Subject, 22 ... Transfer electrode, 23 ... Wiring, 24 ... Interlayer insulating film, 25 ... Plug.

Claims (2)

Forming an upper layer film including a wiring and an insulating film on a semiconductor substrate on which a pixel array unit including a plurality of pixels is formed;
A polishing step of polishing the upper surface of the upper layer film by a CMP method;
Forming an on-chip microlens on the upper layer film,
In the polishing step, the upper surface of the upper layer film is formed into a curved surface and the on-chip microlens is formed along the curved surface by adjusting a wiring pattern in the upper layer film to control a polishing rate. and, Ru is changed according to the position of the pixels in the pixel array portion a distance between the plurality of pixels and the on-chip microlens
Method for manufacturing a solid-state imaging device. Forming an upper layer film including a wiring and an insulating film on a semiconductor substrate on which a pixel array unit including a plurality of pixels is formed;
An etching step of etching the upper surface of the upper layer film to form a curved surface;
Forming an on-chip microlens on the upper layer film,
In the etching step, the upper surface of the upper layer film is formed on a curved surface, the on-chip microlens is formed along the curved surface, and the distance between the plurality of pixels and the on-chip microlens is determined in the pixel array unit. Ru is changed according to the position of the pixel
Method for manufacturing a solid-state imaging device.

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