JP4613642B2 - Network equipment - Google Patents

Description

  The present invention relates to a packet transmission device, and more particularly to a network device for packet transmission between local area networks, and performs high-speed and high-reliability route search, ARP search, and filter / QoS processing using an associative memory. This is a technique used for performing the above.

  With the spread of applications such as streaming, the amount of traffic on the Internet is steadily increasing, and there is a demand for higher speed and wider bandwidth of network devices. The operation of the network device can be broadly divided into route search processing and packet transfer processing, but the route search processing greatly affects the performance. For this reason, various ideas and researches have been made to increase the speed of packet route search. As one of the methods, a method for speeding up route search using an associative memory (hereinafter referred to as CAM) has been proposed. For example, a paper, “Fast routing table lookup using CAMs” (in Proceedings of IEEE INFOCOM '93, vol. 3, pp. 1382-1391, Mar. 1993.) can be mentioned. In the case of the conventional method using the binary search tree, it is necessary to perform the access / comparison operation 32 times at maximum in IPv4. In the route search using the CAM, an entry matching the destination address can be searched at a time, so that the search time can be greatly shortened. However, in order to store a large number of entries in the CAM, a large-capacity CAM is required, which is difficult due to the degree of integration and cost. In recent years, CAMs have been increased in capacity and reduced in cost due to improvements in the degree of integration of semiconductors, and CAMs have come to be widely used for network device route searches, ARP searches, filters and QoS processing, and the like. However, on the other hand, the search process can be speeded up. However, since a large amount of operating current flows in the CAM during the search operation, there is a problem that a large power supply noise is generated in the power line of the CAM itself and the operation becomes unstable. It was.

“Fast routing table lookup using CAMs” (in Proceedings of IEEE INFOCOM '93, vol. 3, pp. 1382-1391, Mar. 1993.)

  For example, when a packet has not arrived from the line, the search engine circuit does not issue a search command, so the CAM does not perform a search operation and flows almost no operating current. When packets with short packet lengths arrive continuously from this state, the search engine circuit issues search commands continuously, so the CAM performs a search operation continuously. When such an operation is performed, the power supply current of the CAM greatly fluctuates from almost 0 to the maximum value in a short time, which causes a large power supply noise. Due to this power supply noise, fluctuations in the circuit delay of the CAM internal logic circuit and inversion of the logic value inside the CAM may occur, and an erroneous search result may be output or an incorrect value may be searched during the search operation. Since Internet users are increasing year by year and the number of entries stored in the CAM is expected to increase in the future, the power supply current during the CAM search operation is also expected to increase, resulting in an increase in power supply noise. Conceivable. In order to reduce the power supply noise, a wide variety of decoupling capacitors are mounted on the circuit board in the network device on which the CAM is mounted, and the component mounting area cost of the circuit board becomes a problem. An object of the present invention is to solve these problems and to provide a technique for realizing a route search using a CAM, an ARP search, and a filter / QoS process with high reliability.

  In the present invention, when a packet has not arrived from the line, the search engine circuit issues a dummy search command so that the operating current of the CAM flows on average, so that the power supply current fluctuation amount is reduced. In addition, when a search command is issued to increase the amount of power supply current fluctuation as described above, the search engine circuit controls the power supply voltage of the CAM, the circuit delay fluctuation of the CAM internal logic circuit, the CAM internal The inversion of the logical value of is compensated. Furthermore, the transient response characteristic is speeded up as a configuration having a regulator circuit inside the CAM.

  In the present invention, it is possible to construct a network device that can realize route search, ARP search, and filter / QoS processing using CAM with high reliability.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing an example of a network device to which the present invention is applied. A routing manager circuit 110 and a crossbar switch circuit 120 are mounted on the routing manager board 100. The routing manager circuit 110 is a part that manages route information, and provides route information to the search engine circuit 240 via the crossbar switch circuit 120. The crossbar switch circuit 120 is a switch circuit that performs packet transfer between the routing processor boards 200. The routing processor board 200 includes a transfer engine circuit 210, a packet buffer circuit 220, a header buffer circuit 230, a search engine circuit 240, a route search CAM 250, an ARP search CAM 260, a filter / QoS processing CAM 270, and a switch circuit 280. ing. The network interface 300 is an input / output port connected to the network, and is provided for each line type such as WAN, LAN, and ATM.

  Next, the flow of packet transfer processing will be briefly described. When the packet arrives at the network interface 300 from the line, the packet is sent to the transfer engine circuit 210. The transfer engine circuit 210 stores the data information included in the packet in the packet buffer circuit 220 and the header information in the header buffer circuit 230. For example, the header part of an Ethernet (registered trademark) packet includes information such as a reception destination, a transmission source address, and a data length. The search engine circuit 240 receives header information from the transfer engine circuit 210, and acquires information necessary for packet transfer control with reference to various tables. Tables referred to by the search engine circuit 240 include a route table, an ARP table, and a filter / QoS table. Here, the route table and the filter / QoS table are referred to. The route table is a table for performing route search processing, and is referred to using a result of searching for an entry in the route search CAM 250. The filter / QoS table is information such as packet filtering conditions / discard conditions, transfer processing priority in the apparatus, and the like, and is referred to using a result of searching for an entry in the filter / QoS processing CAM 270.

  Control information obtained from these results is sent from the search engine circuit 240 to the transfer engine circuit 210. The transfer engine circuit 210 designates an input / output port to which a packet is to be transferred, and transfers the packet to the switch circuit 280 and the crossbar switch circuit 120. Further, the crossbar switch circuit 120 transfers to the corresponding routing processor board 200 and is sent from the switch circuit 280 to the transfer engine circuit 210. The transfer engine circuit 210 stores the received packet in the packet buffer circuit 220 and the header buffer circuit 230. The search engine circuit 240 receives the header information from the transfer engine circuit 210 and acquires the MAC address from the ARP table using the ARP search CAM 260. The ARP table is a comparison table of IP addresses and MAC addresses used for Ethernet communication, and stores information on port numbers to which devices represented by MAC addresses are connected. This search result is returned to the transfer engine circuit 210, and a packet is transmitted from the network interface 300 having the specified input / output port.

  FIG. 2 is a block diagram showing an example of a conventional search engine circuit. The search engine circuit 240 receives the header information sent from the transfer engine circuit 210, writes the search data into the search data reception buffer circuit 241, and increments (+1) the counter value in the search command issue circuit 242. When the search command is issued, the selector circuit 243 decrements (-1) the counter value in the search command issue circuit 242, and continues to issue the search command if the counter value is +1 or more. Further, the search engine circuit 240 is provided with a path 281 for maintaining the entry of the CAM 251 sent from the routing manager circuit 110. When a maintenance data / maintenance command is received from this path 281, this path is given priority. Then, maintenance of the CAM 251 is performed. When the maintenance command is issued, the search data is accumulated and held in the search data reception buffer circuit 241.

  FIG. 3 is a truth table showing the operation of the selector circuit in the conventional search engine circuit. The frequency of issuing the maintenance command is extremely rare with respect to the frequency of issuing the search command. In normal operation, the search command is often issued or is in a NOP (No Operation) state. As described above, when the CAM is in the NOP state, the power supply current hardly flows. When packets with short packet lengths arrive continuously from this state, the search engine circuit issues search commands continuously, so the CAM performs a search operation continuously. When such an operation is performed, the power supply current of the CAM greatly fluctuates from almost 0 to the maximum value in a short time, which causes a large power supply noise.

  FIG. 4 shows an image of the operation at this time. The upper stage is the CAM operating state, the middle stage is the CAM power supply current transition, and the lower stage is the CAM power supply voltage transition. In the conventional search processing, the large power supply noise shown in the lower stage causes fluctuations in the circuit delay of the CAM internal logic circuit and inversion of the logic value in the CAM, and an incorrect search result is output or an incorrect value is found during the search operation. There was a problem searching.

  FIG. 5 is a block diagram of the first embodiment of the present invention. The mechanism for issuing the search command / maintenance command is almost the same as the configuration described in FIG. The search engine circuit 340 according to the first embodiment of the present invention has a dummy search data holding circuit 344 and a dummy search command issuing circuit 345. The data held in the dummy search data holding circuit 344 may be an arbitrary value. The dummy search command issuing circuit 345 has an N-ary counter inside. It is desirable that the value of N of the N-ary counter has a function of changing from the outside. Thus, the dummy search command issuance interval can be changed.

  FIG. 6 is a truth table representing the operation of the selector circuit 343 in the search engine circuit 340 of FIG. The purpose of the present invention is to issue a dummy search command so that the operating current of the CAM is allowed to flow on an average to reduce the amount of power supply current fluctuation, so that the maintenance command and the dummy search command conflict. In this case, priority is given to the dummy search command. Therefore, as shown in FIG. 5, the path to be maintained from the routing manager 110 has a circuit configuration that can be buffered similarly to the search path. Further, the value of N in the N-ary counter in the dummy search command issuing circuit 345 is set to the minimum pitch that can be searched by the CAM 351, and the operation current of the CAM 351 is controlled to be maximum when the apparatus is started up. The fluctuation amount may be reduced.

  FIG. 7 shows an image when the operation current of the CAM 351 is made to flow on average. The upper stage is the CAM operation state, the middle stage is the CAM power supply current transition, and the lower stage is the CAM power supply voltage transition. It is. The power supply noise shown in the lower stage is reduced as compared with the prior art, and the reliability of search processing using CAM can be improved.

  FIG. 8 is a block diagram of the second embodiment of the present invention. The mechanism for issuing the search command / maintenance command is the same as that described with reference to FIG. The search engine circuit 440 according to the second embodiment of the present invention has a power supply control circuit 448. The power supply control circuit 448 monitors the search command / maintenance command. If the counter value in the search command issuing circuit 442 is a value equal to or greater than +1, the power supply control circuit 448 outputs a signal for increasing (UP) the power supply voltage of the CAM 451. If the value is 0, a signal for lowering (DOWN) the power supply voltage of the CAM 451 is output. Since the search operation is not performed while the CAM is in the NOP state and the maintenance operation, a signal for lowering (DOWN) the power supply voltage of the CAM is output. These signals are sent to the power supply circuit 450 that supplies power to the CAM 451 to control the power supply voltage of the CAM 451. Since a power supply circuit having a function of increasing / lowering the output voltage is generally widely available, description of this circuit is omitted. Since the timing for controlling the power supply voltage of the CAM needs to coincide with the timing at which the power supply noise of the CAM is generated, the timing is adjusted as a configuration having the variable delay circuit 449. The variable delay circuit 449 desirably has a function of changing the delay amount from the outside.

  FIG. 9 is a truth table representing the operation of the power supply control circuit 448 in the search engine circuit 440 of FIG. By controlling the power supply voltage of the CAM 451, power supply voltage fluctuation due to power supply noise is compensated.

  FIG. 10 shows an operation image at this time, in which the upper stage is the CAM operating state, the middle stage is the CAM power supply current transition, and the lower stage is the CAM power supply voltage transition. By controlling the power supply voltage of the CAM 451 to compensate for the variation in the circuit delay of the CAM internal logic circuit and the inversion of the logic value in the CAM, the reliability of the search processing using the CAM can be improved. Further, when the NOP state and the maintenance command are issued, the power supply voltage of the CAM 451 is lowered (DOWN), which contributes to reducing the power consumption of the apparatus.

  The second embodiment (FIG. 8) of the present invention controls the output voltage of the power supply circuit 450 that supplies power to the CAM 451 as a method of controlling the power supply voltage of the CAM 451. However, in general, the transient response time of the power supply circuit is longer than the time from when the search engine circuit issues a search command to when the CAM performs a search operation. Further, since many decoupling capacitors are mounted on the circuit board in the network device on which the CAM is mounted, the transient response characteristic is further delayed. Therefore, it is difficult to control the output voltage of the power supply circuit that supplies power to the CAM as in the above embodiment so as to coincide with the generation timing of the power supply noise.

  FIG. 11 shows another configuration example of the CAM as a countermeasure against the above-described problem. The CAM 551 includes a series regulator circuit 552 that generates its own power supply voltage. The series regulator circuit 552 generally has excellent transient response characteristics. By providing this inside the CAM, only the capacitor on the chip needs to be charged, and the deterioration of the transient response characteristic is small.

  FIG. 12 shows a third embodiment of the present invention using the CAM 551 shown in FIG. The search engine circuit 540 has the same configuration as the search engine circuit 440 of FIG.

  The embodiments of the present invention have been described above with reference to the drawings. The technology of the present invention can be applied not only to a route search CAM, an ARP search CAM, and a filter / QoS processing CAM, but also to other circuits that perform a search process using a CAM and devices using the same. The present invention is not limited to the above-described embodiments, and various embodiments can be taken without departing from the spirit of the present invention.

1 is a block diagram of a network device according to an embodiment of the present invention. It is a block diagram of the conventional search engine circuit. 3 is a truth table representing the operation of the selector circuit shown in FIG. It is a search operation image figure of FIG. It is a block diagram of the 1st example of the present invention. 6 is a truth table showing the operation of the selector circuit shown in FIG. FIG. 6 is a search operation image diagram of FIG. 5. It is a block diagram of the 2nd example of the present invention. 9 is a truth table representing the operation of the power supply control circuit shown in FIG. FIG. 9 is an image diagram of a search operation in FIG. 8. It is a block diagram of CAM concerning the 3rd example of the present invention. It is a block diagram of the 3rd Example of this invention using CAM of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Routing manager board 110 ... Routing manager circuit 120 ... Crossbar switch circuit 200 ... Routing processor board 210 ... Transfer engine circuit 220 ... Packet buffer circuit 230 ... Header buffer circuit 240 ... Search engine circuit 241 ... Search data reception buffer circuit 242 ... Search command issue circuit 243 ... Selector circuit 250 ... Path search CAM
260 ... CAM for ARP search
270 ... CAM for QoS processing
280 ... Switch circuit 300 ... Network interface 344 ... Dummy search data holding circuit 345 ... Dummy search command issuing circuit 448 ... Power supply control circuit 449 ... Variable delay circuit 450 ... Power supply circuit 551 ... CAM with built-in regulator
552 ... Series regulator circuit

Claims (8)

A network device for transmitting packets,
An associative memory for performing information retrieval processing ;
A search engine unit that issues a search command for a transfer destination of the received packet to the associative memory;
If the search command is not issued within a predetermined time interval, the search engine unit issues a dummy search command to the associative memory for reducing a power supply voltage fluctuation amount of the associative memory. apparatus. A network device for transmitting packets,
An associative memory for performing information retrieval processing ;
A search engine unit that issues a search command for a transfer destination of the received packet to the associative memory;
A power control unit configured to dynamically change a power supply voltage fluctuation amount of the associative memory when the search command is not issued from the search engine to the associative memory within a predetermined time interval ; Network device to perform.   The network device according to claim 2, wherein
  The associative memory includes a series regulator unit therein, and a network device.   An associative memory control circuit used in a network device that transmits packets,
  If a search command is not issued from the search engine unit to the associative memory within a predetermined time interval, a dummy search command for reducing the power supply voltage fluctuation amount of the associative memory from the search engine unit to the associative memory is provided. An associative memory control circuit characterized by being issued.   An associative memory control circuit used in a network device that transmits packets,
  An associative memory control circuit characterized by dynamically changing a power supply voltage fluctuation amount of the associative memory unless a search command is issued from the search engine unit to the associative memory within a predetermined time interval.   An associative memory control circuit according to claim 5,
  The associative memory includes a series regulator unit.   An associative memory used in a network device that transmits packets,
  An associative memory characterized by dynamically changing a power supply voltage fluctuation amount of the associative memory unless a search command is issued from the search engine unit to the associative memory within a predetermined time interval.   An associative memory according to claim 7,
  An associative memory having a series regulator section.

Images