JP4604382B2 - Storage rack, connection device, and storage rack system - Google Patents

Description

で定義すると、次のような観測方程式が成立する。
【０１４０】
ＸＷ＝Ｙ’
・・・（２）
ここで、行列Ｘの成分ｘ_ijは、ｉ件目の生徒データの集合（ｉ件目の教師データｙ_iの予測に用いる生徒データの集合）の中のｊ番目の生徒データを意味し、行列Ｗの成分ｗ_jは、生徒データの集合の中のｊ番目の生徒データとの積が演算されるタップ係数を表す。また、ｙ_iは、ｉ件目の教師データを表し、従って、Ｅ［ｙ_i］は、ｉ件目の教師データの予測値を表す。なお、式（１）の左辺におけるｙは、行列Ｙの成分ｙ_iのサフィックスｉを省略したものであり、また、式（１）の右辺におけるｘ₁，ｘ₂，・・・も、行列Ｘの成分ｘ_ijのサフィックスｉを省略したものである。
【０１４１】
そして、この観測方程式に最小自乗法を適用して、ＨＤ画素の画素値ｙに近い予測値Ｅ［ｙ］を求めることを考える。この場合、教師データとなるＨＤ画素の真の画素値ｙの集合でなる行列Ｙ、およびＨＤ画素の画素値ｙに対する予測値Ｅ［ｙ］の残差ｅの集合でなる行列Ｅを、
【数２】

で定義すると、式（２）から、次のような残差方程式が成立する。
【０１４２】
ＸＷ＝Ｙ＋Ｅ
・・・（３）
【０１４３】
この場合、ＨＤ画素の画素値ｙに近い予測値Ｅ［ｙ］を求めるためのタップ係数ｗ_jは、自乗誤差
【数３】

を最小にすることで求めることができる。
【０１４４】
従って、上述の自乗誤差をタップ係数ｗ_jで微分したものが０になる場合、即ち、次式を満たすタップ係数ｗ_jが、ＨＤ画素の画素値ｙに近い予測値Ｅ［ｙ］を求めるため最適値ということになる。
【０１４５】
【数４】

・・・（４）
【０１４６】
そこで、まず、式（３）を、タップ係数ｗ_jで微分することにより、次式が成立する。
【０１４７】
【数５】

・・・（５）
【０１４８】
式（４）および（５）より、式（６）が得られる。
【０１４９】
【数６】

・・・（６）
【０１５０】
さらに、式（３）の残差方程式における生徒データｘ_ij、タップ係数ｗ_j、教師データｙ_i、および残差ｅ_iの関係を考慮すると、式（６）から、次のような正規方程式を得ることができる。
【０１５１】
【数７】

・・・（７）
【０１５２】
なお、式（７）に示した正規方程式は、行列（共分散行列）Ａおよびベクトルｖを、
【数８】

で定義するとともに、ベクトルＷを、数１で示したように定義すると、式
ＡＷ＝ｖ
・・・（８）
で表すことができる。
【０１５３】
式（７）における各正規方程式は、生徒データｘ_ijおよび教師データｙ_iのセットを、ある程度の数だけ用意することで、求めるべきタップ係数ｗ_jの数Ｊと同じ数だけたてることができ、従って、式（８）を、ベクトルＷについて解くことで（但し、式（８）を解くには、式（８）における行列Ａが正則である必要がある）、最適なタップ係数ｗ_jを求めることができる。なお、式（８）を解くにあたっては、例えば、掃き出し法（Gauss-Jordanの消去法）などを用いることが可能である。
【０１５４】
以上のように、生徒データと教師データを用いて、生徒データとタップ係数から、教師データを予測するのに最適なタップ係数ｗ_jを求める学習をしておき、さらに、そのタップ係数ｗ_jを用い、式（１）により、教師データｙに近い予測値Ｅ［ｙ］を求めるのが適応処理である。
【０１５５】
なお、適応処理は、ＳＤ画像には含まれていないが、ＨＤ画像に含まれる成分が再現される点で、例えば、単なる補間処理とは異なる。即ち、適応処理では、式（１）だけを見る限りは、いわゆる補間フィルタを用いての補間処理と同一に見えるが、その補間フィルタのタップ係数に相当するタップ係数ｗが、教師データと生徒データを用いての学習により求められるため、ＨＤ画像に含まれる成分を再現することができる。このことから、適応処理は、いわば画像の創造（解像度創造）作用がある処理ということができる。
【０１５６】
また、ここでは、適応処理について、空間解像度を向上させる場合を例にして説明したが、適応処理によれば、教師データおよび生徒データを変えて学習を行うことにより得られる種々のタップ係数を用いることで、例えば、Ｓ／Ｎ(Signal to Noise Ratio)の向上や、ぼけの改善、その他の各種の処理を行うことが可能である。
【０１５７】
即ち、例えば、Ｓ／Ｎの向上やぼけの改善を、適応処理によって行うには、Ｓ／Ｎの高い画像データを教師データとするとともに、その教師データのＳ／Ｎを低下させた画像（あるいは、ぼかした画像）を生徒データとして、タップ係数を求めればよい。
【０１５８】
また、例えば、コンポジット／コンポーネント変換処理と空間解像度向上処理を、適応処理によって一括で施すには、コンポーネント信号のＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させ、さらにコンポジット信号に変換した画像を生徒データとして、タップ係数を求めればよい。
【０１５９】
また、例えば、コンポーネント信号の画像に対し、空間解像度向上処理を、適応処理によって施すには、コンポーネント信号のＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させたＳＤ画像を生徒データとして、タップ係数を求めればよい。
【０１６０】
また、例えば、ＭＰＥＧ符号化された画像に対し、ＭＰＥＧ復号処理および空間解像度向上処理を、適応処理によって一括で施すには、コンポーネント信号のＨＤ画像をＭＰＥＧ符号化して復号したものを教師データとするとともに、その教師データの空間解像度を低下させ、さらにＭＰＥＧ符号化した符号化データを生徒データとして、タップ係数を求めれば良い。
【０１６１】
また、例えば、ＭＰＥＧ符号化された画像に対し、ＭＰＥＧ復号処理および空間解像度向上処理を、適応処理によって一括で施すには、コンポーネント信号の画像を教師データとするとともに、その教師データをＭＰＥＧ符号化した符号化データを生徒データとして、タップ係数を求めれば良い。
【０１６２】
次に、図２２は、上述のようなクラス分類適応処理を行うクラス分類適応処理回路によって実現される、ＴＶ信号処理部１０６の信号処理部１１３の構成例を示している。なお、電子機器１１（図１７）の信号処理部１２３も同様に構成される。
【０１６３】
信号処理回路１１３において処理すべき入力データ（入力信号）は、バッファ１３１に供給され、バッファ１３１は、そこに供給される入力データを一時記憶する。
【０１６４】
予測タップ抽出回路１３２は、後述する積和演算回路１３６において求めようとする出力データを、順次、注目データとし、さらに、その注目データを予測するのに用いる入力データを、バッファ１３１から抽出し、予測タップとする。
【０１６５】
即ち、例えば、入力データがＳＤ画像データであり、出力データが、そのＳＤ画像の空間解像度を向上させたＨＤ画像データである場合には、予測タップ抽出回路１３２は、例えば、注目データとしてのＨＤ画素に対応する位置に対して、空間的または時間的に近い位置にあるＳＤ画像のＳＤ画素の幾つかを、予測タップとして抽出する。
【０１６６】
また、例えば、入力データが、画像をＭＰＥＧ符号化した符号化データであり、出力データが、その符号化データをＭＰＥＧ復号した画像データである場合には、予測タップ抽出回路１３２は、例えば、注目データとしての画素を含むＤＣＴブロック（ＭＰＥＧ符号化の際のＤＣＴ(Discrete Cosine Transform)処理の単位となるブロック）を構成するＤＣＴ係数や、そのＤＣＴブロックから空間的または時間的に近い位置にあるＤＣＴ係数等を、さらには、注目データとしての画素が、他のフレーム（またはフィールド）の画像を予測画像としてＭＰＥＧ符号化されたものであるとき（例えば、ＰピクチャやＢピクチャであるとき）には、その予測画像を構成する画素のＤＣＴ係数等を、予測タップとして抽出する。
なお、その他、既に出力データとして出力された、予測画像となる画像の画素を、予測タップとすることも可能である。
【０１６７】
予測タップ抽出回路１３２は、注目データについて、予測タップを得ると、その注目データについての予測タップを、積和演算回路１３６に供給する。
【０１６８】
ここで、予測タップ抽出回路１３２には、機能制御部１３７から制御信号が供給されるようになっており、予測タップ抽出回路１３２は、機能制御部１３７からの制御信号にしたがって、予測タップを構成させる入力データ（さらには、出力データ）、即ち、予測タップの構造を決定する。
【０１６９】
クラスタップ抽出回路１３３は、注目データを、幾つかのクラスのうちのいずれかに分類するためのクラス分類に用いる入力データを、バッファ１３１から抽出し、クラスタップとする。
【０１７０】
ここで、クラスタップ抽出回路１３３にも、機能制御部１３７から制御信号が供給されるようになっており、クラスタップ抽出回路１３３も、予測タップ抽出回路１３２と同様に、機能制御部１３７からの制御信号にしたがって、クラスタップを構成させる入力データ、即ち、クラスタップの構造を決定する。
【０１７１】
なお、ここでは、説明を簡単にするために、例えば、予測タップ抽出回路１３２で得られる予測タップと、クラスタップ抽出回路１３３で得られるクラスタップとは、同一のタップ構造を有するものとする。但し、勿論、予測タップとクラスタップとは、独立のタップ構造を有するものとすることが可能である。
【０１７２】
クラスタップ抽出回路１３３において得られる、注目データについてのクラスタップは、クラス分類回路１３４に供給される。クラス分類回路１３４は、クラスタップ抽出回路１３３からのクラスタップに基づき、注目データをクラス分類し、その結果得られるクラスに対応するクラスコードを出力する。
【０１７３】
ここで、クラス分類を行う方法としては、例えば、ADRC(Adaptive Dynamic Range Coding)等を採用することができる。
【０１７４】
ADRCを用いる方法では、クラスタップを構成する入力データが、ADRC処理され、その結果得られるADRCコードにしたがって、注目データのクラスが決定される。
【０１７５】
なお、KビットADRCにおいては、例えば、クラスタップを構成する入力データの最大値MAXと最小値MINが検出され、DR=MAX-MINを、集合の局所的なダイナミックレンジとし、このダイナミックレンジDRに基づいて、クラスタップを構成する入力データがKビットに再量子化される。即ち、クラスタップを構成する入力データの中から、最小値MINが減算され、その減算値がDR/2^Kで除算（量子化）される。そして、以上のようにして得られる、クラスタップを構成するKビットの各入力データを、所定の順番で並べたビット列が、ADRCコードとして出力される。従って、クラスタップが、例えば、１ビットADRC処理された場合には、そのクラスタップを構成する各入力データは、最小値MINが減算された後に、最大値MAXと最小値MINとの平均値で除算され、これにより、各入力データが１ビットとされる（２値化される）。そして、その１ビットの入力データを所定の順番で並べたビット列が、ADRCコードとして出力される。
【０１７６】
なお、クラス分類回路１３４には、例えば、クラスタップを構成する入力データのレベル分布のパターンを、そのままクラスコードとして出力させることも可能であるが、この場合、クラスタップが、Ｎ個の入力データで構成され、各入力データに、Ｋビットが割り当てられているとすると、クラス分類回路１３４が出力するクラスコードの場合の数は、（２^N）^K通りとなり、入力データのビット数Ｋに指数的に比例した膨大な数となる。
【０１７７】
従って、クラス分類回路１３４においては、クラスタップの情報量を、上述のADRC処理や、あるいはベクトル量子化等によって圧縮してから、クラス分類を行うのが好ましい。
【０１７８】
クラス分類回路１３４が出力するクラスコードは、係数記憶部１３５に、アドレスとして与えられる。
【０１７９】
係数記憶部１３５は、学習処理が行われることにより得られるタップ係数を記憶しており、クラス分類回路１３４が出力するクラスコードに対応するアドレスに記憶されているタップ係数を、積和演算回路１３６に出力する。
【０１８０】
なお、係数記憶部１３５には、後述するように、複数セットの教師データと生徒データを用いた学習を行うことにより得られる複数セットのタップ係数が記憶されている。係数記憶部１３５において、複数セットのタップ係数のうち、どのセットのタップ係数を用いるかは、機能制御部１３７からの制御信号にしたがって決定される。即ち、係数記憶部１３５には、機能制御部１３７が出力する制御信号が供給されるようになっており、係数記憶部１３５は、その制御信号にしたがって、用いるタップ係数のセットを決定し、そのタップ係数のセットの中から、クラス分類回路１３４より供給されるクラスコードに対応するものを、積和演算回路１３６に出力する。
【０１８１】
積和演算回路１３６は、予測タップ抽出回路１３２が出力する予測タップと、係数記憶部１３５が出力するタップ係数とを取得し、その予測タップとタップ係数とを用いて、式（１）に示した線形予測演算（積和演算）を行い、その演算結果を、出力データとして出力する。
【０１８２】
機能制御部１３７には、コントローラ１１２（図１６）から制御信号が供給されるようになっており、機能制御部１３７は、その制御信号にしたがって、予測タップ抽出回路１３２、クラスタップ抽出回路１３３、および係数記憶部１３５を制御する。
【０１８３】
次に、図２３は、図２２の係数記憶部１３５に記憶させるタップ係数の学習処理を行う学習装置の一実施の形態の構成例を示している。
【０１８４】
教師データ生成回路１４１には、学習に用いられる学習用データが供給される。ここで、学習用データとしては、ＨＤ画像データ等の、品質の高いデータを用いることができる。
【０１８５】
教師データ生成回路１４１は、学習用データから、学習の教師となる教師データを生成する。
【０１８６】
即ち、例えば、学習用データがＨＤ画像データである場合において、学習により求めようとするタップ係数が、ＳＤ画像をＨＤ画像に変換するためのものであるときや、ＭＰＥＧ符号化データをＨＤ画像に変換するためのものであるとき等には、教師データ生成回路１４１は、学習用データとしてのＨＤ画像データを、そのまま教師データとして出力する。
【０１８７】
また、例えば、学習用データがＨＤ画像データである場合において、学習により求めようとするタップ係数が、Ｓ／Ｎの低いＳＤ画像をＳ／Ｎの高いＳＤ画像に変換するためのものであるときや、ＭＰＥＧ符号化データをＳＤ画像に変換するためのものであるとき等には、教師データ生成回路１４１は、学習用データとしてのＨＤ画像データから、その画素数を間引く等して、ＳＤ画像データを生成し、これを、教師データとして出力する。
【０１８８】
教師データ生成回路１４１が出力する教師データは、教師データメモリ１４２に供給される。教師データメモリ１４２は、教師データ生成回路１４１からの教師データを記憶する。
【０１８９】
生徒データ生成回路１４３は、教師データメモリ１４２に記憶された教師データから、学習の生徒となる生徒データを生成する。
【０１９０】
即ち、例えば、学習により求めようとするタップ係数が、ＳＤ画像をＨＤ画像に変換するためのものである場合には、教師データメモリ１４２には、上述のように、教師データとしてのＨＤ画像が記憶されるが、この場合、生徒データ生成回路１４３は、教師データの画素数を間引く等して、ＳＤ画像データを生成し、これを、生徒データとして出力する。
【０１９１】
また、例えば、学習により求めようとするタップ係数が、ＭＰＥＧ符号化データをＨＤ画像に変換するためのものである場合には、教師データメモリ１４２には、上述のように、教師データとしてのＨＤ画像が記憶されるが、この場合、生徒データ生成回路１４３は、教師データをＭＰＥＧ符号化することにより符号化データを生成し、これを、生徒データとして出力する。
【０１９２】
さらに、例えば、学習により求めようとするタップ係数が、Ｓ／Ｎの低いＳＤ画像をＳ／Ｎの高いＳＤ画像に変換するためのものである場合には、教師データメモリ１４２には、上述のように、教師データとしてのＳＤ画像が記憶されるが、この場合、生徒データ生成回路１４３は、教師データにノイズを付加することにより、Ｓ／Ｎの低いＳＤ画像データを生成し、これを、生徒データとして出力する。
【０１９３】
また、例えば、学習により求めようとするタップ係数が、ＭＰＥＧ符号化データをＳＤ画像に変換するためのものである場合には、教師データメモリ１４２には、上述のように、教師データとしてのＳＤ画像が記憶されるが、この場合、生徒データ生成回路１４３は、教師データをＭＰＥＧ符号化することにより符号化データを生成し、これを、生徒データとして出力する。
【０１９４】
生徒データ生成回路１４３が出力する生徒データは、生徒データメモリ１４４に供給される。生徒データメモリ１４４は、生徒データ生成回路１４３から供給される生徒データを記憶する。
【０１９５】
予測タップ抽出回路１４５は、教師データメモリ１４２に記憶された教師データを、順次、注目データとし、さらに、図２２の予測タップ抽出回路１３２と同様に、その注目データを予測するのに用いる生徒データを、生徒データメモリ１４４から抽出し、予測タップとする。予測タップ抽出回路１４５で得られた予測タップは、正規方程式加算回路１４８に供給される。
【０１９６】
クラスタップ抽出回路１４６は、図２２のクラスタップ抽出回路１３３と同様に、注目データのクラス分類に用いる生徒データを、生徒データメモリ１４４から抽出し、クラスタップとして、クラス分類回路１４７に供給する。クラス分類回路１４７は、図２２のクラス分類回路１３４と同様に、クラスタップ抽出回路１４６からのクラスタップを用いてクラス分類を行い、注目データのクラスを表すクラスコードを、正規方程式加算回路１４８に供給する。
【０１９７】
正規方程式加算回路１４８は、教師データメモリ１４２から、注目データとなっている教師データを読み出し、予測タップ抽出回路１４５からの予測タップを構成する生徒データ、および注目データとしての教師データを対象とした足し込みを行う。
【０１９８】
即ち、正規方程式加算回路１４８は、クラス分類回路１４７から供給されるクラスコードに対応するクラスごとに、予測タップ（生徒データ）を用い、式（８）の行列Ａにおける各コンポーネントとなっている、生徒データどうしの乗算（ｘ_inｘ_im）と、サメーション（Σ）に相当する演算を行う。
【０１９９】
さらに、正規方程式加算回路１４８は、やはり、クラス分類回路１４７から供給されるクラスコードに対応するクラスごとに、予測タップ（生徒データ）および注目画素（教師データ）を用い、式（８）のベクトルｖにおける各コンポーネントとなっている、生徒データと教師データの乗算（ｘ_inｙ_i）と、サメーション（Σ）に相当する演算を行う。
【０２００】
正規方程式加算回路１４８は、以上の足し込みを、教師データメモリ１４２に記憶された教師データすべてを注目データとして行い、これにより、各クラスについて、式（８）に示した正規方程式をたてる。
【０２０１】
タップ係数決定回路１４９は、正規方程式加算回路１４８においてクラスごとに生成された正規方程式を解くことにより、クラスごとに、タップ係数を求め、係数テーブル記憶部１５０の、各クラスに対応するアドレスに供給する。
【０２０２】
なお、学習用データとして用意するデータによっては、正規方程式加算回路１４８において、タップ係数を求めるのに必要な数の正規方程式が得られないクラスが生じる場合があり得るが、タップ係数決定回路１４９は、そのようなクラスについては、例えば、デフォルトのタップ係数を出力する。
【０２０３】
係数テーブル記憶部１５０は、タップ係数決定回路１４９から供給されるクラスごとのタップ係数を記憶する。
【０２０４】
制御回路１５１は、教師データ生成回路１４１、生徒データ生成回路１４２、予測タップ抽出回路１４５、およびクラスタップ抽出回路１４６を制御する。
【０２０５】
即ち、図２３の学習装置においては、どのような処理を行うタップ係数を学習するかを表す情報として、そのタップ係数を用いて行われる処理の内容を表す処理情報が、図示せぬ操作部が操作されることにより、制御回路１５１に設定されるようになっている。制御回路１５１は、操作部が操作されることにより設定される処理情報にしたがい、教師データ生成回路１４１、生徒データ生成回路１４２、予測タップ抽出回路１４５、およびクラスタップ抽出回路１４６を制御する。
【０２０６】
これにより、教師データ生成回路１４１では、制御回路１５１の制御にしたがい、学習用データから教師データが生成される。生徒データ生成回路１４３でも、制御回路１５１の制御にしたがい、教師データから生徒データが生成される。
さらに、予測タップ抽出回路１４５でも、制御回路１５１の制御にしたがい、予測タップのタップ構造が設定され、そのようなタップ構造の予測タップが生成される。クラスタップ抽出回路１４６でも、制御回路１５１の制御にしたがい、クラスタップのタップ構造が設定され、そのようなタップ構造のクラスタップが生成される。
【０２０７】
次に、図２４のフローチャートを参照して、図２３の学習装置の処理（学習処理）について説明する。
【０２０８】
まず最初に、ステップＳ２１において、制御回路１５１は、設定された処理情報に基づいて、教師データ生成回路１４１、生徒データ生成回路１４２、予測タップ抽出回路１４５、およびクラスタップ抽出回路１４６を制御する。これにより、教師データ生成回路１４１では、学習用データから教師データの生成方法が設定され、生徒データ生成回路１４３では、教師データから生徒データの生成方法が設定される。さらに、予測タップ抽出回路１４５では予測タップのタップ構造が設定され、クラスタップ抽出回路１４６では、クラスタップのタップ構造が設定される。
【０２０９】
そして、ステップＳ２２に進み、教師データ生成回路１４１は、ステップＳ２１で設定した生成方法にしたがい、そこに供給される学習用データから教師データを生成し、教師データメモリ１４２に供給して記憶させる。
【０２１０】
その後、生徒データ生成回路１４３は、ステップＳ２３において、ステップＳ２１で設定した生成方法にしたがい、教師データメモリ１４２に記憶された教師データから生徒データを生成し、生徒データメモリ１４４に供給して記憶させる。
【０２１１】
そして、ステップＳ２４に進み、予測タップ抽出回路１４５が、教師データメモリ１４２に記憶された教師データのうち、まだ、注目データとされていないものを注目データとする。さらに、予測タップ抽出回路１４５は、生徒データメモリ１４４から生徒データを読み出すことにより、注目データについて、ステップＳ２１で設定したタップ構造となる予測タップを生成し、正規方程式加算回路１４８に供給する。
【０２１２】
また、ステップＳ２４では、クラスタップ抽出回路１４６が、生徒データメモリ１４４から生徒データを読み出すことにより、注目データについて、ステップＳ２１で設定したタップ構造となるクラスタップを生成し、クラス分類回路１４７に供給して、ステップＳ２５に進む。
【０２１３】
ステップＳ２５では、クラス分類回路１４７が、クラスタップ抽出回路１４６からのクラスタップを用いてクラス分類を行い、注目データについてのクラスコードを求める。このクラスコードは、クラス分類回路１４７から正規方程式加算回路１４８に供給される。
【０２１４】
正規方程式加算回路１４８は、ステップＳ２６において、教師データメモリ１４２から、注目データとなっている教師データを読み出し、予測タップ抽出回路１４５から供給される予測タップを構成する生徒データ、および注目データとしての教師データを対象として、式（８）の行列Ａとベクトルｖの、上述したような足し込みを行う。なお、この足し込みは、クラス分類回路１４７からのクラスコードに対応するクラスごとに行われる。
【０２１５】
そして、ステップＳ２７に進み、予測タップ抽出回路１４５は、教師データメモリ１４２に記憶された教師データのすべてを、注目データとして、足し込みを行ったかどうかを判定する。ステップＳ２７において、教師データのすべてを、注目データとして、まだ足し込みを行っていないと判定された場合、ステップＳ２４に戻り、予測タップ抽出回路１４５は、教師データのうち、まだ、注目データとしていないものを、新たに注目データとして、以下、同様の処理を繰り返す。
【０２１６】
また、ステップＳ２７において、教師データすべてを、注目データとして、足し込みを行ったと判定された場合、ステップＳ２８に進み、タップ係数決定回路１４９は、正規方程式加算回路１４８においてステップＳ２６の足し込みが行われることにより、各クラスごとに生成された正規方程式を解き、これにより、各クラスごとのタップ係数を求め、係数メモリ１５０の、各クラスに対応するアドレスに供給して記憶させ、処理を終了する。
【０２１７】
以上のようにして、係数メモリ１５０には、制御回路１５１に設定された処理情報が表す処理を行うための、各クラスごとのタップ係数が記憶される。
【０２１８】
そして、以上のような学習装置による学習処理は、制御回路１５１に設定する処理情報を変えて行われ、各処理情報ごとのタップ係数のセットが求められる。
【０２１９】
図２２の信号処理回路１１３における係数記憶部１３５には、このようにして、複数の処理情報それぞれに対して求められた複数のタップ係数のセットが記憶されている。
【０２２０】
即ち、図２５は、図２２の係数記憶部１３５の構成例を示している。
【０２２１】
セレクタ１６１と１６２は、機能制御部１３７（図２２）から供給される制御信号にしたがって、Ｎ個の係数メモリ１６３₁乃至１６３_Nのうちのいずれか１つを選択する。なお、セレクタ１６１と１６２は、同一の係数メモリ１６３_nを選択する。
【０２２２】
係数メモリ１６３₁乃至１６３_Nそれぞれは、図２３の学習装置で求められたタップ係数のセットを、処理情報ごとに記憶している。
【０２２３】
以上のように構成される係数記憶部１３５では、セレクタ１６１と１６２が、機能制御部１３７から供給される制御信号にしたがって、Ｎ個の係数メモリ１６３₁乃至１６３_Nの中の１つの係数メモリ１６３_nを選択する。
【０２２４】
また、セレクタ１６１には、クラス分類回路１３４からクラスコードが供給されるようになっており、セレクタ１６１は、このクラスコードを、選択している係数メモリ１６３_nに供給する。係数メモリ１６３_nは、自身が記憶している、処理情報に対応するタップ係数のセットから、セレクタ１６１からのクラスコードに対応するアドレスに記憶されたタップ係数を読み出して出力する。
【０２２５】
係数メモリ１６３_nが出力するタップ係数は、その係数メモリ１６３_nを選択しているセレクタ１６２に供給され、セレクタ１６２は、係数メモリ１６３_nから供給されるタップ係数を、積和演算回路１３６（図２２）に供給する。
【０２２６】
なお、処理情報ごとのタップ係数のセットを記憶する係数メモリ１６３₁乃至１６３_Nは、物理的に別々のメモリである必要はない。即ち、係数メモリ１６３₁乃至１６３_Nは、１つのメモリをバンク切り替えして使用することにより実現すること等が可能である。
【０２２７】
ここで、本実施の形態では、ＴＶ信号処理部１０６における信号処理回路１１３の機能は、コンポジット／コンポーネント変換処理と空間解像度向上処理を一括で施す機能から、空間解像度向上処理のみを施す機能に変化するため、信号処理回路１１３の係数記憶部１３５には、少なくとも、次のような２セットのタップ係数が記憶されている。
【０２２８】
即ち、信号処理回路１１３の係数記憶部１３５における、ある１つの係数メモリ１６３_iには、コンポーネント信号のＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させたＳＤ画像をコンポーネント信号からコンポジット信号に変換したものを生徒データとして学習処理を行うことにより得られるタップ係数のセットが記憶されている。さらに、信号処理回路１１３の係数記憶部１３５における、他の１つの係数メモリ１６３_jには、コンポーネント信号のＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させたＳＤ画像を生徒データとして学習処理を行うことにより得られるタップ係数のセットが記憶されている。
【０２２９】
また、本実施の形態では、電子機器１１（図１７）における信号処理回路１２３の機能は、ＭＰＥＧ復号処理および空間解像度向上処理を一括で施す機能から、ＭＰＥＧ復号処理および歪み除去処理を一括で施す機能に変化するため、電子機器１１の信号処理回路１２３における係数記憶部１３５には、少なくとも、次のような２セットのタップ係数が記憶されている。
【０２３０】
即ち、信号処理回路１２３の係数記憶部１３５における、ある１つの係数メモリ１６３_iには、コンポーネント信号のＨＤ画像をＭＰＥＧ符号化し、その符号化データをＭＰＥＧ復号して得られるＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させたＳＤ画像をＭＰＥＧ符号化した符号化データを生徒データとして学習処理を行うことにより得られるタップ係数のセットが記憶されている。さらに、信号処理回路１２３の係数記憶部１３５における、他の１つの係数メモリ１６３_jには、コンポーネント信号のＳＤ画像を教師データとするとともに、その教師データをＭＰＥＧ符号化した符号化データを生徒データとして学習処理を行うことにより得られるタップ係数のセットが記憶されている。
【０２３１】
なお、ＴＶ信号処理部１０６や電子機器１１の係数記憶部１３５には、その他のタップ係数を記憶させておくことが可能である。即ち、係数記憶部１３５には、例えば、画像の拡大／縮小（リサイズ）を行うタップ係数や、時間方向の解像度を向上させるタップ係数、階調方向の解像度を向上させるタップ係数、ぼけの改善を行うタップ係数、歪みやノイズ除去を行うタップ係数等を記憶させておくことが可能である。
【０２３２】
以上のように、多種類のタップ係数のセットを、係数記憶部１３５に記憶させておき、そのうちのいずれを使用するかを、予測タップやクラスタップのタップ構造とともに切り替えることで、ＴＶ信号処理部１０６の信号処理回路１１３や、電子機器１１の信号処理回路１２３の機能を、容易に変化させることができる。
【０２３３】
次に、図２６のフローチャートを参照して、図２２の信号処理回路１１３の処理について説明する。
【０２３４】
機能制御部１３７は、ステップＳ３１において、コントローラ１１２から、信号処理回路１１３の機能を変更させる制御信号を受信し、その制御信号にしたがって、予測タップ抽出回路１３２、クラスタップ抽出回路１３３、および係数記憶部１３５を制御する。
【０２３５】
即ち、コントローラ１１２から機能制御部１３７に供給される制御信号は、コントローラ１１２が記憶している機能ＩＤに対応付けられた処理情報を含んでおり、機能制御部１３７は、その処理情報にしたがい、図２３の制御回路１５１と同様に、予測タップ抽出回路１３２、クラスタップ抽出回路１３３、および係数記憶部１３５を制御する。
【０２３６】
これにより、予測タップ抽出回路１３２は、図２３の学習装置の予測タップ抽出回路１４５における場合と同一構造のタップ構造を有する予測タップを生成するように設定され、クラスタップ抽出回路１３３も、図２３の学習装置のクラスタップ抽出回路１４６における場合と同一構造のタップ構造を有するクラスタップを生成するように設定される。
【０２３７】
さらに、係数記憶部１３５は、機能制御部１３７からの制御信号に含まれる処理情報に対応するタップ係数のセットを記憶している係数メモリ１６３_n（図２５）を使用するように設定される。
【０２３８】
その後、バッファ１３１に、入力データが供給されて記憶されると、ステップ３２に進み、予測タップ抽出回路１３２が、積和演算回路１３６において求めようとしている出力データのうち、まだ、注目データとされていないものを注目データとし、さらに、バッファ１３１から入力データを読み出すことにより、注目データについて、ステップＳ３１で設定したタップ構造となる予測タップを生成し、積和演算回路１３６に供給する。
【０２３９】
さらに、ステップＳ３２では、クラスタップ抽出回路１３３が、バッファ１３１から入力データを読み出すことにより、注目データについて、ステップＳ３１で設定したタップ構造となるクラスタップを生成し、クラス分類回路１３４に供給して、ステップＳ３３に進む。
【０２４０】
ステップＳ３３では、クラス分類回路１３４が、クラスタップ抽出回路１３３からのクラスタップを用いてクラス分類を行い、注目データについてのクラスコードを求める。このクラスコードは、係数記憶部１３５に供給される。
【０２４１】
係数記憶部１３５（図２５）では、セレクタ１６１および１６２が、ステップＳ３１で設定した係数メモリ１６３_nを選択しており、クラス分類回路１３４からクラスコードが供給されると、ステップＳ３４において、その係数メモリ１６３_nの、クラス分類回路１３４からのクラスコードに対応するアドレスからタップ係数を読み出し、積和演算回路１３６に供給する。
【０２４２】
積和演算回路１３６は、係数記憶部１３５から供給されるタップ係数を取得し、ステップＳ３５において、そのタップ係数と、ステップＳ３２で予測タップ抽出回路１３２から供給される予測タップとを用いて、式（１）に示した積和演算を行い、注目データの予測値を求め、出力データとして出力する。
【０２４３】
ここで、このようにして積和演算回路１３６が出力する出力データは、処理情報に対応したタップ構造の予測タップおよびクラスタップと、タップ係数のセットを用いて得られたものであり、従って、入力データに対し、処理情報が表す処理を施したものとなる。
【０２４４】
その後、ステップＳ３６に進み、予測タップ抽出回路１３２は、まだ、注目データとすべき出力データが存在するかどうかを判定する。ステップＳ３６において、注目データとすべき出力データが存在すると判定された場合、ステップＳ３２に戻り、まだ注目データとしていない出力データを、新たに注目データとして、以下、同様の処理を繰り返す。
【０２４５】
一方、ステップＳ３６において、注目データとすべき出力データが存在しないと判定された場合、処理を終了する。
【０２４６】
以上のように、ＴＶ信号処理部１０６の信号処理回路１１３は、処理情報にしたがって、予測タップ抽出回路１３２で生成される予測タップのタップ構造、クラスタップ抽出回路１３３で構成されるクラスタップのタップ構造、および積和演算回路１３６の積和演算に用いるタップ係数のセットの種類を設定することにより、その機能を変化させる。また、電子機器１１（図１７）の信号処理回路１２３も、信号処理回路１２３と同様にして、その機能を変化させる。そして、信号処理回路１１３と１２３は、このように機能を変化させることにより、入力信号に対する処理を協調して分担する。従って、この場合、信号処理回路１１３または１２３のうちのいずれか一方のみで処理を行う場合よりも、高品質の出力データを得ることが可能となる。
【０２４７】
即ち、ＴＶ信号処理部１０６の信号処理回路１１３単独では、コンポーネント信号のＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させたＳＤ画像をコンポーネント信号からコンポジット信号に変換したものを生徒データとして学習処理を行うことにより得られるタップ係数（以下、適宜、コンポジット／コンポーネント変換かつＳＤ／ＨＤ変換用タップ係数という）を用いて、チューナ１０５（図１５）が出力するベースバンドのＳＤ画像信号であって、コンポジット信号となっているものが処理されることにより、そのコンポジット信号のＳＤ画像信号が、コンポーネント信号のＨＤ画像信号に変換される。
【０２４８】
また、電子機器１１の信号処理回路１２３単独では、コンポーネント信号のＨＤ画像をＭＰＥＧ符号化し、その符号化データをＭＰＥＧ復号して得られるＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させたＳＤ画像をＭＰＥＧ符号化した符号化データを生徒データとして学習処理を行うことにより得られるタップ係数（以下、適宜、ＭＰＥＧ復号かつＳＤ／ＨＤ変換用タップ係数という）を用いて、特有ブロック１２４（図１７）が出力する、コンポーネント信号のＳＤ画像信号をＭＰＥＧ符号化した符号化データが処理されることにより、その符号化データが、コンポーネント信号のＨＤ画像信号に変換される。
【０２４９】
一方、ＴＶ信号処理部１０６と電子機器１１とが電気的に接続された場合には、ＴＶ信号処理部１０６の信号処理回路１１３と、電子機器１１の信号処理回路１２３とは、それぞれの機能を変化させ、入力信号に対する処理を協調分担する。
【０２５０】
即ち、まず、電子機器１１の信号処理回路１２３において、コンポーネント信号のＳＤ画像を教師データとするとともに、その教師データをＭＰＥＧ符号化した符号化データを生徒データとして学習処理を行うことにより得られるタップ係数（以下、適宜、ＭＰＥＧ復号用タップ係数という）を用いて、特有ブロック１２４（図１７）が出力する、コンポーネント信号のＳＤ画像信号をＭＰＥＧ符号化した符号化データが処理されることにより、その符号化データが、コンポーネント信号のＳＤ画像信号に変換される。
【０２５１】
そして、ＴＶ信号処理部１０６の信号処理回路１１３において、コンポーネント信号のＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させたＳＤ画像を生徒データとして学習処理を行うことにより得られるタップ係数（以下、適宜、ＳＤ／ＨＤ変換用タップ係数という）を用いて、電子機器１１の信号処理回路１２３で得られたコンポーネント信号のＳＤ画像信号が処理されることにより、そのＳＤ画像信号が、コンポーネント信号のＨＤ画像信号に変換される。
【０２５２】
従って、信号処理回路１１３または１２３のうちのいずれか一方だけが、単独で処理を行う場合であっても、信号処理回路１１３と１２３とが協調分担して処理を行う場合であっても、最終的に得られるのは、コンポーネント信号のＨＤ画像信号である。
【０２５３】
しかしながら、ＴＶ信号処理部１０６の信号処理回路１１３単独の場合に用いられるコンポジット／コンポーネント変換かつＳＤ／ＨＤ変換用タップ係数による場合は、一度の処理で、コンポジットのＳＤ画像を、コンポーネント信号のＨＤ画像に変換することはできるが、その変換精度は、コンポジットのＳＤ画像を、コンポーネント信号のＳＤ画像に変換するのと、そのコンポーネント信号のＳＤ画像を、コンポーネント信号のＨＤ画像に変換するのを、別々に行う場合に比較して劣化する。
【０２５４】
即ち、コンポジットのＳＤ画像を、コンポーネント信号のＳＤ画像に変換することは、コンポーネント信号のＳＤ画像を教師データとするとともに、その教師データをコンポジット信号に変換したＳＤ画像を生徒データとして学習処理を行うことにより得られるタップ係数（以下、適宜、コンポジット／コンポーネント変換用タップ係数という）を用いて行うことができる。
【０２５５】
また、コンポーネント信号のＳＤ画像を、コンポーネント信号のＨＤ画像に変換することは、上述のＳＤ／ＨＤ変換用タップ係数（コンポーネント信号のＨＤ画像を教師データとするとともに、その教師データの空間解像度を低下させたＳＤ画像を生徒データとして学習処理を行うことにより得られるタップ係数）を用いて行うことができる。
【０２５６】
コンポジット／コンポーネント変換用タップ係数は、コンポジット信号のＳＤ画像を、コンポーネント信号のＳＤ画像に変換する処理に特化したものであるから、コンポジット信号をコンポーネント信号に変換することだけに注目すれば、コンポジットのＳＤ画像を、コンポーネント信号のＨＤ画像に、一度に変換することができるコンポジット／コンポーネント変換かつＳＤ／ＨＤ変換用タップ係数よりも、精度良く、コンポジット信号のＳＤ画像を、コンポーネント信号のＳＤ画像に変換することができる。
【０２５７】
また、ＳＤ／ＨＤ変換用タップ係数は、ＳＤ画像をＨＤ画像に変換する処理に特化したものであるから、そのような空間解像度を向上させることにだけ注目すれば、やはり、コンポジット／コンポーネント変換かつＳＤ／ＨＤ変換用タップ係数よりも、精度良く、ＳＤ画像の空間解像度を向上させたＨＤ画像を得ることができる。
【０２５８】
同様に、ＭＰＥＧ復号かつＳＤ／ＨＤ変換用タップ係数は、コンポーネント信号のＳＤ画像信号をＭＰＥＧ符号化した符号化データを、一度の処理で、ＭＰＥＧ復号し、ＨＤ画像に変換することができるが、このＭＰＥＧ復号かつＳＤ／ＨＤ変換用タップ係数を用いる場合には、ＭＰＥＧ復号用タップ係数を用いる場合よりも、復号精度は劣化し、また、ＳＤ／ＨＤ変換用タップ係数を用いる場合よりも、変換精度は劣化する。
【０２５９】
以上から、信号処理回路１１３と１２３とが協調分担して処理を行う場合には、ＭＰＥＧ復号用タップ係数を用いて、符号化データがＳＤ画像に変換され、さらに、そのＳＤ画像が、ＳＤ／ＨＤ変換用タップ係数を用いて、ＨＤ画像に変換されるので、ＴＶ信号処理部１０６の信号処理回路１１３単独でコンポジット／コンポーネント変換かつＳＤ／ＨＤ変換用タップ係数が用いられる場合や、電子機器１１の信号処理回路１２３単独でＭＰＥＧ復号かつＳＤ／ＨＤ変換用タップ係数が用いられる場合に比較して、品質の高いＨＤ画像を得ることができる。
【０２６０】
なお、ＭＰＥＧ復号用タップ係数によれば、符号化データをＭＰＥＧ復号するだけでなく、ＭＰＥＧ符号化に起因して生じるブロック歪み等の歪み除去も行われる。
【０２６１】
即ち、ＭＰＥＧ復号タップ係数は、上述のように、コンポーネント信号のＳＤ画像を教師データとするとともに、その教師データをＭＰＥＧ符号化した符号化データを生徒データとして学習処理を行うことにより得られるものであるから、符号化データを、原画像との自乗誤差が最小になる画像に変換するものとなる。従って、ＭＰＥＧ復号タップ係数によれば、符号化データが、歪みのない原画像に近い画像に変換されるから、ＭＰＥＧ復号の他、ＭＰＥＧ符号化に起因するブロック歪み等の歪み除去も行われることになる。
【０２６２】
なお、コンポーネント信号のＳＤ画像をＭＰＥＧ符号化してＭＰＥＧ復号したものを教師データとするとともに、その教師データをＭＰＥＧ符号化した符号化データを生徒データとして学習処理を行うことによりタップ係数を得た場合には、そのタップ係数は、符号化データを、通常のＭＰＥＧ復号した場合に得られる復号画像、即ち、ＭＰＥＧ符号化に起因するブロック歪み等を有する復号画像に近い画像に変換するものとなる。従って、この場合、上述のような歪み除去は行われないことになる。
【０２６３】
以上のように、電子機器１１のような対応電子機器は、ベイ構造型テレビジョン受像機（図１、図２）のベイ４に対して、ベイアダプタボックス１４なしで収納することができ、さらに、ＴＶ信号処理部１０６と電気的に接続されることにより、協調分担して処理を行い、品質の良い画像等を得ることができる。一方、電子機器１３のような非対応電子機器は、ベイ構造型テレビジョン受像機のベイ４に収納するために、ベイアダプタボックス１４が必要であり、また、ＴＶ信号処理部１０６と電気的に接続されても、単独で処理を行うため、ＴＶ信号処理部１０６と電気的に接続されているかどうかにかかわらず、協調分担して処理が行われる場合のような品質の良い画像等を得ることができない。
【０２６４】
従って、対応電子機器は、非対応電子機器に比較して、ベイ４への収納が簡易であり、かつ、品質の良いデータが得られるという付加価値を有することになる。
【０２６５】
次に、上述の場合には、ＴＶ信号処理部１０６の信号処理回路１１３や、電子機器１１の信号処理回路１２３を、クラス分類適応処理を行うクラス分類適応処理回路（図２２）で構成することにより、各種の機能を実現するようにしたが、その他、信号処理回路１１３および１２３は、各種の機能の一つ一つに対応する処理を行うモジュール（ブロック）で構成することが可能である。
【０２６６】
そこで、図２７は、ＴＶ信号処理部１０６および電子機器１１の他の構成例を示している。なお、図中、図１６または図１７における場合と対応する部分については、同一の符号を付してあり、以下では、その説明は、適宜省略する。
【０２６７】
即ち、図２７（Ａ）は、ＴＶ信号処理部１０６の他の構成例を示しており、信号処理部１１３が、クラス分類適応処理回路ではなく、変換部１７１、空間解像度向上処理部１７２、ノイズ除去処理部１７３、およびセレクタ１７４で構成されている他は、図１６における場合と同様に構成されている。
【０２６８】
また、図２７（Ｂ）は、電子機器１１の他の構成例を示しており、やはり、信号処理部１２３が、クラス分類適応処理回路ではなく、ＭＰＥＧデコーダ１７５、歪み除去処理部１７６、およびセレクタ１７７で構成されている他は、図１７における場合と同様に構成されている。
【０２６９】
図２７（Ａ）のＴＶ信号処理部１０６が単独で処理を行う場合には、チューナ１０５（図１５）が出力する、ベースバンドのコンポジット信号のＳＤ画像信号が、セレクタ１０４およびＩ／Ｆ１１１を介して、信号処理回路１１３に供給される。
【０２７０】
信号処理回路１１３では、チューナ１０５からの信号が、図２７（Ａ）において点線で示すようにやりとりされることにより処理される。
【０２７１】
即ち、信号処理回路１１３では、セレクタ１７４において、チューナ１０５からのコンポジット信号のＳＤ画像信号が受信される。そして、セレクタ１７４は、変換部１７１を選択し、その選択した変換部１７１に、コンポジット信号のＳＤ画像信号を供給する。
【０２７２】
変換部１７１は、セレクタ１７４からのコンポジット信号のＳＤ画像信号を、コンポーネント信号のＳＤ画像信号に変換して、セレクタ１７４に供給する。セレクタ１７４は、空間解像度向上処理部１７２を選択し、その選択した空間解像度向上処理部１７２に、コンポーネント信号のＳＤ画像信号を供給する。
【０２７３】
空間解像度向上処理部１７２は、セレクタ１７４からのコンポーネント信号のＳＤ画像信号の空間解像度を向上させる処理を行い、その結果得られる、コンポーネント信号のＨＤ画像信号を、セレクタ１７４に供給する。セレクタ１７４は、ノイズ除去処理部１７３を選択し、その選択したノイズ除去処理部１７３に、コンポーネント信号のＨＤ画像信号を供給する。
【０２７４】
ノイズ除去処理部１７３は、セレクタ１７４からのＨＤ画像信号に対して、ノイズ除去処理を施し、その結果得られるＨＤ画像信号を、セレクタ１７４に供給する。そして、セレクタ１７４は、ノイズ除去処理部１７３からのＨＤ画像信号を、Ｉ／Ｆ１１１を介して、セレクタ１０４（図１５）に出力する。
【０２７５】
セレクタ１０４は、このＨＤ画像信号を、例えば、ＣＲＴ２（図１５）に供給し、ＣＲＴ２では、対応するＨＤ画像が表示される。
【０２７６】
従って、ＴＶ信号処理部１０６が単独で処理を行う場合、ＴＶ信号処理部１０６の信号処理回路１１３は、コンポジット信号をコンポーネント信号に変換する機能、空間解像度を向上させる機能（ＳＤ画像をＨＤ画像に変換する機能）、およびノイズを除去する機能を有する。
【０２７７】
一方、図２７（Ｂ）の電子機器１１が単独で処理を行う場合には、特有ブロック１２４が出力する、ＳＤ画像をＭＰＥＧ符号化して得られる符号化データが、信号処理回路１２３に供給される。
【０２７８】
信号処理回路１２３では、符号化データが、図２７（Ｂ）において点線で示すようにやりとりされることにより処理される。
【０２７９】
即ち、信号処理回路１２３では、セレクタ１７７において、特有ブロック１２４からの符号化データが受信される。そして、セレクタ１７７は、ＭＰＥＧデコーダ１７５を選択し、その選択したＭＰＥＧデコーダ１７５に、符号化データを供給する。
【０２８０】
ＭＰＥＧデコーダ１７５は、セレクタ１７７からの符号化データをＭＰＥＧ復号し、その結果得られる復号画像信号（ＳＤ画像信号）を、セレクタ１７７に供給する。セレクタ１７７は、歪み除去処理部１７６を選択し、その選択した歪み除去処理部１７６に、復号画像信号を供給する。
【０２８１】
歪み除去処理部１７６は、セレクタ１７７からの復号画像信号からブロック歪み等を除去する歪み除去処理を行い、その結果得られる復号画像信号を、セレクタ１７７に供給する。セレクタ１７７は、歪み除去処理部１７６からの復号画像信号を、Ｉ／Ｆ１２１を介して出力する。
【０２８２】
従って、電子機器１１が単独で処理を行う場合、電子機器１１の信号処理回路１２３は、画像をＭＰＥＧ符号化した符号化データをＭＰＥＧ復号する機能、およびブロック歪み等を除去する機能を有する。
【０２８３】
次に、電子機器１１が、ベイ４（図１、図２）に収納され、ＴＶ信号処理部１０６と電気的に接続された場合には、ＴＶ信号処理部１０６の信号処理回路１１３と、電子機器１１の信号処理回路１２３は、処理を協調分担するために、上述したように、互いの機能ＩＤをやりとりすることで、少なくとも一方が、その機能を変化させる。
【０２８４】
即ち、ＴＶ信号処理部１０６の信号処理回路１１３は、例えば、上述した、コンポジット信号をコンポーネント信号に変換する機能、空間解像度を向上させる機能、およびノイズを除去する機能の３つの機能を有するものから、空間解像度を向上させる機能だけを有するものに変化する。
【０２８５】
また、電子機器１１の信号処理回路１２３は、上述した、符号化データをＭＰＥＧ復号する機能、およびブロック歪み等を除去する機能の２つの機能を有するもののままとされる。
【０２８６】
そして、ＴＶ信号処理部１０６の信号処理回路１１３と、電子機器１１の信号処理回路１２３では、符号化データが、図２８において点線で示すようにやりとりされることにより処理される。
【０２８７】
即ち、電子機器１１の信号処理回路１２３では、図２７（Ａ）における場合と同様の処理が行われ、これにより、Ｉ／Ｆ１２１から、歪み除去が行われた復号画像信号が出力される。
【０２８８】
この復号画像信号は、セレクタ１０４に供給され、セレクタ１０４は、電子機器１１（のＩ／Ｆ１２１）からの復号画像信号を、ＴＶ信号処理部１０６に供給する。
【０２８９】
ＴＶ信号処理部１０６では、セレクタ１０４からの復号が画像信号が、Ｉ／Ｆ１１１で受信され、信号処理回路１１３に供給される。
【０２９０】
信号処理回路１１３では、セレクタ１７４において、復号画像信号が受信され、さらに、空間解像度向上処理部１７２が選択される。そして、セレクタ１７４は、受信した復号画像信号を、選択した空間解像度向上処理部１７２に供給する。
【０２９１】
空間解像度向上処理部１７２は、セレクタ１７４からの復号画像信号の空間解像度を向上させる処理を行い、その結果得られるＨＤ画像信号を、セレクタ１７４に供給する。セレクタ１７４は、空間解像度向上処理部１７２からのＨＤ画像信号を、Ｉ／Ｆ１１１を介して、セレクタ１０４に出力する。
【０２９２】
セレクタ１０４は、このＨＤ画像信号を、例えば、ＣＲＴ２（図１５）に供給し、ＣＲＴ２では、対応するＨＤ画像が表示される。
【０２９３】
従って、電子機器１１が単独で処理を行う場合には、符号化データをＭＰＥＧ復号し、その結果得られる復号画像信号から、歪み除去を行ったものが得られるが、電子機器１１とＴＶ信号処理部１０６とが電気的に接続され、協調分担して処理が行われる場合には、歪み除去を行った復号画像信号の空間解像度を向上させたＨＤ画像を得ることができる。
【０２９４】
なお、図２７および図２８の実施の形態に示したように、信号処理回路１１３や１２３を、各機能に対応するモジュール（ブロック）を用いて構成する場合には、信号処理回路１１３や１２３に持たせる機能の数と同一の数のモジュールが必要となり、機能の数を増加させると、モジュールの数も増加するから、回路規模も大きくなる。
【０２９５】
これに対して、信号処理回路１１３や１２３を、図２２に示したように、クラス分類適応処理回路で構成する場合には、機能の数の増加によって増加するのは、基本的に、係数記憶部１３５の記憶容量だけであり、従って、回路規模の大型化を低減することができる。
【０２９６】
次に、信号処理回路１１３や１２３による、上述した一連の処理は、ハードウェアにより行うこともできるし、ソフトウェアにより行うこともできる。一連の処理をソフトウェアによって行う場合には、そのソフトウェアを構成するプログラムが、マイクロコンピュータ等のコンピュータにインストールされる。
【０２９７】
そこで、図２９は、上述した一連の処理を実行するプログラムがインストールされるコンピュータの一実施の形態の構成例を示している。
【０２９８】
プログラムは、コンピュータに内蔵されている記録媒体としてのハードディスク２０５やＲＯＭ２０３に予め記録しておくことができる。
【０２９９】
あるいはまた、プログラムは、フロッピーディスク、CD-ROM(Compact Disc Read Only Memory)，MO(Magneto optical)ディスク，DVD(Digital Versatile Disc)、磁気ディスク、半導体メモリなどのリムーバブル記録媒体２１１に、一時的あるいは永続的に格納（記録）しておくことができる。このようなリムーバブル記録媒体２１１は、いわゆるパッケージソフトウエアとして提供することができる。
【０３００】
なお、プログラムは、上述したようなリムーバブル記録媒体２１１からコンピュータにインストールする他、ダウンロードサイトから、ディジタル衛星放送用の人工衛星を介して、コンピュータに無線で転送したり、LAN(Local Area Network)、インターネットといったネットワークを介して、コンピュータに有線で転送し、コンピュータでは、そのようにして転送されてくるプログラムを、通信部２０８で受信し、内蔵するハードディスク２０５にインストールすることができる。
【０３０１】
コンピュータは、CPU(Central Processing Unit)２０２を内蔵している。CPU２０２には、バス２０１を介して、入出力インタフェース２１０が接続されており、CPU２０２は、入出力インタフェース２１０を介して、ユーザによって、キーボードや、マウス、マイク等で構成される入力部２０７が操作等されることにより指令が入力されると、それにしたがって、ROM(Read Only Memory)２０３に格納されているプログラムを実行する。あるいは、また、CPU２０２は、ハードディスク２０５に格納されているプログラム、衛星若しくはネットワークから転送され、通信部２０８で受信されてハードディスク２０５にインストールされたプログラム、またはドライブ２０９に装着されたリムーバブル記録媒体２１１から読み出されてハードディスク２０５にインストールされたプログラムを、RAM(Random Access Memory)２０４にロードして実行する。これにより、CPU２０２は、上述したフローチャートにしたがった処理、あるいは上述したブロック図の構成により行われる処理を行う。そして、CPU２０２は、その処理結果を、必要に応じて、例えば、入出力インタフェース２１０を介して、LCD(Liquid CryStal Display)やスピーカ等で構成される出力部２０６から出力、あるいは、通信部２０８から送信、さらには、ハードディスク２０５に記録等させる。
【０３０２】
ここで、本明細書において、コンピュータに各種の処理を行わせるためのプログラムを記述する処理ステップは、必ずしもフローチャートとして記載された順序に沿って時系列に処理する必要はなく、並列的あるいは個別に実行される処理（例えば、並列処理あるいはオブジェクトによる処理）も含むものである。
【０３０３】
また、プログラムは、１のコンピュータにより処理されるものであっても良いし、複数のコンピュータによって分散処理されるものであっても良い。さらに、プログラムは、遠方のコンピュータに転送されて実行されるものであっても良い。
【０３０４】
なお、ベイ構造型テレビジョン受像機（図１、図２）のベイ４に収納する電子機器は、上述したＤＶＤプレーヤやディジタルＶＴＲ等に限定されるものではなく、例えば、プリンタやＨＤ(Hard Disk)レコーダその他の、どのようなものであってもかまわない。
【０３０５】
また、本実施の形態では、ＴＶラック１（図１）に、チューナ１０４やＴＶ信号処理部１０６等を、あらかじめ組み込むことにより、ベイ構造型テレビジョン受像機（図１、図２）を構成するようにしたが、チューナ１０４やＴＶ信号処理部１０６等は、ＴＶラック１に、あらかじめ組み込んでおく必要はない。即ち、チューナ１０４やＴＶ信号処理部１０６等は、電子機器の１つとして、ＴＶラック１のベイ４に収納して使用するようにすることが可能である。
【０３０６】
また、本実施の形態では、ＴＶ信号処理部１０６と電子機器１１との２つの電子機器が、処理の協調分担を行う場合について説明したが、処理の協調分担は、３以上の電子機器で行うことも可能である。また、処理の内容も、ここで挙げたもの以外に時間解像度創造、階調創造等々でもよい。
【０３０７】
さらに、本実施の形態では、ベイ構造型テレビジョン受像機のベイ４に、電子機器１１が収納され、ＴＶ信号処理部１０６と電気的に接続された場合に、処理の協調分担が行われることとしたが、処理の協調分担は、ベイ４に収納されることにより電気的に接続された複数の電子機器どうしで行う他、ケーブルや無線等を介して電気的に接続された複数の電子機器どうしで行うことも可能である。
【０３０８】
また、本実施の形態では、係数記憶部１３５（図２２）に、複数種類のタップ係数のセットをあらかじめ記憶させておき、使用するタップ係数のセットを切り替えることで、信号処理回路１１３の機能を変化させるようにしたが、このように、信号処理回路１１３の機能を変化させるためのタップ係数は、係数記憶部１３５にあらかじめ記憶させておくのではなく、外部からダウンロードすることが可能である。
【０３０９】
即ち、例えば、図１で説明したように、ベイ構造型テレビジョン受像機のベイ４Ｇには、携帯電話機を収納することができるが、このように、ベイ４Ｇに携帯電話機が収納されている場合には、その携帯電話機の通信機能により、インターネットその他のネットワーク上のサーバにアクセスし、必要なタップ係数をダウンロードするようにすることができる。また、例えば、他の電子機器と電気的に接続されている場合において、その電子機器が、必要なタップ係数を記憶しているときには、その電子機器から、タップ係数をダウンロードするようにすることができる。
【０３１０】
なお、同様にして、予測タップやクラスタップのタップ構造に関する情報も、外部からダウンロードするようにすることが可能である。
【０３１１】
ここで、上述のように、タップ係数を外部からダウンロードする場合には、そのダウンロードしたタップ係数（以下、適宜、ダウンロードタップ係数という）を、係数記憶部１３５（図２２）に記憶させる必要があり、従って、係数記憶部１３５には、ダウンロードタップ係数を記憶させる記憶領域が必要となる。
【０３１２】
従って、係数記憶部１３５は、必要最小限のタップ係数（ＴＶ信号処理部１０６についていえば、ＴＶ信号処理部１０６が最低限有していなければならない機能を実現するための、例えば、コンポジット／コンポーネント変換用タップ係数など）のための記憶領域の他に、ダウンロードタップ係数を記憶させるための記憶領域を設けて構成するようにすることができる。
【０３１３】
また、この場合、ダウンロードタップ係数を使用しないときは、係数記憶部１３５の記憶領域が無駄になる。そこで、係数記憶部１３５には、必要最小限の記憶領域だけを設け、その記憶領域に、必要最小限のタップ係数をあらかじめ記憶させておき、ダウンロードタップ係数を使用する場合には、そのダウンロードタップ係数を、上書きする形で、係数記憶部１３５に記憶させるようにすることができる。
【０３１４】
但し、この場合、ダウンロードタップ係数が不要となったとき（例えば、他の電子機器との電気的な接続が切断されたとき等）には、係数記憶部１３５に、あらかじめ記憶されていたタップ係数を記憶させ直す必要がある。そのためには、係数記憶部１３５に、ダウンロードタップ係数を上書きする際に、あらかじめ記憶されていたタップ係数を保持しておく必要があるが、これは、例えば、図１５に点線で示すように、セレクタ１０４に接続する形で、ＨＤ１０７を設けておくことにより可能である。即ち、係数記憶部１３５に、あらかじめ記憶されていたタップ係数は、ＨＤ１０７に保持しておくことが可能である。
【０３１５】
また、図２５の実施の形態の係数記憶部１３５における、１つの係数メモリ１６３_nには、基本的に、１セットのタップ係数が記憶されるが、タップ係数のビット数が多かったり、クラス数が多いこと等に起因して、１つの係数メモリ１６３_nに、１セットのタップ係数を記憶しきれない場合には、係数メモリ１６３₁乃至１６３_Nのうちの複数に、１セットのタップ係数を記憶させるようにすることが可能である。
【０３１６】
また、本実施の形態では、画像を処理する場合について説明したが、本発明は、音声等を処理する場合にも適用可能である。
【０３１７】
【発明の効果】
本発明の収納ラックによれば、電子機器どうしを、容易に接続することが可能となる。
【０３１８】
本発明の接続装置によれば、電子機器を収納ラックに収納したときに、電子機器どうしを、容易に接続することが可能となる。
【図面の簡単な説明】
【図１】本発明を適用したベイ構造型テレビジョン受像機の一実施の形態の構成例を示す斜視図である。
【図２】電子機器が収納された状態のベイ構造型テレビジョン受像機を示す斜視図である。
【図３】ベイ内接続パネル５の構成例を示す平面図である。
【図４】電子機器１１（１２）を背面側から見た場合の斜視図である。
【図５】ベイアダプタボックス１４の構成例を示す斜視図である。
【図６】アダプタ内接続パネル１５Ａとアダプタ背面パネル１５Ｂの構成例を示す斜視図である。
【図７】背面パネル部１５の着脱が可能なベイアダプタボックス１４を示す斜視図である。
【図８】アダプタ背面パネル１５Ｂの着脱が可能なベイアダプタボックス１４を示す斜視図である。
【図９】端子が移動可能な背面パネル部１５の構成例を示す斜視図である。
【図１０】端子が移動可能な背面パネル部１５を示す断面図である。
【図１１】端子が移動可能な背面パネル部１５を示す断面図である。
【図１２】端子が移動可能な背面パネル部１５の他の構成例を示す斜視図である。
【図１３】端子が移動可能な背面パネル部１５の、さらに他の構成例を示す斜視図である。
【図１４】接続板８１を説明するための図である。
【図１５】ベイ構造型テレビジョン受像機の電気的構成例を示すブロック図である。
【図１６】ＴＶ信号処理部１０６の構成例を示すブロック図である。
【図１７】電子機器１１（１２）の構成例を示すブロック図である。
【図１８】ＴＶ信号処理部１０６（電子機器１１（１２））の処理を説明するフローチャートである。
【図１９】ＴＶ信号処理部１０６と電子機器１１それぞれが単独で行う処理を説明するための図である。
【図２０】ＴＶ信号処理部１０６と電子機器１１とが協調分担して行う処理を説明するための図である。
【図２１】ＴＶ信号処理部１０６と電子機器１１とが協調分担して行う処理を説明するフローチャートである。
【図２２】信号処理回路１１３の構成例を示す図である。
【図２３】係数記憶部１３５に記憶させるタップ係数を学習する学習装置の構成例を示すブロック図である。
【図２４】学習装置による学習処理を説明するフローチャートである。
【図２５】係数記憶部１３５の構成例を示すブロック図である。
【図２６】クラス分類適応処理回路で構成される信号処理回路１１３の処理を説明するフローチャートである。
【図２７】ＴＶ信号処理部１０６と電子機器１１それぞれが単独で行う処理を説明するための図である。
【図２８】ＴＶ信号処理部１０６と電子機器１１とが協調分担して行う処理を説明するための図である。
【図２９】本発明を適用したコンピュータの一実施の形態の構成例を示すブロック図である。
【符号の説明】
１ ＴＶラック， ２ ＣＲＴ， ３ スピーカ， ４Ａ乃至４Ｇ ベイ， ５ ベイ内接続パネル， １１乃至１３ 電子機器， １４ ベイアダプタボックス， １４Ａ スロット， １５ 背面パネル部， １５Ａ アダプタ内接続パネル， １５Ｂ アダプタ背面パネル， １６Ａ 雌ピン群， １６Ｂ 雄ピン群， ２１ ＲＧＢ用出力端子， ２２ ＲＧＢ用入力端子， ２３ オーディオ出力端子， ２４ オーディオ入力端子， ２５ 出力用Ｓ端子， ２６ 入力用Ｓ端子， ２７ ＩＥＥＥ１３９４端子， ２８ ＵＳＢ端子， ２９ 電源端子， ３１ ＲＧＢ用入力端子， ３２ ＲＧＢ用出力端子， ３３ オーディオ入力端子， ３４ オーディオ出力端子， ３５ 入力用Ｓ端子， ３６ 出力用Ｓ端子， ３７ ＩＥＥＥ１３９４端子， ３８ ＵＳＢ端子， ３９ 電源端子， ４１ ＲＧＢ用入力端子， ４２ ＲＧＢ用出力端子， ４３オーディオ入力端子， ４４ オーディオ出力端子， ４５ 入力用Ｓ端子，４６ 出力用Ｓ端子， ４７ ＩＥＥＥ１３９４端子， ４８ ＵＳＢ端子，４９ 電源端子， ５１ スリット板， ５２ スリット， ５３ 端子， ５３Ａ 胴体部， ５４ 端子， ５４Ａ 胴体部， ６１ 底板， ６２ 絶縁体， ６３ 胴体部， ６４ 接点金具， ６５ ねじ部， ６６ 絶縁膜，６７ 胴体部， ６８ 接点金具， ７１ 挿入口， ８１ 接続板， ８２Ｌ，８２Ｒ はめ込み用スリット， ８３ パッチ板， ８４ 端子， ８５ 枠穴， ８６ 接続端子， ８７ 枠溝， ８８ 枠， ８９ 導電部， １０１ リモコン， １０２ メインコントローラ， １０３ セレクタコントローラ， １０４ セレクタ， １０５ チューナ， １０６ ＴＶ信号処理部， １０７ ＨＤ， １１１ Ｉ／Ｆ， １１２ コントローラ， １１３ 信号処理回路， １２１ Ｉ／Ｆ， １２２ コントローラ， １２３ 信号処理回路， １２４ 特有ブロック， １３１ バッファ， １３２ 予測タップ抽出回路， １３３ クラスタップ抽出回路， １３４ クラス分類回路， １３５ 係数記憶部， １３６ 積和演算回路， １３７ 機能制御部， １４１ 教師データ生成回路， １４２ 教師データメモリ， １４３ 生徒データ生成回路， １４４ 生徒データメモリ， １４５ 予測タップ抽出回路， １４６ クラスタップ抽出回路， １４７ クラス分類回路， １４８ 正規方程式加算回路， １４９ タップ係数決定回路， １５０ 係数メモリ， １５１ 制御回路， １６１，１６２ セレクタ， １６３₁乃至１６３_N 係数メモリ， １７１ 変換部， １７２ 空間解像度向上処理部， １７３ ノイズ除去処理部，１７４ ＭＰＥＧデコーダ， １７５ 歪み除去処理部， １７６ セレクタ， ２０１ バス， ２０２ CPU， ２０３ ROM， ２０４ RAM， ２０５ハードディスク， ２０６ 出力部， ２０７ 入力部， ２０８ 通信部，２０９ ドライブ， ２１０ 入出力インタフェース， ２１１ リムーバブル記録媒体[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a storage rack and a connection device, and a storage rack system, and in particular, a storage rack and a connection device that make it possible to easily connect electronic devices such as AV (Audio Visual) devices, and the like, and The present invention relates to a storage rack system.
[0002]
[Prior art]
For example, an AV device such as a digital VTR (Video Tape Recorder), DVD (Digital Versatile Disc) player, or television receiver operates by itself, but can view images and sounds reproduced by a digital VTR or DVD player. To do so, a digital VTR or DVD player must be connected to the television receiver.
[0003]
That is, a digital VTR, a DVD player, and a television receiver are generally provided with a terminal for inputting or outputting an image or sound on the back surface of the digital VTR, a DVD player, or a television receiver. By connecting the output terminal and the input terminal of the television receiver with a predetermined cable, the image and sound reproduced by the digital VTR or DVD player are output from the television receiver.
[0004]
[Problems to be solved by the invention]
However, for example, even when two AV devices are connected to each other, three cables are required for the image and the sound of the L (Left) channel and the R (Right) channel. It is troublesome to connect AV devices with cables. Furthermore, if the number of AV devices to be connected increases, the number of cables required for the connection increases, so cable processing (such as routing) becomes difficult.
[0005]
The present invention has been made in view of such a situation, and makes it possible to easily connect electronic devices.
[0006]
[Means for Solving the Problems]
  The storage rack of the present invention includes one or more storage units that store electronic devices that operate independently and that have one or more signal terminals for inputting or outputting signals, and signal terminals of the electronic devices. And a connection panel in the storage section with connection terminals for connection.A connection having a first surface provided with a first terminal connected to a connection terminal provided on the connection panel, and a second surface provided with a second terminal connected to a signal terminal of the electronic device When the electronic device is housed in the housing portion together with the device, the signal terminal of the electronic device and the connection terminal of the connection panel in the housing portion are connected via the connection device, and the second surface has a hole portion. Is provided, and the second terminal can be inserted into and removed from an arbitrary hole.
[0007]
  The connection device of the present invention is a connection panel of a storage rack having a connection panel provided with a connection terminal electrically connected to a signal terminal of an electronic device in one or more storage portions formed in a concave shape. A first surface provided with a first terminal connected to the provided connection terminal; and a second surface provided with a second terminal connected to a signal terminal of the electronic device.The second surface is provided with a hole, and the second terminal can be inserted into and removed from any hole..
[0009]
  In the storage rack of the present invention, an electronic device that operates independently and has one or more signal terminals for inputting or outputting signals exposed to the outside is stored in the storage portion, and is connected to a connection panel in the storage portion. The provided connection terminal is connected to the signal terminal of the electronic device.Moreover, it has the 1st surface provided with the 1st terminal connected with the connection terminal provided in the connection panel, and the 2nd surface provided with the 2nd terminal connected with the signal terminal of an electronic device. When the electronic device is stored in the storage unit together with the connection device, the signal terminal of the electronic device and the connection terminal of the connection panel in the storage unit are connected via the connection device, and the second surface has a hole. A portion is provided, and the second terminal can be inserted into and removed from an arbitrary hole.
[0010]
  In the connection device of the present invention, the first connection for connecting to the connection terminal provided on the connection panel of the storage rack having the connection panel provided with the connection terminal electrically connected to the signal terminal of the electronic device in the storage portion. A second terminal connected to a signal terminal of an electronic device that is provided on the first surface and that operates by reading and that has one or more signal terminals for inputting or outputting signals exposed to the outside; A terminal is provided on the second noodleThe second surface is provided with a hole, and the second terminal can be inserted into and removed from any hole..
[0012]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a perspective view showing a configuration example of an embodiment of a bay structure type television receiver to which the present invention is applied.
[0013]
A CRT (Cathode Ray Tube) 2 is arranged in the center of the front upper part of a TV (Television) rack 1 which is a housing of the apparatus, and an L (Left) channel and an R (Right) are placed on the left and right sides thereof. A channel speaker 3 is arranged.
[0014]
Further, six bays 4A, 4B, 4C, 4D, 4E, and 4F are provided in the lower front portion of the TV rack 1. Here, hereinafter, the bays 4A to 4F will be described as bays 4 unless it is particularly necessary to distinguish them.
[0015]
The bay 4 can accommodate, for example, a digital VTR, a DVD player, or the like as an electronic device that operates independently and has one or more signal terminals for inputting or outputting signals exposed to the outside. In addition, an in-bay connection panel 5 (FIG. 3), which will be described later, is provided on the inner front surface thereof, in which connection terminals for connection with signal terminals of electronic devices housed in the bay 4 are arranged. It has been.
[0016]
A bay 4G that is also formed in a concave shape is provided on the upper right side of the top surface of the TV rack 1. However, the bays 4A to 4F have a large concave shape so that a relatively large electronic device such as a digital VTR can be accommodated, whereas the bay 4G has, for example, a mobile phone or other PDA. It has a small concave shape so that a relatively small electronic device such as (Personal Digital Assistant) can be accommodated. In the bay 4G, an in-bay connection panel is provided in which connection terminals for connecting to signal terminals of electronic devices accommodated therein are arranged. However, since the in-bay connection panel provided in the bay 4G is connected to a signal terminal of a small electronic device such as a mobile phone, it is connected to a signal terminal of a large electronic device such as a digital VTR. This is different from the in-bay connection panel 5 provided in the bays 4A to 4F.
[0017]
FIG. 2 is a perspective view of the bay structure type television receiver of FIG. 1 in a state in which an electronic device is housed in the bay 4.
[0018]
2, the electronic devices 11 and 12 are directly stored in the bays 4A and 4D, respectively, and the electronic device 13 stored in the bay adapter box 14 is stored in the bay 4B. .
[0019]
That is, the electronic devices 11 and 12 are electronic devices compatible with the bay structure type television receiver (for example, electronic devices manufactured by the same manufacturer as the bay structure type television receiver), and use the bay adapter box 14. Even if not, it can be directly stored in the bay 4.
[0020]
On the other hand, the electronic device 13 is an electronic device that is not compatible with the bay structure type television receiver (for example, an electronic device manufactured by a manufacturer different from the bay structure type television receiver). The bay 4 can be stored.
[0021]
Note that the opening of the bay 4 (the same applies to the bay 4G) can be provided with a lid similar to that provided at the tape insertion port of the VTR, for example. In this case, an electronic device is accommodated. It is possible to prevent dust and the like from entering the bay 4 that is not present.
[0022]
Next, FIG. 3 is a plan view illustrating a configuration example of the in-bay connection panel 5 provided on the inner front surface of the bay 4.
[0023]
The in-bay connection panel 5 includes an RGB (Red, Green, Blue) output terminal 21, an RGB input terminal 22, an audio output terminal 23, an audio input terminal 24, and an output S (Separate (Special / Super)) terminal 25. Terminals for exchanging signals between electronic devices such as an input S terminal 26, an IEEE (Institute of Electrical and Electronics Engineers) 1394 terminal 27, a USB (Universal Serial Bus) terminal 28, and a power supply terminal 29 are provided. It has been.
[0024]
The RGB output terminal 21 is a terminal for outputting an RGB signal, which is an image signal (image data) obtained by the bay structure type television receiver, to an electronic device housed in the bay 4, and is an RGB input terminal 22. Is a terminal for inputting the RGB signal output from the electronic device housed in the bay 4 to the bay structure type television receiver. The audio output terminal 23 is a terminal for outputting the L and R channel audio signals obtained by the bay structure type television receiver to an electronic device housed in the bay 4, and the audio input terminal 24 is connected to the bay 4. This is a terminal for inputting the L and R channel audio signals output from the stored electronic device to the bay structure type television receiver. The output S terminal 25 is a terminal for outputting a luminance signal and a color signal, which are image signals obtained by the bay structure type television receiver, to an electronic device housed in the bay 4, and the input S terminal 26 is The terminal for inputting the luminance signal and the color signal output from the electronic device housed in the bay 4 to the bay structure type television receiver. The IEEE 1394 terminal 27 is a terminal for performing communication conforming to the IEEE 1394 standard between the bay structure type television receiver and the electronic device housed in the bay 4, and the USB terminal 28 is the bay structure type television. This is a terminal for performing communication conforming to the USB standard between the John receiver and the electronic device housed in the bay 4. The power terminal 29 is a terminal for supplying power to the electronic device housed in the bay 4.
[0025]
In the embodiment shown in FIG. 3, RGB output terminal 21, RGB input terminal 22, audio output terminal 23, audio input terminal 24, output S terminal 25, input S terminal 26, IEEE 1394 terminal 27, USB terminal 28, The power terminal 29 is disposed at a fixed position of the in-bay connection panel 5.
[0026]
FIG. 4 is a perspective view showing a configuration example of the electronic device 11 (12) corresponding to the bay structure type television receiver as seen from the back side.
[0027]
The rear panel of the electronic device 11 includes an RGB input terminal 31, an RGB output terminal 32, an audio input terminal 33, an audio output terminal 34, an input S terminal 35, an output S terminal 36, an IEEE 1394 terminal 37, and a USB terminal 38. And a power supply terminal 39 and the like.
[0028]
The bay 4 of the bay structure type television receiver is configured to be large enough to accommodate the electronic device 11, and the RGB output terminal 21 to the power supply terminal 29 of the in-bay connection panel 5 are electronic When the device 11 is housed in the bay 4, the device 11 is disposed at a position where it is electrically connected to the RGB input terminal 31 to the power supply terminal 39 of the electronic device 11.
[0029]
Therefore, for the electronic devices 11 and 12 corresponding to the bay structure type television receiver, the user simply stores the electronic device 11 in the bay 4 and uses the electronic device 11 and the bay structure type without using a cable. A television receiver can be electrically connected.
[0030]
Further, by storing the electronic devices 11 and 12 in the bay 4 of the bay structure type television receiver, the electronic devices 11 and 12 are also electrically connected via the bay structure type television receiver. Therefore, the user can also electrically connect the electronic devices 11 and 12 by simply storing them in the bay 4 without using a cable.
[0031]
As described above, the user can easily connect the electronic devices by simply storing the electronic devices in the bay 4.
[0032]
In addition, when the electronic device accommodated in the bay 4 is a reproduction-only electronic device, for example, it is basically unnecessary to provide an input terminal for images, sounds, and the like for such an electronic device.
[0033]
On the other hand, the bay 4 is not limited to storing only a reproduction-only electronic device. For example, an electronic device capable of both recording and reproduction may be stored. Both an input terminal and an output terminal for images and sounds are provided.
[0034]
Accordingly, the in-bay connection panel 5 (FIG. 3) provided inside the bay 4 is provided with terminals that are electrically connected to the terminals at positions corresponding to all terminals of the electronic equipment that can be accommodated in the bay 4. It is desirable to leave. In this case, the terminals provided in the in-bay connection panel 5 may be in a state of being played depending on the electronic equipment stored in the bay 4, but there is no particular problem.
[0035]
Next, as described above, the electronic devices 11 and 12 correspond to the bay structure type television receiver, and the RGB output terminals 21 to power terminals 29 of the in-bay connection panel 5 are the electronic devices 11 and 12. Since the electronic devices 11 and 12 are disposed at positions that are electrically connected to the RGB input terminals 31 to the power supply terminals 39 of the electronic devices 11 and 12 when the 12 is stored in the bay 4. Is stored in the bay 4 and is electrically connected to the bay structure type television receiver.
[0036]
However, since the electronic device 13 is not compatible with the bay structure type television receiver, the terminals of the electronic device 13 and the corresponding terminals of the in-bay connection panel 5 are not stored even when directly stored in the bay 4. The arrangement positions are different and are not always electrically connected, but rather, many are not connected.
[0037]
Therefore, the electronic device 13 that is not compatible with the bay structure type television receiver can be easily electrically connected to the bay structure type television receiver by using the bay adapter box 14. ing.
[0038]
That is, FIG. 5 is a perspective view showing a configuration example of the bay adapter box 14.
[0039]
The bay adapter box 14 is provided with a concave slot 14A so that the electronic device 13 can be accommodated from the front side. The electronic device 13 is housed in the bay adapter box 14 and is housed in the bay 4 of the bay structure type television receiver together with the bay adapter box 14 so as to be electrically connected to the bay structure type television receiver. It is like that.
[0040]
That is, the back panel portion 15 is provided on the back surface portion of the bay adapter box 14, and the back panel portion 15 includes an in-adapter connection panel 15 A that faces the slot 14 A and a back side of the bay adapter box 14. It is comprised with the adapter back panel 15B made into the front. That is, when the slot 14A side of the bay adapter box 14 is the front, the adapter connection panel 15A is provided on the front side, and the adapter back panel 15B is provided on the back side.
[0041]
FIG. 6 is a plan view showing a configuration example of the in-adapter connection panel 15A and the adapter back panel 15B.
[0042]
When an electronic device incompatible with the bay structure type television receiver (hereinafter, appropriately referred to as non-compliant electronic device) is housed in the bay adapter box 14, as in the electronic device 13, in the in-adapter connection panel 15 </ b> A. In addition, a corresponding connection terminal is provided at a position where it is connected to a signal terminal provided on the rear panel of the non-compliant electronic device.
[0043]
Here, for non-compliant electronic devices, for example, the arrangement positions of the signal terminals are different for each manufacturer. Therefore, in the adapter connection panel 15A, as shown in FIG. 6 (A), for each manufacturer, a fixed position corresponding to the signal terminal provided on the rear panel of the non-compliant electronic device of the manufacturer is provided. A terminal connected to the signal terminal is provided. In FIG. 6A, in-adapter connection panels 15 for non-compliant electronic devices of Company A, Company B, and Company C are shown.
[0044]
On the other hand, as shown in FIG. 6B, the adapter back panel 15B has fixed positions corresponding to the RGB output terminals 21 to the power supply terminals 29 provided on the in-bay connection panel 5 (FIG. 3). In addition, RGB input terminals 41 to power supply terminals 49 are respectively provided. Therefore, when the bay adapter box 14 is housed in the bay 4 so that the adapter back panel 15B and the in-bay connection panel 5 of the bay 4 face each other, the RGB input terminal 41 to the power supply provided on the adapter back panel 15B. The terminal 49 is electrically connected to the RGB output terminal 21 to the power supply terminal 29 provided on the in-bay connection panel 5 in the bay 4, respectively.
[0045]
The terminals provided on the adapter connection panel 15A are connected to corresponding ones of the RGB input terminal 41 to the power supply terminal 49 provided on the adapter back panel 15B. Even if it exists, it accommodates in the bay adapter box 14 which has the connection panel 15A in adapter corresponding to the non-corresponding electronic device, and also accommodates the bay adapter box 14 in which the non-corresponding electronic device is accommodated in the bay 4. Thus, the non-compliant electronic device is electrically connected to the bay structure type television receiver (moreover, another electronic device housed in the bay 4 via the bay structure type television receiver). become.
[0046]
From the above, the user can easily connect to non-compliant electronic devices.
[0047]
By the way, as described above, the non-compliant electronic device can be easily connected to the bay structure type television receiver via the bay adapter box 14 as described above. The entire bay adapter box 14 having the in-adapter connection panel 15A corresponding to the above must be prepared.
[0048]
Therefore, for example, as shown in FIG. 7, the bay adapter box 14 can be configured such that the back panel portion 15 can be attached to and detached from other portions. In this case, it is not necessary to prepare the entire bay adapter box 14 for each manufacturer of incompatible electronic devices, and only the rear panel unit 15 needs to be replaced. Further, in this case, the non-compliant electronic device can be stored in the bay 4 in a state where the terminal provided on the connection panel 15A in the adapter of the rear panel unit 15 is fitted into (connected to) the terminal on the rear surface. Is possible. That is, the connection between the non-compliant electronic device and the bay structure type television receiver is performed by housing the entire bay adapter box 14 containing the non-compliant electronic device in the bay 4, and the non-compliant electronic device is an adapter. The rear panel unit 15 connected to the inner connection panel 15A can be housed in the bay 4 together with the non-compliant electronic device.
[0049]
In addition, the back panel unit 15 is configured so that the in-adapter connection panel 15A and the adapter back panel 15B are integrated, and the in-adapter connection panel 15A and the adapter back panel 15B can be separated. Is possible.
[0050]
Moreover, the back panel part 15 can also be comprised so that only the adapter back panel part 15B can be isolate | separated from the bay adapter box 14, for example, as shown in FIG.
[0051]
Here, in the embodiment of FIG. 8, the separable adapter back panel 15B is provided with a male pin group 16B composed of a plurality of male pins, and the bay adapter box 14 has a plurality of female pins. A female pin group 16A is provided. When the bay adapter back panel 15B is attached to the bay adapter box 14, each male pin constituting the male pin group 16B of the adapter back panel 15B becomes a corresponding female pin constituting the female pin group 16A of the bay adapter box 14. The bay adapter back panel 15B is thereby electrically connected to the in-adapter connection panel 15A on the bay adapter box 14 side. That is, the RGB input terminal 41 to power supply terminal 49 provided on the adapter back panel 15B are electrically connected to predetermined male pins constituting the male pin group 16B, and are provided on the adapter internal connection panel 15A. Are electrically connected to predetermined female pins constituting the female pin group 16A. Then, each male pin constituting the male pin group 16B of the adapter back panel 15B is fitted into a corresponding female pin constituting the female pin group 16A of the bay adapter box 14, whereby the female pin group 16A and the male pin are arranged. Via the group 16B, the RGB input terminals 41 to the power supply terminal 49 provided on the adapter back panel 15B and the corresponding terminals provided on the adapter connection panel 15A are electrically connected.
[0052]
Next, as described above, in the in-adapter connection panel 15A, when providing a connection terminal connected to the signal terminal at a fixed position corresponding to the position of the signal terminal of each manufacturer's incompatible electronic device, For example, as shown in FIG. 7, even if the rear panel unit 15 is configured to be detachable, the signal terminal is fixed at a fixed position corresponding to the position of the signal terminal of the non-compliant electronic device of each manufacturer. The rear panel portion 15 having the in-adapter connection panel 15A is required.
[0053]
FIG. 9 is a perspective view showing a configuration example of the back panel unit 15 that can cope with a plurality (or all) of non-compliant electronic devices of manufacturers.
[0054]
That is, in the embodiment of FIG. 9, the terminals 53 and 54 provided on the in-adapter connection panel 15A and connected to the signal terminals of the non-compliant electronic device can be moved. That is, the terminals 53 and 54 can be moved to positions where they are connected to signal terminals of non-compliant electronic devices.
[0055]
In the embodiment of FIG. 9, only two terminals 53 and 54 are shown on the in-adapter connection panel 15 </ b> A in order to avoid making the figure complicated.
[0056]
In the embodiment of FIG. 9, the in-adapter connection panel 15 </ b> A includes a plurality of slit plates 51.
[0057]
That is, the slit plate 51 is formed of, for example, a conductive flat plate (thin film), and each slit plate 51 is provided with slits (holes) 52 in a lattice shape. The terminal 53 (54) can be moved along the slit 52 as shown by an arrow in FIG.
[0058]
FIG. 10 is a side sectional view of the in-adapter connection panel 15A shown in FIG.
[0059]
The plurality of slit plates 51 are sandwiched and bonded by the insulator 62, and the insulator 62 on the adapter back panel 15 </ b> B side is fixed to the bottom plate 61. The insulator 62 is disposed with a larger interval than the slit 52 provided in the slit plate 51.
[0060]
Further, an insulating film 66 is formed on the surface of the slit plate 51 closest to the terminal 52 (53). The insulating film 66 prevents the terminals 53 and 54 from being electrically connected to the one that is closest to the terminal 53 among the plurality of slit plates 51.
[0061]
A rod-like body part 63 (67) having a diameter slightly smaller than the width of the slit 51 is attached to the terminal 53 (same as the terminal 54), and the body part 63 slides along the slit 51. Thus, the terminal 53 can be moved to an arbitrary position on the slit 51.
[0062]
Further, a contact fitting 64 (68) made of a conductor is fixed to the end of the body portion 63 where the terminal 53 is not attached, and the contact fitting 64 is connected to the plurality of slit plates 51. It comes in contact with certain of them. Here, in the embodiment of FIG. 10, the contact metal fitting 64 attached to the body portion 63 of the terminal 53 is in contact with the two slit plates 51 closest to the bottom plate 61.
[0063]
Each of the plurality of slit plates 51 is connected to a predetermined one of the RGB input terminals 41 to the power supply terminals 49 provided on the adapter back panel 15B. , The contact metal fitting 64 and the slit plate 51 are electrically connected to a predetermined one of the RGB input terminal 41 to the power supply terminal 49 provided on the adapter back panel 15B.
[0064]
Note that the body portion 67 of the terminal 54 is shorter than the body portion 63 of the terminal 53, so that the contact fitting 68 fixed to the body portion 67 of the terminal 54 is fixed to the body portion 63 of the terminal 53. The slit plate 51 on the terminal 53 (54) side is in contact with the slit plate 51 with which the contact metal fitting 64 is in contact. Thereby, the terminal 53 is electrically connected to the corresponding terminal of the adapter back panel 15B, and the terminal 53 is also electrically connected to the corresponding terminal of the adapter back panel 15B.
[0065]
Further, the body portion 63 of the terminal 53 (same as the body portion 67 of the terminal 54) has an insulating film formed on the surface thereof, so that the terminal 53 other than the slit plate 51 with which the contact fitting 64 contacts. The electrical connection with the slit plate 51 is prevented.
[0066]
As shown in FIG. 11, a threaded portion 65 is provided at the end of the body portion 63 on the terminal 53 side. Further, a screw is also cut inside the terminal 53, and the terminal 53 is screwed into the screw portion 65 of the body portion 63.
[0067]
When the terminal 53 is viewed from the terminal 53 side, for example, when it is rotated counterclockwise, the screw is loosened, and the terminal 53 is separated from the insulating film 66 and the contact fitting 64 of the body portion 63 as shown in FIG. However, it leaves | separates from the slit board 51. FIG. As a result, the terminal 53 becomes movable along the slit 52 together with the body portion 64.
[0068]
In the embodiment of FIG. 11, illustration of the terminal 54, the body portion 67, and the contact fitting 68 is omitted, but the terminal 54 also moves along the slit 52 in the same manner as the terminal 53. Can be done.
[0069]
On the other hand, when the terminal 53 is viewed from the terminal 53 side, for example, when turned counterclockwise, the screw is tightened, and as shown in FIG. 10, the end of the terminal 53 on the insulating film 66 side is the insulating film. 66, and further, the contact fitting 64 of the body portion 63 is pressed against the slit plate 51 to be originally contacted with a predetermined pressure. As a result, the terminal 53 is fixed at a predetermined position along the slit 52, and is further electrically connected to the slit plate 51 via the body portion 64 and the contact fitting 64.
[0070]
Next, FIG. 12 is a perspective view showing another configuration example of the back panel unit 15 that can move the terminals 53 and 54 connected to the signal terminals of the non-compliant electronic device.
[0071]
In the embodiment of FIG. 12, a large number of insertion openings (holes) 71 are provided, and the terminals 53 and 54 can be moved to any position of the large number of insertion openings 71. ing.
[0072]
That is, the terminal 53 has, for example, a pin jack-shaped body portion 53A that can be inserted into the insertion port 71. By inserting the body portion 53A into the insertion port 71, the terminal 53 is inserted into the insertion portion 71. It is fixed at the position of the mouth 71.
[0073]
Note that the body portion 53A of the terminal 53 and the body portion 54A of the terminal 54 have different lengths, and accordingly, the case where the body portion 53A of the terminal 53 is inserted into the insertion port 71 and the body portion of the terminal 54. When 54A is inserted into the insertion port 71, the adapter rear panel 15B is electrically connected to different terminals.
[0074]
Next, FIG. 13 is a perspective view showing still another configuration example of the back panel unit 15 that can move the terminal of the in-adapter connection panel 15A. In the figure, parts corresponding to those in FIG. 8 are denoted by the same reference numerals.
[0075]
In the embodiment of FIG. 13, the adapter back panel 15B of the back panel unit 15 is detachable as described in the embodiment of FIG.
[0076]
Further, in the embodiment shown in FIG. 13, the in-adapter connection panel 15 </ b> A is composed of a plurality of connection plates 81. U-shaped fitting slits 82L and 82R are provided on the left and right sides of the bay adapter box 14, and the connection plate 82 is fixed by being fitted into the fitting slits 82L and 82R. Yes. The connecting plate 81 can be easily attached and detached by sliding along the fitting slits 82L and 82R.
[0077]
For example, as shown in FIG. 14A, the connecting plate 81 is formed with a frame 88 in a lattice shape, and a patch plate 83 (to be described later) is fitted on the inner peripheral surface of the frame 88. A frame groove 87 as a groove that can be formed is formed. A frame hole 85 that is a hole (space) divided by the frame 88 is a flat plate shape shown in the perspective view of FIG. 14B, the side view of FIG. 14C, and the plan view of FIG. The patch plate 83 is configured in substantially the same size as the patch plate 83, and the outer peripheral portion of the patch plate 83 is fixed to the frame hole 85 by fitting into a frame groove 87 formed on the inner periphery of the frame 88. Can be done.
[0078]
As shown in FIGS. 14B to 14D, the patch plate 83 is provided with a terminal 84. Therefore, the patch hole 83 is changed by changing the frame hole 85 into which the patch plate 83 is fitted. The arrangement position of the terminals 84 provided on the plate 83 can be moved.
[0079]
The terminal 84 is electrically connected to the frame 88 when the patch plate 83 is fitted into the frame 88. Further, the connection plate 81 is provided with a connection terminal 86 at an outer peripheral portion that fits into the fitting slit 82R (FIG. 13), and the frame 88 is electrically connected to the connection terminal 86. Further, as shown in FIG. 14E, the fitting slit 82R is provided with a conductive portion 89, and the connection terminal 81 is fitted into the fitting slit 82R so that the connection terminal 86 is connected to the conductive portion 89. And electrically connected. The conductive portion 89 is connected to a predetermined terminal of the adapter back panel 15B via the female pin group 16A and the male pin group 16B. Therefore, the patch plate 83 is fitted in the frame 88. The terminal 84 is electrically connected to a predetermined terminal of the adapter back panel 15B through the patch plate 83, the frame 88, the connection terminal 86, the conductive portion 89, and the female pin group 16A and the male pin group 16B.
[0080]
Here, in each of the plurality of connection plates 81, the connection terminal 86 is provided at a different position, and the conductive portion 89 of the fitting slit 82R is connected to the connection terminal 81 of the connection plate 81 fitted into the fitting slit 82R. 86 is provided at a position corresponding to 86. Therefore, the connection terminal 86 of the connection plate 81 is connected to the conductive portion 89 provided in the fitting slit 82R when the connection plate 81 is fitted into the correct fitting slit 82R. Thus, even when the connecting plate 81 is inserted into the wrong fitting slit 82R, the conductive portion 89 is connected via the terminal 84 fitted into the connecting plate 81, the female pin group 16A, and the male pin group 16B. The terminal of the adapter back panel 15B connected to the terminal (the terminal that is not the terminal to be connected to the terminal 84) is prevented from being electrically connected.
[0081]
In addition, for example, by configuring the connection plate 81 and the fitting slits 82L and 82R so that the connection plate 81 can be fitted only into the fitting slits 82L and 82R into which the connection plate 81 is to be fitted, It is also possible to prevent electrical connection between the terminal 84 fitted into the connection plate 81 and the terminal of the adapter back panel 15B, which should not be connected originally.
[0082]
When the patch plate 83 is fitted into the frame hole 85, the terminal 84 fixed at a predetermined position of the connection plate 81 is directly or in front thereof (the slot 14A (FIG. 5) in the bay adapter box 14 in FIG. 13). It is exposed in the opening direction of the slot 14A in the bay adapter box 14 through the frame hole 85 of the connecting plate 81 arranged on the open side), and thus is not accommodated in the slot 14A of the bay adapter box 14 Connected to the terminals of electronic equipment.
[0083]
As described above, when the terminal connected to the signal terminal of the incompatible electronic device provided on the in-adapter connection panel 15A can be moved, the bay adapter box 14 is provided for each manufacturer of the incompatible electronic device. In addition, since it is not necessary to prepare the rear panel unit 15, it is possible to reduce the cost burden on the user.
[0084]
As described above, when the terminal of the in-adapter connection panel 15A is movable, it may be difficult to know which terminal should be moved to which position. Therefore, for example, it is preferable to describe the position of the terminal for each manufacturer of the incompatible electronic device in the in-adapter connection panel 15A or the like.
[0085]
Here, the terminals provided on the adapter connection panel 15A are configured to be movable so as to deal with non-compliant electronic devices of each manufacturer. The RGB output terminal 21 to the power supply terminal 29 provided on the inner connection panel 5 can be configured to be movable. In this case, even if the bay adapter box 14 (or the back panel unit 15) is not used, the non-compliant electronic device and the bay structure type television receiver can be electrically connected.
[0086]
Next, FIG. 15 is a block diagram showing an electrical configuration example of the bay structure type television receiver of FIG.
[0087]
A remote commander (hereinafter referred to as “remote control” as appropriate) 101 switches a signal input / output between electronic devices by selecting a television broadcast channel to be viewed, adjusting a volume, and further using a selector 104 described later. When the user operates, a signal corresponding to the operation is transmitted to the main controller 102 by infrared rays.
[0088]
The main controller 102 controls the selector controller 103 according to the infrared signal from the remote controller 101 and the like, and controls each block constituting the bay structure type television receiver as necessary.
[0089]
The selector controller 103 controls the selector 104 in accordance with the control of the main controller 102 or the like.
[0090]
The selector 104 is connected to the CRT 2, the speaker 3, the tuner 105, and the TV signal processing unit 106. Further, the selector 104 is also connected to the terminals of the in-bay connection panel 5 provided in each of the bays 4A to 4G. And the selector 104 switches the output destination of the input signal input there according to control of the selector controller 103.
[0091]
The tuner 105 is supplied with a television broadcast signal (hereinafter referred to as a TV signal as appropriate) received by an antenna 2 (not shown). The tuner 105 is controlled according to the control of the main controller 102. Are detected and demodulated, and a baseband signal is output to the selector 104.
[0092]
The TV signal processing unit 106 processes an image signal output from the selector 104 (for example, a baseband image signal output from the tuner 105), and outputs an image signal obtained as a result of the processing to the selector 104.
[0093]
The CRT 2 displays an image signal output from the selector 104, and the speaker 3 outputs an audio signal output from the selector 104.
[0094]
Of the above, the CRT 2, the speaker 3, the tuner 105, and the TV signal processing unit 106 function as a television receiver as an electronic device.
[0095]
Next, FIG. 16 shows a configuration example of the TV signal processing unit 106 of FIG.
[0096]
The TV signal processing unit 106 includes an I / F (Interface) 111, a controller 112, and a signal processing circuit 113.
[0097]
The I / F 111 controls the exchange of signals with the selector 104, the controller 112, and the signal processing circuit 113.
[0098]
The controller 112 determines whether or not an electronic device is housed in the bay 4 and is electrically connected to the selector 104 through the I / F 111 and the selector 104, and based on the determination result, the signal processing circuit 113. To control.
[0099]
In addition, the controller 112 stores a function ID and an ID table. The function ID is a unique ID (Identification) for identifying what function the signal processing circuit 113 has, and processing information as described later is associated with the function ID in the ID table. It has been.
[0100]
The signal processing circuit 113 basically includes, for example, a function of converting an image signal of a composite signal into an image signal of a component signal, and an image signal of a standard resolution of the component signal (hereinafter referred to as SD (Standard Definition) as appropriate). A function of converting an image signal) into a high-resolution image signal (hereinafter, referred to as an HD (High Definition) image signal as appropriate). However, the signal processing circuit 113 can change its function under the control of the controller 112.
[0101]
Next, FIG. 17 shows an example of the electrical configuration of the electronic device 11 housed in the bay 4. As described above, the electronic device 11 is an electronic device compatible with the bay structure type television receiver (hereinafter, referred to as a corresponding electronic device as appropriate), but the compatible electronic device is not limited to the electronic device 11. The configuration is as shown in FIG.
[0102]
The electronic device 11 includes an I / F 121, a controller 122, a signal processing circuit 123, and a specific block 124.
[0103]
The I / F 121, the controller 122, or the signal processing circuit 123 is configured similarly to the I / F 111, the controller 112, or the signal processing circuit 113 in FIG.
[0104]
The specific block 124 is a block specific to the electronic device 11. For example, when the electronic device 11 is a DVD player, the specific block 124 irradiates a DVD (not shown) with laser light and receives the reflected light. And an optical pickup that performs photoelectric conversion. In addition, when the electronic device 11 is, for example, a digital VTR, the specific block 124 includes a drive mechanism that drives a video tape, a magnetic head that records / reproduces signals with respect to the video tape, and the like. The
[0105]
When the electronic device 11 is a DVD player, for example, the signal recorded on the DVD is MPEG (Moving Picture Expert Group) encoded. In addition, it has a function of MPEG-decoding an MPEG-encoded signal. However, in the present embodiment, it is assumed that the signal processing circuit 123 further has a function of performing, for example, a spatial resolution improvement process.
[0106]
Next, the operation of the TV signal processing unit 106 in FIG. 16 will be described with reference to the flowchart in FIG.
[0107]
First, in step S1, the controller 112 checks whether or not the electronic device is electrically connected via the I / F 111 and the selector 104, and proceeds to step S2. In step S2, the controller 112 determines whether or not the electronic device is electrically connected based on the result of the check in step S1.
[0108]
If it is determined in step S2 that there is no electronic device electrically connected to the TV signal processing unit 106, that is, no electronic device is stored in the bay 4, or an electronic device is stored in the bay 4. However, if the selector 104 is not selected so that the electronic device and the TV signal processing unit 106 are electrically connected to each other, the process proceeds to step S3, and the controller 112 113 is instructed to perform processing by a normal function. Thereby, in step S3, the signal processing circuit 113 performs normal signal processing, and then ends the processing.
[0109]
That is, when the TV signal processing unit 106 is not connected to another electronic device, the tuner 105 (FIG. 15) extracts a baseband signal of a predetermined channel from the TV signal, and via the selector 104, This is supplied to the TV signal processing unit 106. In the TV signal processing unit 106, the I / F 111 receives a baseband image signal supplied via the selector 104 and supplies it to the signal processing circuit 113. The signal processing circuit 113 performs a composite / component conversion process for converting a composite signal into a component signal for an image signal from the I / F 111, and a space for improving a spatial resolution by converting an SD image signal into an HD image signal. It has a function to perform resolution improvement processing in a lump, performs processing based on that function, and supplies the HD image signal of the component signal obtained as a result to the CRT 2 via the I / F 111 and the selector 104 To do. As a result, HD images that are high-resolution images are displayed on the CRT 2.
[0110]
On the other hand, if it is determined in step S2 that there is an electronic device electrically connected to the TV signal processing unit 106, that is, the electronic device is stored in the bay 4, and the electronic device is selected in the selector 104. When the selection is made so that the TV signal processing unit 106 is electrically connected to the TV signal processing unit 106, the process proceeds to step S <b> 4, and the controller 112 performs electrical connection with the TV signal processing unit 106 via the I / F 111 and the selector 104. The function ID is requested to an electronic device (hereinafter, referred to as “connected device” as appropriate) that is connected, and the process proceeds to step S5.
[0111]
In step S5, the controller 112 determines whether or not the function ID has been transmitted from the connected device in response to the function ID request in step S4. If it is determined in step S5 that the function ID has not been transmitted from the connected device, the process proceeds to step S3, and basically the same processing as described above is performed.
[0112]
That is, the fact that the function ID is not transmitted from the connected device means that the connected device is not a compatible electronic device such as the electronic device 11 shown in FIG. When the device is not a compatible electronic device, that is, when the connected device is a non-compliant electronic device, the signal processing circuit 113 converts the image signal supplied from the non-compliant electronic device via the selector 104 and the I / F 111 to the image signal. On the other hand, processing similar to that described above is performed.
[0113]
On the other hand, if it is determined in step S5 that the function ID has been transmitted from the connected device, the process proceeds to step S6, where the controller 112 receives the function ID from the connected device and refers to the ID table based on the function ID. As a result, processing sharing is recognized, and a signal path is further set.
[0114]
That is, in the ID table, the function ID of the electronic device is associated with the processing information indicating the content of the processing to be performed by the signal processing circuit 113 when connected to the electronic device having the function ID. The controller 112 recognizes processing information associated with the function ID received from the connected device. Then, the controller 112 recognizes the process represented by the process information as a process to be shared by the signal processing circuit 113.
[0115]
Here, when the TV signal processing unit 106 is electrically connected to the corresponding electronic device, the TV signal processing unit 106 cooperates with the corresponding electronic device as if it were a single device as a whole, Optimal processing is applied to the signal. Therefore, in this case, the TV signal processing unit 106 and the corresponding electronic device perform the optimum processing for the input signal as a whole, but in the ID table stored in the controller 112 of the TV signal processing unit 106. In order to perform such optimum processing, processing information related to processing that the TV signal processing unit 106 should share in cooperation with the corresponding electronic device (cooperative sharing) is associated with the function ID of the corresponding electronic device. ing.
[0116]
When the controller 112 recognizes the sharing of processing for the input signal, the controller 112 sets a signal path as a path representing the processing order of the input signal in the signal processing circuit 113 and the connected device.
[0117]
Thereafter, the process proceeds to step S7, and the controller 112 controls the function of the signal processing circuit 113 so that the signal processing circuit 113 can perform the shared processing (the processing represented by the processing information recognized in step S6). A control signal is generated and supplied to the signal processing circuit 113. The signal processing circuit 113 changes its function according to the control signal from the controller 112, and proceeds to step S8.
[0118]
In step S8, the signal processing circuit 113 performs processing corresponding to the changed function on the input signal supplied according to the signal path, and outputs the processing result according to the signal path. Then, when the processing on the input signal is completed, the process proceeds to step S9, where the controller 112 transmits a control signal to the signal processing circuit 113, thereby restoring the function based on the function of the signal processing circuit 113 and ending the processing. .
[0119]
Note that when the connected device is, for example, the electronic device 11 that is the compatible electronic device illustrated in FIG. 17, the electronic device 11 performs the same processing as the processing according to the flowchart of FIG. 18. In this case, the electronic device 11 requests the function ID from the TV signal processing unit 106, but this request is received by the controller 112 of the TV signal processing unit 106, and the controller 112 stores it. The function ID is transmitted to the electronic device 11. The controller 122 of the electronic device 11 receives the function ID from the TV signal processing unit 106, and refers to the ID table stored by itself based on the function ID, so that the electronic device 11 has the TV signal processing unit. Processing information related to processing to be shared (coordinated sharing) is recognized in cooperation with 106. In the electronic device 11, the controller 122 performs control so that the function of the signal processing circuit 123 is changed according to the recognized processing information.
[0120]
As described above, the TV signal processing circuit 113 and the electronic device 11 change their functions depending on whether other devices are connected or not connected, and perform processing on input signals with other devices. Since the sharing is performed in a coordinated manner, it is possible to obtain a higher quality processing result than when the TV signal processing circuit 113 (or another device) alone or the electronic device 11 alone.
[0121]
That is, when the TV signal processing unit 106 and the electronic device 11 are not electrically connected, the TV signal processing unit 106 and the electronic device 11 perform processing independently as shown in FIG. Here, it is assumed that the electronic device 11 is a DVD player, for example.
[0122]
In the embodiment of FIG. 19, the TV signal processing unit 106, for example, as described in step S3 of FIG. 18, the composite signal supplied from the tuner 105 (FIG. 15) via the selector 104 and the I / F 111. The composite / component conversion process and the spatial resolution improvement process are collectively performed on the SD image signal, and the resulting HD signal of the component signal is supplied to the CRT 2 via the I / F 111 and the selector 104. .
[0123]
In addition, the electronic device 11 that is a DVD player reproduces a signal recorded on the DVD and supplies it to the signal processing circuit 123 in the special block 124. The signal processing circuit 123 performs, for example, MPEG decoding processing and spatial resolution improvement processing on the playback signal from the DVD in a lump, and outputs the HD image signal of the component signal obtained as a result via the I / F 121. To do.
[0124]
On the other hand, when the TV signal processing unit 106 and the electronic device 11 are electrically connected, as shown in FIG. 20, the TV signal processing unit 106 and the electronic device 11 coordinately process the input signal. The shared processing is performed by changing its own function.
[0125]
That is, in the embodiment of FIG. 20, the function of the signal processing circuit 113 in the TV signal processing unit 106 is changed from a function of performing the composite / component conversion process and the spatial resolution improving process in a lump to a function of performing only the spatial resolution improving process. It has changed. On the other hand, the function of the signal processing circuit 123 in the electronic device 11 has changed from a function of collectively performing the MPEG decoding process and the spatial resolution improving process to a function of collectively performing the MPEG decoding process and the distortion removal process. In the embodiment of FIG. 20, the signal path includes the specific block 124 in the electronic device 11, the signal processing circuit 123, the I / F 121, the selector 104, the I / F 111 in the TV signal processing unit 106, the signal processing circuit 113, I / F111 and selector 104 are set in this order.
[0126]
As described above, when the functions of the signal processing circuits 113 and 123 are changed and a signal path is set, the TV signal processing unit 106 and the electronic device 11 that are electrically connected to each other are shown in the flowchart of FIG. Processing as shown is performed.
[0127]
In other words, the signal recorded on the DVD is reproduced and supplied to the signal processing circuit 123 in the specific block 124 of the electronic device 11 which is a DVD player. In step S11, the signal processing circuit 123 performs MPEG decoding processing and distortion removal processing on the reproduction signal from the DVD in a lump, and obtains the SD image signal (component from which distortion has been removed) of the component signal obtained as a result. , And output via the I / F 121.
[0128]
Here, in the distortion removal processing, distortion such as block distortion caused by MPEG encoding is removed.
[0129]
As described above, the SD image signal of the component signal output from the I / F 121 of the electronic device 11 is received by the selector 104 and supplied to the TV signal processing unit 106.
[0130]
In the TV signal processing unit 106, the signal processing circuit 113 receives the SD image signal of the component signal from the selector 104 via the I / F 111, and performs spatial resolution improvement processing on the SD image signal in step S12. Do. The HD image signal of the component signal obtained by performing the spatial resolution improvement processing in the signal processing circuit 113 is supplied to the selector 104 via the I / F 111.
[0131]
The selector 104 supplies the HD image signal to, for example, the CRT 2 (FIG. 15), whereby the CRT 2 MPEG-decodes the signal recorded on the DVD and performs distortion removal to improve its spatial resolution. The HD image of the component signal is displayed.
[0132]
Next, as described above, the function of the signal processing circuit 113 of the TV signal processing unit 106 is changed from the function of performing the composite / component conversion process and the spatial resolution improving process at once to the function of performing only the spatial resolution improving process. . Also, the function of the signal processing circuit 123 in the electronic device 11 changes from the function of collectively performing the MPEG decoding process and the spatial resolution improving process to the function of collectively performing the MPEG decoding process and the distortion removal process as described above.
[0133]
The signal processing circuit whose function changes in this way can be realized by, for example, the class classification adaptive processing previously proposed by the applicant of the present application.
[0134]
The class classification adaptation process includes a class classification process and an adaptation process. By the class classification process, signals (data) are classified based on their properties, and the adaptation process is performed for each class.
[0135]
Here, the adaptive processing will be described by taking as an example a case of performing spatial resolution improvement processing for converting an SD image into an HD image.
[0136]
In this case, in the adaptive processing, prediction of the pixels of the HD image in which the spatial resolution of the SD image is improved by linear combination of the pixels constituting the SD image (hereinafter, appropriately referred to as SD pixels) and a predetermined tap coefficient. By obtaining the value, an image in which the resolution of the SD image is improved can be obtained.
[0137]
Specifically, for example, a certain HD image is used as teacher data, and an SD image with degraded resolution of the HD image is used as student data, and pixels constituting the HD image (hereinafter, referred to as HD pixels as appropriate) The predicted value E [y] of the pixel value y of the pixel value x is the pixel value x of several SD pixels (pixels constituting an SD image)₁, X₂, ... and a predetermined tap coefficient w₁, W₂Consider a linear primary combination model defined by the linear combination of. In this case, the predicted value E [y] can be expressed by the following equation.
[0138]
E [y] = w₁x₁+ W₂x₂+ ...
... (1)
[0139]
To generalize equation (1), tap coefficient w_jA matrix W consisting of_ijAnd a predicted value E [y_j] Is a matrix Y ′ consisting of
[Expression 1]

Then, the following observation equation holds.
[0140]
XW = Y ’
... (2)
Here, the component x of the matrix X_ijIs a set of i-th student data (i-th teacher data y_iThe j-th student data in the set of student data used for the prediction of_jRepresents a tap coefficient by which a product with the jth student data in the student data set is calculated. Y_iRepresents the i-th teacher data, and thus E [y_i] Represents the predicted value of the i-th teacher data. Note that y on the left side of Equation (1) is the component y of the matrix Y._iThe suffix i is omitted, and x on the right side of Equation (1)₁, X₂,... Are also components x of the matrix X_ijThe suffix i is omitted.
[0141]
Then, it is considered to apply the least square method to this observation equation to obtain a predicted value E [y] close to the pixel value y of the HD pixel. In this case, a matrix Y composed of a set of true pixel values y of HD pixels serving as teacher data and a matrix E composed of a set of residuals e of predicted values E [y] with respect to the pixel values y of HD pixels,
[Expression 2]

From the equation (2), the following residual equation is established.
[0142]
XW = Y + E
... (3)
[0143]
In this case, the tap coefficient w for obtaining the predicted value E [y] close to the pixel value y of the HD pixel_jIs the square error
[Equation 3]

Can be obtained by minimizing.
[0144]
Therefore, the above square error is converted to the tap coefficient w._jWhen the value differentiated by 0 is 0, that is, the tap coefficient w satisfying the following equation_jHowever, this is the optimum value for obtaining the predicted value E [y] close to the pixel value y of the HD pixel.
[0145]
[Expression 4]

... (4)
[0146]
Therefore, first, the equation (3) is changed to the tap coefficient w._jIs differentiated by the following equation.
[0147]
[Equation 5]

... (5)
[0148]
From equations (4) and (5), equation (6) is obtained.
[0149]
[Formula 6]

... (6)
[0150]
Furthermore, the student data x in the residual equation of equation (3)_ij, Tap coefficient w_j, Teacher data y_iAnd residual e_iConsidering this relationship, the following normal equation can be obtained from the equation (6).
[0151]
[Expression 7]

... (7)
[0152]
In addition, the normal equation shown in Expression (7) has a matrix (covariance matrix) A and a vector v,
[Equation 8]

And the vector W is defined as shown in Equation 1,
AW = v
... (8)
Can be expressed as
[0153]
Each normal equation in equation (7) is the student data x_ijAnd teacher data y_iBy preparing a certain number of sets, a tap coefficient w to be obtained_jTherefore, by solving equation (8) with respect to vector W (however, to solve equation (8), matrix A in equation (8) is regular). Necessary), the optimal tap coefficient w_jCan be requested. In solving the equation (8), for example, a sweeping method (Gauss-Jordan elimination method) or the like can be used.
[0154]
As described above, the tap coefficient w optimal for predicting the teacher data from the student data and the tap coefficient using the student data and the teacher data._jAnd learning the tap coefficient w_jThe adaptive process is to obtain the predicted value E [y] close to the teacher data y by using the equation (1).
[0155]
The adaptive process is not included in the SD image, but is different from, for example, a simple interpolation process in that the component included in the HD image is reproduced. In other words, the adaptive process looks the same as the interpolation process using a so-called interpolation filter as long as only Expression (1) is seen, but the tap coefficient w corresponding to the tap coefficient of the interpolation filter is the teacher data and the student data. Therefore, the components included in the HD image can be reproduced. From this, it can be said that the adaptive process is a process having an image creation (resolution creation) effect.
[0156]
Further, here, the adaptive processing has been described by taking the case of improving the spatial resolution as an example. However, according to the adaptive processing, various tap coefficients obtained by performing learning by changing teacher data and student data are used. Thus, for example, it is possible to perform improvement of S / N (Signal to Noise Ratio), improvement of blur, and other various processes.
[0157]
That is, for example, in order to improve S / N and blur by adaptive processing, image data with a high S / N is used as teacher data, and an image (or an S / N of the teacher data is reduced) (or , Blurred image) is used as student data, and the tap coefficient may be obtained.
[0158]
Further, for example, in order to perform composite / component conversion processing and spatial resolution improvement processing collectively by adaptive processing, the HD image of the component signal is used as teacher data, the spatial resolution of the teacher data is reduced, and the composite signal is further reduced. The tap coefficient may be obtained using the image converted into the student data.
[0159]
Also, for example, in order to apply spatial resolution improvement processing to an image of a component signal by adaptive processing, an HD image of the component signal is used as teacher data, and an SD image in which the spatial resolution of the teacher data is reduced is used as a student. What is necessary is just to obtain | require a tap coefficient as data.
[0160]
In addition, for example, in order to perform MPEG decoding processing and spatial resolution improvement processing collectively on an MPEG encoded image by adaptive processing, a component signal HD image decoded by MPEG encoding is used as teacher data. At the same time, the tap resolution may be obtained by reducing the spatial resolution of the teacher data and using the encoded data encoded by MPEG as student data.
[0161]
In addition, for example, in order to perform MPEG decoding processing and spatial resolution improvement processing collectively on an MPEG encoded image by adaptive processing, the component signal image is used as teacher data, and the teacher data is encoded using MPEG encoding. The tap coefficient may be obtained using the encoded data as student data.
[0162]
Next, FIG. 22 shows a configuration example of the signal processing unit 113 of the TV signal processing unit 106 realized by the class classification adaptive processing circuit that performs the class classification adaptive processing as described above. The signal processing unit 123 of the electronic device 11 (FIG. 17) is configured similarly.
[0163]
Input data (input signal) to be processed in the signal processing circuit 113 is supplied to the buffer 131, and the buffer 131 temporarily stores the input data supplied thereto.
[0164]
The prediction tap extraction circuit 132 sequentially sets output data to be obtained in a product-sum operation circuit 136 described later as attention data, and further extracts input data used to predict the attention data from the buffer 131. Let it be a prediction tap.
[0165]
That is, for example, when the input data is SD image data and the output data is HD image data in which the spatial resolution of the SD image is improved, the prediction tap extraction circuit 132, for example, selects HD as target data. Some SD pixels of the SD image located spatially or temporally close to the position corresponding to the pixel are extracted as prediction taps.
[0166]
For example, when the input data is encoded data obtained by MPEG-encoding an image and the output data is image data obtained by MPEG-decoding the encoded data, the prediction tap extraction circuit 132 performs, for example, attention DCT coefficients that make up a DCT block that includes pixels as data (a block that is a unit of DCT (Discrete Cosine Transform) processing in MPEG encoding), and a DCT that is spatially or temporally close to the DCT block When the coefficient, etc., and the pixel as the data of interest are MPEG-coded using an image of another frame (or field) as a predicted image (for example, a P picture or B picture) The DCT coefficients of the pixels constituting the predicted image are extracted as prediction taps.
In addition, a pixel of an image that is already output as output data and becomes a prediction image can be used as a prediction tap.
[0167]
When the prediction tap extraction circuit 132 obtains a prediction tap for the attention data, the prediction tap extraction circuit 132 supplies the prediction tap for the attention data to the product-sum operation circuit 136.
[0168]
Here, the control signal is supplied from the function control unit 137 to the prediction tap extraction circuit 132, and the prediction tap extraction circuit 132 configures the prediction tap according to the control signal from the function control unit 137. The input data (and output data) to be performed, that is, the structure of the prediction tap is determined.
[0169]
The class tap extraction circuit 133 extracts the input data used for class classification for classifying the data of interest into any of several classes from the buffer 131 and sets it as a class tap.
[0170]
Here, the control signal is also supplied to the class tap extraction circuit 133 from the function control unit 137, and the class tap extraction circuit 133 is also supplied from the function control unit 137 in the same manner as the prediction tap extraction circuit 132. In accordance with the control signal, the input data constituting the class tap, that is, the structure of the class tap is determined.
[0171]
Here, in order to simplify the description, for example, the prediction tap obtained by the prediction tap extraction circuit 132 and the class tap obtained by the class tap extraction circuit 133 have the same tap structure. However, of course, the prediction tap and the class tap can have independent tap structures.
[0172]
The class tap for the data of interest obtained in the class tap extraction circuit 133 is supplied to the class classification circuit 134. The class classification circuit 134 classifies the data of interest based on the class tap from the class tap extraction circuit 133, and outputs a class code corresponding to the class obtained as a result.
[0173]
Here, as a method of classifying, for example, ADRC (Adaptive Dynamic Range Coding) or the like can be employed.
[0174]
In the method using ADRC, input data constituting a class tap is subjected to ADRC processing, and a class of attention data is determined according to an ADRC code obtained as a result.
[0175]
In the K-bit ADRC, for example, the maximum value MAX and the minimum value MIN of the input data constituting the class tap are detected, and DR = MAX-MIN is set as the local dynamic range of the set, and the dynamic range DR Based on this, the input data constituting the class tap is requantized to K bits. That is, the minimum value MIN is subtracted from the input data constituting the class tap, and the subtraction value is DR / 2.^KDivide by (quantize). Then, a bit string obtained by arranging the K-bit input data constituting the class tap in a predetermined order, which is obtained as described above, is output as an ADRC code. Therefore, for example, when a class tap is subjected to 1-bit ADRC processing, each input data constituting the class tap is an average value of the maximum value MAX and the minimum value MIN after the minimum value MIN is subtracted. By division, each input data is made 1 bit (binarized). A bit string obtained by arranging the 1-bit input data in a predetermined order is output as an ADRC code.
[0176]
The class classification circuit 134 can output the level distribution pattern of the input data constituting the class tap as it is, for example, as a class code. In this case, the class tap has N pieces of input data. And K bits are assigned to each input data, the number of class codes output by the class classification circuit 134 is (2^N)^KAs a result, the number is exponentially proportional to the number of bits K of the input data.
[0177]
Therefore, the class classification circuit 134 preferably performs class classification after compressing the information amount of the class tap by the above-mentioned ADRC processing or vector quantization.
[0178]
The class code output from the class classification circuit 134 is given to the coefficient storage unit 135 as an address.
[0179]
The coefficient storage unit 135 stores tap coefficients obtained by performing the learning process, and uses the tap coefficient stored at the address corresponding to the class code output from the class classification circuit 134 as the product-sum operation circuit 136. Output to.
[0180]
The coefficient storage unit 135 stores a plurality of sets of tap coefficients obtained by performing learning using a plurality of sets of teacher data and student data, as will be described later. In the coefficient storage unit 135, which set of tap coefficients among a plurality of sets of tap coefficients is determined according to a control signal from the function control unit 137. That is, the coefficient storage unit 135 is supplied with a control signal output from the function control unit 137, and the coefficient storage unit 135 determines a set of tap coefficients to be used according to the control signal, and From the set of tap coefficients, the one corresponding to the class code supplied from the class classification circuit 134 is output to the product-sum operation circuit 136.
[0181]
The product-sum operation circuit 136 acquires the prediction tap output from the prediction tap extraction circuit 132 and the tap coefficient output from the coefficient storage unit 135, and uses the prediction tap and the tap coefficient to obtain the equation (1). The linear prediction calculation (product-sum calculation) is performed, and the calculation result is output as output data.
[0182]
The function control unit 137 is supplied with a control signal from the controller 112 (FIG. 16), and the function control unit 137 follows the control signal according to the prediction tap extraction circuit 132, the class tap extraction circuit 133, And the coefficient storage unit 135 is controlled.
[0183]
Next, FIG. 23 illustrates a configuration example of an embodiment of a learning device that performs learning processing of tap coefficients to be stored in the coefficient storage unit 135 of FIG.
[0184]
The teacher data generation circuit 141 is supplied with learning data used for learning. Here, high-quality data such as HD image data can be used as the learning data.
[0185]
The teacher data generation circuit 141 generates teacher data to be a learning teacher from the learning data.
[0186]
That is, for example, when the learning data is HD image data, the tap coefficient to be obtained by learning is for converting an SD image into an HD image, or MPEG encoded data is converted into an HD image. When it is for conversion, the teacher data generation circuit 141 outputs the HD image data as learning data as it is as teacher data.
[0187]
For example, when the learning data is HD image data, the tap coefficient to be obtained by learning is for converting an SD image with a low S / N into an SD image with a high S / N. When the MPEG encoded data is to be converted into an SD image, the teacher data generation circuit 141 thins the number of pixels from the HD image data as the learning data to obtain the SD image. Data is generated and output as teacher data.
[0188]
The teacher data output from the teacher data generation circuit 141 is supplied to the teacher data memory 142. The teacher data memory 142 stores the teacher data from the teacher data generation circuit 141.
[0189]
The student data generation circuit 143 generates student data to be learning students from the teacher data stored in the teacher data memory 142.
[0190]
That is, for example, when the tap coefficient to be obtained by learning is for converting an SD image into an HD image, the teacher data memory 142 stores the HD image as the teacher data as described above. In this case, the student data generation circuit 143 generates SD image data by thinning out the number of pixels of the teacher data, and outputs this as student data.
[0191]
For example, when the tap coefficient to be obtained by learning is for converting MPEG encoded data into an HD image, the teacher data memory 142 stores HD as teacher data as described above. In this case, the student data generation circuit 143 generates encoded data by MPEG encoding the teacher data, and outputs this as student data.
[0192]
Further, for example, when the tap coefficient to be obtained by learning is for converting an SD image having a low S / N into an SD image having a high S / N, the teacher data memory 142 stores the above-described tap coefficient. Thus, the SD image as teacher data is stored. In this case, the student data generation circuit 143 generates SD image data having a low S / N by adding noise to the teacher data. Output as student data.
[0193]
For example, when the tap coefficient to be obtained by learning is for converting MPEG encoded data into an SD image, the teacher data memory 142 stores SD as teacher data as described above. In this case, the student data generation circuit 143 generates encoded data by MPEG encoding the teacher data, and outputs this as student data.
[0194]
The student data output from the student data generation circuit 143 is supplied to the student data memory 144. The student data memory 144 stores student data supplied from the student data generation circuit 143.
[0195]
The prediction tap extraction circuit 145 sequentially sets the teacher data stored in the teacher data memory 142 as attention data, and also uses the student data used to predict the attention data as in the prediction tap extraction circuit 132 of FIG. Are extracted from the student data memory 144 and set as prediction taps. The prediction tap obtained by the prediction tap extraction circuit 145 is supplied to the normal equation addition circuit 148.
[0196]
Similar to the class tap extraction circuit 133 in FIG. 22, the class tap extraction circuit 146 extracts student data used for class classification of the data of interest from the student data memory 144, and supplies it as a class tap to the class classification circuit 147. Similar to the class classification circuit 134 of FIG. 22, the class classification circuit 147 performs class classification using the class tap from the class tap extraction circuit 146, and the class code representing the class of the data of interest is sent to the normal equation addition circuit 148. Supply.
[0197]
The normal equation addition circuit 148 reads the teacher data as the attention data from the teacher data memory 142, and targets the student data constituting the prediction tap from the prediction tap extraction circuit 145 and the teacher data as the attention data. Add.
[0198]
That is, the normal equation addition circuit 148 uses each prediction tap (student data) for each class corresponding to the class code supplied from the class classification circuit 147, and is each component in the matrix A of Expression (8). Multiplication of student data (x_inx_im) And a calculation corresponding to summation (Σ).
[0199]
Further, the normal equation addition circuit 148 uses the prediction tap (student data) and the target pixel (teacher data) for each class corresponding to the class code supplied from the class classification circuit 147, and uses the vector of equation (8). Multiplying student data and teacher data (x_iny_i) And a calculation corresponding to summation (Σ).
[0200]
The normal equation adding circuit 148 performs the above addition using all the teacher data stored in the teacher data memory 142 as the data of interest, and thereby, for each class, the normal equation shown in the equation (8) is established.
[0201]
The tap coefficient determination circuit 149 obtains a tap coefficient for each class by solving the normal equation generated for each class in the normal equation addition circuit 148, and supplies the tap coefficient to the address corresponding to each class in the coefficient table storage unit 150. To do.
[0202]
Depending on the data prepared as learning data, there may occur a class in which the number of normal equations necessary for obtaining tap coefficients cannot be obtained in the normal equation adding circuit 148. For such a class, for example, a default tap coefficient is output.
[0203]
The coefficient table storage unit 150 stores the tap coefficient for each class supplied from the tap coefficient determination circuit 149.
[0204]
The control circuit 151 controls the teacher data generation circuit 141, the student data generation circuit 142, the prediction tap extraction circuit 145, and the class tap extraction circuit 146.
[0205]
That is, in the learning apparatus of FIG. 23, as information indicating what kind of processing tap coefficient is to be learned, processing information indicating the content of processing performed using the tap coefficient is displayed on an operation unit (not shown). By being operated, the control circuit 151 is set. The control circuit 151 controls the teacher data generation circuit 141, the student data generation circuit 142, the prediction tap extraction circuit 145, and the class tap extraction circuit 146 according to the processing information set by operating the operation unit.
[0206]
As a result, the teacher data generation circuit 141 generates teacher data from the learning data under the control of the control circuit 151. The student data generation circuit 143 also generates student data from the teacher data under the control of the control circuit 151.
Further, in the prediction tap extraction circuit 145, the tap structure of the prediction tap is set under the control of the control circuit 151, and the prediction tap having such a tap structure is generated. Also in the class tap extraction circuit 146, the tap structure of the class tap is set under the control of the control circuit 151, and the class tap of such a tap structure is generated.
[0207]
Next, processing (learning processing) of the learning device in FIG. 23 will be described with reference to the flowchart in FIG.
[0208]
First, in step S21, the control circuit 151 controls the teacher data generation circuit 141, the student data generation circuit 142, the prediction tap extraction circuit 145, and the class tap extraction circuit 146 based on the set processing information. As a result, the teacher data generation circuit 141 sets a method for generating teacher data from learning data, and the student data generation circuit 143 sets a method for generating student data from teacher data. Further, the prediction tap extraction circuit 145 sets the tap structure of the prediction tap, and the class tap extraction circuit 146 sets the tap structure of the class tap.
[0209]
In step S22, the teacher data generation circuit 141 generates teacher data from the learning data supplied thereto in accordance with the generation method set in step S21, and supplies the teacher data to the teacher data memory 142 for storage.
[0210]
Thereafter, in step S23, the student data generation circuit 143 generates student data from the teacher data stored in the teacher data memory 142 according to the generation method set in step S21, and supplies the student data to the student data memory 144 for storage. .
[0211]
Then, the process proceeds to step S <b> 24, and the prediction tap extraction circuit 145 sets, as the attention data, the teacher data stored in the teacher data memory 142 that has not yet been the attention data. Further, the prediction tap extraction circuit 145 reads out the student data from the student data memory 144 to generate a prediction tap having the tap structure set in step S <b> 21 for the data of interest and supplies the prediction tap to the normal equation addition circuit 148.
[0212]
In step S24, the class tap extraction circuit 146 reads out the student data from the student data memory 144, thereby generating a class tap having the tap structure set in step S21 for the data of interest, and supplies the class tap to the class classification circuit 147. Then, the process proceeds to step S25.
[0213]
In step S25, the class classification circuit 147 performs class classification using the class tap from the class tap extraction circuit 146, and obtains a class code for the data of interest. This class code is supplied from the class classification circuit 147 to the normal equation addition circuit 148.
[0214]
In step S26, the normal equation adding circuit 148 reads the teacher data as the attention data from the teacher data memory 142, and the student data constituting the prediction tap supplied from the prediction tap extraction circuit 145 and the attention data as the attention data. For teacher data, the matrix A and the vector v in Expression (8) are added as described above. This addition is performed for each class corresponding to the class code from the class classification circuit 147.
[0215]
In step S27, the prediction tap extraction circuit 145 determines whether all teacher data stored in the teacher data memory 142 have been added as attention data. If it is determined in step S27 that all of the teacher data has not yet been added as the attention data, the process returns to step S24, and the prediction tap extraction circuit 145 has not yet set the attention data among the teacher data. The same processing is repeated below with the new data as the attention data.
[0216]
If it is determined in step S27 that all the teacher data has been added as the attention data, the process proceeds to step S28, and the tap coefficient determination circuit 149 performs the addition in step S26 in the normal equation addition circuit 148. As a result, the normal equation generated for each class is solved, whereby the tap coefficient for each class is obtained, supplied to the address corresponding to each class in the coefficient memory 150, stored, and the process is terminated. .
[0217]
As described above, the coefficient memory 150 stores the tap coefficient for each class for performing the processing represented by the processing information set in the control circuit 151.
[0218]
The learning processing by the learning device as described above is performed by changing the processing information set in the control circuit 151, and a set of tap coefficients for each processing information is obtained.
[0219]
The coefficient storage unit 135 in the signal processing circuit 113 in FIG. 22 stores a plurality of sets of tap coefficients obtained for each of a plurality of pieces of processing information in this way.
[0220]
That is, FIG. 25 shows a configuration example of the coefficient storage unit 135 of FIG.
[0221]
The selectors 161 and 162 select N coefficient memories 163 according to the control signal supplied from the function control unit 137 (FIG. 22).₁Thru 163_NIs selected. Note that the selectors 161 and 162 have the same coefficient memory 163._nSelect.
[0222]
Coefficient memory 163₁Thru 163_NEach stores a set of tap coefficients obtained by the learning device of FIG. 23 for each processing information.
[0223]
In the coefficient storage unit 135 configured as described above, the selectors 161 and 162 have N coefficient memories 163 according to the control signal supplied from the function control unit 137.₁Thru 163_NOne coefficient memory 163 of_nSelect.
[0224]
Further, the selector 161 is supplied with a class code from the class classification circuit 134, and the selector 161 stores the class code in the selected coefficient memory 163._nTo supply. Coefficient memory 163_nReads out the tap coefficient stored in the address corresponding to the class code from the selector 161 from the set of tap coefficients corresponding to the processing information stored by itself.
[0225]
Coefficient memory 163_nIs output from the coefficient memory 163._nThe selector 162 selects the coefficient memory 163._nIs supplied to the product-sum operation circuit 136 (FIG. 22).
[0226]
A coefficient memory 163 that stores a set of tap coefficients for each processing information.₁Thru 163_NNeed not be physically separate memories. That is, the coefficient memory 163₁Thru 163_NCan be realized by switching and using one memory.
[0227]
Here, in the present embodiment, the function of the signal processing circuit 113 in the TV signal processing unit 106 is changed from the function of performing the composite / component conversion process and the spatial resolution improving process at once to the function of performing only the spatial resolution improving process. Therefore, at least the following two sets of tap coefficients are stored in the coefficient storage unit 135 of the signal processing circuit 113.
[0228]
That is, a certain coefficient memory 163 in the coefficient storage unit 135 of the signal processing circuit 113._iIs a tap obtained by performing learning processing with student data obtained by converting an HD image of a component signal into teacher data and converting an SD image in which the spatial resolution of the teacher data is reduced from a component signal into a composite signal. A set of coefficients is stored. Further, another coefficient memory 163 in the coefficient storage unit 135 of the signal processing circuit 113 is used._jStores a set of tap coefficients obtained by performing learning processing using the HD image of the component signal as teacher data and the SD image with the spatial resolution of the teacher data reduced as student data.
[0229]
In the present embodiment, the function of the signal processing circuit 123 in the electronic device 11 (FIG. 17) is to perform MPEG decoding processing and distortion removal processing collectively from the function of performing MPEG decoding processing and spatial resolution improvement processing collectively. In order to change the function, at least the following two sets of tap coefficients are stored in the coefficient storage unit 135 in the signal processing circuit 123 of the electronic device 11.
[0230]
That is, a certain coefficient memory 163 in the coefficient storage unit 135 of the signal processing circuit 123._iIn this method, the HD image of the component signal is MPEG-encoded, and the HD image obtained by MPEG decoding the encoded data is used as teacher data, and the SD image in which the spatial resolution of the teacher data is reduced is MPEG-encoded. A set of tap coefficients obtained by performing a learning process using encoded data as student data is stored. Further, another coefficient memory 163 in the coefficient storage unit 135 of the signal processing circuit 123 is used._jStores an SD image of a component signal as teacher data, and a set of tap coefficients obtained by performing learning processing using encoded data obtained by MPEG encoding the teacher data as student data.
[0231]
Note that other tap coefficients can be stored in the TV signal processing unit 106 and the coefficient storage unit 135 of the electronic device 11. That is, the coefficient storage unit 135 includes, for example, a tap coefficient for enlarging / reducing (resizing) an image, a tap coefficient for improving the resolution in the time direction, a tap coefficient for improving the resolution in the gradation direction, and blur improvement. It is possible to store a tap coefficient to be performed, a tap coefficient to be subjected to distortion and noise removal, and the like.
[0232]
As described above, a set of various tap coefficients is stored in the coefficient storage unit 135, and the TV signal processing unit is switched by switching which one of them is used together with the tap structure of the prediction tap or the class tap. The functions of the signal processing circuit 113 of 106 and the signal processing circuit 123 of the electronic apparatus 11 can be easily changed.
[0233]
Next, the processing of the signal processing circuit 113 in FIG. 22 will be described with reference to the flowchart in FIG.
[0234]
In step S31, the function control unit 137 receives a control signal for changing the function of the signal processing circuit 113 from the controller 112, and in accordance with the control signal, the prediction tap extraction circuit 132, the class tap extraction circuit 133, and the coefficient storage. The unit 135 is controlled.
[0235]
That is, the control signal supplied from the controller 112 to the function control unit 137 includes processing information associated with the function ID stored in the controller 112, and the function control unit 137 follows the processing information. Similarly to the control circuit 151 of FIG. 23, the prediction tap extraction circuit 132, the class tap extraction circuit 133, and the coefficient storage unit 135 are controlled.
[0236]
Accordingly, the prediction tap extraction circuit 132 is set to generate a prediction tap having the same tap structure as that in the prediction tap extraction circuit 145 of the learning device in FIG. 23, and the class tap extraction circuit 133 is also set in FIG. The class tap extraction circuit 146 of the learning device is set so as to generate a class tap having the same tap structure as the case.
[0237]
Further, the coefficient storage unit 135 stores a coefficient coefficient set 163 that stores a set of tap coefficients corresponding to the processing information included in the control signal from the function control unit 137._n(FIG. 25) is set to be used.
[0238]
Thereafter, when input data is supplied and stored in the buffer 131, the process proceeds to step 32, and the prediction tap extraction circuit 132 is still regarded as data of interest among output data to be obtained by the product-sum operation circuit 136. The data that has not been used is the data of interest, and the input data is read out from the buffer 131 to generate a prediction tap having the tap structure set in step S31 for the data of interest, and supply it to the product-sum operation circuit 136.
[0239]
Further, in step S32, the class tap extraction circuit 133 reads the input data from the buffer 131, thereby generating a class tap having the tap structure set in step S31 for the data of interest, and supplies it to the class classification circuit 134. The process proceeds to step S33.
[0240]
In step S33, the class classification circuit 134 performs class classification using the class tap from the class tap extraction circuit 133, and obtains a class code for the data of interest. This class code is supplied to the coefficient storage unit 135.
[0241]
In the coefficient storage unit 135 (FIG. 25), the selectors 161 and 162 use the coefficient memory 163 set in step S31._nWhen the class code is supplied from the class classification circuit 134, the coefficient memory 163 is selected in step S34._nThe tap coefficient is read from the address corresponding to the class code from the class classification circuit 134 and supplied to the product-sum operation circuit 136.
[0242]
The product-sum operation circuit 136 acquires the tap coefficient supplied from the coefficient storage unit 135, and uses the tap coefficient in step S35 and the prediction tap supplied from the prediction tap extraction circuit 132 in step S32. The product-sum operation shown in (1) is performed to obtain a predicted value of the data of interest and output as output data.
[0243]
Here, the output data output from the product-sum operation circuit 136 in this way is obtained using a set of tap taps and prediction taps and class taps corresponding to the processing information. The input data is processed by the processing information.
[0244]
Thereafter, the process proceeds to step S36, where the prediction tap extraction circuit 132 determines whether there is still output data to be the data of interest. If it is determined in step S36 that there is output data that should be the data of interest, the process returns to step S32, and the same processing is repeated hereinafter with the output data that has not yet been used as the data of interest as new data of interest.
[0245]
On the other hand, if it is determined in step S36 that there is no output data that should be the data of interest, the process ends.
[0246]
As described above, the signal processing circuit 113 of the TV signal processing unit 106 has the tap structure of the prediction tap generated by the prediction tap extraction circuit 132 and the tap of the class tap configured by the class tap extraction circuit 133 according to the processing information. By setting the structure and the type of tap coefficient set used for the product-sum operation of the product-sum operation circuit 136, its function is changed. Further, the function of the signal processing circuit 123 of the electronic device 11 (FIG. 17) is changed in the same manner as the signal processing circuit 123. The signal processing circuits 113 and 123 cooperatively share the processing for the input signal by changing the function in this way. Therefore, in this case, it is possible to obtain output data with higher quality than when processing is performed by only one of the signal processing circuits 113 and 123.
[0247]
That is, the signal processing circuit 113 alone of the TV signal processing unit 106 uses the HD image of the component signal as teacher data, and converts the SD image with the spatial resolution of the teacher data reduced from the component signal to the composite signal. A baseband SD image output by the tuner 105 (FIG. 15) using tap coefficients obtained by performing learning processing as student data (hereinafter referred to as composite / component conversion and SD / HD conversion tap coefficients as appropriate). By processing a signal that is a composite signal, the SD image signal of the composite signal is converted into an HD image signal of the component signal.
[0248]
In addition, the signal processing circuit 123 alone of the electronic device 11 MPEG-encodes the HD image of the component signal, and the HD image obtained by MPEG decoding the encoded data is used as teacher data, and the spatial resolution of the teacher data is set. Using a tap coefficient (hereinafter referred to as MPEG decoding and SD / HD conversion tap coefficient as appropriate) obtained by performing learning processing using encoded data obtained by MPEG-encoding a reduced SD image as student data, a specific block The encoded data obtained by MPEG encoding the SD image signal of the component signal output by 124 (FIG. 17) is converted into the HD image signal of the component signal.
[0249]
On the other hand, when the TV signal processing unit 106 and the electronic device 11 are electrically connected, the signal processing circuit 113 of the TV signal processing unit 106 and the signal processing circuit 123 of the electronic device 11 have their respective functions. Change and coordinate the processing for input signals.
[0250]
That is, first, in the signal processing circuit 123 of the electronic device 11, a tap obtained by performing learning processing using the SD data of the component signal as teacher data and using encoded data obtained by MPEG-encoding the teacher data as student data. By processing the encoded data obtained by encoding the SD image signal of the component signal, which is output from the specific block 124 (FIG. 17), using a coefficient (hereinafter, appropriately referred to as an MPEG decoding tap coefficient), The encoded data is converted into an SD image signal as a component signal.
[0251]
Then, in the signal processing circuit 113 of the TV signal processing unit 106, the HD image of the component signal is used as teacher data, and the SD image with the spatial resolution of the teacher data reduced is used as student data to perform learning processing. The SD image signal of the component signal obtained by the signal processing circuit 123 of the electronic device 11 is processed using a tap coefficient (hereinafter, appropriately referred to as an SD / HD conversion tap coefficient), so that the SD image signal is converted into the SD image signal. Are converted into HD image signals of component signals.
[0252]
Therefore, even when only one of the signal processing circuits 113 and 123 performs processing alone, or when the signal processing circuits 113 and 123 perform processing in a coordinated manner, the final processing is performed. What is obtained is the HD image signal of the component signal.
[0253]
However, in the case of using the composite / component conversion and SD / HD conversion tap coefficients used in the case of the signal processing circuit 113 alone of the TV signal processing unit 106, the composite SD image is converted into the HD image of the component signal by one processing. However, the conversion accuracy is different between converting a composite SD image into a component signal SD image and converting a component signal SD image into a component signal HD image. Compared with the case where it is carried out, it deteriorates.
[0254]
That is, converting a composite SD image into a component signal SD image uses the component signal SD image as teacher data and performs learning processing using the SD image obtained by converting the teacher data as a composite signal as student data. This can be performed using a tap coefficient (hereinafter referred to as a composite / component conversion tap coefficient as appropriate).
[0255]
Also, converting the SD image of the component signal into the HD image of the component signal means that the above-described SD / HD conversion tap coefficients (the HD image of the component signal is used as teacher data and the spatial resolution of the teacher data is reduced). (Tap coefficient obtained by performing learning processing on the SD image as student data).
[0256]
Since the composite / component conversion tap coefficient is specialized for the process of converting the SD image of the composite signal into the SD image of the component signal, if only focusing on converting the composite signal to the component signal, the composite The SD image of the composite signal can be converted to the SD image of the component signal with higher accuracy than the tap coefficient for composite / component conversion and SD / HD conversion that can be converted into the HD signal of the component signal at the same time. Can be converted.
[0257]
Also, since the SD / HD conversion tap coefficient is specialized for the process of converting an SD image into an HD image, if attention is paid only to improving such spatial resolution, composite / component conversion is still necessary. In addition, it is possible to obtain an HD image in which the spatial resolution of the SD image is improved more accurately than the tap coefficient for SD / HD conversion.
[0258]
Similarly, the tap coefficient for MPEG decoding and SD / HD conversion can MPEG-decode encoded data obtained by MPEG encoding the SD image signal of the component signal, and convert it into an HD image by a single process. When this MPEG decoding and SD / HD conversion tap coefficient is used, the decoding accuracy is deteriorated as compared with the case of using the MPEG decoding tap coefficient, and the conversion is performed more than when the SD / HD conversion tap coefficient is used. The accuracy is degraded.
[0259]
From the above, when the signal processing circuits 113 and 123 perform the processing in a coordinated manner, the encoded data is converted into an SD image using the MPEG decoding tap coefficient. Since the HD conversion tap coefficient is used to convert to an HD image, the composite / component conversion and the SD / HD conversion tap coefficient may be used solely by the signal processing circuit 113 of the TV signal processing unit 106, or the electronic device 11 Compared to the case where the MPEG decoding and SD / HD conversion tap coefficients are used by the signal processing circuit 123 alone, a high-quality HD image can be obtained.
[0260]
According to the MPEG decoding tap coefficient, not only the encoded data is MPEG-decoded, but also distortion such as block distortion caused by MPEG encoding is removed.
[0261]
In other words, as described above, the MPEG decoding tap coefficient is obtained by performing learning processing using the SD image of the component signal as teacher data and using encoded data obtained by MPEG encoding the teacher data as student data. Therefore, the encoded data is converted into an image in which the square error with the original image is minimized. Therefore, according to the MPEG decoding tap coefficient, the encoded data is converted into an image close to the original image without distortion, so that distortion such as block distortion due to MPEG encoding is also removed in addition to MPEG decoding. become.
[0262]
When the tap coefficient is obtained by performing the learning process using the encoded data obtained by MPEG-encoding the teacher data as the student data, and the SD data of the component signal MPEG-encoded and MPEG-decoded. In other words, the tap coefficient is used to convert the encoded data into a decoded image obtained when normal MPEG decoding is performed, that is, an image close to a decoded image having block distortion or the like caused by MPEG encoding. Therefore, in this case, the above-described distortion removal is not performed.
[0263]
As described above, the corresponding electronic device such as the electronic device 11 can be stored without the bay adapter box 14 in the bay 4 of the bay structure type television receiver (FIGS. 1 and 2). By being electrically connected to the TV signal processing unit 106, it is possible to perform processing in a shared manner and obtain a high-quality image or the like. On the other hand, incompatible electronic devices such as the electronic device 13 require the bay adapter box 14 to be housed in the bay 4 of the bay structure type television receiver, and are electrically connected to the TV signal processing unit 106. Even if connected, since the processing is performed independently, regardless of whether it is electrically connected to the TV signal processing unit 106, it is possible to obtain a high-quality image or the like as when processing is performed in a shared manner. I can't.
[0264]
Therefore, the compatible electronic device has an added value that it can be easily stored in the bay 4 and can obtain high-quality data as compared with the non-compatible electronic device.
[0265]
Next, in the above case, the signal processing circuit 113 of the TV signal processing unit 106 and the signal processing circuit 123 of the electronic device 11 are configured by a class classification adaptive processing circuit (FIG. 22) that performs class classification adaptive processing. However, the signal processing circuits 113 and 123 can be configured by modules (blocks) that perform processing corresponding to each of the various functions.
[0266]
FIG. 27 shows another configuration example of the TV signal processing unit 106 and the electronic device 11. In the figure, portions corresponding to those in FIG. 16 or FIG. 17 are denoted by the same reference numerals, and description thereof will be appropriately omitted below.
[0267]
That is, FIG. 27A shows another configuration example of the TV signal processing unit 106. The signal processing unit 113 is not a class classification adaptive processing circuit, but a conversion unit 171, a spatial resolution improvement processing unit 172, a noise. Other than the configuration of the removal processing unit 173 and the selector 174, the configuration is the same as that in FIG.
[0268]
FIG. 27B shows another example of the configuration of the electronic device 11. The signal processing unit 123 is not a class classification adaptive processing circuit, but an MPEG decoder 175, a distortion removal processing unit 176, and a selector. Other than the configuration of 177, the configuration is the same as in FIG.
[0269]
When the TV signal processing unit 106 in FIG. 27A performs processing alone, the SD image signal of the baseband composite signal output from the tuner 105 (FIG. 15) is transmitted via the selector 104 and the I / F 111. And supplied to the signal processing circuit 113.
[0270]
In the signal processing circuit 113, a signal from the tuner 105 is processed by being exchanged as shown by a dotted line in FIG.
[0271]
That is, in the signal processing circuit 113, the selector 174 receives the SD image signal of the composite signal from the tuner 105. Then, the selector 174 selects the conversion unit 171 and supplies the selected conversion unit 171 with the SD image signal of the composite signal.
[0272]
The conversion unit 171 converts the SD image signal of the composite signal from the selector 174 into an SD image signal of the component signal and supplies it to the selector 174. The selector 174 selects the spatial resolution enhancement processing unit 172 and supplies the SD image signal of the component signal to the selected spatial resolution enhancement processing unit 172.
[0273]
The spatial resolution improvement processing unit 172 performs processing for improving the spatial resolution of the SD image signal of the component signal from the selector 174, and supplies the HD image signal of the component signal obtained as a result to the selector 174. The selector 174 selects the noise removal processing unit 173 and supplies an HD image signal of the component signal to the selected noise removal processing unit 173.
[0274]
The noise removal processing unit 173 performs noise removal processing on the HD image signal from the selector 174 and supplies the resulting HD image signal to the selector 174. Then, the selector 174 outputs the HD image signal from the noise removal processing unit 173 to the selector 104 (FIG. 15) via the I / F 111.
[0275]
The selector 104 supplies the HD image signal to, for example, the CRT 2 (FIG. 15), and the corresponding HD image is displayed on the CRT 2.
[0276]
Therefore, when the TV signal processing unit 106 performs processing alone, the signal processing circuit 113 of the TV signal processing unit 106 has a function of converting a composite signal into a component signal and a function of improving spatial resolution (an SD image is converted into an HD image). Conversion function) and noise removal function.
[0277]
On the other hand, when the electronic device 11 in FIG. 27B performs processing alone, encoded data obtained by MPEG encoding the SD image output from the specific block 124 is supplied to the signal processing circuit 123. .
[0278]
In the signal processing circuit 123, the encoded data is processed by being exchanged as shown by a dotted line in FIG.
[0279]
That is, in the signal processing circuit 123, the selector 177 receives the encoded data from the specific block 124. Then, the selector 177 selects the MPEG decoder 175 and supplies the encoded data to the selected MPEG decoder 175.
[0280]
The MPEG decoder 175 MPEG-decodes the encoded data from the selector 177 and supplies a decoded image signal (SD image signal) obtained as a result to the selector 177. The selector 177 selects the distortion removal processing unit 176 and supplies the decoded image signal to the selected distortion removal processing unit 176.
[0281]
The distortion removal processing unit 176 performs distortion removal processing for removing block distortion and the like from the decoded image signal from the selector 177, and supplies the decoded image signal obtained as a result to the selector 177. The selector 177 outputs the decoded image signal from the distortion removal processing unit 176 via the I / F 121.
[0282]
Therefore, when the electronic device 11 performs processing alone, the signal processing circuit 123 of the electronic device 11 has a function of MPEG-decoding encoded data obtained by MPEG-encoding an image, and a function of removing block distortion and the like.
[0283]
Next, when the electronic device 11 is accommodated in the bay 4 (FIGS. 1 and 2) and electrically connected to the TV signal processing unit 106, the signal processing circuit 113 of the TV signal processing unit 106 and the electronic As described above, the signal processing circuit 123 of the device 11 exchanges the function IDs so that at least one of the functions changes its function as described above.
[0284]
That is, the signal processing circuit 113 of the TV signal processing unit 106 has, for example, the above-described three functions: a function of converting a composite signal into a component signal, a function of improving spatial resolution, and a function of removing noise. , It changes to one having only the function of improving the spatial resolution.
[0285]
In addition, the signal processing circuit 123 of the electronic device 11 remains having the above-described two functions, that is, the above-described function of MPEG decoding encoded data and the function of removing block distortion and the like.
[0286]
Then, in the signal processing circuit 113 of the TV signal processing unit 106 and the signal processing circuit 123 of the electronic device 11, the encoded data is processed by being exchanged as indicated by a dotted line in FIG. 28.
[0287]
That is, the signal processing circuit 123 of the electronic device 11 performs the same processing as in FIG. 27A, whereby the decoded image signal from which distortion has been removed is output from the I / F 121.
[0288]
The decoded image signal is supplied to the selector 104, and the selector 104 supplies the decoded image signal from the electronic device 11 (I / F 121 thereof) to the TV signal processing unit 106.
[0289]
In the TV signal processing unit 106, the decoded image signal from the selector 104 is received by the I / F 111 and supplied to the signal processing circuit 113.
[0290]
In the signal processing circuit 113, the selector 174 receives the decoded image signal, and further selects the spatial resolution enhancement processing unit 172. Then, the selector 174 supplies the received decoded image signal to the selected spatial resolution enhancement processing unit 172.
[0291]
The spatial resolution improvement processing unit 172 performs processing for improving the spatial resolution of the decoded image signal from the selector 174 and supplies the HD image signal obtained as a result to the selector 174. The selector 174 outputs the HD image signal from the spatial resolution enhancement processing unit 172 to the selector 104 via the I / F 111.
[0292]
The selector 104 supplies the HD image signal to, for example, the CRT 2 (FIG. 15), and the corresponding HD image is displayed on the CRT 2.
[0293]
Therefore, when the electronic device 11 performs processing alone, the encoded data is subjected to MPEG decoding, and a decoded image signal obtained as a result is obtained by removing distortion. When the unit 106 is electrically connected and processing is performed in a shared manner, an HD image with improved spatial resolution of the decoded image signal from which distortion has been removed can be obtained.
[0294]
As shown in the embodiment of FIGS. 27 and 28, when the signal processing circuits 113 and 123 are configured using modules (blocks) corresponding to the respective functions, the signal processing circuits 113 and 123 include The same number of modules as the number of functions to be provided is required. If the number of functions is increased, the number of modules also increases, and the circuit scale also increases.
[0295]
On the other hand, when the signal processing circuits 113 and 123 are configured by the class classification adaptive processing circuit as shown in FIG. 22, the increase in the number of functions basically increases the coefficient storage. Therefore, only the storage capacity of the unit 135 can be achieved, so that the increase in circuit scale can be reduced.
[0296]
Next, the series of processes described above by the signal processing circuits 113 and 123 can be performed by hardware or software. When a series of processing is performed by software, a program constituting the software is installed in a computer such as a microcomputer.
[0297]
Therefore, FIG. 29 shows a configuration example of an embodiment of a computer in which a program for executing the series of processes described above is installed.
[0298]
The program can be recorded in advance in a hard disk 205 or ROM 203 as a recording medium built in the computer.
[0299]
Alternatively, the program is stored temporarily on a removable recording medium 211 such as a floppy disk, a CD-ROM (Compact Disc Read Only Memory), an MO (Magneto optical) disc, a DVD (Digital Versatile Disc), a magnetic disc, or a semiconductor memory. It can be stored permanently (recorded). Such a removable recording medium 211 can be provided as so-called package software.
[0300]
The program is installed on the computer from the removable recording medium 211 as described above, or transferred from the download site to the computer wirelessly via a digital satellite broadcasting artificial satellite, LAN (Local Area Network), The program can be transferred to a computer via a network such as the Internet. The computer can receive the program transferred in this way by the communication unit 208 and install it in the built-in hard disk 205.
[0301]
The computer includes a CPU (Central Processing Unit) 202. An input / output interface 210 is connected to the CPU 202 via the bus 201, and the CPU 202 operates the input unit 207 including a keyboard, a mouse, a microphone, and the like by the user via the input / output interface 210. When a command is input as a result of this, the program stored in a ROM (Read Only Memory) 203 is executed accordingly. Alternatively, the CPU 202 also receives a program stored in the hard disk 205, a program transferred from a satellite or a network, received by the communication unit 208 and installed in the hard disk 205, or a removable recording medium 211 attached to the drive 209. The program read and installed in the hard disk 205 is loaded into a RAM (Random Access Memory) 204 and executed. Thereby, the CPU 202 performs processing according to the above-described flowchart or processing performed by the configuration of the above-described block diagram. Then, the CPU 202 outputs the processing result from the output unit 206 configured with an LCD (Liquid Crystal Display), a speaker, or the like, for example, via the input / output interface 210, or from the communication unit 208 as necessary. Transmission, and further recording on the hard disk 205 is performed.
[0302]
Here, in this specification, the processing steps for describing a program for causing a computer to perform various types of processing do not necessarily have to be processed in time series according to the order described in the flowchart, but in parallel or individually. This includes processing to be executed (for example, parallel processing or processing by an object).
[0303]
Further, the program may be processed by a single computer, or may be processed in a distributed manner by a plurality of computers. Furthermore, the program may be transferred to a remote computer and executed.
[0304]
The electronic equipment stored in the bay 4 of the bay structure type television receiver (FIGS. 1 and 2) is not limited to the above-described DVD player, digital VTR, etc., for example, a printer or an HD (Hard Disk) ) Recorder or anything else is acceptable.
[0305]
In this embodiment, a bay structure type television receiver (FIGS. 1 and 2) is configured by incorporating a tuner 104, a TV signal processing unit 106, and the like in the TV rack 1 (FIG. 1) in advance. However, the tuner 104, the TV signal processing unit 106, and the like do not need to be incorporated in the TV rack 1 in advance. That is, the tuner 104, the TV signal processing unit 106, and the like can be used by being housed in the bay 4 of the TV rack 1 as one of the electronic devices.
[0306]
Further, in the present embodiment, a case has been described where two electronic devices, the TV signal processing unit 106 and the electronic device 11, perform cooperative processing sharing. However, cooperative processing sharing is performed by three or more electronic devices. It is also possible. Further, the content of processing may be time resolution creation, gradation creation, etc. in addition to those described here.
[0307]
Furthermore, in the present embodiment, when electronic device 11 is housed in bay 4 of the bay structure type television receiver and is electrically connected to TV signal processing unit 106, coordinated processing is performed. However, the shared processing of processing is performed among a plurality of electronic devices that are electrically connected by being housed in the bay 4, and a plurality of electronic devices that are electrically connected via cables, radio, or the like. It is also possible to do between.
[0308]
In this embodiment, the coefficient storage unit 135 (FIG. 22) stores a plurality of types of tap coefficients in advance, and the function of the signal processing circuit 113 is changed by switching the set of tap coefficients to be used. The tap coefficient for changing the function of the signal processing circuit 113 is not stored in the coefficient storage unit 135 in advance, but can be downloaded from the outside.
[0309]
That is, for example, as described with reference to FIG. 1, a mobile phone can be stored in the bay 4G of the bay structure type television receiver. In this way, the mobile phone is stored in the bay 4G. By using the communication function of the mobile phone, it is possible to access a server on the Internet or other network and download a necessary tap coefficient. In addition, for example, when the electronic device stores a necessary tap coefficient when the electronic device is electrically connected to the other electronic device, the tap coefficient may be downloaded from the electronic device. it can.
[0310]
In the same manner, information regarding the tap structure of prediction taps and class taps can be downloaded from the outside.
[0311]
Here, as described above, when the tap coefficient is downloaded from the outside, it is necessary to store the downloaded tap coefficient (hereinafter referred to as the download tap coefficient as appropriate) in the coefficient storage unit 135 (FIG. 22). Therefore, the coefficient storage unit 135 requires a storage area for storing download tap coefficients.
[0312]
Therefore, the coefficient storage unit 135 is provided with a minimum necessary tap coefficient (for the TV signal processing unit 106, for example, a composite / component for realizing a function that the TV signal processing unit 106 must have at least. In addition to the storage area for conversion tap coefficients, a storage area for storing download tap coefficients can be provided.
[0313]
In this case, when the download tap coefficient is not used, the storage area of the coefficient storage unit 135 is wasted. Therefore, the coefficient storage unit 135 is provided with only the minimum necessary storage area, the minimum necessary tap coefficient is stored in the storage area in advance, and the download tap coefficient is used when the download tap coefficient is used. The coefficient can be stored in the coefficient storage unit 135 in an overwritten form.
[0314]
However, in this case, when the download tap coefficient is no longer necessary (for example, when the electrical connection with another electronic device is disconnected), the tap coefficient stored in advance in the coefficient storage unit 135 is used. Need to be remembered again. For that purpose, when the downloaded tap coefficient is overwritten in the coefficient storage unit 135, it is necessary to store the tap coefficient stored in advance. For example, as shown by a dotted line in FIG. This is possible by providing the HD 107 so as to be connected to the selector 104. In other words, the tap coefficients stored in advance in the coefficient storage unit 135 can be stored in the HD 107.
[0315]
Also, one coefficient memory 163 in the coefficient storage unit 135 of the embodiment of FIG._nBasically, one set of tap coefficients is stored in one coefficient memory 163 due to a large number of bits of tap coefficients or a large number of classes._nIf one set of tap coefficients cannot be stored, the coefficient memory 163₁Thru 163_NIt is possible to store a set of tap coefficients in a plurality of them.
[0316]
Further, although cases have been described with the present embodiment where images are processed, the present invention can also be applied to cases where audio or the like is processed.
[0317]
【The invention's effect】
  According to the storage rack of the present invention,,Electronic devices can be easily connected to each other.
[0318]
  According to the connection device of the present invention,,When the electronic devices are stored in the storage rack, the electronic devices can be easily connected to each other.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a configuration example of an embodiment of a bay structure type television receiver to which the present invention is applied.
FIG. 2 is a perspective view showing a bay structure type television receiver in a state in which an electronic device is housed.
FIG. 3 is a plan view showing a configuration example of the in-bay connection panel 5;
FIG. 4 is a perspective view of the electronic device 11 (12) when viewed from the back side.
5 is a perspective view showing a configuration example of a bay adapter box 14. FIG.
FIG. 6 is a perspective view showing a configuration example of an in-adapter connection panel 15A and an adapter back panel 15B.
7 is a perspective view showing a bay adapter box 14 in which a rear panel unit 15 can be attached and detached. FIG.
FIG. 8 is a perspective view showing a bay adapter box 14 in which the adapter back panel 15B can be attached and detached.
FIG. 9 is a perspective view showing a configuration example of a back panel unit 15 in which terminals can move.
FIG. 10 is a cross-sectional view showing a rear panel portion 15 to which a terminal can move.
FIG. 11 is a cross-sectional view showing a rear panel portion 15 to which a terminal can move.
FIG. 12 is a perspective view showing another configuration example of the back panel unit 15 to which the terminal can move.
FIG. 13 is a perspective view showing still another configuration example of the back panel unit 15 to which the terminal can move.
FIG. 14 is a view for explaining a connection plate 81;
FIG. 15 is a block diagram showing an example of the electrical configuration of a bay structure type television receiver.
16 is a block diagram illustrating a configuration example of a TV signal processing unit 106. FIG.
FIG. 17 is a block diagram illustrating a configuration example of an electronic device 11 (12).
FIG. 18 is a flowchart illustrating processing of the TV signal processing unit 106 (electronic device 11 (12)).
FIG. 19 is a diagram for describing processing performed independently by each of the TV signal processing unit and the electronic device 11;
FIG. 20 is a diagram for explaining processing performed by the TV signal processing unit 106 and the electronic device 11 in a shared manner.
FIG. 21 is a flowchart illustrating a process performed by the TV signal processing unit 106 and the electronic device 11 in a shared manner.
22 is a diagram illustrating a configuration example of a signal processing circuit 113. FIG.
23 is a block diagram illustrating a configuration example of a learning device that learns tap coefficients to be stored in the coefficient storage unit 135. FIG.
FIG. 24 is a flowchart illustrating a learning process performed by a learning device.
25 is a block diagram illustrating a configuration example of a coefficient storage unit 135. FIG.
FIG. 26 is a flowchart for describing processing of a signal processing circuit 113 configured by a class classification adaptive processing circuit.
FIG. 27 is a diagram for describing processing performed independently by each of the TV signal processing unit and the electronic device 11;
FIG. 28 is a diagram for explaining processing performed in a coordinated manner by the TV signal processing unit 106 and the electronic device 11;
FIG. 29 is a block diagram illustrating a configuration example of an embodiment of a computer to which the present invention has been applied.
[Explanation of symbols]
1 TV rack, 2 CRT, 3 speakers, 4A to 4G bay, 5 bay connection panel, 11 to 13 electronic device, 14 bay adapter box, 14A slot, 15 back panel section, 15A adapter connection panel, 15B adapter back panel , 16A female pin group, 16B male pin group, 21 RGB output terminal, 22 RGB input terminal, 23 audio output terminal, 24 audio input terminal, 25 output S terminal, 26 input S terminal, 27 IEEE1394 terminal, 28 USB terminal, 29 power supply terminal, 31 RGB input terminal, 32 RGB output terminal, 33 audio input terminal, 34 audio output terminal, 35 input S terminal, 36 output S terminal, 37 IEEE 1394 terminal, 38 US B terminal, 39 power supply terminal, 41 RGB input terminal, 42 RGB output terminal, 43 audio input terminal, 44 audio output terminal, 45 input S terminal, 46 output S terminal, 47 IEEE 1394 terminal, 48 USB terminal, 49 Power terminal, 51 slit plate, 52 slit, 53 terminal, 53A fuselage, 54 terminal, 54A fuselage, 61 bottom plate, 62 insulator, 63 fuselage, 64 contact fitting, 65 screw, 66 insulation film, 67 fuselage , 68 contact fitting, 71 insertion slot, 81 connection plate, 82L, 82R slit for fitting, 83 patch plate, 84 terminal, 85 frame hole, 86 connection terminal, 87 frame groove, 88 frame, 89 conductive part, 101 remote control, 102 Main controller, 103 select Controller, 104 selector, 105 tuner, 106 TV signal processing unit, 107 HD, 111 I / F, 112 controller, 113 signal processing circuit, 121 I / F, 122 controller, 123 signal processing circuit, 124 specific block, 131 buffer, 132 prediction tap extraction circuit, 133 class tap extraction circuit, 134 class classification circuit, 135 coefficient storage unit, 136 product-sum operation circuit, 137 function control unit, 141 teacher data generation circuit, 142 teacher data memory, 143 student data generation circuit, 144 Student data memory, 145 prediction tap extraction circuit, 146 class tap extraction circuit, 147 class classification circuit, 148 normal equation addition circuit, 149 tap coefficient determination circuit, 150 Number memory, 151 control circuit, 161, 162 a selector, 163₁Thru 163_N  Coefficient memory, 171 conversion unit, 172 spatial resolution improvement processing unit, 173 noise removal processing unit, 174 MPEG decoder, 175 distortion removal processing unit, 176 selector, 201 bus, 202 CPU, 203 ROM, 204 RAM, 205 hard disk, 206 output Section, 207 input section, 208 communication section, 209 drive, 210 input / output interface, 211 removable recording medium

Claims (20)

A storage rack for storing an electronic device that operates independently and that has one or more signal terminals for inputting or outputting signals exposed to the outside,
One or more storage units for storing the electronic devices;
A connection panel provided in the storage portion provided with a connection terminal to be connected to the signal terminal of the electronic device , and
A first surface provided with a first terminal connected to the connection terminal provided on the connection panel; and a second surface provided with a second terminal connected to the signal terminal of the electronic device. When the electronic device is stored in the storage unit, the signal terminal of the electronic device and the connection terminal of the connection panel in the storage unit are connected via the connection device. ,
A storage rack in which a hole is provided in the second surface, and the second terminal can be inserted into and removed from the arbitrary hole . The connection terminal in the storage unit is provided with the connection terminal so as to connect to the signal terminal of the electronic device when the electronic device is stored in the storage unit. Storage rack. The storage rack according to claim 1 , wherein the first surface is provided at a position on a back surface of the second surface. The storage rack according to claim 1 , wherein the connection device includes a slot for storing the electronic device. The storage rack according to claim 4 , wherein the storage unit stores the connection device in which the electronic device is stored in the slot. The storage rack according to claim 5 , wherein the first surface is a surface facing the connection panel of the storage unit when the connection device is stored in the storage unit. The storage rack according to claim 4 , wherein the second surface is a surface that faces a surface of the electronic device on which the signal terminal is provided when the electronic device is stored in the slot. Wherein the first surface of the connection device, to a fixed position corresponding to the position of the connecting terminals provided on the connection panel, housed in claim 1, wherein the first terminal is located rack. The storage rack according to claim 1, wherein the connection terminal provided on the connection panel is disposed at a fixed position. The storage rack according to claim 1, wherein the connection terminal provided on the connection panel can be moved in an arrangement position thereof. A plurality of the storage units;
Two or more of the plurality of the storage portion, when the electronic apparatus is housed, storage rack of claim 1, wherein the electronic device to each other housed in the housing section are electrically connected. Other electronic devices are incorporated,
The storage rack according to claim 1, wherein the electronic device and the other electronic device are electrically connected when the electronic device is stored in the storage unit. An electronic device that operates independently and that has one or more signal terminals for inputting or outputting signals, and a connection terminal that is electrically connected to the signal terminal of the electronic device. A connection device for electrically connecting a storage rack having a panel in one or more storage portions formed in a concave shape,
A first surface provided with a first terminal connected to the connection terminal provided on the connection panel of the storage rack;
A second surface provided with a second terminal connected to the signal terminal of the electronic device ,
A connecting device in which a hole is provided in the second surface, and the second terminal can be inserted into and removed from the arbitrary hole . The connection device according to claim 13 , wherein when the electronic device is stored in the storage unit, the signal terminal of the electronic device is electrically connected to the connection terminal of the connection panel in the storage unit. The connection device according to claim 13 , wherein the first surface is provided at a position of a back surface of the second surface. The connection device according to claim 13 , further comprising a slot for storing the electronic device. The signal terminal of the electronic device and the connection terminal of the connection panel in the storage unit are electrically connected by being stored in the storage rack in a state where the electronic device is stored in the slot. Item 17. The connection device according to Item 16 . The connection device according to claim 16 , wherein the second surface is a surface facing a surface of the electronic device on which the signal terminal is provided when the electronic device is housed in the slot. The connection device according to claim 13 , wherein the first surface is a surface facing the connection panel of the storage unit when stored in the storage unit. The connection device according to claim 13 , wherein the first terminal is arranged on the first surface at a fixed position corresponding to an arrangement position of the connection terminal provided on the connection panel.

Images