JP4599912B2 - Liquid crystal display - Google Patents

Description

  The present invention relates to a liquid crystal display device that displays and outputs images such as television broadcasts on a liquid crystal panel, and relates to a technique for reducing standby power.

  In general, a liquid crystal display device includes a liquid crystal panel in which a plurality of scanning lines and a plurality of data lines intersect, a gate driver and a source driver that respectively drive the scanning lines and data lines of the liquid crystal panel, and a video signal Is provided to the source driver, and a display control circuit is provided for supplying drive timing to the gate driver and the source driver.

  Conventionally, several proposals have been made to reduce power consumption during standby in such a liquid crystal display device. For example, Patent Document 1 discloses a technique in which a gate driver is provided with a power save setting terminal, and a signal Vss driving is stopped when a voltage Vss is applied to the terminal.

In Patent Document 2, the synchronization signal input from the outside is monitored, and the operation of the circuit that generates the high voltage for driving the liquid crystal panel is stopped when the synchronization signal is not input. A technique for reducing electric power is disclosed.
JP 2001-27750 A Japanese Unexamined Patent Publication No. 1-177076

  In addition to outputting a driving voltage to the liquid crystal panel, various logic operations are performed at high speed so that the gate driver and the source driver of the liquid crystal display device output the driving voltage at an optimal timing. Therefore, the logic operation is not stopped only by stopping the operation voltage for generating the driving voltage of the liquid crystal panel, and wasteful power consumption is generated accordingly.

  An object of the present invention is to provide a liquid crystal display device that reduces power consumption during standby and has low standby power without adding a new terminal or circuit to a source driver or gate driver.

In order to achieve the above object, the present invention provides a liquid crystal panel provided such that a plurality of scanning lines and a plurality of data lines intersect, a gate driver for driving the scanning lines of the liquid crystal panel, A liquid crystal display device comprising: a source driver that drives a data line; a video processing circuit that outputs a video signal to the source driver; and a timing controller that generates a timing pulse signal that gives drive timing to the gate driver and the source driver And a mode setting means capable of setting a normal operation mode and a standby mode in which display output is not performed on the liquid crystal panel. When the standby mode is set by the mode setting means , the video processing is performed in the normal operation mode. Operating voltage for the analog circuit supplied to the circuit and operating voltage of the control system When the operating voltage of the control system to be supplied to the source driver
Of the operating voltage for driving the liquid crystal panel, the operating voltage of the control system supplied to the gate driver, and the operating voltage for driving the liquid crystal panel, the source driver and the gate driver are supplied. For the analog circuit configured to stop the supply of the operating voltage for driving the liquid crystal panel and to stop the output of the timing pulse signal from the timing controller and to be supplied to the video processing circuit And the control system operating voltage, and the control system operating voltage supplied to the source driver and the gate driver, respectively, are continuously supplied .

  According to such means, since the timing pulse signal is not supplied from the timing controller to the gate driver or source driver in the standby mode, the logic operation of the control system of the gate driver or source driver is also stopped. Furthermore, in order to stop the logic operation of the control system of the gate driver or source driver, it is not necessary to provide a control terminal for standby mode in the gate driver or source driver, and only the simple configuration of stopping the output of the timing controller is required. Can respond.

  As described above, according to the present invention, the logical operation of the control system of the source driver and the gate driver is also stopped in the standby mode, and there is an effect that standby power can be further reduced. Further, the standby power can be reduced with a simple configuration.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing an overall configuration of a liquid crystal display device according to an embodiment of the present invention.

  The liquid crystal display device 1 according to the present embodiment sequentially drives, for example, an active matrix liquid crystal panel 11 formed with a plurality of scanning lines extending in the horizontal direction and a plurality of data lines extending in the vertical direction, and the scanning lines. A gate driver 12, a source driver 13 that drives a data line based on video data, a video processing circuit that receives an analog video signal, converts it into a digital RGB signal, and supplies it to the source driver 13 or a gate It includes a display control circuit 14 having a timing controller 14a that gives drive timing to the driver 12 and the source driver 13, a power supply circuit 15 that supplies an operating voltage to each part, and a microcontroller 16 that comprehensively controls each part. .

  The microcontroller 16 is provided with a status register (mode setting means) 16b for setting the operation mode of the apparatus. The status register 16b is provided with a mode setting bit, and a normal operation mode and a standby mode in which display output is not performed can be set in the setting bit.

  For example, the microcontroller 16 monitors a video signal input from the outside, and when this input is interrupted, sets the value of the standby mode in the mode setting bit or performs a predetermined operation by the user. In this case, the standby mode value is set in the mode setting bit.

  Further, the microcontroller 16 outputs a standby signal indicating the standby mode to the display control circuit 14 and the power supply circuit 15 when the mode setting bit is a value of the standby mode.

  Each of the power supply circuit 15 and the display control circuit 14 includes a control terminal to which a standby signal is input. In the standby mode based on the signal from the control terminal, the supply of a predetermined operating voltage is stopped or a predetermined signal output is performed. To stop.

  FIG. 2 is a chart showing changes in the supply state and signal output state of each operation voltage between the normal operation mode and the standby mode.

  The power supply circuit 15 displays an operation voltage A_3.3V for analog video processing, an operation voltage D_3.3V for digital video signal processing, and an operation voltage D_1.8V for digital control at the time of power-on. 14 is supplied. In addition, the control voltage P_3.3V of the control system is supplied to the gate driver 12 and the source driver 13, the voltage 10.8V for generating the data line driving voltage is supplied to the source driver 13, the gate ON voltage 25V and the gate are supplied to the gate driver 12. An OFF voltage of −6V is supplied.

  In the liquid crystal display device 1 of the present embodiment, when a standby signal is input, the data line driving voltage 10.8 V to the source driver 13 and the gate ON voltage 25 V to the gate driver 12 are displayed. The configuration is such that the supply of the gate OFF voltage -6V is cut off. In addition, the supply of other operating voltages is continued.

  In the standby mode, the operation voltage of the control system can be continuously supplied to the gate driver 12 and the source driver 13 when switching from the standby mode to the normal operation mode without causing problems such as latch-up. At the same time, even if the operating voltage is supplied, the power consumption can be reduced to almost zero by stopping the control operation.

  Further, in the liquid crystal display device 1 according to the present embodiment, when a standby signal is input from the microcontroller 16 to the display control circuit 14, the timing pulse signal supplied from the timing controller 14a to the gate driver 12 and the source driver 13 is displayed. The output is configured to be stopped. That is, the output of the signal line of the timing pulse signal is fixed at a low level.

  This output stop of the timing pulse signal is stopped by providing a transfer gate circuit capable of shutting off the signal output at the output stage of the timing controller 14a, supply of the operation clock to the timing controller 14a, or the timing controller 14a The operation itself of the timing controller 14a may be stopped by stopping the operation clock generation operation.

  As described above, according to the liquid crystal display device 1 of this embodiment, since the output of the timing controller 14a is stopped in the standby mode, the logic operation of the control system is also stopped in the gate driver 12 and the source driver 13. Standby power can be further reduced.

  Further, in order to achieve low power consumption in the standby mode, no special configuration is required for the gate driver 12 or the source driver 13, a configuration in which the supply of a predetermined operating voltage is cut off, and a configuration in which the output of the timing controller 14a is stopped. Therefore, the circuit scale to be added can be reduced.

  The present invention is not limited to the above-described embodiment, and various modifications can be made. For example, in the above embodiment, the timing controller 14a is formed on the same chip as the video signal processing circuit. However, when the timing controller 14a and the video signal processing circuit are separate integrated circuits, The present invention can be similarly applied.

  Further, the status register in the microcontroller is exemplified as the mode setting means capable of setting the standby mode. However, the mode setting means may be configured by other registers, external registers, or signal lines for mode setting. I can do it.

  In addition, the details described in the embodiment, such as the type of liquid crystal panel, the types of various operating voltages, and the types of timing pulse signals, can be changed as appropriate without departing from the spirit of the invention.

1 is a block diagram illustrating an overall configuration of a liquid crystal display device according to an embodiment of the present invention. It is a chart which shows the supply state of each operating voltage and the output state of a signal in the normal operation mode and in the standby mode.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Liquid crystal display device 11 Liquid crystal panel 12 Gate driver 13 Source driver 14 Display control circuit 14a Timing controller 15 Power supply circuit 16 Microcontroller 16a Register

Claims (1)

A liquid crystal panel provided so that a plurality of scanning lines and a plurality of data lines intersect, a gate driver that drives the scanning lines of the liquid crystal panel, a source driver that drives the data lines of the liquid crystal panel, and the source In a liquid crystal display device comprising: a video processing circuit that outputs a video signal to a driver; and a timing controller that generates a timing pulse signal that gives drive timing to the gate driver and the source driver.
Comprising a mode setting means capable of setting a normal operation mode and a standby mode in which display output is not performed on the liquid crystal panel;
When the standby mode is set by the mode setting means,
In the normal operation mode, the operating voltage for the analog circuit and the operating voltage for the control system supplied to the video processing circuit, the operating voltage for the control system supplied to the source driver and the operating voltage for driving the liquid crystal panel And an operation voltage for driving the liquid crystal panel respectively supplied to the source driver and the gate driver among an operation voltage for a control system supplied to the gate driver and an operation voltage for driving the liquid crystal panel. The voltage supply is stopped,
And it is constituted so that output of the timing pulse signal from the timing controller is stopped ,
The analog circuit operating voltage and the control system operating voltage supplied to the video processing circuit, and the control system operating voltage supplied to the source driver and the gate driver, respectively, continue to be supplied. Liquid crystal display device.

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