JP4595613B2 - Electrode paste and method for producing multilayer ceramic electronic component using the same - Google Patents

Electrode paste and method for producing multilayer ceramic electronic component using the same Download PDF

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JP4595613B2
JP4595613B2 JP2005087850A JP2005087850A JP4595613B2 JP 4595613 B2 JP4595613 B2 JP 4595613B2 JP 2005087850 A JP2005087850 A JP 2005087850A JP 2005087850 A JP2005087850 A JP 2005087850A JP 4595613 B2 JP4595613 B2 JP 4595613B2
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electrode paste
electrode
surface area
specific surface
multilayer ceramic
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雅文 中山
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Panasonic Corp
Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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本発明は、積層セラミック電子部品の積層体を形成する際に使用される内部電極の形成用電極ペーストに関するものである。   The present invention relates to an electrode paste for forming internal electrodes used when forming a multilayer body of multilayer ceramic electronic components.

また、さらにこの電極ペーストを用いた積層セラミック電子部品の製造方法に関するものである。   Further, the present invention relates to a method for manufacturing a multilayer ceramic electronic component using this electrode paste.

近年の電子機器の小型化、高性能化にともない、これらの機器で多数使用される積層セラミックコンデンサなどの積層セラミック電子部品は、ますます小型化し、かつ従来の製品と同等の性能を確保するため、さらに多層化が進んでいる。   With the recent downsizing and higher performance of electronic devices, multilayer ceramic electronic components such as multilayer ceramic capacitors used in many of these devices are becoming more and more compact and ensure the same performance as conventional products. Further, the number of layers is increasing.

図1は一般的な積層セラミックコンデンサ11の内部構造を示す断面図であり、誘電体層12を挟んで少なくとも一対の対向する内部電極13が、積層セラミックコンデンサの両端面に設けられた外部電極14に交互に接続されている。   FIG. 1 is a cross-sectional view showing the internal structure of a general multilayer ceramic capacitor 11. At least a pair of opposed internal electrodes 13 across a dielectric layer 12 are external electrodes 14 provided on both end faces of the multilayer ceramic capacitor. Are connected alternately.

上記のように、積層数の多層化が進み、誘電体層12並びに内部電極13の層数がますます増加した場合、誘電体層12とともに内部電極13も薄層化せざるを得なくなる。   As described above, when the number of layers is increased and the number of dielectric layers 12 and internal electrodes 13 is further increased, the internal electrodes 13 must be thinned together with the dielectric layers 12.

このような状況の中で、誘電体層12と内部電極13は、積層体の焼結過程において収縮挙動が大きく異なるため、多層化した積層体の焼成では内部構造欠陥が発生しやすくなるという課題を有する。   In such a situation, the dielectric layer 12 and the internal electrode 13 are greatly different in shrinkage behavior in the sintering process of the laminated body, so that an internal structural defect is likely to occur when the multilayered laminated body is fired. Have

この課題に対して、内部電極に誘電体層と同じ組成物の共材を入れて、内部電極の収縮挙動を抑制することが行われている。   In order to solve this problem, a co-material of the same composition as the dielectric layer is put in the internal electrode to suppress the shrinkage behavior of the internal electrode.

このような共材を用いる内部電極ペーストに関連する先行技術文献としては、例えば、特許文献1が知られている。
特開2001−110233号公報
As a prior art document related to the internal electrode paste using such a common material, for example, Patent Document 1 is known.
JP 2001-110233 A

しかしながら、さらに積層セラミックコンデンサなどの積層セラミック電子部品では0.6mm×0.3mmというような超小型のものが登場し、かつその積層数が多層化してくると、上記の特許文献に示された電極ペーストを用いても、内部構造欠陥が発生する場合がある。   However, in the multilayer ceramic electronic parts such as multilayer ceramic capacitors, an ultra-small one such as 0.6 mm × 0.3 mm has appeared, and when the number of the multilayers becomes multi-layered, it has been shown in the above patent document. Even when the electrode paste is used, internal structural defects may occur.

このような超小型でかつ積層数の多い積層セラミック電子部品では、さらに精密に誘電体層と内部電極の焼成収縮挙動を制御する必要があるとともに、内部電極を形成する電極ペーストに含まれた共材と誘電体層との焼結における交互作用についても考慮する必要が生じてくる。   In such a multilayer ceramic electronic component with a large number of layers, it is necessary to more precisely control the firing shrinkage behavior of the dielectric layer and the internal electrode, and the common component contained in the electrode paste that forms the internal electrode. It is also necessary to consider the interaction in the sintering of the material and the dielectric layer.

そこで、本発明は、上記の課題に鑑み、超小型でかつ積層数の多い積層セラミック電子部品であっても、構造欠陥を抑制することのできる内部電極形成用の電極ペーストを提供し、またこの電極ペーストを用いて構造欠陥を抑制し、性能や信頼性に優れた積層セラミック電子部品を提供することを目的とするものである。   Therefore, in view of the above problems, the present invention provides an electrode paste for forming an internal electrode capable of suppressing structural defects even in a multilayer ceramic electronic component having a small size and a large number of layers. An object of the present invention is to provide a multilayer ceramic electronic component that uses an electrode paste to suppress structural defects and is excellent in performance and reliability.

上記目的を達成するために、本発明者らは鋭意研究を進めた結果、内部電極と誘電体層の焼成収縮挙動のより精密な制御と、内部電極を形成する電極ペーストに含まれた共材と誘電体層との焼結における交互作用を制御するためには、電極ペーストに含まれる共材の焼結反応における活性度が重要であることを見いだし、本発明を成すに至ったものである。   In order to achieve the above object, the present inventors have conducted extensive research, and as a result, more precise control of the firing shrinkage behavior of the internal electrode and the dielectric layer and the common material contained in the electrode paste forming the internal electrode In order to control the interaction in sintering between the dielectric layer and the dielectric layer, it was found that the activity in the sintering reaction of the co-material contained in the electrode paste is important, and the present invention has been achieved. .

すなわち、上記の目的を達成するために本発明は、セラミックシートと内部電極が交互に積層されてなる積層体において、内部電極の形成に用いられる電極ペーストであって、この電極ペーストは所定の温度で熱処理した前後のBET法による比表面積値の変化率が30%より大きく、60%より小さいセラミック粉体を共材として含むことにより、内部電極と誘電体層の焼成収縮挙動をより精密に制御することが出来るとともに、内部電極を形成する電極ペーストに含まれた共材と誘電体層との焼結における交互作用を制御できる結果、内部構造欠陥が抑制された、静電容量などの性能に優れ、信頼性が向上した積層セラミック電子部品を作製することができる電極ペーストを提供することができるものである。 That is, in order to achieve the above object, the present invention provides an electrode paste used for forming an internal electrode in a laminated body in which ceramic sheets and internal electrodes are alternately laminated, and the electrode paste has a predetermined temperature. The ceramic shrinkage behavior of the internal electrode and dielectric layer is more precisely controlled by including ceramic powder with a change rate of specific surface area value by BET method larger than 30% and smaller than 60% before and after heat treatment in As a result of controlling the interaction in sintering of the common material and dielectric layer contained in the electrode paste forming the internal electrode, the internal structural defects are suppressed, and the performance such as capacitance is reduced. It is possible to provide an electrode paste capable of producing an excellent multilayer ceramic electronic component with improved reliability.

ここで、所定の温度で熱処理するのは、この熱処理前後のBET法で測定した比表面積値の変化により、電極ペーストに使用する共材の反応性や表面活性などの活性度を判断するためであり、このために用いる所定の温度としては、500℃〜1000℃が好ましく、より好ましくは600℃〜1000℃である。   Here, the reason why the heat treatment is performed at a predetermined temperature is to determine the reactivity of the common material used for the electrode paste and the activity such as the surface activity based on the change in the specific surface area value measured by the BET method before and after the heat treatment. The predetermined temperature used for this purpose is preferably 500 ° C to 1000 ° C, more preferably 600 ° C to 1000 ° C.

熱処理温度が500℃未満の場合や、1000℃を超える場合には、BET法で測定した比表面積の熱処理前後の変化率の再現性が低くなり、変化率の値がばらつく。   When the heat treatment temperature is lower than 500 ° C. or higher than 1000 ° C., the reproducibility of the rate of change of the specific surface area measured by the BET method before and after the heat treatment becomes low, and the value of the rate of change varies.

さらに、経験的には900℃±100℃程度が比表面積値の変化率の再現性などの点で最も好ましい。   Furthermore, empirically, about 900 ° C. ± 100 ° C. is most preferable in terms of the reproducibility of the change rate of the specific surface area value.

また、共材として主成分がABO3型のペロブスカイト型化合物であり、所定の温度で熱処理する前の平均粒径が0.03μm〜0.10μmであり、かつ比表面積値が15m2/g〜25m2/gであるものを用いることにより、さらに内部構造欠陥の発生を抑制することができる。 Further, the main component is a perovskite type compound having an ABO 3 type as a co-material, an average particle size before heat treatment at a predetermined temperature is 0.03 μm to 0.10 μm, and a specific surface area value is 15 m 2 / g— By using the one having 25 m 2 / g, the occurrence of internal structural defects can be further suppressed.

また、ABO3型のペロブスカイト型化合物のAサイト元素とBサイト元素の比率をA/Bと表した時にA/Bが0.990以上1.010以下とすることにより、誘電体層に及ぼす共材の影響を最小限に押さえ、内部構造欠陥が抑制された、静電容量などの性能に優れ、信頼性が向上した積層セラミック電子部品を作製することができる電極ペーストを提供することができる。 Further, when the ratio of the A site element to the B site element of the ABO 3 type perovskite type compound is expressed as A / B, the A / B is set to 0.990 or more and 1.010 or less, so It is possible to provide an electrode paste that can produce a multilayer ceramic electronic component that suppresses the influence of the material to the minimum, suppresses internal structural defects, has excellent performance such as capacitance, and has improved reliability.

ここで、ABO3型のペロブスカイト型化合物とは、BaTiO3のような化合物であり、この場合BaがAサイト元素に該当し、TiがBサイト元素に該当する。 Here, the ABO 3 type perovskite type compound is a compound such as BaTiO 3 , where Ba corresponds to the A site element and Ti corresponds to the B site element.

Aサイト元素としては、Baの他にCaやSr、Mgなどが上げられ、またBサイト元素としてはTiの他にZrなどが上げられ、例えば(BaCa)(TiZr)O3のような化学式で表される化合物もABO3型ペロブスカイト型化合物に該当する。 As the A site element, Ca, Sr, Mg and the like are raised in addition to Ba, and as the B site element, Zr and the like are raised in addition to Ti. For example, in the chemical formula (BaCa) (TiZr) O 3 The compounds represented also correspond to ABO 3 type perovskite type compounds.

本発明の電極ペーストは、所定の温度で熱処理した前後の比表面積値の変化率が30%より大きく、60%より小さいセラミック粉体を共材として含むことにより、内部電極と誘電体層の焼成収縮挙動をより精密に制御することが出来るとともに、内部電極を形成する電極ペーストに含まれた共材と誘電体層との焼結における交互作用を制御できる結果、内部構造欠陥が抑制された、静電容量などの性能に優れ、信頼性が向上した積層セラミック電子部品を作製することができる電極ペーストを提供することができる。 The electrode paste of the present invention includes a ceramic powder having a rate of change in specific surface area value before and after heat treatment at a predetermined temperature of greater than 30% and less than 60% as a co-material, thereby firing the internal electrode and the dielectric layer. The shrinkage behavior can be controlled more precisely, and the interaction in the sintering of the common material and dielectric layer contained in the electrode paste forming the internal electrode can be controlled, resulting in the suppression of internal structural defects. It is possible to provide an electrode paste that can produce a multilayer ceramic electronic component having excellent performance such as capacitance and improved reliability.

(実施の形態1)
以下、本発明の一実施の形態について、図1を用いて積層セラミックコンデンサを例に説明する。
(Embodiment 1)
Hereinafter, an embodiment of the present invention will be described using a multilayer ceramic capacitor as an example with reference to FIG.

図1は、本実施の形態における積層セラミックコンデンサ11の一部切欠斜視図であり、誘電体層12と内部電極13とが交互に積層されて積層体を構成し、内部電極13はその端部が積層体の対向する両端面に交互に露出するよう積層されており、積層体の両端面に形成された一対の外部電極14に交互に接続されている。   FIG. 1 is a partially cutaway perspective view of a multilayer ceramic capacitor 11 according to the present embodiment. Dielectric layers 12 and internal electrodes 13 are alternately stacked to form a multilayer body, and the internal electrode 13 has an end portion thereof. Are laminated so as to be alternately exposed at opposite end faces of the laminate, and are alternately connected to a pair of external electrodes 14 formed at both end faces of the laminate.

このような積層セラミックコンデンサの作製に関しては、まず、チタン酸バリウムを主成分とする無機粉末と、アクリル樹脂あるいはポリビニルブチラール樹脂などのバインダ、ジブチルフタレートなどの可塑剤と溶剤を混合し、ドクターブレード法によりセラミックシートを作製する。   Regarding the production of such a multilayer ceramic capacitor, first, inorganic powder mainly composed of barium titanate, a binder such as acrylic resin or polyvinyl butyral resin, a plasticizer such as dibutyl phthalate, and a solvent are mixed, and a doctor blade method is used. To produce a ceramic sheet.

これとは別に、平均粒径が0.2μmのNi金属粉末と、共材としてチタン酸バリウムと、エチルセルロースやアクリル樹脂、ポリビニルブチラール樹脂などの樹脂と有機溶剤などを混合し、3本ロールミルなどを用いて混練して内部電極形成用電極ペーストを作製する。   Separately, Ni metal powder with an average particle size of 0.2 μm, barium titanate as a co-material, a resin such as ethyl cellulose, acrylic resin, and polyvinyl butyral resin and an organic solvent are mixed, and a three roll mill or the like is mixed. And kneading to prepare an electrode paste for forming an internal electrode.

ここで、電極ペーストに用いる共材のチタン酸バリウムは、表1に示すように、平均粒径が0.02〜0.12μmで、900℃の温度で15分間熱処理する前の比表面積値は13〜27m2/g、熱処理を行う前と行った後との比表面積値の変化率が27%〜67%のものを用いた。さらにこのチタン酸バリウムのAサイト元素とBサイト元素の比率A/Bが0.985〜1.012の範囲のものを用いた。 Here, as shown in Table 1, the common barium titanate used for the electrode paste has an average particle size of 0.02 to 0.12 μm, and the specific surface area value before heat treatment at 900 ° C. for 15 minutes is 13-27 m < 2 > / g and the thing with the change rate of the specific surface area value before and after performing heat processing of 27%-67% were used. Further, the barium titanate having a ratio A / B between the A site element and the B site element of 0.985 to 1.012 was used.

なお、比表面積値については、通常のBET法により測定した。   In addition, about the specific surface area value, it measured by the normal BET method.

またチタン酸バリウムのAサイト元素とBサイト元素の比率はX線回折法により測定し、平均粒径に関しては、走査型電子顕微鏡(SEM)による映像を画像解析装置を用いて測定した。   Further, the ratio of the A site element and the B site element of barium titanate was measured by an X-ray diffraction method, and the average particle diameter was measured by using an image analyzer with a scanning electron microscope (SEM).

次に、セラミックシートの表面に電極ペーストをスクリーン印刷し、内部電極を形成する。   Next, an electrode paste is screen-printed on the surface of the ceramic sheet to form internal electrodes.

次いで、内部電極を形成したセラミックシートを内部電極がセラミックシートを挟んで対向するように交互に積層し、セラミックシートが軟化する温度に加熱しながら、5MPa〜20MPaで加圧し、一体化させて焼結により0.6mm×0.3mm×0.3mmの形状を有する積層セラミックコンデンサ11の素体となる積層体(図示せず)を作製する。   Next, the ceramic sheets on which the internal electrodes are formed are alternately laminated so that the internal electrodes face each other with the ceramic sheets sandwiched between them. While heating to a temperature at which the ceramic sheets soften, pressurize at 5 MPa to 20 MPa, integrate and fire. As a result, a multilayer body (not shown) that is an element body of the multilayer ceramic capacitor 11 having a shape of 0.6 mm × 0.3 mm × 0.3 mm is produced.

続いて、積層体中の有機物を窒素ガス中で除去した後に、内部電極となるNiが過度に酸化されない窒素水素の混合ガス雰囲気中で1300℃まで昇温し、焼成し、焼結体を得る。   Subsequently, after organic substances in the laminate are removed in nitrogen gas, the temperature is raised to 1300 ° C. in a nitrogen-hydrogen mixed gas atmosphere in which Ni serving as an internal electrode is not excessively oxidized, and a sintered body is obtained. .

次に、焼結体の面取りを行い、両端面に内部電極13を完全に露出させる。続いて、焼結体の両端面及び端面に銅を主成分とする電極ペーストを塗布した後、800℃の窒素雰囲気中で焼付けを行って外部電極14を形成し、この上にNiメッキ並びにSnメッキを形成して図1に示すような0.6mm×0.3mm×0.3mmの形状の積層セラミックコンデンサ試料を得る。   Next, the sintered body is chamfered, and the internal electrodes 13 are completely exposed on both end faces. Subsequently, after applying an electrode paste mainly composed of copper to both end faces and end faces of the sintered body, baking is performed in a nitrogen atmosphere at 800 ° C. to form an external electrode 14 on which Ni plating and Sn are formed. Plating is performed to obtain a multilayer ceramic capacitor sample having a shape of 0.6 mm × 0.3 mm × 0.3 mm as shown in FIG.

この積層セラミックコンデンサ試料各100個について、その断面を埋込研磨し、内部構造欠陥の発生個数を調べた。   Each of the 100 multilayer ceramic capacitor samples was embedded and polished to examine the number of internal structural defects.

また、電気特性、信頼性の評価として、静電容量の測定と、85℃で12.6Vの電圧を印加しながら、信頼性試験を行った結果を(表1)にあわせて示す。   Moreover, as an evaluation of electric characteristics and reliability, the results of a reliability test while applying a measurement of capacitance and a voltage of 12.6 V at 85 ° C. are shown together with (Table 1).

ここで、静電容量は20℃の温度で、1Vrmsの電圧下で1kHzで測定を行ったものであり、静電容量の目標値は100nF(0.1μF)とし、この目標値に対して±10%を超える静電容量のものは本実施の形態の範囲外と判定した。   Here, the capacitance is measured at a temperature of 20 ° C. and 1 kHz under a voltage of 1 Vrms, and the target value of the capacitance is 100 nF (0.1 μF). Those having a capacitance exceeding 10% were determined to be out of the range of the present embodiment.

また、ショート不良については、30個の測定個数の中で10個以上ショートがある試料は本実施の形態の範囲外とした。   As for short-circuit defects, samples having 10 or more shorts out of 30 measured numbers were out of the scope of the present embodiment.

また、信頼性試験の評価としては、85℃で12.6Vの電圧を印加しながら、1000時間経過した後に絶縁抵抗値が103Ω以下に低下した試料数で示した。 The evaluation of the reliability test is shown by the number of samples in which the insulation resistance value decreased to 10 3 Ω or less after 1000 hours while applying a voltage of 12.6 V at 85 ° C.

信頼性試験開始前の試料の絶縁抵抗値は108Ω以上である。なお、絶縁抵抗値は25℃の室温で6.3Vで1分間電圧印加して測定したものである。 The insulation resistance value of the sample before the start of the reliability test is 10 8 Ω or more. The insulation resistance value was measured by applying a voltage of 6.3 V for 1 minute at a room temperature of 25 ° C.

Figure 0004595613
Figure 0004595613

(表1)の試料番号18から明らかなように、電極ペーストに含まれる共材の、所定の温度(実施の形態1の場合は900℃)で熱処理する前の比表面積値と、熱処理した後の比表面積値との変化率が60%を超える場合、この電極ペーストを用いて内部電極とした積層セラミックコンデンサ(試料番号18)のショート率は30個中20個と多くなっている。   As is clear from sample number 18 in (Table 1), the specific surface area value of the co-material contained in the electrode paste before heat treatment at a predetermined temperature (900 ° C. in the case of Embodiment 1) and after the heat treatment When the rate of change from the specific surface area value exceeds 60%, the short-circuit rate of the multilayer ceramic capacitor (sample No. 18) using the electrode paste as an internal electrode is as high as 20 out of 30.

これに対して、熱処理前後の比表面積値の変化率が60%以下の共材を含む内部電極を用いて作製した試料番号1〜17ではショート率は30個中10個未満であり、ショート率が大きく改善できていることがわかる。   On the other hand, in sample numbers 1 to 17 produced using internal electrodes containing a co-material having a change rate of the specific surface area value before and after the heat treatment of 60% or less, the short rate is less than 10 out of 30, and the short rate It can be seen that is greatly improved.

また、熱処理前後の比表面積値の変化率が30%未満の試料番号1では、ショート率は少ないが、静電容量の低下が見られる。   In Sample No. 1 in which the change rate of the specific surface area value before and after the heat treatment is less than 30%, the short-circuit rate is small, but the capacitance is decreased.

これは、試料番号1では共材の熱処理前後の比表面積値の変化率が小さく、従って共材の焼結反応における活性度が低いため、内部電極中の共材と誘電体層との焼結時の交互作用の制御が不十分となり、内部電極の連続性が低下したためと考えられる。   This is because in Sample No. 1, the change rate of the specific surface area value before and after heat treatment of the co-material is small, and therefore the activity in the sintering reaction of the co-material is low. This is thought to be because the control of the interaction at the time became insufficient and the continuity of the internal electrodes was lowered.

また、所定の温度で熱処理する前の平均粒径が0.03μm〜0.10μmで、かつ比表面積値が15m2/g〜25m2/gという条件を満足しないセラミック粉を共材に含む電極ペーストで作製した試料番号6、14ではショート率は小さいものの、破壊電圧が140Vと低くなっている。中でも試料番号14は内部構造欠陥の発生数が多くなっている。 The electrode comprising a ceramic powder with an average particle size 0.03μm~0.10μm before the heat treatment at a predetermined temperature, and a specific surface area value does not satisfy the condition of 15m 2 / g~25m 2 / g to the common material In sample numbers 6 and 14 made of paste, although the short-circuit rate is small, the breakdown voltage is as low as 140V. In particular, Sample No. 14 has an increased number of internal structural defects.

さらに、共材であるセラミック粉体のA/B比が、1.010を超える試料番号2並びにA/B比が0.990未満の試料番号17では、静電容量が目標値の100nF±10%以内に入らず、低くなっている。   Further, in the sample number 2 in which the A / B ratio of the ceramic powder as the co-material exceeds 1.010 and the sample number 17 in which the A / B ratio is less than 0.990, the capacitance is 100 nF ± 10 which is the target value. It is not within% and is low.

これらのことから、電極ペーストに含まれる共材の、所定の温度(実施の形態1の場合は900℃)で熱処理する前の比表面積値と、熱処理した後の比表面積値との変化率を30%より大きく、60%より小さくした場合、内部電極と誘電体層の焼成収縮挙動のより精密な制御が可能になり、また内部電極を形成する電極ペーストに含まれた共材と誘電体層との焼結における交互作用を制御できる結果、静電容量や破壊電圧、ショート率の低減などを達成した、性能に優れた積層セラミック電子部品を作製することができるものである。 From these, the rate of change between the specific surface area value of the common material contained in the electrode paste before the heat treatment at a predetermined temperature (900 ° C. in the case of Embodiment 1) and the specific surface area value after the heat treatment is obtained. When it is larger than 30% and smaller than 60% , it becomes possible to more precisely control the firing shrinkage behavior of the internal electrode and the dielectric layer, and the co-material and the dielectric layer included in the electrode paste forming the internal electrode As a result of controlling the interaction in sintering, it is possible to produce a multilayer ceramic electronic component excellent in performance that achieves reduction in capacitance, breakdown voltage, short-circuit rate, and the like.

さらに、共材として主成分がABO3型のペロブスカイト型化合物であり、所定の温度で熱処理する前の平均粒径が0.03μm〜0.10μmであり、かつ比表面積値が15m2/g〜25m2/gであるものを用いることにより、さらに内部構造欠陥の発生を抑制することができる。 Furthermore, the main component is a perovskite type compound of ABO 3 type as a co-material, the average particle size before heat treatment at a predetermined temperature is 0.03 μm to 0.10 μm, and the specific surface area value is 15 m 2 / g By using the one having 25 m 2 / g, the occurrence of internal structural defects can be further suppressed.

また、ABO3型のペロブスカイト型化合物のAサイト元素とBサイト元素の比率をA/Bと表した時にA/Bが0.990以上1.010以下とすることにより、誘電体層に及ぼす共材の影響を最小限に押さえ、内部構造欠陥が抑制された、静電容量などの性能に優れ、信頼性が向上した積層セラミック電子部品を作製することができる電極ペーストを提供することができるものである。 Further, when the ratio of the A site element to the B site element of the ABO 3 type perovskite type compound is expressed as A / B, A / B is set to 0.990 or more and 1.010 or less, so An electrode paste capable of producing a laminated ceramic electronic component with reduced performance, reduced internal structure defects, excellent electrostatic capacity, and improved reliability is provided. It is.

なお、上記実施の形態においては、共材のセラミック粉として、チタン酸バリウムを用いたが、チタン酸バリウムに限定されるものではなく、チタン酸バリウムとその他のペロブスカイト型化合物(チタン酸カルシウム、チタン酸ストロンチウム、チタン酸マグネシウム)の1種または2種以上との化合物あるいは混合物でも同様の効果が得られる。   In the above embodiment, barium titanate is used as the ceramic powder of the co-material, but it is not limited to barium titanate, and barium titanate and other perovskite type compounds (calcium titanate, titanium) The same effect can be obtained with a compound or mixture of one or more of strontium acid and magnesium titanate.

本発明にかかる電極ペーストは、所定の温度で熱処理した前後の比表面積値の変化率が30%より大きく、60%より小さいセラミック粉体を共材として含むことにより、内部電極と誘電体層の焼成収縮挙動をより精密に制御することが出来るとともに、内部電極を形成する電極ペーストに含まれた共材と誘電体層との焼結における交互作用を制御できる結果、内部構造欠陥が抑制された、静電容量などの性能に優れ、信頼性が向上した積層セラミック電子部品を作製することができるという効果を奏し、積層セラミックコンデンサや積層セラミックフィルタ、多層基板などの積層セラミック電子部品などの内部電極用電極ペースト等に有用である。 The electrode paste according to the present invention includes a ceramic powder having a change rate of a specific surface area value before and after heat treatment at a predetermined temperature of more than 30% and less than 60% as a co-material. The firing shrinkage behavior can be controlled more precisely, and the interaction between the sintering of the common material contained in the electrode paste forming the internal electrode and the dielectric layer can be controlled, resulting in suppression of internal structural defects. It has the effect of being able to produce multilayer ceramic electronic components with excellent performance such as capacitance and improved reliability, and internal electrodes for multilayer ceramic electronic components such as multilayer ceramic capacitors, multilayer ceramic filters and multilayer substrates Useful for electrode pastes and the like.

本発明の一実施の形態における積層セラミックコンデンサの一部切り欠き斜視図1 is a partially cutaway perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention.

11 積層セラミックコンデンサ
12 誘電体層
13 内部電極
14 外部電極
11 Multilayer Ceramic Capacitor 12 Dielectric Layer 13 Internal Electrode 14 External Electrode

Claims (2)

セラミックシートと内部電極が交互に積層されてなる積層体において、前記内部電極の形成に用いられる電極ペーストであって、前記電極ペーストはセラミック粉体を含み、前記セラミック粉体は所定の温度で熱処理した前後のBET法による比表面積値の変化率が30%より大きく、60%より小さいものを用い、前記セラミック粉体は前記所定の温度で熱処理する前の平均粒径が0.03μm〜0.10μmであり、かつ比表面積値が15m 2 /g〜25m 2 /gである電極ペースト。 In a laminated body in which ceramic sheets and internal electrodes are alternately laminated, an electrode paste used for forming the internal electrodes, the electrode paste including ceramic powder, and the ceramic powder is heat-treated at a predetermined temperature The change rate of the specific surface area value by the BET method before and after the annealing was larger than 30% and smaller than 60%, and the ceramic powder had an average particle size before heat treatment at the predetermined temperature of 0.03 μm to 0.03 μm. 10μm in it, and a specific surface area value is 15m 2 / g~25m 2 / g and a electrode paste. セラミックシートと内部電極とを交互に積層して積層体を作製する積層工程と、前記積層体を焼成して焼結体を得る焼成工程と、前記焼結体の両端面に外部電極を形成する外部電極形成工程とを有し、前記内部電極形成に用いる電極ペーストは所定の温度で熱処理した前後のBET法による比表面積値の変化率が30%より大きく、60%より小さいものを用い、前記セラミック粉体は前記所定の温度で熱処理する前の平均粒径が0.03μm〜0.10μmであり、かつ比表面積値が15m 2 /g〜25m 2 /gであるセラミック粉体を含有する電極ペーストを用いる積層セラミック電子部品の製造方法。 A laminating step of alternately laminating ceramic sheets and internal electrodes to produce a laminated body, a firing step of firing the laminated body to obtain a sintered body, and forming external electrodes on both end faces of the sintered body The electrode paste used for forming the internal electrode has a change rate of the specific surface area value by the BET method before and after heat treatment at a predetermined temperature is larger than 30% and smaller than 60%. electrode ceramic powder containing ceramic powder average particle size before the heat treatment at the predetermined temperature is 0.03Myuemu~0.10Myuemu, and the specific surface area is 15m 2 / g~25m 2 / g A method of manufacturing a multilayer ceramic electronic component using a paste.
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JP2003252623A (en) * 2001-12-28 2003-09-10 Murata Mfg Co Ltd Method of manufacturing composite oxide powder and composite oxide powder
JP2005259638A (en) * 2004-03-15 2005-09-22 Matsushita Electric Ind Co Ltd Conductive paste and stacked electronic component using it

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JP2001110233A (en) * 1999-10-14 2001-04-20 Tdk Corp Conductive paste for forming internal electrode as well as laminated ceramic electronic parts
JP2003252623A (en) * 2001-12-28 2003-09-10 Murata Mfg Co Ltd Method of manufacturing composite oxide powder and composite oxide powder
JP2005259638A (en) * 2004-03-15 2005-09-22 Matsushita Electric Ind Co Ltd Conductive paste and stacked electronic component using it

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