JP4592240B2 - Mask pattern creating method and semiconductor device manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for producing a mask pattern for manufacturing a semiconductor device and a method for manufacturing a semiconductor device.
[0002]
[Prior art]
Recent progress in semiconductor manufacturing technology is very remarkable, and semiconductors with a minimum processing dimension of 0.18 μm are mass-produced. Such miniaturization is realized by dramatic progress in fine pattern formation techniques such as a mask process technique, an optical lithography technique, and an etching technique. When the pattern size is large enough, the planar shape of the LSI pattern to be formed on the wafer is directly drawn as a design pattern, a mask pattern that is faithful to the design pattern is created, and the mask pattern is transferred onto the wafer by the projection optical system. Then, by etching the base, a pattern almost as designed can be formed on the wafer. However, as pattern miniaturization progresses, it has become difficult to faithfully form a pattern in each process, and a problem has arisen that the final finished dimension does not match the design pattern.
[0003]
In particular, in the lithography and etching processes that are most important for achieving microfabrication, other pattern layout environments arranged around the pattern to be formed greatly affect the dimensional accuracy of the pattern. Therefore, in order to reduce these influences, optical proximity correction (OPC) or process proximity effect correction (OPC) that adds an auxiliary pattern to the design pattern in advance so that the dimension after processing is formed into a desired pattern. PPC (Process proximity Correction) technology (hereinafter referred to as PPC method) is disclosed in Japanese Patent Application Laid-Open No. 9-319067, SPIE Vol. 2322 (1994) 374 (Large Area Optical Proximity Correction using Pattern Based Correction, DM Newmark et al.).
[0004]
PPC methods are broadly classified into two methods. Rule-based PPC methods that make correction values ruled according to certain criteria and pattern correction based on the rules, and on the wafer after passing through the mask, lithography, and etching processes There is a simulation-based PPC method in which a correction value is calculated using a simulator that can predict the finished shape. The rule-based PPC method can perform high-speed correction, but it is difficult to perform high-precision correction. The simulation-based PPC method can perform high-accuracy correction, but complex calculations such as optical simulation are possible. Therefore, it takes a long time to calculate the correction value, and the turn around time (TAT) for mask creation is deteriorated.
[0005]
In order to reduce the time for calculating the correction value, the above known example proposes the following method to reduce the correction value calculation time. An example of this technique is shown in FIG.
[0006]
Step S401:
A reference point is set in the design layout, and an area of a certain size around the reference point is cut out. In the above Japanese Patent Laid-Open No. 9-319067, there is a description that this reference point is determined “corresponding to the surrounding layout”, and in SPIE, this reference point is determined “corresponding to the corner or line segment”. .
[0007]
Step S402
A database (hereinafter referred to as a correction value library) in which edge coordinate groups included in the region (hereinafter referred to as a correction environment) and correction values corresponding to the correction environment are stored is examined, and this correction value It is searched whether there is a library that matches the correction environment cut out in step S401.
[0008]
Step S403
If there is a match, correction is performed with reference to the corresponding correction value.
[0009]
Step S404
If there is no coincidence, the correction value is calculated by optical simulation, process simulation, or a mathematical expression expressing the correction value by a polynomial expression. Then, the correction environment at that time and the corresponding correction value are added to the correction value library.
[0010]
The processing of S401 to S404 is performed for all the reference points, and the mask pattern creation is completed.
[0011]
In this correction method, the correction environment once appeared and the correction value corresponding to the correction environment are stored in the correction value library, so that it is not necessary to calculate the correction value even if the same environment appears again. As a result, the number of simulations that require time can be reduced as much as possible, and the mask pattern creation time can be reduced.
[0012]
In actual device development, first, small-scale design data for the purpose of device characteristic measurement and process flow construction is created, and a mask is created based on the data. Thereafter, a product for mass production is developed, and a product derived from the product (called a derivative product) may be created. The types of pattern layouts used for these small-scale data, mass production products and derivatives are not necessarily different, and there are many overlapping pattern types. Also, during device development, mask revisions are often performed mainly due to changes in the conditions of microfabrication processes such as masks, lithography, and etching.
[0013]
Under such circumstances, when conventional mask pattern processing is performed, there is a problem that the TAT for mask creation is delayed in the following points. First, since the correction value library at the start of mask pattern creation does not include an edge coordinate group and a correction value corresponding to the edge coordinate group, a ratio of obtaining a correction value by simulation for the input edge coordinate group is very high. This is because as the scale of the design data is larger, the number of correction environments to be simulated is increased, which causes the TAT for mask creation to deteriorate.
[0014]
In addition, in the conventional method, it is necessary to create a new correction value library again at the time of mask revision, and there is no description of a method for efficiently using the correction value library in view of the above situation. Not.
[0015]
[Problems to be solved by the invention]
As described above, when the mask pattern creation is started, the edge coordinate group and the corresponding correction value are not input to the correction value library, and the ratio of calculating the correction value by simulation is large. There was a problem of making it worse.
[0016]
In addition, in the conventional method, it is necessary to create a new correction value library again at the time of mask revision, and there is no description of a method for efficiently using the correction value library in view of the above situation. Not.
[0017]
SUMMARY OF THE INVENTION An object of the present invention is to manufacture a mask pattern creation method and a semiconductor device that can use an edge coordinate group and a correction value corresponding to the edge coordinate group even at the start of mask pattern creation and can improve TAT for mask pattern creation. It is to provide a method.
[0019]
[Means for Solving the Problems]
The present invention is configured as follows to achieve the above object.
[0020]
A mask pattern creation method according to the present invention is a mask pattern creation method for generating a mask pattern so that a desired shape can be obtained on a wafer from a design pattern, and the design pattern is designed before the start of creation of the mask pattern. A reference point is set for the layout pattern of the standard cell used to create the design pattern, and an edge coordinate group of the pattern included in the area within the cell with the set reference point as the center is obtained. A step, a step of calculating a correction value related to the edge coordinate group by simulation using a predetermined correction parameter, and before the design of the design pattern is completed ,in front A step of creating a correction value library in which edge coordinate groups and corresponding correction values are registered; and after starting the creation of the mask pattern, a reference point is set in the design pattern, and the set reference point is set as the center. A step of obtaining an edge coordinate group of a pattern included in a region to be performed, a step of referring to the correction value library for the obtained edge coordinate group, and a case where the obtained edge coordinate group is not registered in the correction value library A step of calculating a correction value for the edge coordinate group by simulation based on a predetermined correction parameter; and a step of additionally registering the obtained correction value and the corresponding edge coordinate group in the correction value library; When the obtained edge coordinate group is registered in the correction value library, the correction value label A step of reading a correction value which is contained in library, the calculated correction value, or read by correcting the design pattern in accordance with any of the values, characterized in that it comprises the steps of generating a mask pattern.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0023]
(First embodiment)
A first embodiment of the present invention will be described. First, FIG. 1 shows a mask pattern correction processing method according to the conventional device development flow. Normally, device development such as memory and logic is performed according to the flow shown by the arrows in FIG. Initially, a small test sample is created, and the test sample is used primarily to build process flows and measure basic device characteristics. After the basic evaluation is completed with this test sample, the production device is started.
[0024]
FIG. 1 is a block diagram showing a schematic configuration of a mask data creation apparatus according to the first embodiment of the present invention. 2 to 3 are flowcharts showing a mask data creation method according to the first embodiment of the present invention. FIG. 4 is a diagram showing the concept of the mask pattern creation method according to the first embodiment of the present invention.
FIG. 1 is a diagram showing a mask pattern correction processing method according to the first embodiment of the present invention.
[0025]
(Step S101)
First, design of a test sample is started.
[0026]
(Step S102)
Before the test sample design is completed, the correction value library 112 is created. The correction value library 112 manages each correction value library file classified by device type, layer type, process parameter, and the like. When generating a test sample mask pattern, there is no data in the correction value library 112. However, it is desirable to input a correction value for the edge coordinate group into the correction value library 112 before the test sample design is completed. Three examples of a method for creating a correction value for the edge coordinate group before the test sample design is completed are shown below.
[0027]
First creation method: A pattern group used for a test sample is obtained in advance during or before design, and a correction value corresponding to the pattern group is calculated.
[0028]
Second creation method: Information on modules such as standard cells used for wiring pattern design is obtained from a designer in advance, and a simulation is performed on the obtained module pattern in advance, and each module pattern is obtained. Find the correction value.
[0029]
Third creation method: When a designer performs data processing and lithography simulation with a small pattern to predict a finished shape on a wafer at the time of layout design, it is created at the time of the data processing. Retrieve the library file from the designer.
[0030]
Fourth creation method: Design assets (design layout) used in the previous generation are shrinked so as to satisfy the design rule (DR: design rule) in the current generation and used in the current generation A design layout is predicted, and a library file used in data processing is created based on the design layout.
In the first creation method, it is relatively easy to obtain data during design / before design completion if there is an agreement with the designer in advance. The second creation method is an effective method for a logic device for designing each module.
[0031]
Further, when the degree of difficulty of the lithography process further increases in the future, it becomes necessary for the designer himself to determine whether or not the pattern can be formed on the wafer based on the simulation result while designing. Assuming such a design form, data processing and lithography simulation are frequently repeated with small-scale data, so the library file generated at that time is collected and included in the test sample. The pattern group can be known in advance.
[0032]
Furthermore, in the fourth creation method, the D.D. R. By inputting the design layout used in the previous generation into a tool called a compaction tool, the design layout of the previous generation can be changed to the D.D. R. It is possible to perform compaction to a design layout that satisfies the above requirements. By using this tool, a design layout expected to be used in the present generation can be prepared to some extent before the designer designs the layout. It is also possible to predict a group of patterns that are supposed to be used in this generation in advance from the design layout thus predicted.
[0033]
(Step S103)
After the layout of the test sample is completed, the data of the design pattern (first design pattern) 111a of the test sample is stored in the design pattern / mask pattern storage unit 111.
[0034]
(Step S104)
The reference point setting unit 101 of the mask pattern creating apparatus 100 sets a reference point at a predetermined position of the test sample design pattern 111a. Cut out a region of a certain size around each reference point. Here, the region to be cut out is a range where the proximity effect extends from the correction target point. The reference points are set corresponding to the corners and sides corresponding to the surrounding layout.
[0035]
(Step S105)
The reference points set in step 102 are corrected sequentially.
[0036]
(Step S106)
The edge coordinate group calculation unit 102 of the mask pattern creation device 100 obtains the coordinate position of the edge of the pattern included in the cut out region. Hereinafter, a set of obtained coordinate positions is referred to as an edge coordinate group.
[0037]
(Step S107)
Next, the correction value library reference unit 103 of the mask pattern creating apparatus 100 refers to the correction value library 112 in which correction values corresponding to the edge coordinate group are stored, and is obtained in this correction value library 112 in step S106. Search whether there is a match with the selected edge coordinate group.
[0038]
(Step S108)
When the correction value library 112 includes an edge coordinate group, the correction value library reference unit 103 acquires a correction value corresponding to the edge coordinate group from the correction value library 112.
[0039]
(Step S109)
The correction value library reference unit 103 passes the edge coordinate group and the acquired correction value to the edge moving unit 104 of the mask pattern creating apparatus 100. Then, the edge moving unit moves the edge of the side including the edge coordinate group in the design pattern 111 a of the test sample stored in the design pattern / mask pattern storage unit 111 based on the received correction value.
[0040]
(Step S110)
When there is no edge coordinate group in the correction value library 112, the correction value calculation unit 105 of the mask pattern generation device 100 performs OPC using an optical simulation or a mathematical expression expressing the correction value in a polynomial form under the condition of the correction parameter 113. Then, the correction value corresponding to the edge coordinate group is calculated by PPC using a process simulation or a mathematical expression in which the correction value is expressed by a polynomial. The correction parameter 113 includes an optical parameter and a process parameter. If the process proximity effect is not a problem, it is not necessary to perform the process proximity effect correction, and only the optical proximity effect correction may be performed.
[0041]
(Step S111)
The edge coordinate group / correction value registration unit 106 of the mask pattern creating apparatus 100 additionally stores the correction value newly obtained in step S110 and the corresponding edge coordinate group in the correction value library 112. Thereafter, steps S107 to S109 are sequentially executed.
[0042]
(Step S112)
When the above processing is performed on each reference point and the optical proximity effect correction and the process proximity effect correction are performed on all the reference points, the creation of the test sample mask pattern (first mask pattern) is completed. .
[0043]
(Steps S113, S114, S115)
A mask is created using the created mask pattern, and a test sample is created using the created mask (S113). With this test sample, the process flow is constructed and the basic characteristics of the device are evaluated (S114). Then, a product device is designed (S115).
[0044]
(Step S116)
When the design of the product device is completed, the design pattern (second design pattern) 111b of the product device is stored in the design pattern / mask pattern storage unit 111.
[0045]
(Step S117)
The reference point setting unit 101 sets a plurality of reference points at arbitrary positions on the product device design pattern 111 b from the product device design data 111 a stored in the design data storage unit 111. Cut out a region of a certain size around each reference point. Here, the region to be cut out is a range where the proximity effect extends from the correction target point. The reference points are set corresponding to the corners and sides corresponding to the surrounding layout.
[0046]
(Step S118)
The reference points set in step 115 are sequentially corrected.
[0047]
(Step S119)
The edge coordinate group calculation unit 102 obtains the coordinate position of the edge of the pattern included in the region cut out with each reference point as the center.
[0048]
(Step S120)
Next, the correction value library reference unit 103 refers to the correction value library 112 in which correction values corresponding to the edge coordinate group are stored, and matches the edge coordinate group obtained in step S119 with the correction value library 112. Search whether there is something to do.
[0049]
(Step S121)
When the correction value library 112 includes an edge coordinate group, the correction value library reference unit 103 acquires a correction value corresponding to the edge coordinate group from the correction value library 112.
[0050]
(Step S122)
The correction value library reference unit 103 passes the edge coordinate group and the acquired correction value to the edge moving unit 104. Then, the edge moving unit 104 moves the edge of the side including the edge coordinate group of the design pattern 111b of the product device stored in the design pattern / mask pattern storage unit 111 based on the received correction value.
[0051]
(Step S123)
When there is no edge coordinate group in the correction value library 112, the correction value calculation unit 105 performs optical simulation or OPC using a mathematical expression expressing the correction value in a polynomial and process simulation under the condition of the correction parameter 113, or A correction value corresponding to the edge coordinate group is calculated by PPC using a mathematical expression in which the correction value is expressed by a polynomial.
[0052]
(Step S124)
The edge coordinate group / correction value registration unit 106 additionally stores the correction value newly obtained in step S123 and the corresponding edge coordinate group in the correction value library 112. Thereafter, steps S120 to S122 are sequentially executed.
[0053]
(Step S125)
When the above processing is performed on each reference point and the optical proximity effect correction and the process proximity effect correction are performed on all the reference points, the creation of the mask pattern of the product device is completed.
[0054]
Thereafter, a mask is actually manufactured based on the created mask pattern. Thereafter, using the manufactured mask, the resist film or the like (film to be processed) formed on the semiconductor substrate in the process of manufacturing the semiconductor device is exposed, and the semiconductor device is manufactured using a known method.
[0055]
In the mask pattern creation method described above, part of the edge coordinate group included in the test sample and the corresponding correction value are stored in advance in the correction value library 112, so the number of simulations for calculating the correction value is reduced. It becomes possible to make it.
[0056]
Then, when creating the mask data of the product device, the correction is performed while referring to the correction value library 112. Further, the correction value library 112 after the test sample mask data is created contains all the correction values for the test sample coordinate group. Therefore, the number of times of correction value calculation by simulation is reduced as compared with the conventional case where the correction is newly performed.
[0057]
Furthermore, after creating a mask for a product device, if there is a mask revision or a derivative product device is created, by using the correction value library 112 after creating the mask data of the product device, creating mask data, The creation time of mask data can be shortened.
[0058]
If correction is performed using this method, correction pattern information and correction values are gradually stored in the correction value library file, so the number of correction value calculations by simulation is greatly reduced when creating new mask data. To do. Thereby, it is possible to significantly reduce the time required for mask production.
[0059]
(Second Embodiment)
As described in the first embodiment, the correction value library file is managed by the library database, and the correction value calculation time by simulation is reduced by acquiring the library file for each correction and performing mask pattern correction. It was found that the mask pattern correction processing time can be reduced. However, in practice, the correction value stored in the correction value library 112 needs to be changed as the process is changed. The correction parameters used at the time of test sample correction are almost the same for products, and it is necessary to calculate correction values using correction parameters for products different from those for test samples.
[0060]
Therefore, we have developed an editing tool for the correction value library 112. FIG. 5 shows an outline of the correction value library editing tool. FIG. 5 is a block diagram showing a schematic configuration of a correction value library editing tool according to the second embodiment.
[0061]
The correction value library editing tool 200 includes a correction value calculation unit 201 having the same function as the correction value calculation unit 105 of the mask pattern creation apparatus 100 and a correction value rewriting unit 202. When the correction parameter 114 is input to the correction value library editing tool 200, the correction value calculation unit 201 sequentially reads edge coordinate groups from the correction value library 112, and calculates correction values for each read edge coordinate group. To do. The correction value stored in the correction value library 112 is rewritten to a newly calculated correction value by the correction value rewriting unit 202.
[0062]
By using the correction value library editing tool 200, it is possible to calculate correction values to be applied to a new process for each edge coordinate group of the correction pattern included in the test sample and the product device.
[0063]
By using this correction value library editing tool 200, it is possible to edit only the library file to the latest correction value offline before starting the mask pattern correction process, so that it takes time-consuming simulation during the mask pattern correction process. The mask pattern correction processing time can be reduced and the TAT for mask creation can be improved. Further, if the editing work of the correction value library editing tool 200 is performed in parallel by a plurality of CPUs and a plurality of computers, the correction value library can be edited at a higher speed.
[0064]
In this way, the correction value library can be rewritten in response to changes in the process and the correction parameters, and even when the process changes, data processing can be performed in a very short time.
[0065]
Note that it is not necessary to rewrite the correction value in the correction value library 112, and a newly calculated correction value may be additionally associated with the edge coordinate group.
[0066]
(Third embodiment)
According to the first embodiment, the metal layer of the DRAM layer was corrected. First, the test sample is corrected, and the library file created by the correction is held. The product data was corrected when the library file created from the test sample was used and when it was not used, and the data processing time for each was calculated. As a result, it has been found that the correction time when there is a library file can be shortened to 1/10 times the correction time when there is no library file.
[0067]
Furthermore, the same method was used to correct this generation of derivatives. In the past, it was necessary to create a library from zero and it took a lot of data processing time. However, in the derivative product, the library file for the mother product already exists, and many common pattern groups are used. Therefore, it was found that the correction can be made at a very high speed, and it was found to be very effective for a derivative product.
[0068]
The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention at the stage of implementation. Further, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent elements are deleted from all the constituent elements shown in the embodiment, at least one of the problems described in the column of the problem to be solved by the invention can be solved, and is described in the column of the effect of the invention. When at least one of the effects is obtained, a configuration in which this configuration requirement is deleted can be extracted as an invention.
[0069]
In addition, the present invention can be variously modified and implemented without departing from the scope of the invention.
[0070]
【The invention's effect】
As described above, according to the present invention, by creating a correction value library in advance before the design pattern design is completed, the correction value library can be used even in the initial stage of mask pattern creation. Since the correction value calculation time due to is greatly reduced, the TAT for mask pattern creation can be improved.
[0071]
In addition, according to the present invention, the correction value calculation time by simulation is significantly reduced by using the correction value library for the creation of a plurality of mask patterns, so that the TAT for mask creation can be improved.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a schematic configuration of a mask pattern creating apparatus according to a first embodiment.
FIG. 2 is a flowchart for explaining a mask pattern creation method according to the first embodiment;
FIG. 3 is a flowchart for explaining a mask pattern creation method according to the first embodiment;
FIG. 4 is a view showing the concept of a mask pattern creation method according to the first embodiment.
FIG. 5 is a block diagram showing a schematic configuration of a correction value library editing tool according to the second embodiment.
FIG. 6 is a flowchart for explaining a conventional mask pattern generation method;
[Explanation of symbols]
101: Reference point setting unit
102: Edge coordinate group calculation unit
103: Correction value library reference section
104. Edge moving part
105: Correction value calculation unit
106 ... Edge coordinate group / correction value registration unit
111... Design pattern / mask pattern storage unit
112 ... Correction value library
113 ... Correction parameter

Claims (4)

A mask pattern creation method for generating a mask pattern so that a desired shape can be obtained on a wafer from a design pattern,
At the time of designing the design pattern before starting the creation of the mask pattern, a reference point is set for the layout pattern of the standard cell used for creating the design pattern, and the reference point is set as the center. Obtaining an edge coordinate group of a pattern included in the area in the cell;
Calculating a correction value for the edge coordinate group by simulation using a predetermined correction parameter;
Before designing the design pattern is completed, creating a pre-Symbol edge coordinate group and correction values libraries and correction values are registered corresponding thereto
After starting creation of the mask pattern, setting a reference point in the design pattern, obtaining an edge coordinate group of a pattern included in a region centered on the set reference point;
Referring to the correction value library for the obtained edge coordinate group;
If the obtained edge coordinate group is not registered in the correction value library, calculating a correction value for the edge coordinate group by simulation based on a predetermined correction parameter;
A step of additionally registering the obtained correction value and the corresponding edge coordinate group in the correction value library;
When the obtained edge coordinate group is registered in the correction value library, a step of reading a correction value stored in the correction value library;
Generating a mask pattern by correcting the design pattern according to either the calculated correction value or the read value;
A mask pattern creating method comprising: A step of setting a reference point for the first design pattern in the middle of design and obtaining an edge coordinate group of a pattern included in a region centered on the set reference point;
Calculating a correction value related to the edge coordinate group by simulation based on a predetermined correction parameter;
Creating the correction value library in which the calculated correction value and the corresponding edge coordinate group are registered before the design pattern design is completed;
The mask pattern creating method according to claim 1, comprising:   The mask pattern creation method according to claim 1, wherein the correction value is calculated by performing at least an optical simulation among an optical simulation and a process simulation.   A semiconductor device comprising: a mask produced by the mask pattern producing method according to claim 1; and a film to be processed formed on a semiconductor substrate in the course of manufacturing a semiconductor device is exposed using the mask. Device manufacturing method.

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