JP4589765B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device including an n-type MOSFET having a metal gate electrode and a p-type MOSFET, and a method suitable for manufacturing the semiconductor device.

  In recent years, MOSFETs are about to be further miniaturized. However, in gate electrodes made of polysilicon and silicide that have been widely used in the past, an effective gate insulating film due to the depletion of the gate insulating film interface. There is concern about an increase in thickness, and Fermi level pinning occurs with a high dielectric constant film that can reduce the effective gate insulating film thickness.

  In order to eliminate depletion and Fermi level pinning as described above, it is effective to use a metal gate electrode. In addition, since the metal generally has a low resistance, the resistance of the gate can be reduced by using the metal.

  By the way, it is well known that there are semiconductor devices that require an n-type MOSFET and a p-type MOSFET to be formed in the same substrate. It is necessary to change the threshold voltage.

  In that case, if the gate electrode is made of polysilicon or silicide, the threshold voltage can be controlled by implanting impurities. However, in the case of using a metal, the metal has a work function specific to the material. In addition, since the work function cannot be changed by implanting impurities or the like, the n-type MOSFET and the p-type MOSFET require metal materials having different work functions.

  FIG. 14 to FIG. 20 are main part cut side views showing a semiconductor device at a process point for explaining a process of manufacturing a semiconductor device including a CMOS according to a conventional technique. Will be described with reference to FIG.

See FIG. 14 (1)
The state shown in the figure represents a semiconductor device in which a normal technique is applied and a configuration other than the gate is almost built in the Si semiconductor substrate 1, but most of the configuration is omitted. That is, a p-type well is formed in the n-type MOSFET portion, an n-type well is formed in the p-type MOSFET portion, a dummy gate electrode is formed to form a shallow low-concentration source region and drain region, and the sidewall 2 After forming, a high concentration source contact region and drain contact region are formed, and an insulating film 3 is formed on the entire surface. If necessary, the surface is polished to expose the top surface of the dummy gate electrode. Then, the dummy gate electrode is removed, whereby a recess of the gate pattern surrounded by the sidewall 2 is generated, and a channel region of the Si semiconductor substrate 1 is exposed at the bottom of the recess.
(2)
Therefore, the gate insulating film 4 is deposited on the entire surface by applying a CVD (chemical vapor deposition) method.

Refer to FIG. 15 (3)
The Hf film 5 is formed on the entire surface by applying the CVD method. The CVD method can be replaced with other film forming methods such as PVD (physical vapor deposition) or ALD (atomic layer deposition).

Refer to FIG. 16 (4)
A resist film 6 that covers the gate region of the n-type MOSFET portion is formed by applying a resist process in lithography technology.

See FIG. 17 (5)
As in the case of the step (3), the Hf film 5 and the gate insulating film 4 in the p-type MOSFET portion are removed by applying, for example, a CVD method.

See FIG. 18 (6)
The gate insulating film 4A is formed again by applying the CVD method.

See FIG. 19 (7)
After removing the resist film 6 and the gate insulating film 4A thereon, a Pt film 7 is formed by applying the CVD method. In this case, the CVD method may be replaced with the PVD method or the ALD method.

See FIG. 20 (8)
The Pt film 7 is polished by applying a CMP (chemical mechanical polishing) method, and the Hf film 5 is exposed. Accordingly, the gate electrode 5G made of Hf in the n-type MOSFET portion and the gate electrode 7G made of Pt in the p-type MOSFET portion are completed. Needless to say, since the gate electrode 5G and the gate electrode 7G have different work functions, the threshold voltages of the n-type MOSFET and the p-type MOSFET are different.

  As described above, when a metal gate electrode is used and an n-type MOSFET and a p-type MOSFET are formed on the same substrate, many steps are required to manufacture a semiconductor device, and the manufacturing process is complicated. Cannot be avoided and therefore the manufacturing cost is increased.

  By the way, the detailed contents of the present invention will be clarified later in the section [Disclosure of the Invention]. When an n-type MOSFET and a p-type MOSFET are manufactured, nitrogen is introduced into the metal gate electrode of the n-type MOSFET. It has been introduced.

  However, conventionally, introduction of nitrogen into a metal gate electrode has been performed (see, for example, Patent Document 1), although the object and effect of the present invention are different.

However, in the invention disclosed in Patent Document 1, nitrogen is introduced to change the work function of the gate electrode. The difference between the invention of Patent Document 1 and the present invention is as follows. The disclosure becomes clear.
JP 2000-31296 A

  In the present invention, when a semiconductor device including an n-type MOSFET and a p-type MOSFET is manufactured, a metal gate electrode is used to suppress depletion or Fermi level pinning that occurs in a gate electrode using polysilicon or silicide. The metal gate electrodes of the n-type MOSFET and the p-type MOSFET can be easily formed in a simple process.

  In the semiconductor device and the manufacturing method thereof according to the present invention, the step of forming the first metal film on the gate insulating film, and introducing nitrogen into only the first metal film of the n-type MOSFET portion Forming a second metal film including the type MOSFET portion, and alloying the first metal film and the second metal film of the p-type MOSFET portion by heat treatment. It is one of the features.

  Here, a metal selected from Hf, Mg, In, Zr, Nb, Al, Mn, Pb, Ta, and Ag can be used as the first metal film, and Pt, A metal selected from Ru, Co, Au, Pd, Ni, Re, and Ir can be used.

  By adopting the above-mentioned means, the process for producing the metal gate electrode of the n-type MOSFET and the metal gate electrode of the p-type MOSFET is different only in the process of introducing nitrogen into one of the metal gate electrodes. Compared to the case where each of the n-type and p-type metal gate electrodes is separately formed, the number of steps is reduced. Then, after forming one metal gate electrode, it is not necessary to remove one metal gate electrode material in the other metal gate electrode formation scheduled portion, so that the gate insulating film interface is not damaged.

  In the present invention, in order to easily create n-type and p-type metal gate electrodes having different work functions, the first metal film whose work function is on the conduction band side of the silicon midgap on the gate insulating film. And nitrogen is introduced only into the region to be the metal gate electrode of the n-type MOSFET. Thereafter, a heat treatment is performed after depositing a second metal film having a work function on the valence band side of the silicon midgap.

  In the region to be the metal gate electrode of the p-type MOSFET, the first metal film and the second metal film are alloyed to change to a work function reflecting the work functions of the first and second metal films. In the region to be the metal gate electrode of the n-type MOSFET in which nitrogen is introduced into the first metal film, the first metal film and the second metal film are not alloyed, and the metal on the gate insulating film is the first metal film. The metal film has a work function, and the metal gate electrode of the n-type MOSFET and the metal gate electrode of the p-type MOSFET have different work functions.

  In an experiment conducted in forming the present invention, a metal film was deposited on a gate insulating film, patterned into a gate electrode shape, subjected to various treatments, and a result obtained by measuring CV characteristics. Is shown in FIG.

  In the diagram of FIG. 1, the broken characteristic line A shows the characteristics of the metal gate electrode made of Hf, and the solid characteristic line B shows the characteristics of the metal gate electrode that has been heat-treated by depositing Pt on Hf into which nitrogen has been introduced. The solid characteristic line C indicates the characteristic of the metal gate electrode obtained by depositing Pt on Hf and performing heat treatment.

  The sample from which the characteristic line C was obtained, that is, the metal gate electrode on which the Pt film was deposited on the Hf film and heat-treated was compared with the sample from which the characteristic line A was obtained, that is, the metal gate electrode having only the Hf film. The voltage changed. On the other hand, the threshold voltage does not change in the metal gate electrode in which Pt is deposited on Hf into which nitrogen is introduced, and in which the heat treatment is performed, that is, the sample from which the characteristic line B is obtained, as compared with the case of only the Hf film. It is caught. Therefore, alloying with Pt can be suppressed by introducing nitrogen into Hf.

FIG. 2 is a diagram showing the results of depth direction analysis of an electrode made of Hf into which nitrogen has been introduced in order to suppress alloying with Pt. From the figure, it can be seen that nitrogen is present at 10 ²¹ cm ⁻³ or more from the inside of Hf to the interface between the SiO ₂ gate insulating film and Hf.

FIG. 3 is a diagram showing a depth direction analysis result of a metal gate electrode in which an Hf film and a Pt film are deposited on the gate insulating film and subjected to heat treatment. From the figure, it can be seen that Pt reaches the interface between the gate insulating film and Hf and is alloyed. At this time, the nitrogen concentration in Hf is 10 ²¹ cm ⁻³ or less.

From the above, in order to suppress the alloying of Hf and Pt, it is necessary to introduce 10 ²¹ cm ⁻³ or more of nitrogen into Hf, and in order not to increase the work function of the Hf film. The introduced nitrogen is desirably 10 ²² cm ⁻³ or less.

  4 to 7 are side sectional views showing a main part of the semiconductor device at the main points for explaining the first embodiment. The following description will be made with reference to these drawings.

Refer to FIG. 4 (1) The process until the recess of the gate pattern surrounded by the sidewall is exactly the same as the process described in the prior art, so the description is omitted and the process will be described from the next process. . Reference numeral 11 denotes a Si semiconductor substrate.

  By applying the CVD method, the gate insulating film 14 is formed on the entire surface including the inside of the recess surrounded by the sidewalls 12, and then, any one of the CVD method, the PVD method, and the ALD method is applied. Accordingly, the Hf film 15 that is the first metal film is deposited on the entire surface. In the figure, symbol 13 indicates an insulating film. The Hf film 15 preferably does not contain oxygen. When oxygen is introduced, the resistance increases, the work function changes and the target value may not be obtained, and alloying is also hindered.

Refer to FIG. 5 (2)
A resist film 16 that covers the gate region of the p-type MOSFET portion is formed by applying a resist process in lithography technology.

(3)
By applying the ion implantation method, nitrogen ions of about 10 ²² cm ⁻³ are implanted into the Hf film 15 exposed in the n-type MOSFET portion. In the figure, the nitrogen-containing Hf film is indicated by the symbol 15N.

Refer to FIG. 6 (4)
After the resist film 16 is removed, a second metal film is formed on the entire surface of the Hf film 15 and the nitrogen-containing Hf film 15N by applying any one of the CVD method, PVD method, and ALD method. A certain Pt film 17 is deposited.

See FIG. 7 (5)
Alloying heat treatment is performed. Accordingly, the Pt film 17 in the n-type MOSFET portion is not alloyed, but the Pt film 17 in the p-type MOSFET portion is alloyed with the underlying Hf film 15. In the drawing, this is shown as an alloy film 18. Thus, the threshold voltage V _th of the n-type MOSFET is low, the threshold voltage V _th of the p-type MOSFET becomes high. Since the first metal film Hf is not removed in the p-type MOSFET portion, there is a difference in the height of the gate electrode between the n-type MOSFET portion and the p-type MOSFET portion after the alloying is completed. It does not occur and this is the same in other embodiments.

  8 to 13 are cutaway side views showing a main part of the semiconductor device at the main points for explaining the second embodiment, and will be described below with reference to these drawings.

Refer to FIG. 8 (1) By applying a thermal oxidation method (or CVD method), a gate insulating film 22 is formed on the Si semiconductor substrate 21, and then any one of the CVD method, PVD method, and ALD method is formed. By applying the film method, the Hf film 23 is formed on the gate insulating film 22.

Refer to FIG. 9 (2)
A resist film 24 that covers the gate region of the p-type MOSFET portion is formed by applying a resist process in lithography technology.

(3)
By applying the ion implantation method, nitrogen ions of about 10 ²² cm ⁻³ are implanted into the Hf film 23 exposed in the n-type MOSFET portion. In the figure, the nitrogen-containing Hf film is indicated by symbol 23N.

Refer to FIG. 10 (4)
After removing the resist film 24, a Pt film 25 is deposited on the entire surface of the Hf film 23 and the nitrogen-containing Hf film 23N by applying any one of CVD, PVD, and ALD. .

Refer to FIG. 11 (5)
Alloying heat treatment is performed. Accordingly, the Pt film 25 in the n-type MOSFET portion is not alloyed, but the Pt film 25 in the p-type MOSFET portion is alloyed with the underlying Hf film 23. Thus, the threshold voltage V _th of the n-type MOSFET is low, the threshold voltage V _th of the p-type MOSFET becomes high. In the figure, the alloy film is indicated by symbol 25A.

See FIG. 12 (6)
By applying a resist process and a dry etching method in lithography technology, the Pt film 25, the nitrogen-containing Hf film 23, and the gate insulating film 22 are etched in the n-type MOSFET portion, and the p-type MOSFET portion Then, the alloy film 25A of Pt and Hf and the gate insulating film 22 are etched to produce respective gates.

See FIG. 13 (7)
Thereafter, a normal technique, that is, an ion implantation method, a CVD method, an anisotropic etching method, or the like is applied to form shallow source and drain regions having a low impurity concentration, formation of sidewalls 26, and a source contact region having a high impurity concentration. Then, a drain contact region and the like are formed, and an insulating film 27 and electrode wiring are formed to complete the semiconductor device.

  In another embodiment, the work function of the gate electrode in the p-type MOSFET portion after alloying is determined depending on, for example, the film thickness ratio between the first metal film and the second metal film. It can also be changed. For example, the work function of the gate electrode in the p-type MOSFET portion is closer to the work function of Pt as the film thickness of Pt is larger than that of Hf, and the work function of Hf is closer to the work function of Pt. become.

  Since the present invention can be implemented in many forms including the above-described embodiment, it will be exemplified below as an additional note.

(Appendix 1)
Forming a first metal film made of Hf on the gate insulating film;
introducing nitrogen into only the first metal film of the n-type MOSFET portion and then forming a second metal film made of Pt including the p-type MOSFET portion;
A method of manufacturing a semiconductor device, comprising a step of alloying the first metal film and the second metal film of the p-type MOSFET portion by heat treatment.

(Appendix 2)
When nitrogen is introduced into the first metal film of the n-type MOSFET portion, in order to suppress alloying of the first metal film and the second metal film, the lower limit in the amount of nitrogen introduced is 10 ²¹ cm. ^-3, and in order not to increase the work function of the first metal film, the upper limit in the amount of nitrogen to be introduced is set to 10 ²² cm ^-3 (Appendix 1) Manufacturing method.

(Appendix 3)
The first metal film formed on the gate insulating film is a metal whose work function is closer to the conduction band than the mid gap of silicon, and includes Mg, In, Zr, Nb, Al, Mn, Pb, Ta, and Ag. The second metal film selected and deposited on the first metal film is a metal whose work function is on the valence band side of the silicon midgap, and is Ru, Co, Au, Pd, Ni, Re, The method for manufacturing a semiconductor device according to (Appendix 1), wherein the semiconductor device is selected from Ir.

(Appendix 4)
By changing the film thickness of the first metal film that is Hf and the second metal film that is Pt, and by changing the type of the first metal film and the second metal film, The method of manufacturing a semiconductor device according to (Appendix 1), wherein the work function of the gate electrode of the p-type MOSFET portion is controlled.

(Appendix 5)
After the alloying of the first metal film and the second metal film in the p-type MOSFET portion is completed, the gates of the n-type MOSFET portion and the p-type MOSFET portion are formed to be flat and connected steplessly. A method of manufacturing a semiconductor device according to (Appendix 1), which is characterized.

(Appendix 6)
The method for manufacturing a semiconductor device according to (Appendix 1), wherein the first metal film made of Hf does not contain oxygen.

(Appendix 7)
The gate electrode in the n-type MOSFET portion is composed of a laminated film of a first metal film into which nitrogen is introduced and a second metal film that can be alloyed with the first metal film not containing nitrogen, and a p-type MOSFET The semiconductor device according to claim 1, wherein the gate electrode in the portion is made of a metal film made of an alloy of the metal of the first metal film and the metal of the second metal film.

It is a diagram showing the CV characteristic of an electrode. It is a diagram showing the depth direction analysis result of the Hf electrode which introduce | transduced nitrogen. It is a diagram showing the depth direction analysis result of the alloyed Hf-Pt electrode. FIG. 3 is a side view of a principal part of the semiconductor device at a process point for explaining Example 1; FIG. 3 is a side view of a principal part of the semiconductor device at a process point for explaining Example 1; FIG. 3 is a side view of a principal part of the semiconductor device at a process point for explaining Example 1; FIG. 3 is a side view of a principal part of the semiconductor device at a process point for explaining Example 1; FIG. 10 is a cutaway side view of a main part of a semiconductor device at a process point for explaining Example 2; FIG. 10 is a cutaway side view of a main part of a semiconductor device at a process point for explaining Example 2; FIG. 10 is a cutaway side view of a main part of a semiconductor device at a process point for explaining Example 2; FIG. 10 is a cutaway side view of a main part of a semiconductor device at a process point for explaining Example 2; FIG. 10 is a cutaway side view of a main part of a semiconductor device at a process point for explaining Example 2; FIG. 10 is a cutaway side view of a main part of a semiconductor device at a process point for explaining Example 2; It is a principal part cutting side view of the semiconductor device in the process important point for demonstrating a prior art example. It is a principal part cutting side view of the semiconductor device in the process important point for demonstrating a prior art example. It is a principal part cutting side view of the semiconductor device in the process important point for demonstrating a prior art example. It is a principal part cutting side view of the semiconductor device in the process important point for demonstrating a prior art example. It is a principal part cutting side view of the semiconductor device in the process important point for demonstrating a prior art example. It is a principal part cutting side view of the semiconductor device in the process important point for demonstrating a prior art example. It is a principal part cutting side view of the semiconductor device in the process important point for demonstrating a prior art example.

Explanation of symbols

11 Si semiconductor substrate 12 Side wall 13 Insulating film 14 Gate insulating film 15 Hf film (first metal film)
15N Nitrogen-containing Hf film 16 Resist film 17 Pt film (second metal film)

Claims (6)

As a process of forming the gate electrode,
Forming a first metal film on the gate insulating film;
After introducing nitrogen only the first metal film of n-type MOSFET section, and forming a second metal film including n-type MOSFET portion and a p-type MOSFET portion,
Ri Na and the first and second metal films of the p-type MOSFET portion by heat treatment includes a step of alloying,
The first metal film is a metal whose work function is closer to the conduction band than the silicon mid gap, and the second metal film is a metal whose work function is closer to the valence band than the silicon mid gap.
A method of manufacturing a semiconductor device. When nitrogen is introduced into the first metal film of the n-type MOSFET portion, in order to suppress alloying of the first metal film and the second metal film, the lower limit in the amount of nitrogen introduced is 10 ²¹ cm. ^2. The semiconductor device according to claim 1, wherein the upper limit of the amount of nitrogen to be introduced is set to 10 ²² cm ⁻³ so that the work function of the first metal film is not increased. Production method. The metal of the first metal film, Hf, Mg, In, Zr , Nb, Al, Mn, Pb, Ta, is selected from Ag, the metal of the second metal film, Pt, Ru, Co, Au 2. The method of manufacturing a semiconductor device according to claim 1, wherein the method is selected from Pd, Ni, Re, and Ir. By forming the first metal film from Hf, forming the second metal film from Pt, and changing the film thickness of the first metal film and the film thickness of the second metal film, 2. The method of manufacturing a semiconductor device according to claim 1, wherein work functions of the gate electrode of the n- type MOSFET portion and the gate electrode of the p-type MOSFET portion are controlled. By controlling the kind of the first metal film and the kind of the second metal film, the work function of the gate electrode of the n-type MOSFET portion and the gate electrode of the p-type MOSFET portion is controlled.
The method of manufacturing a semiconductor device according to claim 1. The gate electrode in the n-type MOSFET portion is composed of a laminated film of a first metal film into which nitrogen is introduced and a second metal film that can be alloyed with the first metal film not containing nitrogen, and a p-type MOSFET The gate electrode in the portion is made of a metal film composed of an alloy of the metal of the first metal film and the metal of the second metal film,
The first metal film is a metal whose work function is closer to the conduction band than the silicon mid gap, and the second metal film is a metal whose work function is closer to the valence band than the silicon mid gap.
A semiconductor device characterized by the above.

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