JP4571893B2 - Digital signal receiving apparatus and digital signal receiving program - Google Patents

Description

  The present invention relates to a digital signal receiving apparatus and a digital signal receiving program, and more particularly to a digital signal receiving apparatus and a digital signal receiving program for improving the reception characteristics of a digital signal.

  Conventionally, when transmitting a digital signal (stream), in order to prevent occurrence of an error due to transmission interference, a method of encoding and transmitting original information by error correction is often used. For example, in a transport stream (MPEG-2 TS) of the MPEG-2 (Moving Picture Experts Group-2) system standard, a Reed-Solomon code of 16 bytes, which is one of the block codes, is included in a 188-byte transport stream packet (TS packet). There is a method of adding a parity byte and transmitting it as a 204-byte code word.

  In addition, in order to improve the accuracy of reception, the receiving side receives multiple digital streams with the same content, compares each synchronized stream in units of blocks, and selects the correct block from it to improve reception characteristics. There is a technique to improve (for example, refer to Patent Document 1).

Furthermore, when all the corresponding blocks contain errors, a technique for improving reception characteristics by combining by majority decision on a bit basis and applying error correction decoding processing to the combined block can be considered. ing.
Japanese Patent Laid-Open No. 2005-12458

  By the way, in normal digital signal transmission, as described above, in order to prevent the occurrence of errors, the original information is error-correction-encoded in advance on the transmission side and transmitted, and the signal received by the receiver is error-correction-decoded. Thus, an accurate received signal is acquired.

  However, in digital signal transmission on a transmission path in a worse environment, an error that occurs may exceed the correction capability of the error correction code, and in this case, there is a possibility that correction is impossible.

  In order to solve this problem, a technique for improving the digital signal reception characteristics by receiving a plurality of digital streams on the receiving side as described above and selecting a correctly received block from each received stream is considered. However, if all stream blocks contain errors, an accurate stream cannot be obtained.

  Further, as described above, a technique is considered in which when a block of all streams includes an error, a majority decision is performed on a bit basis to improve reception characteristics. However, in order to make a majority decision, at least three or more streams must be received. Therefore, when there are two reception streams, the improvement effect cannot be obtained.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a digital signal receiving apparatus and a digital signal receiving program for improving digital signal reception characteristics.

  In order to solve the above problems, the present invention employs means for solving the problems having the following characteristics.

According to a first aspect of the present invention, there is provided a digital signal receiving apparatus for receiving a plurality of digital streams including an error correction code, selecting data from the plurality of received digital streams, and generating a series of digital streams. A stream synchronization unit that synchronizes the plurality of digital streams in units of blocks, an error detection unit that performs error detection and error correction decoding on the plurality of digital streams, and a plurality of blocks obtained by the error detection unit A block determination unit that determines whether or not error correction is possible, and a byte position having a different value for each of the plurality of identical blocks determined to be uncorrectable by the block determination unit, and the plurality of blocks at the byte position having a different value and byte selection section for synthesizing the block by selecting one of the values of the byte selector It has an error correction decoding unit for performing error correction decoding on the block more obtained, and a determining section for determining the necessity of byte selection by the byte selecting unit based on the decoding result obtained by the error correction decoding section The byte selection unit generates a byte composite block in which arbitrary k bytes of the byte positions of the N error possibility bytes having different values for each of the plurality of identical blocks are exchanged, and the error correction is performed. When error correction of the byte synthesis block by the decoding unit is impossible, a byte synthesis block obtained by replacing other k bytes among the byte positions having different values according to a byte selection instruction from the determination unit. Furthermore, the byte selection unit generates all combinations M = _N C in the search for k place replacements for the N error possibility bytes. _A search rate r _k (0 <r _k ≦ 1) is set as a ratio for performing a search in advance for the _k search numbers, and the number of replacements between the k bytes is the search rate r _k and the number of searches. When the number of [r _k · M] times set by M is reached, the k-place replacement search is terminated, and then the byte composite block is generated by setting k = k + 1 .

According to the first aspect of the present invention, it is possible to improve digital signal reception characteristics. Specifically, when a digital signal containing an error is received, it can be received correctly if at least one of the plurality of digital streams includes an accurate block, and even if there is an error in all the blocks, By combining and error correction decoding, a certain degree of error can be removed. In addition, since it is determined whether or not byte selection is necessary based on the decoding result of error correction decoding, it is possible to improve the reception characteristics of the digital signal with higher accuracy. Furthermore, when the number of times exceeds a preset number, the selection process in which the number of bytes is immediately increased is performed, so that the bytes can be selected more efficiently. Thereby, the reception characteristic of a digital signal can be improved quickly.

The invention described in claim 2 is characterized in that, when the byte selection unit selects a value of different bytes included in the block, the number of bytes to be selected is sequentially increased from a predetermined number of bytes.

According to the second aspect of the present invention, it is possible to efficiently select bytes. Thereby, the reception characteristic of a digital signal can be improved quickly.

The invention described in claim 3 is characterized in that the byte selection unit outputs the block as it is when the number of bytes having different values for each same block is equal to or larger than a preset number.

According to the third aspect of the present invention, it is possible to prevent useless time consumption and improve real-time performance.

According to a fourth aspect of the present invention, there is provided a digital signal receiving program for receiving a plurality of digital streams including an error correction code, selecting data from the plurality of received digital streams, and generating a series of digital streams. the computer, the stream synchronization synchronize the plurality of digital streams to the block unit processing, the plurality of error detection process for performing error detection and error correction decoding to the digital stream, each of a plurality of blocks obtained by the error detection processing A block determination process for determining whether error correction is possible, a byte position having a different value is detected for each of the plurality of identical blocks determined to be uncorrectable by the block determination process , Byte selection to synthesize a block by selecting any value Sense, the error correction decoding process for performing error correction decoding on the blocks obtained by the byte selection processing, and, determine the necessity of byte selection by the byte selection process on the basis of the decoding result obtained by the error correction decoding process In the byte selection process, a byte composite block obtained by exchanging arbitrary k bytes among the byte positions of N error possibility bytes having different values for each of the plurality of identical blocks. And when the error correction of the byte synthesis block by the error correction decoding process is impossible, according to the byte selection instruction from the determination process, the other k bytes among the byte positions having different values are Are generated, and the byte selection process further includes k locations for the N error possibility bytes. To search the number of all combinations M = _N C _k as in being re search, and sets a search rate _{r k (0 <r k ≦} 1) as a percentage of performing advance search, swapping bytes between the k point number, when it becomes to the search index has been set by the r _k and the search number M [r k _· M] times higher, and terminate the search of the k point replacement, as then k = k + 1, the A byte composite block is generated .

According to the fourth aspect of the invention, digital signal reception characteristics can be improved. In addition, since it is determined whether or not byte selection is necessary based on the decoding result of error correction decoding, it is possible to improve the reception characteristics of the digital signal with higher accuracy. In addition, when the number of times exceeds a preset number, the selection process in which the number of bytes is immediately increased is performed, so that the bytes can be selected more efficiently. Thereby, the reception characteristic of a digital signal can be improved quickly. Furthermore , digital signal reception processing can be easily realized by installing a program.

  According to the present invention, digital signal reception characteristics can be improved.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments in which a digital signal receiving apparatus and a digital signal receiving program according to the present invention are suitably implemented will be described in detail using the drawings. In the embodiment described below, as an example, in a digital signal receiving apparatus transmitted using a block error correction code, two digital streams are synchronized, and the contents of blocks of each input stream are compared and combined. An example of improving the reception characteristics by performing error correction decoding in the combined block will be described.

  FIG. 1 is a diagram illustrating an example of a schematic configuration of a receiving apparatus according to the present invention. The receiving apparatus 10 illustrated in FIG. 1 includes a stream synchronization unit 11, error detection units 12-1 and 12-2, a block determination unit 13, a byte selection unit 14, an error correction decoding unit 15, and a determination unit 16. , And a combining unit 17.

  First, the stream synchronization unit 11 inputs two digital streams 1 and 2 from the outside. The input digital streams 1 and 2 are a stream packet group encoded by a block error correction code. Here, an example of a stream packet will be described with reference to the drawings. FIG. 2 is a diagram illustrating a configuration example of an MPEG-2 TS packet. As shown in FIG. 2, in the MPEG-2 TS standard, for example, a parity of 16-byte Reed-Solomon code RS (204, 188) is added to 188-byte data and transmitted as a 204-byte packet. The packet size is not limited to that shown in FIG.

  Here, the two digital streams 1 and 2 input to the stream synchronizer 11 are streams having the same content, and are received via, for example, two different transmission paths.

  The stream synchronizer 11 receives two digital streams 1 and 2 and synchronizes the input digital streams in units of blocks. That is, the blocks having the same contents are synchronized. In addition, the stream synchronization unit 11 outputs the synchronized signal to each of the error detection units 12-1 and 12-2.

  The error detection units 12-1 and 12-2 perform error detection and error correction decoding for each block. For example, in the case of RS (204, 188), each block is each 204-byte packet.

  Further, the error detection units 12-1 and 12-2 output the error detection result and its block to the block determination unit 13. The block determination unit 13 outputs the block to the byte selection unit 14 when both of the two input blocks contain an error and error correction is impossible. In addition, when at least one of the two streams is error-correctable, the block determination unit outputs the input block to the combining unit 17 as a combined stream.

  The byte selection unit 14 searches for a correct byte in a predetermined byte unit for the input block, and as a result, synthesizes the block using the selected byte. A specific selection method in the byte selection unit 14 will be described later. The byte selection unit 14 combines the selected bytes and outputs the combined block to the error correction decoding unit 15.

  In addition, when the byte selection unit 14 is instructed to select a byte again by the determination unit 16 to be described later, the byte selection unit 14 selects a different combination of bytes as the entire block, and synthesizes the selected bytes. The synthesized block is output to the error correction decoding unit 15.

  The error correction decoding unit 15 performs error correction decoding on the input block, and outputs the decoded result to the determination unit 16. The determination unit 16 determines whether error correction decoding is possible. If the error correction decoding is possible, the determination unit 16 outputs the block to the synthesis unit 17. If error correction decoding is impossible, an instruction is sent to the byte selection unit 14 to select another byte, and iterative processing is performed until error correction decoding becomes possible.

  The combining unit 17 combines the blocks obtained from the determination unit 16 and the block determination unit 13 in the order of the transmitted original streams, and outputs the combined stream.

  Due to the functional configuration of the receiving device 10 described above, when a digital signal including an error is received, it can be correctly received if any one of the plurality of digital streams includes an accurate block, and all the blocks have errors. Even in a certain case, if a certain amount of error can be removed by block synthesis and error correction decoding, the reception specification of the digital signal can be improved.

<Byte selection unit 14: first byte selection method>
Next, a specific method of byte selection by the byte selection unit 14 will be described with reference to the drawings. FIG. 3 is a diagram for explaining a first byte selection method in the byte selection unit. In FIG. 3, first, values are compared in units of bytes in order from the top of two corresponding blocks, and bytes at different positions are recorded as bytes with a possibility of error. Next, a byte of any stream set in advance for each byte position is selected, and a block is generated by synthesizing the bytes.

  As for which stream the byte is selected from, when there are a plurality of positions having different values, at least one byte is selected from each of the streams 1 or 2. Information about which byte in the block is selected is stored in, for example, a memory provided in the byte selection unit 14.

  Thereby, the error correction decoding unit 15 performs error correction decoding on the block generated by setting the selected byte, and when error correction is possible, the block after error correction decoding is combined. Output as. If error correction by the error correction decoding unit 15 is impossible, the byte selecting unit 14 again uses a different combination of bytes in the total combination of the byte positions stored in the memory from the previous combination. Is selected, a synthesized block is generated using the selected byte, and the error correction decoding unit 15 performs decoding using the block.

  That is, when there are different bytes in a byte unit comparison among a plurality of received streams, a combination that can be corrected by repeating the same trial as described above by changing the combination is searched.

  Here, as the number of trials increases, the processing delay increases as the number of trials increases. Therefore, in cases where the processing delay cannot be tolerated, such as when the received stream is played back in real time, the number of trials is as low as possible. Search needs to be done.

  Next, a search method for reducing the number of trials will be described below as a second byte selection method.

<Byte selection unit 14: second byte selection method>
FIG. 4 is a diagram for explaining a second byte selection method in the byte selection unit. FIG. 4 is an example of an efficient search procedure of correctable combinations, and is a diagram illustrating a case where a stream error-corrected and encoded with RS (204, 188) code is received.

  The RS (204, 188) code shown in FIG. 4 is a block code capable of error correction up to 8 bytes out of 204 bytes. Therefore, a block in which error correction is impossible in the received stream includes an error of 9 bytes or more.

  Therefore, if two streams are received and there is a block that cannot be corrected for errors, the values are compared in byte units from the beginning of the block according to the procedure used in the first selection method described above. , The byte position having a different value is recorded as a byte position having a possibility of error. Next, block synthesis is performed by byte selection. In the second selection method, first, as shown in FIG. 4, any one byte among the byte positions where there is a possibility of error in two blocks is calculated. Two types of interchanged byte composite blocks are created. Error correction decoding is performed on these two combined blocks, and if either block can perform error correction, the corrected block is output as an accurate combined block.

  In addition, when error correction is impossible for both of the two bytes, two bytes obtained by exchanging one byte at a byte position where there is a possibility of an error different from the previous two blocks again. A composite block is generated, and error correction decoding is performed as described above to determine whether correction is possible.

  Thereafter, the same procedure is repeated to search for combinations that can be corrected.

  If the error in either block of the original two blocks is 9 bytes, error correction is possible if even one of the 9 bytes of error bytes is correct. As long as the error positions do not completely match, error correction can be performed by the above-described technique of exchanging one certain byte, and an accurate block can be obtained quickly.

  In addition, when both blocks contain errors of 10 bytes or more, it is not possible to correct errors only by replacing one byte. Therefore, if an accurate block is not obtained even if one byte is replaced, a block in which arbitrary two bytes are replaced is sequentially created, and the same trial is repeated. Further, when a combination that can correct an error is not found by exchanging bytes at two places, the same trial is repeated for exchanging bytes at three or more places, and a search is performed.

  As described above, by increasing the number of bytes to be sequentially replaced, an accurate composite block can be obtained with a small number of trials, and search efficiency can be improved.

  Here, for example, if there is a byte with the possibility of an error in N places when performing a search by exchanging bytes at one place, the search may be performed in order for all the byte positions in N places. If such a block has an error of 9 bytes, it is highly probable that an accurate block will be obtained at an early stage of trial unless the error positions match each other. For this reason, the search efficiency is further improved by proceeding to the next two byte replacement search without performing a subsequent search after performing a certain level of search.

Therefore, for example, the search rate r _k (0 <r _k ≦ 1) as the ratio of performing the search in advance for all the combinations M = _N C _k search numbers in the k-position replacement search for N error possibility bytes. ) May be set, and the k-place replacement search may be terminated when [r _k · M] searches are performed, and then the k + 1-place replacement search may be performed. Thus, it is possible to further improve the search efficiency (Note, _x C _y above indicates combination exhibits greatest integer [z] is not exceeding z.).

  In addition, if a number of inconsistent bytes are detected when the number of bytes with a possibility of error is found first by comparing the bytes from the beginning, search for a combination that can correct the error. May require a huge number of trials, or the correct combination may not be found.

  Therefore, an upper limit L is set in advance to the number N of bytes with a possibility of error, and when N> L, a block having an error is output as it is without searching. Thereby, search efficiency can be improved.

<Other embodiments>
In the above-described embodiment, the case where there are two input streams has been described. However, even if the number of streams to be combined is three or more, a combination of a digital signal by searching for a combination in the same manner as in the case of two streams. Can improve the reception characteristics. In this case, for example, when there are three input streams a, b, and c, the above-described byte selection may be performed on the streams a and b, and then the byte selection may be performed on the result and the stream c. Byte selection by majority vote may also be performed.

  Further, as shown in the above-mentioned Patent Document 1 (Japanese Patent Laid-Open No. 2005-12452), when all input blocks contain an error, synthesis is first performed by a majority decision in bit units, and then accurate. When a simple block cannot be obtained, the above-described embodiment can be applied to perform synthesis by byte selection. Thereby, the improvement effect can be further enhanced.

<Digital signal reception program>
Here, the receiving apparatus 10 according to the present invention can perform the digital signal (stream) receiving process according to the present invention using the dedicated apparatus configuration described above, but can cause a computer to execute the processing in each configuration. A digital signal reception process according to the present invention can be realized by generating an executable execution program and installing the program in, for example, a general-purpose personal computer or server.

<Hardware configuration>
Here, an example of a hardware configuration of a computer capable of executing digital signal reception processing according to the present invention will be described with reference to the drawings. FIG. 5 is a diagram illustrating an example of a hardware configuration capable of realizing the digital signal reception process according to the present invention.

  5 includes an input device 51, an output device 52, a drive device 53, an auxiliary storage device 54, a memory device 55, a CPU (Central Processing Unit) 56 for performing various controls, and a network connection device. 57 are connected to each other by a system bus B.

  The input device 51 has a pointing device such as a keyboard and a mouse operated by the user, and inputs various operation signals such as a program execution instruction from the user. The output device 52 has a display (monitor) that displays various windows and data necessary for operating the computer main body for performing the processing in the present invention, and the execution progress and results are displayed by the control program of the CPU 56. Can be displayed.

  Here, in the present invention, the execution program installed in the computer main body is provided by, for example, a recording medium 58 such as a CD-ROM. The recording medium 58 on which the program is recorded can be set in the drive device 53, and the execution program included in the recording medium 58 is installed in the auxiliary storage device 54 from the recording medium 58 via the drive device 53.

  Further, the drive device 53 can record the execution program according to the present invention in the recording medium 58. Thereby, using the recording medium 58, it can be easily installed in a plurality of other computers, and digital signal reception processing can be easily realized.

  The auxiliary storage device 54 is a storage means such as a hard disk, and can store an execution program according to the present invention, a control program provided in a computer, etc., and perform input / output as necessary. In addition, the memory device 55 can be used as a storage unit that stores information on which byte is selected from which stream in the byte selection unit 14 described above.

  Based on a control program such as an OS (Operating System) and an execution program read and stored by the memory device 55, the CPU 56 performs various operations and input / output of data with each hardware component, etc. Each process in the digital signal receiving process can be realized by controlling the process. Various information necessary during the execution of the program can be acquired from the auxiliary storage device 54 and stored.

  The network connection device 57 is obtained by acquiring an execution program from another terminal connected to the communication network or executing the program by connecting to a communication network such as a telephone line or a LAN cable. The execution result or the execution program in the present invention can be provided to another terminal or the like.

  With the hardware configuration as described above, it is possible to realize digital signal reception processing at a low cost without requiring a special device configuration. Also, digital signal reception processing can be easily realized by installing a program.

<First Digital Signal Reception Processing Procedure>
Next, a digital signal reception processing procedure using an execution program (digital signal reception program) according to the present invention will be described with reference to a flowchart. FIG. 6 is a flowchart illustrating an example of a first digital signal reception processing procedure.

  First, a plurality of digital streams are input (S01), and the input stream signals are synchronized (S22). At this time, the plurality of streams are streams having the same content, for example, two streams received via two different transmission paths.

  Next, at least one block included in each stream is subjected to error detection and error correction decoding for each block (S03), and whether or not there is an error in the same block of all the streams among the plurality of streams. Judgment is made (S04). If an error is detected in the same block in all streams (YES in S04), the corresponding block is subjected to a synthesis process by byte selection (S05). A specific description of the composition processing by byte selection in S05 will be described later. If there is an error-free block in at least one stream (NO in S04), the error-free block is selected (S06).

  After the process of S05 or S06 is completed, the obtained block is output (S07). According to the above-described processing procedure, when a digital signal including an error is received, if at least one of the plurality of digital streams includes a correct block, it can be received correctly. Even if all blocks have errors, some errors can be removed by combining blocks and error correction decoding. Thereby, the reception characteristic of a digital signal can be improved. Also, digital signal reception processing can be easily realized by installing a program.

<Byte selection processing procedure: S05>
Next, the above-described byte selection processing procedure will be described using a flowchart. FIG. 7 is a flowchart illustrating an example of a byte selection processing procedure.

  First, a byte having a different value is searched for among blocks synchronized with respect to a plurality of stream inputs (S11). Next, the value of any block is selected for a byte having a different value (S12). Here, the selection method may be changed so that an arbitrary number of values are changed for a plurality of different values as described above, and one byte at a time from the beginning of the block, starting with the portion with the different values. It may be changed. Furthermore, if error correction is impossible even if all the different 1-byte values are changed, the number of bytes is increased by 1 byte, and the process may be repeated until error correction is correctly performed. Good.

  Next, error correction decoding is performed on the selected block (S13), and it is determined whether error correction is possible (S14). If error correction is possible (YES in S14), the corrected block is set as a composite block (S15). If error correction is not possible (NO in S14), a different byte from the combination so far is selected (S16), and the process returns to S13 for subsequent processing.

  Thereby, the reception characteristic of a digital signal can be improved by generating a combined stream. In addition, since error correction decoding is attempted by selecting each byte sequentially and the accuracy of the block is judged, those with few errors can obtain an accurate composite block with fewer trials, improving search efficiency. Can be made.

<Second Digital Signal Reception Processing Procedure>
Next, an example of a second digital signal reception processing procedure for improving the improvement effect by performing synthesis based on the majority decision in bit units will be described using a flowchart. FIG. 8 is a flowchart illustrating an example of a second digital signal reception processing procedure.

  First, a plurality of digital streams are input (S21), and the input stream signals are synchronized (S22). The plurality of streams are streams having the same content, for example, those received via different transmission paths.

Next, at least one block included in each stream is subjected to error detection and error correction decoding for each block (S23), and whether or not there is an error in the same block of all the streams among the plurality of streams. Judgment is made (S24). When an error is detected in the same block of all streams (YES in S24),
Combining is performed by bit-wise majority decision (S25). It should be noted that at least 3 or more blocks are required for the majority decision in bit units. An odd number of blocks is preferable. If the majority vote is the same, either one of the preset values is used.

  Next, error correction decoding is performed on the combined stream (S26), and it is determined whether or not error correction is possible (S27). If error correction is possible (YES in S27), the corrected block is set as a composite block (S28). If error correction is impossible (NO in S27), byte selection processing as shown in FIG. 7 is performed (S29).

  In addition, in the process of S24, when there is an error-free block (NO in S24), an error-free block is selected (S30). Next, after the process of S28, S29, or S30 is completed, the obtained block is output (S31).

  The reception characteristics can be improved by the processing described above. Furthermore, if all input blocks contain an error, synthesis is first performed by bit-wise majority decision, and synthesis is performed by byte selection according to the present invention when an accurate block cannot be obtained even by this processing. Thus, the improvement effect can be improved. Also, digital signal reception processing can be easily realized by installing a program.

  As described above, according to the present invention, reception characteristics can be improved. Specifically, when a plurality of digital streams having the same contents are received, the received streams are synchronized in units of blocks, and reception characteristics are improved by packet synthesis, no error is included in any stream block. If there is an error, select it, and if all blocks contain errors, compare each block from the beginning to the byte unit, and select the byte with a different value as the byte that may contain the error. The reception characteristics are improved by selecting a byte of any stream for every byte that may contain, and combining those blocks to search for a combination that enables error correction.

  As a result, even when the number of received streams is two, the reception characteristics can be improved by combining blocks. Further, the reception characteristics of the digital signal are further improved by synthesizing again by the above-described byte selection method with respect to the block in which the number of received streams is 3 or more and the improvement effect is not obtained by the bit-based majority decision. be able to.

  Although the preferred embodiment of the present invention has been described in detail above, the present invention is not limited to the specific embodiment, and various modifications, within the scope of the gist of the present invention described in the claims, It can be changed.

It is a figure which shows an example of schematic structure of the receiver in this invention. It is a figure which shows the example of 1 structure of an MPEG-2 TS packet. It is a figure for demonstrating the 1st byte selection method in a byte selection part. It is a figure for demonstrating the 2nd byte selection method in a byte selection part. It is a figure which shows an example of the hardware constitutions which can implement | achieve the digital signal reception process in this invention. It is a flowchart which shows an example of the 1st digital signal reception processing procedure. It is a flowchart which shows an example of a byte selection process sequence. It is a flowchart which shows an example of the 2nd digital signal reception processing procedure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Receiving device 11 Stream synchronization part 12 Error detection part 13 Block determination part 14 Byte selection part 15 Error correction decoding part 16 Judgment part 17 Synthesis | combination part 51 Input device 52 Output device 53 Drive apparatus 54 Auxiliary storage device 55 Memory device 56 CPU
57 Network connection device 58 Recording medium

Claims (4)

In a digital signal receiving apparatus for receiving a plurality of digital streams including an error correction code and selecting data from the received plurality of digital streams to generate a series of digital streams,
A stream synchronization unit that synchronizes the plurality of digital streams in units of blocks;
An error detection unit that performs error detection and error correction decoding on the plurality of digital streams;
A block determination unit that determines whether error correction is possible for each of a plurality of blocks obtained by the error detection unit;
A byte position having a different value is detected for each of the plurality of identical blocks determined to be uncorrectable by the block determination unit, and a block is selected by selecting any one of the plurality of blocks at the byte position having the different value. A byte selector to synthesize,
An error correction decoding unit that performs error correction decoding on the block obtained by the byte selection unit;
A determination unit that determines whether or not byte selection is required by the byte selection unit based on a decoding result obtained by the error correction decoding unit ;
The byte selection unit
A byte synthesis block is generated by exchanging bytes at arbitrary k places among byte positions of N error possibility bytes having different values for each of the plurality of identical blocks, and the byte synthesis block by the error correction decoding unit When the error correction is impossible, a byte synthesis block is generated by exchanging other k bytes among the byte positions having different values according to a byte selection instruction from the determination unit,
Further, the byte selection unit
A search rate r _k (0 <r _k ≦ 1) is set as a ratio of searching in advance for all the combinations M = _N C _k search numbers in the search of k place replacement for the N error possibility bytes. And
Swapping the number of bytes to each other of the k point is, when it becomes and the search rate r _k the set by a search number of M and [r k _· M] or more times, completed the search of the k point replacement, Next , the digital signal receiving apparatus is characterized in that k = k + 1 is used to generate the byte synthesis block . The byte selection unit
It said choosing different values for bytes contained in the block, the digital signal receiving apparatus according to claim 1, characterized in that sequentially increasing the number of bytes to be selected from a predetermined number of bytes. The byte selection unit
3. The digital signal receiving apparatus according to claim 1, wherein when the number of bytes having different values for each same block is equal to or greater than a preset number, the block is output as it is. In a digital signal receiving program for receiving a plurality of digital streams including an error correction code and selecting data from the received plurality of digital streams to generate a series of digital streams,
On the computer,
Stream synchronization processing for synchronizing the plurality of digital streams in units of blocks ;
An error detection process for performing error detection and error correction decoding on the plurality of digital streams ;
A block determination process for determining whether error correction is possible for each of a plurality of blocks obtained by the error detection process ;
A byte position having a different value is detected for each of a plurality of identical blocks that are determined to be uncorrectable by the block determination process, and a block is synthesized by selecting one of the plurality of blocks at the different byte position. Byte selection processing ,
An error correction decoding process for performing error correction decoding on the block obtained by the byte selection process; and
Based on a decoding result obtained by the error correction decoding process, a determination process for determining whether or not byte selection by the byte selection process is necessary is executed,
The byte selection process is:
A byte composite block is generated by replacing arbitrary k bytes among the byte positions of N error possibility bytes having different values for each of the plurality of identical blocks, and the byte composite block by the error correction decoding process is generated. When the error correction is impossible, a byte synthesis block is generated by replacing other k bytes among the byte positions having different values according to the byte selection instruction from the determination process, and further In the selection process, the search rate r _k (0 <r _k ≦) is set as a ratio of performing a search in advance for all the combinations M = _N C _k search numbers in the k-position replacement search for the N error possibility bytes. 1) set the said replacement number of bytes between the k point is, the search index r _k the set by a search number M and [r k _· M] times more and When Tsu to terminate the search of the k point replacement, as then k = k + 1, the digital signal receiving program and generates the byte building block.

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