JP4520498B2 - Liquid crystal display - Google Patents

Description

  The present invention relates to a liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes, and in particular, a liquid crystal having negative dielectric anisotropy is used, and the liquid crystal is formed by a structure or slit provided on the substrate. The main object is a liquid crystal display device for controlling the orientation.

  Among flat panel displays, a liquid crystal display (LCD) is currently most widely used. In addition to personal computers (PCs), word processors, office automation equipment, and mobile phones, recently there are expectations for applications such as large screen TVs or products that combine PC and TV, such as AV personal computers. In addition, the display quality of the LCD has made remarkable progress in recent years, and the contrast and color reproduction at the front have reached the same level as or higher than those of the CRT. In particular, it has sufficient specifications as a PC monitor. .

LCDs are excellent in contrast and color reproduction in the front, but still have great problems with respect to viewing angle and moving image performance (response characteristics).
Therefore, from the viewpoint of improving the viewing angle characteristics of the liquid crystal display, a so-called MVA (Multi-domain Vertical Alignment) type liquid crystal display mode has attracted attention. The MVA method is a method of performing alignment division of vertically aligned liquid crystal using structures and slits provided on a substrate. Specifically, by arranging strip-shaped structures or electrode openings (slits) alternately on the upper and lower substrate surfaces, liquid crystal domains whose alignment directions differ by approximately 180 ° with the structures and slits as boundaries are formed. Achieve alignment division. This MVA method has greatly improved the viewing angle characteristics of the liquid crystal display device.

  The MVA system is regarded as a representative of the high-quality liquid crystal mode because of the wide viewing angle, and actually satisfies almost the performance required for a PC monitor. However, when considering application to TV and AV PCs, there is a problem that the halftone response from black to dark gray is slow.

  In the MVA method, the liquid crystal is vertically aligned when no voltage is applied. Therefore, the rotation speed of the liquid crystal becomes very slow at the beginning of tilting (during black to low gradation). This delay in response speed at low gradation is a problem related to the basic configuration of the MVA system and is a fateful defect.

  Therefore, the present invention has been made in view of the above problems, and improves the delay in response speed at low gradations, enables high-speed halftone response, and can be used without a sense of incompatibility even when compared with a CRT. An object of the present invention is to provide a liquid crystal display device that realizes a highly reliable image display.

  As a result of intensive studies, the present inventor has conceived the following aspects of the invention.

A first liquid crystal display device according to the present invention is an MVA liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes, and is provided on one of the substrates as the electrode. drive electrodes and the capacitor electrodes provided for coupling the drive electrode and the capacitor located in the lower layer of the drive electrodes, the display pixel is divided into two regions having different capacitance and threshold depending on the presence or absence of the driving electrodes, at least Among the two regions, bank-like projections for adjusting the orientation of the liquid crystal layer and causing the pretilt angle of the liquid crystal molecules are provided in a region having a low threshold, and each region is electrostatically charged when a driving voltage is applied. An applied voltage corresponding to the capacitance is applied, respectively, and a response speed in a low threshold area of the two areas is faster than a response speed in a high threshold area .
A second liquid crystal display device according to the present invention is an MVA type liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes, and driving electrodes provided as the electrodes of one of the substrates. A capacitor electrode capacitively coupled to the drive electrode is provided in a predetermined region in the lower layer of the display, and the display pixel is divided into two regions having different capacitances and thresholds depending on the presence or absence of the capacitor electrode, and at least the two Among the regions, bank-like projections for adjusting the orientation of the liquid crystal layer and causing a pretilt angle of liquid crystal molecules are provided in a region having a low threshold, and each region corresponds to a capacitance when a driving voltage is applied. Each of the applied voltages is applied, and the response speed in the low threshold area of the two areas is faster than the response speed in the high threshold area.

  According to the present invention, it is possible to improve the delay of the response speed in the low gradation and to increase the halftone response, and to realize a highly reliable image display having a moving image performance almost equivalent to that of the CRT.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments to which the present invention is applied will be described in detail with reference to the drawings.

(First embodiment)
First, a first embodiment of the present invention will be described.
In this embodiment, an MVA liquid crystal display device is illustrated.

-Schematic configuration of liquid crystal display device-
FIG. 1 is a cross-sectional view showing a schematic main configuration of a liquid crystal display device of the present invention.
This liquid crystal display device includes a pair of transparent glass substrates 1 and 2 facing each other at a predetermined interval, and a liquid crystal layer 3 sandwiched between the transparent glass substrates.

  A plurality of ITO pixel electrodes 5 are formed on one transparent glass substrate 1 via an insulating layer 4, and a transparent liquid crystal alignment film 6 a is formed so as to cover the ITO pixel electrodes 5. On the substrate 2, a color filter 7, an ITO common electrode 8, and a liquid crystal alignment film 6b are sequentially stacked. Then, the liquid crystal alignment films (vertical alignment films) 6a and 6b are abutted so as to sandwich the liquid crystal layer 3, and the glass substrates 1 and 2 are fixed. Polarizers 9 and 10 are provided outside the substrates 1 and 2, respectively. It is done. The ITO pixel electrode 5 is formed together with an active matrix, and in the illustrated example, a data bus line 11 of the active matrix is shown. Note that the electrode may be provided only on one of the substrates (for example, in the IPS mode).

  The liquid crystal layer 3 is made of a liquid crystal having a negative dielectric anisotropy. The liquid crystal molecules are aligned substantially vertically when no voltage is applied, and the liquid crystal molecules are aligned substantially horizontally when a predetermined voltage is applied. Aligned Mode).

-Principle description of this embodiment-
In the present embodiment, regions having different threshold voltages, that is, a low threshold region and a high threshold region are formed in the display pixel, and a desired gradation display is performed by adjusting the threshold voltage so as to respond quickly in the low threshold region. The characteristic, that is, the response speed is averaged at each gradation and controlled so as to be constant.

FIG. 2 is a characteristic diagram showing the relationship between transmittance and response time for explaining the principle of the present embodiment.
In the VA mode liquid crystal display device, since the liquid crystal is aligned substantially vertically when no voltage is applied, a delay in response speed in a low gradation occurs essentially as indicated by the solid line I. Ideally, for example, assuming a screen in which the gradation bar moves as shown in FIG. 3, there is no afterimage due to movement, and the shape of the moving object is displayed correctly, that is, the solid line II shown as the ideal state in FIG. Thus, the response speed may be constant regardless of the gradation.

  However, even if the overall response speed is improved over all gradations by a general method such as reducing the cell thickness, the solid line I and the broken line I are represented by the essential structure of the VA mode. The response time is shortened as a whole with almost the same shape. Similarly, the response speed is slower than the high gradation in the low gradation, and it is impossible to obtain the response speed independent of the gradation as in the solid line II. (At low gradation, response is slower than at high gradation.)

In the present embodiment, for the purpose of improving the response speed of low gradation, the following points are the basic points.
(1) The lighting area of the display pixel is changed according to the gradation to be displayed (a brighter area is turned on and a darker area is turned on in a darker display).
(2) When a certain gradation is displayed, the operation of the area operating at a lower gradation and the operation of the additionally lit area are averaged.

  In other words, the display area is divided into a low threshold area and a high threshold area, and the response speed is increased in the low threshold area (partial response). Thus, the response speed is improved only in the low threshold region, and an almost average response speed close to the ideal solid line II as a whole can be obtained. Actually, the moving image display performance of the VA liquid crystal can be greatly improved by suppressing the maximum difference in response time between gradations within about 1.5 to 3 times.

-Specific examples-
Hereinafter, specific embodiments for realizing the partial response will be described based on the partial response principle described above.

[Example 1]
FIG. 4 is a schematic diagram illustrating a main configuration of the liquid crystal display device according to the first embodiment. Here, (a) is a plan view and (b) is a cross-sectional view.
In this example, as shown in the drawing, fine electrode patterns 21 that are patterned in a symmetrical fine comb-teeth shape centered on a belt-like portion are formed on the pixel electrode 5 of the transparent glass substrate 1 at equal intervals. A strip-shaped dielectric layer 22 is formed in the display pixel at equal intervals so as to cover the fine electrode pattern 21 on the electrode 5. Although not shown, an alignment film 6 a is formed so as to cover these dielectric layers 22. Due to the presence of the dielectric layer 22 and the fine electrode pattern 21 that complements the dielectric layer 22, the formation site becomes the high threshold region 23, and the low threshold region 24 where the dielectric layer 22 does not exist is formed. With this structure, since the threshold value is lower in the low threshold region 24 where the dielectric layer 22 does not exist at low gradations, only the low threshold region 24 operates and the partial response is realized.

  In realizing the partial response, first, the operation was confirmed with the structure of FIG. A dielectric layer 22 (Photoresist S1808 manufactured by Shipley Co., Ltd.) having a thickness of about 0.5 μm was partially provided on the fine electrode pattern 21. In the region where the dielectric layer 22 is present, the threshold voltage is high, and in the region where the dielectric layer 22 is not present, the operation is performed at the normal threshold.

FIG. 5 is a photomicrograph showing the liquid crystal alignment state in the structure of Example 1.
It can be seen that only the non-dielectric region operates when a voltage of 3.0 V is applied, and the partial response is realized (FIG. 5A). At 3.5 to 4.0 V, the non-dielectric portion and the non-fine slit portion (the portion where the fine electrode pattern 21 does not exist) operate, and do not operate in the region on the fine electrode pattern 21 (FIG. 5B, ( c)). The whole operates only when 5 V or more is applied (FIGS. 5D to 5F).

FIG. 6 is a characteristic diagram showing the result of examining the dependence of the partial response effect and the dielectric film thickness, and FIG. 7 is a micrograph showing the relationship between the dielectric film thickness and the partial response when 3.0 V is applied.
As shown in FIGS. 7A to 7C, the film thickness of the dielectric layer 22 needs to be 0.5 μm or more in order to obtain an effect with a certain degree of stability. When the film thickness is 0.5 μm, the response between 0% → 2.5% gradation is improved to 38 ms (180 ms for the conventional MVA method), and 0.7 μm, the response is improved to 30 ms. The response between black and white (0% → 100% gradation) was about 15 ms for each film thickness condition (15 ms for the conventional MVA method). Although the partial response does not contribute to the improvement of the high gradation response, it can be confirmed that the effect of improving the low gradation response is very large, that is, an effective means for averaging the responses between gradations.

[Example 2]
8A and 8B are schematic views showing the main configuration of the liquid crystal display device of Example 2, wherein FIG. 8A is a plan view and FIG. 8B is a cross-sectional view.
In the first embodiment, the case where the dielectric layer 22 is provided on the pixel electrode 5 in which the slits 21 are formed in the transparent glass substrate 1 has been described. However, in this example, in order to reduce the process burden, a fine electrode pattern is provided. 21 is omitted, and a structure in which the dielectric layer 22 is provided on the pixel electrode 5 in which only the band-like slit 25 having a width of about 10 μm is formed is produced. As in the first embodiment, the effect of partial response and the dielectric film thickness are obtained. The dependence of was investigated.

FIG. 9 is a photomicrograph showing the liquid crystal alignment state in the structure of Example 2.
As shown in the figure, a partial response was observed when the orientation was observed when a voltage of 3.0 V was applied. However, when carefully observed, it was found that the liquid crystal in the non-dielectric region also works finely. This is presumably because the voltage applied to the liquid crystal layer 3 was slightly increased due to the absence of the fine electrode pattern 21 and only the strip slit 25.

[Example 3]
10A and 10B are schematic views showing the main configuration of the liquid crystal display device of Example 3, wherein FIG. 10A is a plan view and FIG. 10B is a cross-sectional view.
In this example, in addition to the structure of Example 1, a structure is provided in which a band-like bank-shaped protrusion 26 made of a dielectric material is provided on a portion of the transparent glass substrate 2 corresponding to the non-dielectric region of the transparent glass substrate 1. As in Example 1, the effect of the partial response and the dependence on the dielectric film thickness were examined.

FIG. 11 is a photomicrograph showing the liquid crystal alignment state in the structure of Example 3.
In this example, as in Example 1, a partial response was realized with an applied voltage of 3.0 V or less. The transmittance was 19% at 5.4 V in a single cell experiment (21% in the conventional MVA system). In this case, the loss is within 10%, which is considered to be because the threshold value of the dielectric region is increased and the transmittance saturation point is shifted to the high voltage side.

[Comparison study of Examples 1-3]
When Examples 1 and 2 were compared, as shown in FIG. 12, in Example 1, an excellent response speed with a low gradation was obtained compared to Example 2. This is probably because the partial response effect was weaker in the case of the second embodiment than in the first embodiment, and thus the low gradation response improvement effect was also reduced. Therefore, in the structure of Example 2, it is necessary to form a thicker dielectric layer in order to obtain a sufficient effect.

  When Examples 1 and 3 are compared, as shown in FIG. 13, the response speed of the low gradation is inferior to Example 1 in Example 3, but 0% → 2.5% in Example 3 as well. An excellent response time of 55 ms was obtained between the gray levels (180 ms for the conventional MVA method).

FIG. 15 is a response characteristic diagram in which the width of the non-dielectric region is unified to about 5 μm in the structures of Examples 1 and 3, and the horizontal axis represents voltage instead of gradation.
Thus, if the width of the opening is the same, both structures show almost the same response characteristics when compared on the basis of voltage (in FIG. 13, with the horizontal axis as the gray scale, Example 1 is better). The response speed is fast.) This is considered that the difference in the TV characteristics affects the low gradation operation, and the first embodiment shows a higher speed low gradation operation.

FIG. 15 is a characteristic diagram showing the relationship between voltage and transmittance in the structures of the first and third embodiments.
As shown in the figure, it can be seen that the characteristic curve is depressed in the first embodiment compared to the third embodiment. That is, a higher voltage is required to display the same tone. It can be seen that the voltage required for displaying the low gradation is higher in the first embodiment. This is the reason why Example 1 can achieve higher speed than Example 3.

  The present invention also provides a breakthrough in panel design. For example, it is assumed that a response with a gradation of about 30% is most noticeable to the naked eye, but if the response time at that gradation is suppressed to 20 ms or less, it becomes clear that the response is not concerned. Even if it was found out in the prior art, it was impossible to change the TV characteristics accordingly. On the other hand, in the present invention, the TV characteristics can be freely controlled by changing the area ratio between the dielectric region and the non-dielectric region. Specifically, the voltage required to achieve 20 ms in FIG. 15 is 4V, and it is sufficient to realize a TV characteristic in which gradation of 30% is displayed when 4V is applied in FIG. This can be easily realized simply by changing the area ratio or the design conditions such as the thickness of the dielectric layer and the dielectric constant.

[Example 4]
FIG. 16 is a schematic cross-sectional view showing the main configuration of the liquid crystal display device of Example 4.
In the structure of this example, ultraviolet rays are partially irradiated on the surface of the liquid crystal alignment film 6a on the transparent glass substrate 1 side to form regions having different threshold voltages, that is, a high threshold region 31 and a low threshold region 32 relative thereto. Has been. In this case, the high threshold region 31 that is an unirradiated region operates with a normal threshold, but the threshold voltage shifts to the low voltage side in the low threshold region 32 that is an irradiated region, and only the irradiated region is lit at a low voltage. Thus, the partial response is realized.

In this example, first, it was examined whether or not the threshold (TV) characteristics can be changed by ultraviolet rays.
The experimental cell irradiates the surface of the liquid crystal alignment film 6a (vertical alignment film: made by JSR) provided on one transparent glass substrate 1 having the ITO pixel electrode 5 with slits with ultraviolet rays, and the substrate and the bank. The liquid crystal layer 3 is formed by bonding the other transparent glass substrate 2 having the ITO common electrode 8 on which the protrusions 26 are formed and injecting a liquid crystal having a negative dielectric anisotropy (made by Merck). It will be. The cell thickness was 4 μm. In this example, two types of ultraviolet light sources, a parallel light source (UV irradiation device manufactured by USHIO) and a non-parallel light source (UV irradiation device manufactured by ORC) were used, and the relationship between voltage and transmittance was examined by changing the irradiation energy. It was.

The former result is shown in FIG. 17 (a), and the latter result is shown in FIG. 17 (b).
Thus, it was found that the threshold value can be changed by irradiating the surface of the liquid crystal alignment film 6a with ultraviolet rays.

  Subsequently, in the structure of this example, in order to investigate the realization of partial response by locally irradiating the surface of the liquid crystal alignment film with ultraviolet rays, the irradiation amount of the ultraviolet light source is changed, the relationship between the voltage and the transmittance, and The relationship between transmittance and response time was examined respectively.

The former result is shown in FIG. 18 (a), and the latter result is shown in FIG. 18 (b).
As shown in the figure, it was confirmed that the threshold value was slightly shifted to the low voltage side at an irradiation dose of 4500 mJ / cm ² . Similarly, with respect to the response characteristics, the maximum response time was shortened from 105 ms to 75 ms as compared with the case of no UV irradiation due to the irradiation amount of 4500 mJ / cm ² , and the improvement of the low gradation operation was confirmed.

[Example 5]
In this example, the liquid crystal alignment film 6a provided on one transparent glass substrate 1 having the ITO pixel electrode 5 having slits and the other transparent glass substrate 2 having the ITO common electrode 8 having bank-like projections 26 formed thereon are provided. The threshold value (vertical alignment component) was changed by changing the irradiation amount of ultraviolet rays between the provided liquid crystal alignment film 6b.

  Specifically, the other transparent glass substrate 2 has a vertical alignment film (made by JSR) having a vertical alignment component of 25% as a liquid crystal alignment film 6b, and one transparent glass substrate 1 has a vertical alignment component 5 as a liquid crystal alignment film 6a. A vertical alignment film reduced to% was provided. In the latter vertical alignment film having a low vertical alignment property, a state in which it is more easily tilted can be obtained by applying a voltage, so FIG. 19 (a) shows the relationship between voltage and response time, and (b) shows transmittance and response time. The threshold could be greatly reduced as shown in FIG. In addition, the response characteristic of the low gradation was shortened from 95 ms to 55 ms as compared with the case where the vertical alignment component was not adjusted (decrease adjustment) with the maximum response time, and an improvement superior to that in the case of Example 4 was confirmed. .

[Example 6]
In this example, a liquid crystal alignment film is formed on one transparent glass substrate 1 having an ITO pixel electrode 5 in which a strip-like slit 25 is formed and on the other transparent glass substrate 2 having an ITO common electrode 8 in which a bank-like protrusion 26 is formed. The same vertical alignment film (made by JSR) was provided as 6a and 6b, and only the vertical alignment film of the other transparent glass substrate 2 was irradiated with ultraviolet rays at 3000 mJ / cm ² by a non-parallel light source (ORC UV irradiation device). As a result, similar to Example 4, the response characteristic of low gradation was shortened from 95 ms to 60 ms with the maximum response time, and an excellent improvement was confirmed.

[Example 7]
FIG. 20 is a schematic cross-sectional view illustrating the main configuration of the liquid crystal display device according to the seventh embodiment.
In this example, the display pixel is divided into two regions 31 and 32 having different distances between the electrodes (ITO pixel electrode 5 and ITO common electrode 8) of the transparent glass substrates 1 and 2 which face each other, and the difference in the distances. The dielectric layer 33 is provided on the ITO pixel electrode 5 of the transparent glass substrate 1 so as to fill the grooves in the region 31, and the dielectric layer 33 and the insulating layer 34 such as SiO ₂ are provided. As a result, a substantially flat surface is formed. As the dielectric layer 33, it is preferable to use a highly transparent photoresist (for example, JSR PC-335 positive photoresist). Further, a bank-like protrusion 35 is formed on the region 32, that is, on the ITO pixel electrode 5 through the insulating layer 34 of the transparent glass substrate 1, and a bank-like shape is formed on the portion of the transparent glass substrate 2 facing the region 31 on the ITO common electrode 8. Each protrusion 36 is provided.

  A liquid crystal alignment film 6a is formed on the transparent glass substrate 1 side so as to cover the flat surface and the bank-like projections 35, and the transparent glass substrate 2 side is covered with the ITO common electrode 8 and the bank-like projections 36. A liquid crystal alignment film 6b is formed on the substrate, and the liquid crystal layer 3 is sandwiched between the substrates 1 and 2 to constitute a liquid crystal display device.

  In the liquid crystal display device of this example, due to the difference in dielectric constant between the dielectric layer 33 and the insulating layer 34, the region 31 becomes a high threshold region and the region 32 becomes a low threshold region. The partial response is realized by operating and shortening the response time. In addition, the presence of the bank-like projections 35 and 36 causes a pretilt of liquid crystal molecules, and the alignment of the liquid crystal can be stabilized in a short time, thereby improving the response characteristics. Further, in this example, the flat surface is formed by the dielectric layer 33 and the insulating layer 34, and thereby the thickness of the liquid crystal layer 3 is made substantially uniform, so that the transmittance and visual characteristics can be improved.

[Example 8]
FIG. 21 is a schematic cross-sectional view showing the main configuration of the liquid crystal display device according to the eighth embodiment.
This example is a modification of the seventh embodiment, and the pitch of the regions 31 and 32 in the structure described in FIG. 20 is changed (finely divided) so that the bank-like protrusions 36 on the transparent glass substrate 2 side are the transparent glass substrate 1 side. The liquid crystal display device is configured to face the region 31 (insulating layer 34).

  In this case, a strong voltage is applied only to the vicinity of the bank-like projections 35 and 36. Since the liquid crystal has a pretilt in the vicinity of the bank-like protrusions 35 and 36, the liquid crystal alignment is easily changed at a low voltage. Therefore, with this structure, it is possible to increase the voltage in the vicinity of the bank-like projections 35 and 36 to assist the movement of the liquid crystal in the vicinity.

[Example 9]
FIG. 22 is a schematic cross-sectional view illustrating the main configuration of the liquid crystal display device according to the ninth embodiment.
This example is a modification of the seventh embodiment, and instead of the bank-like projections 35 and 36, strip-like slits 37 and 38 are provided at portions corresponding to the bank-like projections 35 and 36 of the ITO pixel electrode 5 and the ITO common electrode 8, respectively. Is formed. As a result, the partial response can be realized by shortening the response time, and in the same manner as when the bank-like projections 35 and 36 are provided, the pretilt of the liquid crystal is induced and the alignment of the liquid crystal is stabilized in a short time. Yes, and helps improve response characteristics. It is also possible to mix bank-like protrusions and electrode slits.

  In this example, instead of the band-shaped slits, the fine slits 39 patterned in a symmetrical left and right fine comb-teeth centered on the band-shaped part as shown in FIG. 23 are formed on the ITO pixel electrode 5 (ITO common electrode 8). It is also suitable to form. Thereby, the partial response can be further emphasized.

[Example 10]
FIG. 24 is a schematic cross-sectional view showing the main configuration of the liquid crystal display device according to the tenth embodiment.
In the liquid crystal display device of this example, the display pixel is divided into two regions 41 and 42 having different capacitances by capacitive coupling, and each region 41 and 42 corresponds to the capacitance when a driving voltage is applied. Each voltage is applied.

  Specifically, in the transparent glass substrate 1, the regions 41 and 42 are formed depending on the presence / absence of the drive electrode 43 instead of the ITO pixel electrode, and the drive electrode 43 is disposed below the drive electrode 43 via the dielectric layer 44. Are provided, and bank-like projections 35 and 36 are provided at the same site as the liquid crystal display device of the seventh embodiment. As the dielectric layer 44, for example, SiN used as an interlayer insulating film of a thin film transistor (TFT) is formed to a thickness of about 150 nm.

  In this example, with the above structure, the voltage applied to the drive electrode 43 is divided by the capacitance formed by the drive electrode 43 and the divided electrode 45 and the capacitance of the pixel, and is applied to the divided electrode 43. The Thereby, in one pixel, the applied voltage can be made different between the region 41 where the drive electrode 43 exists and the region 42 where the drive electrode 43 does not exist, and the response time is shortened to realize the partial response. The divided electrode 43 may be disposed at a central portion between the adjacent bank-shaped protrusions 35 and 36.

[Example 11]
FIG. 25 is a schematic cross-sectional view showing the main configuration of the liquid crystal display device according to the eleventh embodiment.
This example is a modification of the tenth embodiment, and capacitive coupling electrodes 51 are formed at predetermined intervals on the transparent glass substrate 1 at equal intervals. A drive electrode 53 and a dielectric layer 52 are formed on the capacitive coupling electrode 51. The divided electrodes 54 are formed adjacent to each other. Here, the gap between the drive electrode 53 and the divided electrode 54 is adjusted to be positioned at a predetermined position on the capacitive coupling electrode 51, and the voltage applied to the drive electrode 53 is the drive electrode 53 and the capacitive coupling electrode 51. The voltage is divided by each capacitance formed by the drive electrode 53 and the divided electrode 54 and the capacitance of the pixel and applied to the divided electrode 54. As a result, in one pixel, the applied voltage can be made different between the region 41 where the capacitive coupling electrode 51 exists and the region 42 where the capacitive coupling electrode 51 does not exist, and the response time is shortened to realize the partial response. The divided electrode 54 may be disposed at a central portion between the bank-like protrusions 35 and 36.

[Example 12]
FIG. 26 is a schematic cross-sectional view showing the main configuration of the liquid crystal display device according to the twelfth embodiment.
In the liquid crystal display device of this example, fine through holes 61 (with a diameter of about 1 μm) are densely formed in a predetermined portion of the ITO pixel electrode 5, and the display pixel is divided into two different regions corresponding to the portion. The In this case, in the display pixel, the average electric field strength decreases in the region 41 where the through hole 61 is formed, and the average electric field strength relatively increases in the region 42 where the through hole 61 is not formed. The operating voltage of the liquid crystal can be made different, the response time is shortened, and the partial response is realized.

[Example 13]
FIG. 27 is a schematic diagram illustrating a main configuration of a liquid crystal display device according to Example 13, wherein (a) is a plan view and (b) is a cross-sectional view taken along II.
In the liquid crystal display device of this example, an insulating structure 72 having a strip-shaped opening 75 that exposes a part of the fine electrode pattern 71 that is an ITO pixel electrode formed on the transparent glass substrate 1 is formed in the display pixel. The insulating structures 72 form regions having different threshold voltages in the display pixel.

  A pattern group 74 composed of a plurality of stripe patterns 73 extending in the same direction is formed on the fine electrode pattern 71, and the direction in which each stripe pattern 73 extends differs between adjacent pattern groups 74. An insulating structure 72 is formed so as to expose the central portion of the adjacent slit group 74 from the strip-shaped opening 75, and the threshold voltage is adjusted to control the desired gradation display characteristics. In this case, in the display pixel, the region 76 where the insulating structure 72 exists is a high threshold region, and the region 77 where the insulating structure 72 does not exist, that is, the region 77 of the opening 75 is a low threshold region. Accordingly, only the low threshold region 77 operates at low gradation, and the response time in the halftone is shortened to realize the partial response.

  In this example, only the liquid crystal existing in the portion of the opening 75 and the vicinity thereof is tilted and the liquid crystal molecules on the insulating structure 72 are maintained in a substantially vertical alignment state. At this time, since the polarization axes are arranged in the vertical and horizontal directions, the liquid crystal molecules facing directly below do not transmit light. A liquid crystal molecule slightly facing right or left from the lower direction transmits light, thereby realizing halftone display. In this way, the partial response can be realized by responding only the liquid crystal molecules in the portion (region 77) of the opening 75 where the insulating structure 72 does not exist when a low voltage is applied.

  As a result, a medium interrogation response using a response from black to white, which is a high-speed response, can be realized, so that the medium interrogation response is accelerated. On the other hand, at the time of white display, a sufficient voltage is applied to the liquid crystal molecules in a region where the structure is present, and the entire region 76 where the insulating structure 72 exists and the region 77 where the insulating structure 72 does not exist respond.

A specific configuration of the liquid crystal display device of this example will be described.
In this example, an ITO pixel electrode was formed on the transparent glass substrate 1 and patterned into a fine stripe to form a pattern group 74, thereby forming a fine electrode pattern 71. As the substrate material, a glass substrate OA-2 (manufactured by Nippon Electric Glass) having a thickness of 0.7 mm was used. The fine electrode pattern 71 was formed by connecting each electrode material at the V-shaped central portion as a V-shaped repetition in which the extending direction of the linear structure differs by approximately 90 ° within the substrate surface. The V-shaped width was about 3 μm, the length of one side was about 40 μm, and the distance between each V-shaped was about 3 μm. The connection portion between the V-shapes was about 3 μm in width.

  An insulating structure 72 was selectively formed in a region excluding the V-shaped central portion (5 μm width) on the fine electrode pattern 71 thus formed. The height of the insulating structure 72 was about 0.5 μm. Photosensitive acrylic resin PC-335 (manufactured by JSR) was used as the insulating structure material. The insulating structure 72 is formed by spin-coating the resin on the transparent glass substrate 1, baking at 90 ° C. for 20 minutes (using a clean oven), selectively irradiating with ultraviolet light using a photomask, Development was performed with an organic alkaline developer (TMAH 0.2 wt% aqueous solution), and baking was performed at 200 ° C. for 60 minutes (using a clean oven).

  A liquid crystal alignment film 6a (vertical alignment film) was formed on the transparent glass substrate 1. A vertical alignment film manufactured by JSR is used as the alignment film material, and the material is spin-coated on the transparent glass substrate 1 and prebaked at 80 ° C. for 1 minute (using a hot plate), and then at 180 ° C. for 60 minutes. This baking was performed using a clean oven.

  In this example, the insulating structure 72 is overlapped on the connection portion at the center of the V-shape, but may partially overlap as shown in FIG. In addition, as shown in FIG. 29, an insulating structure 72 may be provided at a portion facing the fine pattern 71. Furthermore, as shown in FIG. 30, it is also preferable to provide a strip-like insulating structure 78 at the facing portion of the transparent glass substrate 1 having the fine electrode pattern 71 on which the insulating structure 72 is formed. In this case, the height of the band-shaped insulating structure 78 is set to about 0.7 μm and the width is set to about 3 μm.

On the other transparent glass substrate 2, an ITO common electrode 8 was formed on the entire surface, and a liquid crystal alignment film 6b was formed thereon.
The substrates 1 and 2 obtained in this way are bonded together via spacers (made by Sekisui Fine Chemical) having a diameter of 4 μm, and an empty cell is produced. A negative liquid crystal material was injected to form a liquid crystal layer 3.

[Example 14]
FIG. 31 is a schematic diagram illustrating a main configuration of a liquid crystal display device according to Example 14, where (a) is a plan view and (b) is a cross-sectional view taken along II.
This example is a modification of the thirteenth example, in which the end of the fine electrode pattern 71 is tapered, and directionality is imparted to the pattern. Specifically, the width of the thick portion at the end of the fine electrode pattern 71 is about 6 μm, and the width of the thin portion is about 2 μm. This makes it possible to finely control the alignment of liquid crystal molecules.

[Example 15]
FIG. 32 is a schematic diagram illustrating the main configuration of the liquid crystal display device according to Example 15, where (a) is a plan view and (b) is a cross-sectional view taken along line II.
This example is a modification of Example 13, and differs from Example 13 in that the fine electrode pattern 71 is different and the shape of the insulating structure 72 is different accordingly.

  Specifically, a grid electrode pattern 81 was first formed on the ITO pixel electrode. The width of the lattice was 5 μm. Further, the directional fine electrode pattern 82 is formed in the four regions partitioned by the grid electrode pattern 81, and the width of the portion in contact with the grid electrode pattern 81 is increased in the shape of the fine electrode pattern 82. did. The length of the fine electrode pattern 82 is 40 μm that extends from the vicinity of the intersection of the grid electrode pattern 81, and the other fine electrode pattern 82 has its apex orthogonal or parallel to the extending direction of the grid electrode pattern 81. To match. An insulating structure 72 was selectively formed on the transparent glass substrate 1 having the electrode pattern 71 formed with such electrode patterns 81 and 82. Here, a band-like opening 75 is formed so as to separate the insulating structure 72 into a lattice shape. The line width of the opening 75 was 5 μm.

  Note that the shape of the insulating structure 72 is not limited to the lattice shape. For example, as shown in FIGS. 33 and 34, a rectangular opening 75 (a central portion in FIG. 33 and four corner portions in FIG. 34) is formed. You may do it. Furthermore, as shown in FIG. 35, a rectangular opening 75 is formed at the central portion, and the fine electrode pattern 82 is not formed entirely as in the examples of FIGS. Then, as shown in FIG. 35 (c), it is also preferable to form the fine electrode pattern group so as to be approximately rhombus. In addition, in FIGS. 33-35, the example which formed the bank-like protrusion 36 which is a strip | belt-shaped structure in the transparent glass substrate 2 side which opposes is shown.

  Further, as shown in FIG. 36, instead of the fine electrode pattern 71, only the grid electrode pattern 81 is formed on the ITO pixel electrode, and the rectangular openings 75 are formed at the four corners of the insulating structure 72, respectively. A bank-like protrusion 36 that is a band-like structure may be formed on the glass substrate 2 side. In addition, as shown in FIG. 37, instead of the fine electrode pattern 71, the ITO pixel electrode is only formed in a grid electrode pattern 81, and an insulating structure 72 is formed in a square shape. A band-like bank-like protrusion 36 may be formed so as to surround the area. Furthermore, as shown in FIG. 38, instead of the fine electrode pattern 71, only the ITO pixel electrode is formed in the grid electrode pattern 81, and the strip-shaped opening 75 is formed so as to separate the insulating structure 72 into the grid pattern. It is also suitable to form.

[Example 16]
FIG. 39 is a schematic diagram illustrating a main configuration of a liquid crystal display device according to Example 16, where (a) is a plan view and (b) is a cross-sectional view taken along II.
This example is a modification of the example 15, and is different from the example 15 in that the insulating structure 72 is formed on the transparent glass substrate 2 side.

  Specifically, an ITO pixel electrode was formed on the transparent glass substrate 1, and a lattice slit 81 was formed in the ITO pixel electrode to form a fine electrode pattern 71. And the insulating structure 72 was provided on the transparent glass substrate 2 facing this, and the square-shaped opening 75 was formed in the center part. Further, bank-like protrusions 36 that are band-like lattice pattern structures were formed on the insulating structure 72. As in the thirteenth embodiment, in addition to the grid electrode pattern 81, a fine slit 82 may be formed in the ITO pixel electrode to form the fine electrode pattern 71.

  The formation of the insulating structure 72 and the bank-like protrusion 36 is not limited to the above. For example, the opening 75 is formed in a diamond shape as shown in FIG. 40, or the insulating structure 72 is formed as shown in FIG. A band-shaped opening 75 is formed so as to be separated into a lattice shape, or the insulating structure 72 is formed in a rectangular shape so as to face the central portion of the lattice-shaped slit 81 as shown in FIG. The bank-like protrusions 36 may be formed in such a belt shape.

[Example 17]
FIG. 43 is a schematic diagram illustrating a main configuration of a liquid crystal display device according to Example 17, where (a) is a plan view and (b) is a cross-sectional view taken along II.
This example is a modification of Examples 15 and 16, and the insulating structure is formed not only on the transparent glass substrate 1 side but also on the transparent glass substrate 2 side.

  Specifically, on the transparent glass substrate 1 side, a lattice-shaped slit 81 is formed in the ITO pixel electrode to form a fine electrode pattern 71, and an insulating structure 72a formed by patterning in a square shape is provided thereon. On the other hand, on the transparent glass substrate 2 side, square-shaped insulating structures 72b are formed in patterns at the four corners, and bank-like projections 36 are formed in a band shape surrounding the opposing insulating structures 72a. In this case, the insulating structures 72a and 72b are formed so as to partially overlap when viewed from above. However, the insulating structures 72a and 72b are not necessarily formed in this manner, as shown in FIG. May be formed so as not to overlap.

  The formation of the insulating structures 72a and 72b is not limited to the above. For example, the insulating structure 72a is formed in a diamond shape as shown in FIG. 45, and the transparent glass substrate 2 is formed so as to correspond thereto. The insulating structures 72b may be formed in triangular shapes at the four corners.

  Further, as shown in FIG. 46, on the transparent glass substrate 1 side, a grid-like slit 81 is formed in the ITO pixel electrode to form a fine electrode pattern 71. Contrary to the case of FIG. The insulating structure 72b is patterned. On the other hand, the transparent glass substrate 2 is provided with an insulating structure 72a that is patterned in a square shape. Further, a bank-like protrusion 36 is formed in a band shape surrounding the insulating structure 72a. It may be formed. In this case, the insulating structures 72a and 72b are formed so as to partially overlap when viewed from above. However, the insulating structures 72a and 72b are not necessarily overlapped with each other. Even it is suitable.

  As described above, according to the liquid crystal display device of the present embodiment, the response speed delay in the low gradation is improved, the halftone response can be speeded up, and the reliability having the moving image performance almost equal to that of the CRT. High image display can be realized.

(Second Embodiment)
Next, a second embodiment of the present invention will be described.
In the present embodiment, as in the first embodiment, the display pixels are provided with regions having different threshold voltages (low threshold region and high threshold region), and the threshold voltage is adjusted so as to respond quickly in the low threshold region. In the liquid crystal display device of this embodiment, at least one of the width and height of the band-like bank-shaped protrusion is formed in a different shape depending on the location. .

-Basic configuration of this embodiment-
Hereinafter, the bank-shaped protrusion having a characteristic shape in the present embodiment will be described.
The schematic configuration of the liquid crystal display device of this embodiment is the same as the structure shown in FIG. 1 of the first embodiment, as shown in FIG. 47, and further, FIG. 4 of Example 1 in the first embodiment. Similarly, the transparent glass substrate 1 includes an ITO pixel electrode 5 on which a fine electrode pattern 21 is formed, and a strip-shaped dielectric layer 22 is patterned so as to cover the fine electrode pattern 21. In the transparent glass substrate 2, strip-shaped bank-like protrusions 91 to 96 made of a dielectric material are formed at portions corresponding to the non-dielectric regions of the transparent glass substrate 1 on the ITO common electrode 8.

  It is widely known that by forming bank-like protrusions on the substrate surface of a vertical alignment type liquid crystal display device, it can be effectively performed for liquid crystal alignment control accompanying voltage application. This is because the bank-like projections function as an insulator, the electric field in the normal direction in the liquid crystal layer is distorted, and the liquid crystal molecules are uniformly aligned accordingly.

FIG. 48 is a schematic configuration diagram illustrating a first example of a bank-like protrusion in the present embodiment.
As shown in FIGS. 48 (a) and 48 (b), the bank-like protrusion 91 of this example is formed so that its width and height gradually change.
In this way, liquid crystal molecules are formed by changing the bank width from large (width a) to small (width b) and the bank height from large (height c) to small (height d). It becomes easy to control the direction of the fall. As shown in FIGS. 48C and 48D, since the liquid crystal molecules are aligned following the shape of the bank-like projections 91, the liquid crystal molecules on the center line of the bank-like projections 91 are inclined downward in the drawing. It becomes possible to control the orientation at the central portion. There is no time delay until the orientation is stabilized, and the overall response speed is increased.

  The bank-like protrusions 91 are usually produced by patterning a photosensitive material, and it is known that the height is high when the bank width is large, and the height is low when the bank width is small, In this case, it has been found that the bank-like protrusion 91 has a continuously inclined structure. This means that the liquid crystal molecules have a slight inclination angle along the inclination of the bank-like protrusion 91 while being vertically aligned during driving below the threshold voltage. The vertical alignment type liquid crystal display device having an inclination angle defines the alignment direction of the voltage application rod and exhibits high-speed response. Therefore, even in the MVA type liquid crystal display device, the alignment control on the bank-like protrusion 91 is performed. This makes it possible to further improve the responsiveness.

FIG. 49 is a schematic configuration diagram illustrating a second example of the bank-shaped protrusions in the present embodiment.
The bank-like projections 92 of this example are formed such that the width and height change patterns are reversed between adjacent bank-like projections 92.
In this case, the bank-like protrusions 92 adjacent to each other when viewed from the upper surface in the figure are periodically arranged while the width of the bank is switched, and stable alignment is achieved without causing distortion in the alignment direction of the liquid crystal molecules. Therefore, it is possible to prevent the occurrence of a domain having a poor transmittance.

FIG. 50 is a schematic configuration diagram illustrating a third example of the bank-shaped protrusions in the present embodiment.
The bank-like protrusion 93 of this example is partly divided to form a gap portion 93a. In this case, it was confirmed that the orientation of the liquid crystal molecules can be particularly easily controlled by the gap portion 93a.

  A bank-like projection 94 having a gap portion 93a having a shape as shown in FIG. 51 is the result of combining the idea in the structure of the bank-like projection 93 and the idea in the structure of the bank-like projection 92.

FIG. 52 is a schematic configuration diagram showing a fourth example of bank-like projections in the present embodiment.
The bank-like projection 95 of this example is formed in a shape in which at least one of its width and height changes periodically. Specifically, a notch 95a is formed on one side in the longitudinal direction (FIG. 52 ( a)).

  By forming the cuts 95a in this way, the liquid crystal molecules try to align according to the cuts 95a when a voltage is applied. In the notch 95a, the alignment direction of the liquid crystal molecules can be controlled by making the diagonal line longer than the vertical side of the bank-like protrusion 95 (FIG. 52B). In other words, this means that the orientation direction on the bank-like projection 95 is controlled based on the orientation direction of the cuts 95a, and the orientation can be stabilized in a short time.

  The notches 95a are preferably formed in the shape of a right triangle since there is a limit to the patterning accuracy. In addition, the size of the notches 95a is not necessarily the same. In particular, the notches 95a are formed slightly larger in a portion where the orientation is desired to be increased or a portion that is easily affected by an electric field different from the original electric field. For example, the balance can be arbitrarily set.

  The interval between the adjacent cuts 95a can be arbitrarily defined in the same manner as the size of the cuts 95a. That is, when the effect of the above-described notch 95a is more remarkably required, the notch 95a may be densely arranged by shortening the interval. The dense and sparse areas of the cuts 95a may be mixed. Furthermore, it is preferable to form the notches 95a so that the sizes thereof are alternately changed (FIG. 52C).

FIG. 53 is a schematic configuration diagram showing a fifth example of bank-like projections in the present embodiment.
As shown in FIG. 53A, the bank-like projection 96 of this example is formed by alternately forming cuts 96a on one side I side and the other side II side of the bank-like projection 96. . According to this structure, there exists an advantage that it can form densely, forming a notch larger.

  In this case, as shown in FIG. 53 (b), it is also preferable to form the notches 96a symmetrically on the left and right sides I and II.

-Specific examples-
Hereinafter, specific examples of the present embodiment will be described based on the basic configuration described above.

[Example 1]
The bank-like protrusions 91 shown in FIG. 48 were formed on the transparent glass substrate 2.
That is, after the ITO common electrode 8 is formed, a resist (manufactured by Shipley) is spin-coated at 1500 rpm for 20 seconds, the bank width a is about 10 μm, the bank width b is about 4 μm, and the bank length in the longitudinal direction is about 45 μm. It exposed and developed through the photomask so that it might become. After development, the film was baked at 120 ° C. for 40 minutes and further at 200 ° C. for 40 minutes, and then subjected to ashing.

  Thereafter, when the height of the bank-shaped protrusion 91 is measured, the bank-shaped protrusion 91 is formed with a thickness of about 1.7 μm on the bank width a side and about 1.0 μm on the bank width b side. The formation of the slope was confirmed. Normally, the VA cell subjected to the rubbing process has a pretilt angle of about 89 °. Therefore, the fact that the bank slope is about 1 ° this time is a reasonable result in terms of providing a gentle slope portion. It became.

  As shown in FIG. 47, after forming the fine electrode pattern 21 on the ITO pixel electrode 5 on the transparent glass substrate 1, a resist is thinly applied and patterned to form a dielectric layer 22 covering the fine electrode pattern 21. Formed. Liquid crystal alignment films 6a and 6b were formed on these substrates 1 and 2 using a JSR vertical alignment film, and liquid crystal (Merck) was injected to produce a liquid crystal cell (cell thickness: about 4.0 μm). ). When a voltage was applied to the liquid crystal cell, it was confirmed that the liquid crystal molecules were aligned, and in particular, good liquid crystal alignment was obtained along the inclined surface on the bank-like projections 91.

[Example 2]
Each component was formed on the transparent glass substrates 1 and 2 in substantially the same manner as in Example 1.
However, in this example, the bank-like projections 92 are formed on the transparent glass substrate 2 so that the change patterns of the bank width and height shown in FIG. 49 are reversed between the adjacent bank-like projections 92 (liquid crystal cell A). The transmittance was compared with the conventional case (liquid crystal cell B) in which bank-like protrusions having a constant bank width and height were formed.

  As a result, in the conventional liquid crystal cell B, distortion occurs between adjacent bank-shaped protrusions, whereas in the liquid crystal cell A of this example, uniform alignment was exhibited. When 5.4 V was applied, the transmittance of the liquid crystal cell B was 19.4%, whereas the transmittance of the liquid crystal cell A was as high as 21.1%, and the structure of this example is MVA. It was confirmed that it is suitable for a liquid crystal display device of a type.

[Example 3]
Each component was formed on the transparent glass substrates 1 and 2 in substantially the same manner as in Example 1.
However, in this example, a bank-like projection 95 having a notch 95a on one side in the longitudinal direction shown in FIG. 52 is formed on the transparent glass substrate 2 (liquid crystal cell C), and the bank whose bank width and height are constant. The transmittance was compared with the conventional case (liquid crystal cell D) in which the protrusions were formed. Here, in the liquid crystal cell C, a bank width of the bank-shaped protrusion 95 is set to about 10 μm, and a cut-off 95a is formed in a right triangle shape having a side perpendicular to the longitudinal direction of the bank-shaped protrusion 95 about 5 μm and a hypotenuse of about 12 μm. In the liquid crystal cell D, bank-like protrusions having a bank width of about 10 μm were formed.

  As a result, in the liquid crystal cell C of this example, the domains on the bank-like projections 95 become uniform and the alignment is stabilized instantaneously, whereas in the conventional liquid crystal cell D, the alignment is stably stable for a long time. Cost. In addition, the liquid crystal cell D required 45 ms at an applied voltage of 3 V, whereas the liquid crystal cell C showed a fast response of 35 milliseconds, confirming the effect of speeding up the response in this example.

  As described above, according to the liquid crystal display device of the present embodiment, the response speed delay in the low gradation is improved, the halftone response can be speeded up, and the moving image performance almost equivalent to the CRT is realized. By defining the bank shape like the bank-like protrusions 91 to 96, the time required for the alignment of the liquid crystal molecules to be stabilized can be greatly shortened. Thereby, it is possible to obtain a display with little uncomfortable feeling when displaying a moving image, and it is possible to realize an extremely reliable image display.

(Third embodiment)
Next, a third embodiment of the present invention will be described.
In the present embodiment, as in the first embodiment, the display pixels are provided with regions having different threshold voltages (low threshold region and high threshold region), and the threshold voltage is adjusted so as to respond quickly in the low threshold region. The liquid crystal display device of the MVA type is exemplified, but the liquid crystal display device of this embodiment is arranged on one substrate so that the display pixel is divided into two or more regions having different distances between the electrodes facing each other. Are provided with an insulating member partially.

-Basic configuration of this embodiment-
Hereinafter, the basic configuration of the present embodiment will be described.
As shown in FIG. 54, the schematic configuration of the liquid crystal display device of the present embodiment includes a TFT substrate 101 on which a pixel electrode 102 is formed and a color filter (CF) substrate 103 on which an ITO transparent electrode 104 is formed. A transparent insulating member 106 is provided at a predetermined portion between the TFT substrate 101 and the ITO electrode 104. By this insulating member 106, the distance (d1, d2) between the substrates 101 and 103 is partially adjusted.

  In general, it is desirable that the response speed is ideally constant regardless of the display gradation. However, in the case of a conventional MVA or TN liquid crystal display device, the response speed between gradations varies by up to 7 to 9 times, so that it is recognized as an afterimage in some gradations when displaying a moving image. (See FIG. 2). A partial response in which a dielectric layer is provided on the TFT substrate side has been devised to improve the response speed in the low gradation region of the entire panel. In this embodiment, as a further improvement measure, A part of the cell thickness is changed, and the part where the cell thickness is thin and the response speed of the liquid crystal is fast is effectively used at a low gradation.

  Further, in the case of MVA, a configuration in which a lighted area changes according to a gradation to be displayed, such that a wide area is lit in a bright display (high gradation) and only a narrow area is lit in a dark display (low gradation). Furthermore, in order to make the response speed constant for each gradation, when a display is made with a certain gradation, the part operating on the lower gradation side is made to respond at high speed, so that the panel as a whole depends on the gradation. The partial response is such that a substantially constant response speed can be obtained.

  As a means for realizing the above, a structure as shown in FIG. 54 is considered, and a transparent insulating member 106 is formed in a part of the display pixel to provide a region where the cell thickness is partially thin. Since the response speed of the liquid product is high in the portion where the cell thickness is thin, if the liquid crystal in which Δn is adjusted to this portion is used, the transmittance is reduced in the portion where the cell thickness is thick (the portion indicated by the distance d1 in the figure). In the voltage, only the portion where the cell thickness is thin (the portion indicated by the distance d2 in the figure) is brightened.

  For this reason, only a portion that responds to high speed with a thin cell thickness can be seen at low gradation (partial response), so that the display in the entire panel can be accelerated in the low gradation region.

  Although the area of the thin portion of the cell needs to be patterned, the insulating member 106 and the like need not be the same area as the thick portion, and in order to obtain a desired TV characteristic (gradation display characteristic), The balance can be arbitrarily set.

  In addition, since the cell thickness can be changed in the portion where the cell thickness is thin by changing the film thickness of the insulating member, the TV characteristic of this portion can be changed by the film thickness of the insulating member 106. It is.

-Specific examples-
Hereinafter, specific examples of the present embodiment will be described based on the basic configuration described above.

[Example 1]
As shown in FIG. 55 ((a) is a plan view and (b) is a cross-sectional view taken along line I-I), a transparent resin for an insulating member such as photosensitive acrylic, polyimide, epoxy, etc. on the colored resin of the CF substrate 103. Is applied with a film thickness of about 0.7 μm, and exposure and development are performed through a photomask so that the insulating member 106 is left only in a part of the display pixel, and the other part has a normal cell thickness. The insulating member 106 is removed. Thereafter, the lTO transparent electrode 104 is formed, and the CF substrate 103 is completed.

  As the TFT substrate 101, a substrate in which a slit 102a is formed in the pixel electrode 102 is used as in the conventional case. The shape of the slit 102a at this time may be the one shown in the figure or a comb-teeth shape as shown in FIG.

  An alignment film is formed on the TFT substrate 101 and the CF substrate 103, bonded, and after cutting, a liquid product adjusted for Δn for a narrow gap is injected. The cell thickness of the normal portion is 4.2 μm, and the narrow gap portion is A 3.5 μm MVA liquid crystal panel was produced. As the voltage was applied, the panel began to brighten from a narrow gap, and a panel with good response characteristics could be obtained even in the low gradation region.

[Example 2]
As in Example 1, a TFT substrate 101 and a CF substrate 103 were produced. However, as shown in FIG. 56 ((a) is a plan view and (b) is a cross-sectional view taken along line I-I), an insulating member 106 serving as a boundary portion of a gap where the cell thickness changes is provided on the CF substrate 103 side. A bank-like protrusion 111 having a line width of 10 μm and a film thickness of 1.2 μm was formed at the end using a resist.

  When these substrates are made into panels in the same manner as in Example 1, it is possible to suppress the decrease in transmittance due to the disorder of orientation occurring at the step portion where the cell thickness changes, and the response characteristics are good even in the low gradation region, and the transmittance Panel with high height.

[Example 3]
As in Example 2, a TFT substrate 101 and a CF substrate 103 were produced. However, as shown in FIG. 57 ((a) is a plan view and (b) is a cross-sectional view taken along line II), the TFT substrate 101 is coated with a resist as a thin film insulator so as to cover the slit 102a. The dielectric layer 112 was formed by coating with a film thickness of 0.5 μm and patterning.

Thus, it has been found that when the structure is formed in the region including the slit 102a, the response of the halftone portion can be greatly improved.
When combined with this method, the partial response in which only the liquid crystal molecules in the region having a small cell thickness respond from black to white in the low gradation region and remains black in the region where the other dielectric layer 112 exists. By realizing halftone display. When viewed as a panel as a whole, the response from black to white showing a high-speed response can be used for the halftone response, so that the response speed at low gradation is further increased.

  According to the liquid crystal display device of this embodiment, the response speed of the liquid crystal is made uniform in each gradation by reducing the cell thickness of a part of the display pixel, and the response in the low gradation region seen in the conventional MVA panel is achieved. There is no delay in speed, and it is possible to improve the response characteristics of the panel at a low gradation. In addition, since the occurrence of afterimages can be suppressed even in an actual unit, it is possible to obtain a display with no sense of incongruity even in moving images, which contributes to an improvement in display quality.

(Fourth embodiment)
Next, a fourth embodiment of the present invention will be described.
In the present embodiment, as in the first embodiment, the display pixels are provided with regions having different threshold voltages (low threshold region and high threshold region), and the threshold voltage is adjusted so as to respond quickly in the low threshold region. An MVA type liquid crystal display device is exemplified, but this embodiment is characterized by a method for manufacturing the liquid crystal display device.

-Basic configuration of this embodiment-
Hereinafter, the basic configuration of the present embodiment will be described.
The MVA type liquid crystal display device has the following problems in its manufacturing process.
(1) In the MVA liquid crystal display device, in order to improve the response speed of low gradation, as described above, for example, a dielectric film is selectively provided on a pixel electrode on a substrate (TFT substrate) side on which a thin film transistor is provided. There is a need. For this reason, the number of manufacturing processes increases.
(2) In a thin film transistor manufacturing process, one of the main reasons why a transistor is defective is electrostatic breakdown of an insulating film. Floating gate electrode and source / drain electrode in a process using plasma performed in a film forming process such as PVD or CVD for depositing a conductive film or an insulating film or a dry etching process for processing a gate electrode or wiring Static electricity accumulates on the insulating film, and the insulating film, particularly the gate insulating film, breaks down. Further, in the photolithography process for forming the source / drain electrodes, it is also caused by static electricity accumulated on the electrodes due to so-called peeling electrification generated when the resist-coated substrate is removed from the support after being baked. In addition, the accumulation of static electricity as described above may cause deterioration of TFT characteristics, particularly the threshold voltage. In general, as a method for preventing electrostatic breakdown, there is a method in which a gate bus line and a drain bus line are bundled and connected around the substrate so as to have the same potential. This wiring is connected by the same wiring as the gate bus line or drain bus line in order to reduce the number of processes, but the gate bus line and drain bus line use A1 or A1 alloy in order to reduce wiring resistance. In this case, in the panel process, after the scribing, the end face of the connection wiring is exposed to the atmosphere and corroded.

  Conventionally, the dielectric film deposited on the pixel electrode of the thin film transistor substrate has been deposited with a resist or the like after the thin film transistor is formed. In contrast, in the present embodiment, a dielectric film is formed using a gate insulating film and a final protective film in the course of the thin film transistor manufacturing process.

  In this embodiment, in the method of manufacturing a thin film transistor, after forming the gate electrode and the gate bus line, the pixel electrode which is a transparent conductive film is formed through the insulating film, and the gate bus line and the drain bus line are connected. Wiring for forming is formed in the periphery with a transparent conductive film. Further, the insulating film is removed with the mask, a gate insulating film, a semiconductor film, and a high impurity concentration semiconductor film are successively deposited, and the semiconductor film and the high impurity concentration semiconductor film are selectively left by patterning. Further, a contact hole is formed in the peripheral connection wiring formed by the pixel electrode, the gate bus line terminal, and the transparent conductive film. Next, the source / drain electrode and the drain bus line are formed, and at the same time, the peripheral connection wiring formed of the transparent conductive film and the drain bus line, and the peripheral connection wiring formed of the transparent conductive film and the gate bus line terminal are connected. Connect with the same layer wiring as the source / drain electrodes.

  In this embodiment, since the gate insulating film or the final protective film is applied as the dielectric film, the response speed of the MVA type liquid crystal display device can be improved efficiently without increasing the number of manufacturing steps.

  Further, the end portion of the gate bus line formed on the insulating substrate and the drain bus line are connected to have the same potential until the TFT is manufactured by the peripheral connection wiring formed of the transparent conductive film. Specifically, since the conductive film and the gate electrode are automatically short-circuited when the conductive film constituting the source / drain electrode and the drain bus line is deposited, electrostatic breakdown of the gate insulating film and deterioration of TFT characteristics are prevented. Is done. Further, since the connection wiring is a transparent conductive film, for example, ITO, even if the end face of the wiring is exposed to the atmosphere after scribing in the panel process, it does not corrode.

-Specific examples-
Hereinafter, specific examples of the present embodiment will be described based on the basic configuration described above.

  58 and 59 are plan views of the TFT substrate, FIGS. 60 and 61 are cross-sectional views showing the manufacturing process of the TFT of this embodiment, and FIG. 62 is a plan view showing the vicinity of the terminals of the gate bus line. 63 is a cross-sectional view showing a step of forming a terminal of the gate bus line, FIG. 64 is a plan view showing the vicinity of the terminal of the drain bus line, and FIG. 65 is a cross-sectional view showing a step of forming the terminal of the drain bus line. .

First, a TFT forming process will be described with reference to FIGS. 60 and 61, and then a gate bus line manufacturing process and a drain bus line manufacturing process will be described.
First, as shown in FIG. 60A, after an Al film 201 is formed on a glass substrate, the Al film 201 is patterned to form gate electrodes and gate bus lines simultaneously. In this case, a mixed liquid of phosphoric acid, acetic acid, nitric acid and water is used as an etchant for the Al film 201.

  Subsequently, as shown in FIG. 60B, an insulating film 203 such as SiN is deposited on the entire surface by a CVD method, and an ITO film 204 is continuously deposited on the entire surface to a thickness of about 50 nm by a sputtering method. Then, the pixel electrode 204b and the peripheral connection wiring 204a are formed. As shown in FIG. 58, a domain regulating slit 205 is formed in the pixel electrode 204b. In this case, the photoresist film is used as a mask, and the ITO film 204 is etched using an aqueous solution of ferric chloride and hydrochloric acid, a mixed solution of hydrochloric acid, nitric acid, and water as an etchant, and a reactive ion using a fluorine-based gas. The insulating film 203 is etched by an etching method.

Subsequently, as shown in FIG. 60 (c), by a plasma CVD method, a SiN film 6, a-Si active semiconductor film 7 and n ⁺ a-Si film 8 are sequentially formed, using a photoresist as a mask n ⁺ The a-Si film 8 and the a-Si operation semiconductor film 7 are patterned by the reactive ion etching method to leave at least portions that become the gate electrode and the source / drain electrode. When patterning the n ⁺ a-Si film 8 and the a-Si operation semiconductor film 7, etching is performed by a reactive ion etching method using a fluorine-based gas.

  Subsequently, as shown in FIG. 60D, a pixel electrode, a peripheral connection wiring terminal, and a contact hole 209 for a gate bus line terminal are formed in the gate insulating film, and a gate insulating film (dielectric film) is formed on the pixel electrode. 206 slits 210 are formed. In this case, the gate insulating film (dielectric film) 206 is etched by a reactive ion etching method using a fluorine-based gas using a photoresist as a mask. Note that the gate insulating film is made of SiN, SiO. It is at least one selected from SiON, Al oxide, Al nitride, novolac resin, acrylic resin, and polyimide resin, and is formed in a single layer or multiple layers.

Subsequently, as shown in FIG. 60E, after the Ti film 13 and the Al film 14 are laminated by the sputtering method, the Al film 14 to the SiN film 6 are patterned using a photoresist mask, The Ti film 13, the Al film 14, and the n ⁺ a-Si film 8 are divided on the a-Si operation semiconductor film 7 and extended on both sides thereof, thereby forming the drain electrode and the source electrode in the TFT formation region. At the same time, the drain bus line connected to the drain electrode is connected to the peripheral connection wiring 4a, and the gate bus line is connected to the peripheral connection wiring 4a with a drain metal pattern. Thereby, the TFT is completed. At the time of patterning, the Al film 13 and the Ti film 14 are etched using a reactive ion etching method with a mixed gas of BCl ₃ and Cl ₂ . The planar state is as shown in FIG. 58, and TFTs are formed in a matrix on the glass substrate 1 as shown in FIG. Note that a capacitive bus line 202 is formed in the central portion of FIG.

Next, a method for manufacturing an etching stopper type TFT will be described. As described above, the manufacturing method of the channel etch type TFT has been described with reference to FIG. 60, but FIG. 61 shows the manufacturing method of the etching stopper type.
First, as shown in FIG. 61A, after an Al film 201 is formed on a glass substrate, the Al film 201 is patterned to form gate electrodes and gate bus lines simultaneously. In this case, a mixed liquid of phosphoric acid, acetic acid, nitric acid and water is used as an etchant for the Al film 201.

  Subsequently, as shown in FIG. 61B, an insulating film 203 such as SiN is deposited on the entire surface by a CVD method, and an ITO film 204 is continuously deposited to a thickness of about 50 nm by a sputtering method, and this is patterned. Thus, the pixel electrode and the peripheral connection wiring 204a are formed. Note that, as shown in FIG. 59, a domain regulating slit 205 is formed in the pixel electrode 204. In this case, the photoresist film is used as a mask, and the ITO film 204 is etched using an aqueous solution of ferric chloride and hydrochloric acid, a mixed solution of hydrochloric acid, nitric acid, and water as an etchant, and a reactive ion using a fluorine-based gas. The insulating film 203 is etched by an etching method.

  Subsequently, as shown in FIG. 61C, an SiN film 206, an a-Si operation semiconductor film 207, and an SiN channel insulating protective film 217 are sequentially deposited by plasma CVD, and then the channel is formed using the photoresist as a mask. The insulating protective film SiN217 is patterned by a reactive ion etching method to leave at least a portion that becomes a channel on the gate electrode. When patterning the channel insulating protective film SiN217, etching is performed by a reactive ion etching method using a fluorine-based gas.

  Subsequently, as shown in FIG. 61 (d), pixel electrodes are formed on the a-Si operation semiconductor film 207 and the gate insulating film 206. Contact holes for peripheral connection middle line terminals and gate bus line terminals are formed, and a slit 210 of a gate insulating film (dielectric film) 206 is formed on the pixel electrode. In this case, the insulating film is etched by a reactive ion etching method using a fluorine-based gas using a photoresist as a mask.

Subsequently, as shown in FIG. 61E, an n ⁺ a-Si film 208 is formed by a plasma CVD method, and subsequently, a Ti film 213 and an Al film 214 are laminated by a sputtering method, and then a photoresist is formed. Using this mask, the Al film 213 to the SiN film 206 are patterned and extended on both sides of the gate electrode, thereby forming the drain electrode and the source electrode in the TFT formation region. The drain bus line to be connected is connected to the peripheral connection wiring, and the gate bus line and the peripheral connection wiring are connected by a drain metal pattern. Thereby, the TFT is completed. At the time of patterning, the Al film 213 and the Ti film 214 are etched by a mixed gas of BCl ₃ and Cl ₂ using a reactive ion etching method, and the n ⁺ a-Si film 8 and the a-Si operation are performed. The semiconductor film 207 is etched with a fluorine-based gas. The planar state is as shown in FIG. 59, and TFTs are formed in a matrix on the glass substrate 1 as shown in FIG. 61 (e).

Next, a process of forming the gate bus line terminal and the drain bus line terminal will be described with reference to FIGS. 63 and 65, respectively.
First, as shown in FIG. 63A, as described above, after depositing an Al film 201 on a glass substrate, patterning is performed to form a gate electrode, a gate bus line, and a terminal thereof. On the glass substrate, for example, a plurality of gate bus line terminals extending in the X direction and connected thereto are formed along two opposing sides of the glass substrate.

  Subsequently, as shown in FIGS. 63B and 65A, an insulating film 203 and an ITO film 204 are grown to form a pixel electrode. In addition, a gate bus line and a drain bus are formed. Peripheral connection wiring 204a for integrating the ends of the lines is formed along the periphery of the glass substrate. Then, the insulating film 203 is removed with this master pattern.

Subsequently, as shown in FIGS. 63C and 65B, an SiN film 206, an a-Si operation semiconductor film 207, and an n ⁺ a-Si film 208 are formed on the whole, and a gate electrode and a source are patterned by patterning. Since only the portion that becomes the / drain electrode is left, the n ⁺ a-Si film 208 and the a-Si operating semiconductor film 207 are removed from the gate bus line and its terminals.

  Next, as shown in FIG. 63C, on the gate bus line side, on the gate bus line terminal 220, the gate insulating film 206 has a pixel electrode, a peripheral connection wiring terminal, and contact holes 18 and 19 for the gate bus line terminal. Form. On the other hand, as shown in FIG. 65B, the drain terminal contact hole 21 is formed in the gate insulating film 206 on the drain bus line terminal 222 on the drain bus line side.

  Subsequently, as shown in FIGS. 63 (d) and 65 (c), a Ti film 213 and an Al film 214 are formed on the whole and patterned to form a source electrode and a drain electrode. And the drain bus line extending in the Y direction, and the drain bus line terminal is connected to the peripheral connection wiring. At the same time, the gate bus line terminal 220 in which the contact hole 219 is formed and the peripheral connection wiring terminal are connected by the same layer wiring. At this time, the peripheral connection wiring 204a itself is the terminal of the gate bus line terminal 220 and the drain bus line terminal 222.

  The planar state at this time is as shown in FIGS. 62 and 64, and the drain bus line is connected to the peripheral connection terminal. As a result, when the Ti film 213 is formed to form the drain electrode, the Ti film 213 is in conduction with the gate bus line and the peripheral connection wiring 204a, and at the same time, the gate bus line is connected to the drain metal. Since the same layer wiring is connected to the peripheral connection wiring, the gate layer and the drain layer have the same potential, and electrostatic breakdown is prevented in advance. Note that there is no risk of electrostatic breakdown before the drain electrode is formed. Therefore, the gate insulating film is not destroyed by static electricity, and the short circuit problem between the gate and the drain in the TFT formation process is avoided. This completes the process of forming the drain bus line, the gate bus line, and their lead terminals.

  By the way, according to the above-described embodiment, after the pixel electrode is formed by the ITO film 204, the Ti film 213 for preventing the battery effect is formed, and then the Al film 214 is formed, and the drain electrode 211 and the source electrode 212 are formed. Since it is formed, the ITO pixel electrode does not come into contact with the AL film 201, and corrosion due to the battery effect does not occur when the Al film 201 is patterned. In this case, the Al film 201 is formed to reduce the resistance, and the Ti film 213 below is formed as a barrier metal layer and a battery effect prevention layer. Other examples of the low resistance metal film include Au, Cu, and Ag, and examples of the battery effect preventing metal film include Ta, Cr, Mo, and W. In addition to the ITO film, tin oxide or the like may be used as the pixel electrode.

  As described above, according to the present embodiment, it is possible to realize an MVA liquid crystal display device with a high response speed on the low gradation side, and to efficiently manufacture this without increasing the number of manufacturing steps. It becomes possible.

  Further, according to the present embodiment, since the drain electrode and the drain bus line have the same potential as the gate electrode through the peripheral connection wiring and the gate bus line from the time of the film formation, the gate insulation in the film forming process and the dry etching process is performed. Electrostatic breakdown of the film can be prevented beforehand.

  Hereinafter, various aspects of the present invention will be collectively described as supplementary notes.

(Appendix 1)
A liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
Regions with different threshold voltages are formed in the display pixels,
A liquid crystal display device, wherein the threshold voltage is adjusted and controlled to a desired gradation display characteristic.

(Appendix 2)
The liquid crystal display device according to appendix 1, wherein the threshold voltage is adjusted within a range in which the high threshold region is wider in area than the low threshold region.

(Appendix 3)
The liquid crystal display device according to appendix 1 or 2, wherein the response characteristics of the entire display pixel are averaged by adjusting the threshold voltage.

(Appendix 4)
4. The liquid crystal display device according to appendix 2 or 3, wherein the liquid crystal alignment direction is a substantially symmetric direction across the low threshold region.

(Appendix 5)
The liquid crystal display device according to any one of appendices 1 to 4, wherein a dielectric layer is formed in the display pixel, and regions having different threshold voltages are provided depending on the presence or absence of the dielectric layer. .

(Appendix 6)
The liquid crystal display device according to any one of appendices 2 to 5, wherein a slit is formed in a portion corresponding to the high threshold region of the electrode.

(Appendix 7)
6. The liquid crystal display device according to any one of appendices 2 to 5, wherein a dielectric protrusion is formed on the substrate facing the low threshold region.

(Appendix 8)
The liquid crystal layer is composed of a liquid crystal having a negative dielectric anisotropy, and the liquid crystal molecules are aligned substantially vertically when no voltage is applied, and the liquid crystal molecules are aligned substantially horizontally when a predetermined voltage is applied. 8. A liquid crystal display device according to any one of.

(Appendix 9)
A liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes via a liquid crystal alignment film,
By the alignment control by the liquid crystal alignment film, regions having different threshold voltages are formed in the display pixels,
A liquid crystal display device, wherein the threshold voltage is adjusted and controlled to a desired gradation display characteristic.

(Appendix 10)
The liquid crystal display device according to appendix 9, wherein regions having different threshold voltages are formed in the same liquid crystal alignment film.

(Appendix 11)
The liquid crystal display device according to appendix 9, wherein the regions having different threshold voltages are formed between a pair of the liquid crystal alignment films arranged to face each other.

(Appendix 12)
The liquid crystal display device according to any one of appendices 9 to 11, wherein the liquid crystal alignment film is formed by adjusting a content of a vertical alignment component of the material and controlling the alignment.

(Appendix 13)
The liquid crystal layer is made of a liquid crystal having a negative dielectric anisotropy, and the liquid crystal molecules are aligned substantially vertically when no voltage is applied, and the liquid crystal molecules are aligned substantially horizontally when a predetermined voltage is applied. The liquid crystal display device of any one of -12.

(Appendix 14)
A liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
A display pixel is divided into two or more regions having different distances between the electrodes facing each other, and an insulator having a film thickness that compensates for the difference in the distances is provided on the electrodes. Display device.

(Appendix 15)
A liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
The display pixel is divided into two or more regions having different capacitances by capacitive coupling,
A liquid crystal display device, wherein a voltage corresponding to a capacitance is applied to each of the regions when a driving voltage is applied.

(Appendix 16)
The liquid crystal display according to claim 15, wherein each of the regions is formed on one of the substrates depending on the presence or absence of the electrode, and a capacitive electrode capacitively coupled to the region is provided below the electrode. apparatus.

(Appendix 17)
16. The liquid crystal display device according to appendix 15, wherein a capacitor electrode capacitively coupled to the electrode is provided at a portion corresponding to the predetermined region in the lower layer of the electrode on one of the substrates.

(Appendix 18)
A liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
A liquid crystal display device, wherein a plurality of fine through holes are formed in a predetermined portion of the electrode, and display pixels are divided into two or more different regions corresponding to the portion.

(Appendix 19)
The liquid crystal layer is made of a liquid crystal having a negative dielectric anisotropy, and the liquid crystal molecules are aligned substantially vertically when no voltage is applied, and the liquid crystal molecules are aligned substantially horizontally when a predetermined voltage is applied. The liquid crystal display device according to any one of -18.

(Appendix 20)
Domain control means is provided for restricting the liquid crystal molecules such that a direction in which the liquid crystal molecules are obliquely inclined in a plurality of directions in each display pixel when a voltage smaller than the predetermined voltage is applied. The liquid crystal display device according to appendix 19.

(Appendix 21)
A liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
In the display pixel, an insulating structure that exposes a part of the electrode is provided on at least one of the substrates, and regions having different threshold voltages are formed in the display pixel by the insulating structure,
A liquid crystal display device, wherein the threshold voltage is adjusted and controlled to a desired gradation display characteristic.

(Appendix 22)
In the electrode, an electrode pattern group composed of a plurality of linear electrode patterns extending in the same direction is formed, and the adjacent electrode pattern groups have different extending directions of the linear electrode pattern,
Note that the insulating structure is partially formed so as to cover at least one of the electrode on which the electrode pattern group is formed and the electrode on the substrate facing the electrode pattern group. 22. A liquid crystal display device according to item 21.

(Appendix 23)
The insulating structure has a structure extraction in which the extending direction differs from the linear electrode pattern constituting the electrode pattern group, and a part of the electrode is exposed from the extraction pattern. The liquid crystal display device according to appendix 22.

(Appendix 24)
The liquid crystal layer is made of a liquid crystal having a negative dielectric anisotropy, and the liquid crystal molecules are aligned substantially vertically when no voltage is applied, and the linear electrode pattern in which the liquid crystal molecules constitute the electrode pattern group when a predetermined voltage is applied. 24. The liquid crystal display device according to appendix 22 or 23, wherein the liquid crystal display device is inclined in a direction in which the liquid crystal extends.

(Appendix 25)
At least one linear electrode pattern is formed on the electrode,
The insulating structure is partially formed so as to cover at least one of the electrode on which the linear electrode pattern is formed and the electrode on the substrate facing the linear electrode. The liquid crystal display device according to appendix 23.

(Appendix 26)
The liquid crystal layer is made of a liquid crystal having a negative dielectric anisotropy, and the liquid crystal molecules are aligned substantially vertically when no voltage is applied, and the liquid crystal molecules are inclined in the direction in which the linear electrode pattern extends when a predetermined voltage is applied. Item 26. A liquid crystal display device according to appendix 25.

(Appendix 27)
A liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
Regions having different threshold voltages are formed in one of the substrates in the display pixel, and are controlled to a desired gradation display characteristic by adjusting the threshold voltage, and a plurality of strip-like bank-shaped protrusions are formed on the other substrate. And
The liquid crystal display device according to claim 1, wherein the bank-like protrusions are formed in a shape in which at least one of a width and a height differs depending on a place.

(Appendix 28)
28. The liquid crystal display device according to appendix 27, wherein the bank-shaped protrusions are formed in a shape in which the width and height gradually change.

(Appendix 29)
29. The liquid crystal display device according to appendix 27 or 28, wherein a part of the bank-shaped protrusion is divided to form a gap.

(Appendix 30)
28. The liquid crystal display device according to appendix 27, wherein the bank-shaped protrusion is formed in a shape in which at least one of a width and a height thereof changes periodically.

(Appendix 31)
A method of manufacturing a liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
A method of manufacturing a liquid crystal display device, wherein regions having different threshold voltages are formed in a display pixel, and the threshold voltage is adjusted to control a desired gradation display characteristic.

(Appendix 32)
32. The method of manufacturing a liquid crystal display device according to appendix 31, wherein ultraviolet light is partially irradiated on the surface of the liquid crystal alignment film to form regions having different threshold voltages.

(Appendix 33)
A method of manufacturing a liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes via a liquid crystal alignment film,
By controlling the alignment of the liquid crystal alignment film, regions having different threshold voltages are formed in display pixels, and the threshold voltage is adjusted to control a desired gradation display characteristic. Production method.

(Appendix 34)
34. The method of manufacturing a liquid crystal display device according to appendix 33, wherein the liquid crystal alignment film is irradiated with electromagnetic waves to control the alignment of the liquid crystal alignment film.

(Appendix 35)
35. The method of manufacturing a liquid crystal display device according to appendix 34, wherein the electromagnetic wave is irradiated while adjusting at least one of irradiation energy amount, wavelength, and intensity.

(Appendix 36)
A method of manufacturing a liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
A display pixel is divided into two or more regions having different distances between the electrodes facing each other, and an insulator having a film thickness that compensates for the difference in distance is provided on the electrodes. Method.

(Appendix 37)
A method of manufacturing a liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
A method of manufacturing a liquid crystal display device, wherein a minute slit is formed at a predetermined portion of the electrode, and the display pixel is divided into two or more different regions corresponding to the portion.

(Appendix 38)
A method of manufacturing a liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
In the display pixel, an insulating structure that exposes a part of the electrode is provided on at least one of the substrates, a region having a different threshold voltage is formed in the display pixel by the insulating structure, and the threshold voltage is set. A method of manufacturing a liquid crystal display device, characterized by adjusting to control a desired gradation display characteristic.

(Appendix 39)
A method of manufacturing a liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
A region having a different threshold voltage is formed in one of the display pixels of the substrate, and the desired gradation display characteristics are controlled by adjusting the threshold voltage.
A method of manufacturing a liquid crystal display device, comprising: forming a plurality of band-shaped bank-like projections on the other substrate so that at least one of width and height differs depending on a location.

(Appendix 40)
A liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
An insulating member is partially provided on one of the substrates so that the display pixel is divided into two or more regions having different distances between the electrodes facing each other, and controlled to a desired gradation display characteristic. A liquid crystal display device comprising:

(Appendix 41)
41. The liquid crystal display device according to appendix 40, wherein a slit is formed in the electrode on the other substrate.

(Appendix 42)
42. The liquid crystal display device according to appendix 40 or 41, wherein a bank-like protrusion is provided at one end of the insulating member.

(Appendix 43)
Manufacturing of a liquid crystal display device in which a first substrate on which a first electrode and a thin film transistor are formed and a second substrate on which a second electrode is formed sandwich a liquid crystal layer with a liquid crystal alignment film interposed therebetween A method,
Forming a transparent conductive film on the first substrate through an insulating film, processing the transparent conductive film, and forming a peripheral connection wiring together with the first electrode;
A manufacturing method of a liquid crystal display device, wherein a gate bus line and a drain bus line constituting the thin film transistor are connected by the peripheral connection wiring.

(Appendix 44)
Manufacturing of a liquid crystal display device in which a first substrate on which a first electrode and a thin film transistor are formed and a second substrate on which a second electrode is formed sandwich a liquid crystal layer with a liquid crystal alignment film interposed therebetween A method,
When forming the gate insulating film constituting the thin film transistor, an insulating member having a predetermined shape for controlling desired gradation display characteristics is formed on the first electrode together with the gate insulating film using the same material. A method for manufacturing a liquid crystal display device.

(Appendix 45)
Manufacturing of a liquid crystal display device in which a first substrate on which a first electrode and a thin film transistor are formed and a second substrate on which a second electrode is formed sandwich a liquid crystal layer with a liquid crystal alignment film interposed therebetween A method,
Forming a transparent conductive film on the first substrate through an insulating film, processing the transparent conductive film, and forming a peripheral connection wiring together with the first electrode;
While connecting the gate bus line and the drain bus line constituting the thin film transistor by the peripheral connection wiring,
When forming the gate insulating film constituting the thin film transistor, an insulating member having a predetermined shape for controlling desired gradation display characteristics is formed on the first electrode together with the gate insulating film using the same material. A method of manufacturing a liquid crystal display device.

(Appendix 46)
The gate insulating film is made of SiN, SiO. 46. The supplementary note 44 or 45, which is at least one selected from SiON, Al oxide, Al nitride, novolac resin, acrylic resin, and polyimide resin, and is formed in a single layer or a multilayer. A method for manufacturing a liquid crystal display device.

It is sectional drawing which shows the schematic main structure of the liquid crystal display device of this invention. It is a characteristic view which shows the relationship between the transmittance | permeability and response time for demonstrating the principle of 1st Embodiment. It is a schematic diagram which shows a gradation bar. It is the schematic which shows the main structures in the liquid crystal display device of Example 1 in 1st Embodiment. 2 is a photomicrograph showing a liquid crystal alignment state in the structure of Example 1. FIG. It is a characteristic view which shows the result of having investigated the effect of the partial response, and the dependence of the dielectric film thickness. It is a microscope picture which shows the relationship between the dielectric film thickness at the time of 3.0V application, and a partial response. It is the schematic which shows the main structures in the liquid crystal display device of Example 2 in 1st Embodiment. 3 is a micrograph showing a liquid crystal alignment state in the structure of Example 2. FIG. It is the schematic which shows the main structures in the liquid crystal display device of Example 3 in 1st Embodiment. 4 is a photomicrograph showing a liquid crystal alignment state in the structure of Example 3. FIG. It is the characteristic view which compared the response speed of Example 1,2. It is the characteristic view which compared the response speed of Example 1,3. FIG. 10 is a characteristic diagram (TV characteristic diagram) in which the width of the non-dielectric region is unified to about 5 μm in the structures of Examples 1 and 3, and the horizontal axis is a voltage instead of a gray scale. It is a characteristic view which shows the relationship between a voltage and response time by the structure of Examples 1 and 3. It is the schematic which shows the main structures in the liquid crystal display device of Example 4 in 1st Embodiment. It is a characteristic view which shows the result of having investigated the relationship between a voltage and the transmittance | permeability by changing irradiation energy using two types of ultraviolet light sources, a parallel light source and a non-parallel light source. It is a characteristic view which shows the result of having investigated the relationship between a voltage and the transmittance | permeability, and the relationship between the transmittance | permeability and response time, changing the irradiation amount of an ultraviolet light source. It is a characteristic view which shows the response characteristic of a low gradation. It is the schematic which shows the main structures of the liquid crystal display device of Example 7 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 8 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 9 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 9 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 10 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 11 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 12 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 13 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 13 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 13 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 13 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 14 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 15 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 15 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 15 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 15 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 15 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 15 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 15 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 16 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 16 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 16 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 16 in 1st Embodiment. It is the schematic which shows the main structures of the liquid crystal display device of Example 17 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 17 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 17 in 1st Embodiment. It is the schematic which shows the other example of the liquid crystal display device of Example 17 in 1st Embodiment. It is sectional drawing which shows schematic structure of the liquid crystal display device in 2nd Embodiment. It is a schematic block diagram which shows the 1st example of the bank-like protrusion in 2nd Embodiment. It is a schematic block diagram which shows the 2nd example of the bank-like protrusion in 2nd Embodiment. It is a schematic block diagram which shows the 3rd example of the bank-like protrusion in 2nd Embodiment. It is a schematic block diagram at the time of merging the 2nd, 3rd example of the bank-like protrusion in 2nd Embodiment. It is a schematic block diagram which shows the 4th example of the bank-like protrusion in 2nd Embodiment. It is a schematic block diagram which shows the 5th example of the bank-like protrusion in 2nd Embodiment. It is a schematic sectional drawing which shows schematic structure of the liquid crystal display device in 3rd Embodiment. It is a schematic block diagram which shows the liquid crystal display device of Example 1 in 3rd Embodiment. It is a schematic block diagram which shows the liquid crystal display device of Example 2 in 3rd Embodiment. It is a schematic block diagram which shows the liquid crystal display device of Example 3 in 3rd Embodiment. It is a schematic plan view which shows the liquid crystal display device in 4th Embodiment. It is a schematic plan view which shows the liquid crystal display device in 4th Embodiment. It is a schematic sectional drawing which shows the manufacturing method of the channel etch type TFT in 4th Embodiment. It is a schematic sectional drawing which shows the manufacturing method of the etching stopper type TFT in 4th Embodiment. It is a schematic plan view which shows the gate bus line terminal vicinity in 4th Embodiment. It is a schematic sectional drawing which shows the formation process of a gate bus line terminal. It is a schematic plan view which shows the drain bus line terminal vicinity in 4th Embodiment. It is a schematic sectional drawing which shows the formation process of a drain bus line terminal.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 2 Transparent glass substrate 3,105 Liquid crystal layer 4,34 Insulating layer 5 ITO pixel electrode 6a, 6b Liquid crystal aligning film 7 Color filter 8 ITO common electrode 9,10 Polarizer 11 Data bus line 21,82 Fine electrode pattern 22, 33, 44, 52 Dielectric layers 23, 31 High threshold regions 24, 32 Low threshold regions 25, 37, 38 Strip slits 26, 35, 36, 91-96 Bank-like projections 41, 42, 76, 77 Regions 43, 53 Drive electrode 45, 54 Split electrode 51 Capacitive coupling electrode 61 Through-hole 71 Fine electrode pattern 72, 82, 83 Insulating structure 73, 102a Slit 74 Slit group 75 Opening 81 Lattice slit 95a Notch 101 TFT substrate 102 Pixel electrode 103 CF substrate 104 lTO transparent electrode 106 insulating member 111 bank-like projection 112 dielectric film 201 Al film 04 ITO film 204a around the connection wiring 204b pixel electrode 205 domain regulating slits 209,218,129,221 contact hole 220 gate bus line terminal 222 drain bus line terminal

Claims (2)

An MVA liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
On one of the substrates, a driving electrode provided as the electrode and a capacitive electrode positioned below the driving electrode and capacitively coupled to the driving electrode are provided, and the display pixel is electrostatically controlled by the presence or absence of the driving electrode. Divided into two regions having different capacities and thresholds , and at least one of the two regions is provided with a bank-like projection that causes the pretilt angle of the liquid crystal molecules to adjust the orientation of the liquid crystal layer in the region having the lower threshold. ,
When a driving voltage is applied, an applied voltage corresponding to the capacitance is applied to each region,
The liquid crystal display device characterized in that a response speed in a low threshold area of the two areas is faster than a response speed in a high threshold area . An MVA liquid crystal display device in which a liquid crystal layer is sandwiched between a pair of substrates having electrodes,
In a predetermined region in the underlying provided drive electrodes as the electrode of one of said substrate, the drive electrode and the capacitive coupling capacitor electrode provided, display pixels, the capacitance and the threshold depending on the presence or absence of the capacitive electrode Are divided into two different regions, and at least one of the two regions is provided with a bank-like protrusion that induces a pretilt angle of liquid crystal molecules that adjusts the orientation of the liquid crystal layer in a region having a low threshold value.
When a driving voltage is applied, an applied voltage corresponding to the capacitance is applied to each region,
Liquid crystal display device you characterized by faster than the response speed in the region with a high response speed of the threshold value at a low threshold region of the two regions.

Images