JP4517105B2 - Wireless communication system switching method in software defined radio and software defined radio - Google Patents

Description

  The present invention relates to a radio communication system switching method in a software defined radio and a software defined radio using the same, and more particularly to a technology that enables high-speed and continuous switching with a feature in the configuration of a software defined radio. .

  In recent years, cellular mobile communication means such as mobile phones and PHS have become widespread, and voice communication and Internet access have become possible everywhere. Wireless access systems other than cellular mobile communications include wireless LAN wireless access systems using 2.4 GHz, 5 GHz, and 25 GHz bands, and FWA (Fixed There are fixed wireless access systems represented by Wireless Access), and their spread is also progressing.

In this way, users will be able to use many wireless access systems in the future. However, it is difficult for the current technology to carry a terminal that can use all of these wireless access systems.
In addition, a technology for performing communication between different wireless access systems and performing communication using a plurality of wireless communication systems is not generally provided.

In addition, these wireless access systems are also scheduled to use the same radio frequency band, such as the 2.4 GHz band in which a plurality of IEEE802 wireless LANs, Bluetooth, and the like are mixed. That is, there is a need to perform communication with a certain quality in the presence of many interferences.
In order to perform communication while satisfying the required quality in an environment where such multiple communication systems are mixed, from the viewpoint of the user who has the terminal, the location of the user and the frequency congestion at that location (interference Degree, received signal strength), and the amount of information that the user wants according to the conditions that the user thinks about the terminal (for example, wanting to reduce the charge or save power) It is necessary to select the best communication line regardless of whether it is wired or wireless and to convey information to the other party of communication.

From the base station's point of view, it recognizes (recognizes) the status of other base stations using the same frequency within the area covered by the local station, and gives the user the highest communication quality. There is a need to select a communication system that can.
In this way, a mechanism is built in the radio that “recognizes the environment in which each radio is located in a mixed communication system and selects the necessary communication system according to the recognition result” However, a system for performing seamless communication between a plurality of systems using the system is considered as a new generation mobile communication.

In addition, software wireless technology is attracting attention as an indispensable technology for realizing new generation mobile communication.
As disclosed in Non-Patent Document 1, software-defined radio technology has been proposed as a technology that quickly responds to bugs, upgrades, and the like that occur in communication devices.
Further, as disclosed in Non-Patent Documents 2 and 3 by the present inventors, the effectiveness is shown as means for realizing the functions of a plurality of radios in a space-saving environment such as a car. I came.

J. Mitra, IEEE Communications Magazine, vol.33, no.5, pp.26-38, 1995 Harada et al., IEICE Technical Report, SR99-12, pp. 81-88, 1999 H. Harada et.al., IEICE Trans. Commun., Vol. E85-B, No. 12, pp. 2703-2715, 2002

Further, Patent Literature 4 proposed by the present applicant is patent literature relating to software defined radio technology.
In the technique of Patent Document 4, the control unit manages the function of the software information set in the signal processing unit and the function of each of the plurality of software information stored in the information storage unit. On the other hand, the signal processing unit reads the software information corresponding to the other service function from the information storage unit and sets it in the signal processing unit in response to the request of the other service function in the state of executing the service function, The signal processing unit is configured to execute a plurality of service functions in parallel.
The present technology enables a plurality of available service functions to be used at the same time, and is a technology that improves user convenience.

This technology assumes switching between different communication systems, for example, switching and executing any one of ETC (Electric Toll Collection), FM Radio, AM Radio, and GPS (Global Positioning System) functions. ing. Therefore, when switching to another communication system in the middle of one access like Internet access, there is a problem that switching takes time in the present technology.
As described above, when performing seamless communication between various wireless access systems, it cannot be applied as it is.

Japanese Patent Laid-Open No. 2004-153662

As shown in Patent Documents 3 and 4 described above, in a software defined radio, a program corresponding to a wireless communication system to be switched is written in the software defined radio to switch functions.
In the conventional writing method, for example, as disclosed in Patent Documents 5 and 6, a rewriting program is transmitted through a wired or wireless transmission path and the program in the software defined radio is rewritten.

  As disclosed in Patent Document 6, software written in the software radio includes a CPU (Central Processing Unit) program constituting the central control signal processing device, a DSP (Digital Signal Processor) constituting the programmable signal processing device, and the like. Program, configuration data indicating an electronic circuit configuration of an FPGA (Field Programmable Gate Array), control information of an analog / digital conversion unit and an analog processing unit, and the like.

  Thus, it takes a certain time to write a program via a transmission line or the like, and such a method cannot be used when the wireless communication system is switched at high speed. There is also a problem that communication cannot be continued if an error occurs in the transmission process.

Japanese Patent Laid-Open No. 2002-094639 JP 2004-274727 A

  The present invention has been created in view of the above-described problems of the prior art, and an object of the present invention is to provide a method for switching between different types of wireless communication systems at high speed and seamlessly.

In order to solve the above problems, the present invention provides a communication switching method between different wireless communication systems in a software defined radio as follows.
The software defined radio used in the present invention includes a central control signal processing device, a programmable signal processing device, and a wireless communication board.
The central control signal processing device includes a plurality of CPUs, and the programmable signal processing device uses a programmable electronic element whose electronic circuit configuration is programmable, and is composed of one or more categorized programmable electronic elements. Provide two or more groups. In such a hardware configuration, each of the plurality of CPUs performs signal processing of at least the data link layer and the network layer in the OSI hierarchical model, while the plurality of programmable signal processing devices have the physical layer or physical layer in the model. A configuration is used in which processing related to a portion requiring signal processing at high speed is performed among layers above the OSI hierarchical model than the layers and the physical layer.

The invention according to claim 1 is a step in which one CPU and the programmable electronic element group measure a predetermined communication state value in the current wireless communication system while performing the current wireless communication, and the communication state value is first. Wireless communication of the next candidate capable of writing and communicating with a program related to a wireless communication system different from the current wireless communication system for at least any other CPU and programmable electronic element group A step of searching for a system; a step of waiting in the state when the next candidate wireless communication system is found; and a second state in which the predetermined communication state value in the current wireless communication system is worse than the first threshold value. Worse than the threshold of
It includes a step of switching the current wireless communication system to a CPU and a programmable electronic element group constituting the next candidate wireless communication system.

  The invention according to claim 2 is characterized in that the predetermined communication state value is any one of a received power value, a bit error rate value, and a packet error rate value.

  According to a third aspect of the present invention, at least one of the first threshold value and the second threshold value is selected by a user.

  According to a fourth aspect of the present invention, when a plurality of next candidate radio communication systems are found in the step of searching for a communicable next candidate radio communication system, the radio having the highest rank according to a predetermined priority order After selecting a communication system as a next candidate radio communication system, a configuration is provided in which the process proceeds to a standby process in a state set in the next candidate radio communication system.

  The invention according to claim 5 is characterized in that the radio communication system having the highest rank is selected as the next candidate radio communication system in the descending order of communication charges as the pre-defined priority.

  The invention according to claim 6 is characterized in that the radio communication system having the highest rank is selected as the next candidate radio communication system in the descending order of communication speed as the pre-defined priority.

The present invention can also provide the following software defined radio.
That is, the invention according to claim 7 is a software defined radio including a central control signal processing device, a programmable signal processing device, and a wireless communication board, and the software defined radio includes the central control signal processing device. Includes a plurality of CPUs, and a programmable signal processing device using programmable electronic elements whose electronic circuit configuration is programmable, and two or more electronic element groups composed of one or more categorized programmable electronic elements. . In such a hardware configuration, each of the plurality of CPUs performs signal processing of at least the data link layer and the network layer in the OSI hierarchical model, while the plurality of programmable signal processing devices have the physical layer or physical layer in the model. A configuration is used in which processing related to a portion requiring signal processing at high speed is performed among layers above the OSI hierarchical model than the layers and the physical layer.

  Then, the communication state measuring means for measuring a predetermined communication state value in the current wireless communication system is provided on the wireless communication board, and the first threshold value and the communication state value that is lower than the first threshold value are previously set in the central control signal processing device And detecting means for detecting that the communication state value is worse than each threshold value.

  In addition, when the central control signal processing device detects that the communication state value is worse than the first threshold value by the detection means, the current wireless communication system is connected to at least any other CPU and programmable electronic element group. The next candidate wireless communication system searching means for searching for a next candidate wireless communication system capable of communicating by writing a program related to a different wireless communication system, and a predetermined communication state value in the current wireless communication system is detected by the detection means. A wireless communication system switching means for switching the current wireless communication system to a CPU and a programmable electronic element group constituting the next candidate wireless communication system.

  The invention according to claim 8 is characterized in that the predetermined communication state value is any one of a received power value, a bit error rate value, and a packet error rate value.

  The invention according to claim 9 is characterized in that the central control signal processing device is provided with selection means for selecting at least one of the first threshold and the second threshold by a user.

  According to a tenth aspect of the present invention, when the next candidate system search means searches for a communicable next candidate radio communication system and finds a plurality of next candidate radio communication systems, the prior candidate system search means follows a predefined priority order. Provided is a configuration in which a radio communication system with the highest priority is set as a next candidate radio communication system.

  The invention according to claim 11 is characterized in that the radio communication system having the highest rank is selected as the next candidate radio communication system according to the order of lowest communication charges as the pre-defined priority.

  According to a twelfth aspect of the present invention, the radio communication system having the highest rank is selected as the next candidate radio communication system in the order of the highest communication speed as the pre-defined priority.

As described above, the present invention uses two or more CPUs and a group of programmable electronic elements to monitor the communication state while using the currently communicating wireless communication system, and the next candidate wireless communication system with two threshold levels. Prepare for.
And if it becomes worse than the threshold value of the 2nd step | paragraph, the radio | wireless communications system connected to the prepared next candidate radio | wireless communications system will be switched.
With this configuration, the wireless communication system can be switched at high speed and seamlessly, and the connection of the next candidate wireless communication system can be confirmed in advance, so that the interruption of communication due to the transmission error can be avoided.

Hereinafter, embodiments of the present invention will be described based on examples shown in the drawings. The embodiment is not limited to the following.
As shown in FIG. 1, the software defined radio (1) according to the present invention includes a central control signal processing device (10), a programmable signal processing device (20), and a wireless communication board (30).

In the wireless communication board (30), the received signal power from the antenna (7), the bit error rate (BER), and the packet error rate (PER) are measured by the communication state measurement unit (6). These measuring methods are known.
The wireless communication board (30) includes a plurality of wireless communication systems and operates in conjunction with switching of the wireless communication systems of the central control signal processing device (10) and the programmable signal processing device (20) according to the present invention.

  As shown in FIG. 2, the software defined radio (1) includes a CPU board (10) that is a central control signal processing device, an FPGA board (20) that is a programmable signal processing device, and a wireless communication board (30). The

The communication protocol used in the apparatus of the present invention is arbitrary. For example, the signal received by the wireless communication board (30) is subjected to signal processing such as decoding by the FPGA board (20), and converted into a TCP / IP packet by the CPU board (10). It can be converted and output from the connected personal computer in the form of a moving still image or sound.
During wireless transmission, the captured moving / still image or audio signal is input to the FPGA board (20) in the form of a TCP / IP packet by the CPU board (10).

The CPU board (10) has two CPUs, a main CPU (11) and a sub CPU (12), and has a system bus (13) (14) corresponding to each of them.
The CPU board (10) and the FPGA board (20) are connected by connectors (15) and (16). In the present invention, each board is provided separately and can be easily connected by connectors (15) and (16).

  For the FPGA board (20), an FPGA which is a programmable electronic element capable of programming an electronic circuit configuration is used. As a feature of the present invention, two categorized FPGA groups (referred to as right and left channels for convenience) (21) (22) are formed, and two FPGAs (23) (24) are provided for each channel. Is placed.

  The main CPU (11) and the sub CPU (12) of the CPU board (10) are configured to be able to control any of the left and right channel FPGA groups. The operation of the both is as follows. While the main CPU (11) performs wireless communication using the FPGA group of one channel, the sub CPU (12) sets the FPGA group of the other channel as the switching destination communication method. To wait for communication.

  Signal processing is switched from the main CPU (11) to the sub CPU (12) when switching from the user to a switching instruction or a communication method waiting at a predetermined switching trigger. This switching is simply a switching of the signal path on the circuit in a state where communication has already been established, so that the communication system can be switched instantaneously without interruption.

The signal processing device (3) provided by the present invention is a software defined radio using the CPU board having a plurality of CPUs and the FPGA board having a plurality of FPGAs.
Further, each component will be described in detail below.

FIG. 3 shows a detailed configuration of the FPGA board (20).
The FPGA group of each channel includes a serial interface (40) for controlling the wireless communication board (30), a digital interface for external connection (41), and a plurality of AD / DAs for inputting / outputting signals transmitted / received by the wireless communication board. A converter (42), an interface (43) for programming the electronic circuit configuration in the FPGA, and the like are provided.

  The serial interface (40) includes a digital output, an analog input, an AD / DA converter for analog output, and a buffer.

In addition, an operation clock is input from the wireless communication board (30). As shown in FIG. 1, one system of input clocks is divided into a predetermined multiple of clocks and distributed to each FPGA group for input. FIG. 3 shows the clock input interface (44) after distribution.
Thus, by dividing and using one input clock, it is possible not only to supply clocks having a plurality of types of frequencies to the FPGA group, but also to operate the two channels in a completely synchronized state.

The FPGA board mainly performs processing that requires high-speed processing among processing of the first layer (physical layer) and processing of the second layer and higher in the OSI reference model. In other words, this is high-speed processing when performing electrical conversion, mechanical processing, and communication adjustment between users for sending data to a communication line.
As shown in the figure, two FPGA groups constitute one system, and this FPGA board has four FPGAs. Therefore, at least two communication systems can be operated simultaneously.

  The number of CPUs and the number of FPGA groups of the present invention can be arbitrarily configured by a plurality. That is, when selecting an optimum system at high speed from a large number of communication systems, two or more standby systems may be operated together with one active system, in which case there are three CPUs and FPGA groups. The above configuration may be used.

Further, each FPGA (23) has a compact flash (registered trademark) interface unit (45) as a reading unit for reading the compact flash (registered trademark), and when the compact flash (registered trademark) (46) is inserted. The program information is transferred to the flash ROM, which is the memory space (7), by the processing of the main CPU (11) through the connector (15).
Then, the main CPU (11) writes a program from the flash ROM to the FPGA (23).

The specification of the FPGA board used in this embodiment is that the AD converter has 2 channels and the conversion rate is 170 Msps and 12 bits, and the DA converter has 2 channels and the conversion rate is 500 Msps and 12 bits.
As the FPGA, XC2V4000, XC2V6000, and XC2V8000 (product names) of Xilinx (registered trademark) are used.

FIG. 4 shows a detailed configuration of the CPU board (10).
An RS232C interface (50) is connected to each CPU (11) (12).
Further, SDRAM (51) and flash ROM (52) are connected to the system buses (13) and (14), and software for signal processing is stored in the flash ROM (52).

A network adapter (53) such as Ethernet (registered trademark), an audio codec processing circuit (54), and a data transmission bus (55) such as USB are connected to the system bus. Any one of these may be provided or a plurality of these may be provided according to the system requirements. Other interfaces may also be included.
In addition to the FPGA board, an FPGA (56) is provided on the system bus.

Then, a program defining the CPU processing from the outside is written into the flash ROM (52) using the interface (57) or (58). Thereafter, the programs required for the CPU (11) (12) are expanded from the flash ROM into the SDRAM (51) for those required for the CPU (11), and the programs required for the CPU (12) are expanded to the SDRAM (52). , Drive the program. The DPRAM is used for exchanging information shared between the CPUs (11) and (12).
A program for realizing various communication systems is written in the flash ROM (52) and the FPGA (56), and performs signal processing to be described later.
The program is written in the flash ROM (52) and the FPGA (56), and performs signal processing described later.

The CPU board (10) also includes a compact flash (registered trademark) interface unit (57). When the compact flash (registered trademark) (58) is inserted, the main CPU (11) or the sub CPU (12) is connected to each system bus. (13) Transfer the program to the flash ROM (52) on (14).
A program is written from the program ROM (52) to the FPGA (56) when necessary, and functions as a device for realizing a predetermined communication protocol.

Note that the CPU board of this embodiment is composed of two CPUs that operate on a 430 MIPS μ-ITRON that operates at 240 MHz so that it can also be used in a portable terminal.
In this embodiment, the functions below the IP layer of W-CDMA and IEEE802.11a wireless LAN are softwareized on the above platform. These software can be changed freely according to user's wishes, propagation path information, etc.

FIG. 5 shows a switching procedure of the wireless communication system according to the present invention.
First, the communication state value is measured in the wireless communication board (30) from the current communication (S1) state. For the measurement, a communication state measuring unit (6) shown in FIG. 1 is used. In this embodiment, the bit error rate is measured as an example. (S2)

Then, the threshold value comparison unit (2) of the central control signal processing device (10) monitors whether or not the BER is lower than the first threshold value set in advance by the user, and if it is lower (S3), the next process Proceed to
That is, when the software defined radio moves, it is necessary to gradually move away from the area of the wireless communication system and switch to another accessible wireless communication system.
At this time, as shown in FIG. 6, the time point at which the BER has decreased with the movement and has fallen below the first threshold is detected.

  The next candidate communication system search unit (3) of the central control signal processing device (10) has at least one FPGA group (5) other than the current system among the FPGA group (5) of the programmable signal processing device (20). Writeable programs are written in order. Then, the communication state measuring unit (6) detects whether each wireless communication system is in a communicable state and tries. (S4)

Furthermore, in the present invention, the user sets the use priority order for each wireless communication system in advance, and when a plurality of wireless communication systems are available, the one with the highest priority order is selected (S5).
Finally, for the one with the highest priority, a program such as a communication protocol of the wireless communication system is written to the FPGA group and the sub CPU (referred to as a subsystem).
In this state, the subsystem waits.

Further, when the communication state measurement unit (6) continues to monitor the current communication state and detects that the value falls below the second threshold (S7) as shown in FIG. 6, the wireless communication system switching unit Switch from the current radio communication system to the next candidate radio communication system. (S8)
At this time, the CPU and FPGA group that are in charge are simply switched, and the processing is performed at high speed and without any joints.

Next, a specific example of introducing the above different communication systems into the FPGA board and the CPU board will be described.
First, in the W-CDMA software, a physical layer is installed on the FPGA board. Further, a codec processing unit is installed in the FPGA 1 (23), and a modulation / demodulation processing unit is installed in the FPGA 2 (24).

  The electronic circuit configuration at this time is shown in FIGS. FIG. 7 shows an electronic circuit composed of the FPGA 1 (23), and the function indicated by each block name in the figure is as shown in Table 1 below. Table 1 shows the number of slices necessary for the function.

  FIG. 8 shows an electronic circuit composed of the FPGA 2 (24), and the function indicated by each block name in the figure is as shown in Table 2 below. Table 2 shows the number of slices necessary for the function.

  As can be seen from the table, the capacity of the turbo decoder is large as the capacity of the physical layer because this software is compatible with HSDPA. From the above results, it can be seen that FPGA1 (23) requires an 8 million gate class FPGA and FPGA2 (24) requires a 6 million gate class FPGA.

On the other hand, a signal processing program related to the data link layer (second layer) and the network layer (third layer) is installed on the CPU board. Thereby, for example, input / output by the IP protocol becomes possible.
After being converted to the IP protocol, it can be connected to a personal computer or the like by an Ethernet (registered trademark) adapter provided in the apparatus, and can perform IP communication. The CPU board of the apparatus has second and third layers. It is a requirement to perform at least layer processing, and a processing circuit for processing more layers may be provided.

  The present invention is capable of switching between different communication systems. For example, when the W-CDMA is installed in the left-channel FPGA group, the IEEE802.11a wireless LAN system can be installed in the right-channel FPGA group. .

Specifically, as in the case of W-CDMA, a physical layer (a codec in FPGA1 and a modem in FPGA2) is installed in the FPGA, and a data link layer and a network layer are installed in the CPU. Since IEEE802.11a does not require codec processing, the FPGA 1 actually has only an interface with the CPU board.
FIG. 9 shows the configuration of software entering the FPGA 1 and FPGA 2 for IEEE802.11a, and Table 3 shows the contents of each block name and the number of FPGA slices to be used.

From Table 3, FPGA2 requires 20000 slices, that is, 6 million gate class FPGA, but FPGA1 has only 700 CPU slices because it is only a CPU interface.
That is, it can be built with one 6 million gate class FPGA. In addition, common to W-CDMA and IEEE802.11a, quadrature modulation / demodulation is performed by digital signal processing.

  As the wireless communication board (30) connected to the FPGA board (20), for example, a board for 5 GHz band and a board for 2 GHz band are provided. The wireless communication board holds information such as a corresponding frequency band in advance, and notifies the type of the connected wireless communication board (30) through the serial interface (40). Also, information about the reception status such as the received signal level and the bit error rate can be notified through the interface (40).

The wireless communication board includes a frequency conversion circuit that performs frequency conversion between a radio frequency signal and an intermediate frequency signal or a baseband signal. The frequency conversion circuit performs frequency conversion by mixing with the local oscillation signal output from the frequency synthesizer. This technique is well known. Of course, an antenna (not shown) is attached to the wireless communication board.
The frequency of the local oscillation signal generated from the frequency synthesizer is instructed by a control signal from the FPGA board.

The intermediate frequency signal or baseband signal that is an analog signal is output by the DA converter (42) of the FPGA board at the time of transmission, and is transmitted from the wireless communication board to the AD converter (42) of the FPGA board at the time of reception. Is.
The FPGA board (20) associates a wireless communication system with the wireless communication board (30), and the CPU board (10), the FPGA board (20), and the wireless communication board (30) cooperate to perform wireless communication. I do.

It is a whole block diagram of the software defined radio of the present invention. It is a whole block diagram of the signal processing apparatus in the software defined radio of the present invention. It is a block diagram of the programmable signal processing apparatus of this invention. It is a block diagram of the central control signal processing apparatus of this invention. It is a flowchart which shows the switching procedure of a radio | wireless communications system. It is a display image of the display part which implement | achieves the writing procedure by this invention. It is a block diagram of the electronic circuit programmed to FPGA1 at the time of W-CDMA communication. It is a block diagram of the electronic circuit programmed to FPGA2 at the time of W-CDMA communication. It is a block diagram of the electronic circuit programmed in the FPGA group at the time of IEEE802.11a communication.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Software defined radio 2 Threshold comparison part 3 Secondary candidate radio communication system search part 4 Radio communication system switching part 5 FPGA group 6 Communication state measurement part 7 Antenna 10 CPU board 11 Main CPU
12 Sub CPU
13 System bus 14 System bus 15 Connector 16 Connector 20 FPGA board 21 Left channel FPGA group 22 Right channel FPGA group 23 FPGA
24 FPGA
30 wireless communication board

Claims (12)

A communication switching method between different radio communication systems in a software defined radio comprising a central control signal processing device, a programmable signal processing device, and a radio communication board,
The central control signal processing device includes a plurality of CPUs,
The programmable signal processing device uses programmable electronic elements whose electronic circuit configuration is programmable, and includes two or more electronic element groups composed of one or more categorized programmable electronic elements,
While causing each of a plurality of CPUs to perform signal processing of at least the data link layer and the network layer in the OSI hierarchical model,
Using a configuration in which a plurality of programmable signal processing devices perform processing related to a portion requiring signal processing at high speed in a physical layer in the model or a layer above the physical layer and the physical layer in the OSI hierarchical model,
While one CPU and the programmable electronic element group perform the current wireless communication,
Measuring a predetermined communication state value in a current wireless communication system;
If the communication state value is worse than the first threshold,
A step of searching for a next candidate radio communication system capable of communicating by writing a program related to a radio communication system different from the current radio communication system for at least any other CPU and programmable electronic element group,
When the next candidate radio communication system is found, waiting in that state;
Furthermore, when a predetermined communication state value in the current wireless communication system is worse than a second threshold value that is worse than the first threshold value,
A method of switching a wireless communication system in a software defined radio, comprising the step of switching a current wireless communication system to a CPU and a programmable electronic element group constituting the next candidate wireless communication system.
The radio communication system switching method in a software defined radio according to claim 1, wherein the predetermined communication state value is one of a received power value, a bit error rate value, and a packet error rate value. The radio communication system switching method in a software defined radio according to claim 1, wherein at least one of the first threshold and the second threshold is selected by a user. In the step of searching for a communicable next candidate radio communication system, when a plurality of next candidate radio communication systems are found,
After selecting the highest candidate radio communication system as the next candidate radio communication system according to the predefined priority order,
The method of switching to a radio communication system in a software defined radio according to any one of claims 1 to 3, wherein the process proceeds to a step of waiting in a state set in the next candidate radio communication system. 5. The wireless communication system switching in the software defined radio according to claim 4, wherein the wireless communication system having the highest priority is selected as the next candidate wireless communication system in accordance with the order of low communication charges as the predefined priority. Method. 5. The wireless communication system switching in a software defined radio according to claim 4, wherein the wireless communication system with the highest priority is selected as the next candidate wireless communication system according to the order of fast communication speed as the predefined priority. Method. A software defined radio comprising a central control signal processor, a programmable signal processor, and a radio communication board, the software defined radio includes
The central control signal processing device includes a plurality of CPUs,
The programmable signal processing device includes a programmable electronic element having a programmable electronic circuit configuration, and includes two or more electronic element groups each including one or more categorized programmable electronic elements,
While causing each of a plurality of CPUs to perform signal processing of at least the data link layer and the network layer in the OSI hierarchical model,
Using a configuration in which a plurality of programmable signal processing devices perform processing related to a portion requiring signal processing at a high speed in a physical layer in the same model or a layer above the physical layer and the physical layer in the OSI hierarchical model,
A communication state measuring means for measuring a predetermined communication state value in the current wireless communication system on the wireless communication board;
In the central control signal processing device, a first threshold and a second threshold whose communication state value is worse than that are set in advance, and detecting means for detecting that the communication state value is worse than each threshold value;
When the central control signal processing device detects that the communication state value is worse than the first threshold value by the detection means, it differs from the current wireless communication system with respect to at least any other CPU and programmable electronic element group. A next candidate radio communication system searching means for searching for a next candidate radio communication system capable of communicating by writing a program related to the radio communication system;
When the predetermined communication state value in the current wireless communication system is detected to be worse than the second threshold value by the detecting means, the current wireless communication system is connected to the CPU and the programmable electronic element group constituting the next candidate wireless communication system. A software defined radio comprising: a wireless communication system switching means for switching between.
The software defined radio according to claim 7, wherein the predetermined communication state value is one of a received power value, a bit error rate value, and a packet error rate value. In the central control signal processor,
The software defined radio according to claim 7 or 8, further comprising selection means for selecting at least one of the first threshold and the second threshold by a user. The next candidate system search means
When a plurality of next candidate radio communication systems are found by searching for a communicable next candidate radio communication system,
The software defined radio according to any one of claims 7 to 9, wherein a wireless communication system with the highest priority is set as a next candidate wireless communication system in accordance with a predetermined priority order. 11. The software defined radio according to claim 10, wherein the wireless communication system having the highest priority is selected as the next candidate wireless communication system according to the order of low communication charges as the predetermined priority order. 11. The software defined radio according to claim 10, wherein the wireless communication system having the highest priority is selected as the next candidate wireless communication system in the order of the highest communication speed as the predetermined priority order.