JP4514538B2 - Circuit device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a circuit device and a method for manufacturing the circuit device, and more particularly to a circuit device and a method for manufacturing the circuit device in which the positional accuracy of a built-in circuit element is improved.

  In recent years, with the increase in the density of circuit devices, development of a technology capable of accurately bonding a substrate and a circuit element or a circuit element and a circuit element is desired.

  A method of manufacturing a circuit device using a conventional technique will be described with reference to FIG.

  First, referring to FIG. 12A, reference numeral 101 denotes a conductive foil made of Cu, for example. The separation groove 103 is formed by etching using the conductive film 102 on the Cu foil 101 as a mask. A portion separated by the separation groove 103 becomes a conductive pattern 104.

Next, referring to FIG. 12B, the conductive pattern 104 formed on the conductive foil 101 is formed for each block 105. A unit 106 constituting one circuit device is formed from the plurality of conductive patterns 104, and a block 105 is formed from the plurality of units 106. Here, a position recognition pattern 107 is provided at the upper and lower peripheral edges of the conductive foil 101 provided with the block 105. The position recognition pattern 107 is formed from the conductive film 102 used when forming the conductive pattern 104. Therefore, the positional relationship between the conductive pattern 104 and the position recognition pattern 107 coincides with the positional relationship at the design stage. The position recognition patterns 107 are arranged at the four corners of each block 105. Here, circuit elements are arranged based on position information obtained from the position recognition pattern 107 (see Patent Document 1).
JP 2003-51577 A

  However, in the method of manufacturing a circuit device as described above, it is difficult to confirm whether the circuit element is arranged at a predetermined position. For example, when two semiconductor elements are two-dimensionally arranged using the position recognition pattern 107, first, the pattern 107 is recognized, the first semiconductor element is arranged, and then the pattern 107 is recognized and the second semiconductor element is recognized. The semiconductor element is arranged. However, when there is a shift in the first arrangement due to a malfunction of the mounting apparatus, the two shift. Therefore, it is necessary to compare the position where the circuit element is scheduled to be arranged with the position where the circuit element is actually arranged, but there is no means for doing so.

  Further, in the case where circuit elements are stacked, the same is true, and there is no means for confirming the position of the arranged circuit elements, so that it was not possible to recognize the deviation or inclination at the stage of arranging the circuit elements. Therefore, it has been difficult to accurately stack circuit elements. Furthermore, since the manufacturing process such as laminating circuit elements on the upper part of the circuit element where the deviation or inclination occurs is continued, the productivity is lowered and the production cost is increased.

  The present invention has been made in view of the above problems. Accordingly, a main object of the present invention is to provide a circuit device and a manufacturing method thereof in which the positional accuracy of a built-in circuit element is improved.

  The circuit device of the present invention includes a conductive pattern, a circuit element electrically connected to the conductive pattern, a first recognition pattern used for recognizing a position where the circuit element is disposed, and the circuit element. And a second recognition pattern used for confirming the position where is arranged. Accordingly, the second recognition pattern enables visual observation after the circuit elements are arranged.

  The circuit device according to the present invention includes a conductive pattern, a plurality of stacked circuit elements electrically connected to the conductive pattern, and a first used for recognizing a position where the circuit element is disposed. It comprises a recognition pattern and a second recognition pattern used to confirm the position where the circuit element is arranged. Therefore, visual observation can also be performed on the circuit elements having a stack structure.

  The method of manufacturing a circuit device according to the present invention includes a step of recognizing a position where a circuit element is arranged using a first recognition pattern and arranging the circuit element, and the circuit element is arranged using the second recognition pattern. And a step of confirming the arranged position. Therefore, the positional accuracy of the circuit element can be improved.

  In the method of manufacturing a circuit device according to the present invention, the first circuit element is arranged using the first recognition pattern, and the position where the first circuit element is arranged using the second recognition pattern. A step of confirming, arranging a second circuit element above the first circuit element using the first conductive pattern, and arranging the second circuit element using the second recognition pattern And a step of electrically connecting the first circuit element and the second circuit element to the conductive pattern. Therefore, the positional accuracy of the stacked circuit elements can be improved.

  According to the circuit device and the manufacturing method thereof of the present invention, the circuit elements are arranged using the first recognition pattern, and the positions of the circuit elements arranged using the second recognition pattern are confirmed. Therefore, it is possible to confirm whether the circuit elements are correctly arranged by using the second recognition pattern, and it becomes possible to easily select the circuit elements that are defective due to the positional deviation.

  Furthermore, according to the circuit device and the manufacturing method thereof of the present invention, the vertical and horizontal shifts of the first circuit elements arranged using the first recognition pattern and the shift due to planar rotation (hereinafter referred to as inclination) are confirmed. Then, the second circuit element is disposed on the first circuit element. Therefore, it is possible to recognize the deviation and the inclination at the stage where the circuit elements are arranged. Further, it can be immediately confirmed visually whether or not the laminated circuit elements are accurately arranged. The recognized information is fed back to the circuit element placement process, so that the circuit elements can be accurately stacked. Furthermore, when a circuit element having a deviation or inclination is confirmed, productivity can be improved and production cost can be reduced by stopping the manufacturing process such as stacking the circuit elements.

  With reference to FIG. 1, the circuit device of this embodiment will be described. In FIG. 1A, the sealing resin 17 covering the circuit element is omitted.

  The circuit device 10 of this embodiment includes a laminated circuit element 15, a substrate 14 on which the circuit element 15 is electrically connected and mounted, and a sealing resin 17 that covers the circuit element 15. . Although not shown in the drawings, an insulating resin film, for example, a solder resist is coated except for the electrical connection portion of the conductive pattern.

  The substrate 14 has the insulating film 11 as a core, and has a first conductive pattern 12A formed on the front surface and a second conductive pattern 12B formed on the back surface. The first conductive pattern 12 </ b> A and the second conductive pattern 12 </ b> B are electrically connected by a connection portion 13 that penetrates the insulating film 11. The first conductive pattern 12A includes a first recognition pattern 20 and a second recognition pattern 21, which are features of the present embodiment. An external electrode 18 is formed on the second conductive pattern 12B.

  For the insulating film 11, polyimide resin, epoxy resin, or the like is used. Here, a filler may be mixed into the insulating film 11 in consideration of heat dissipation.

  The first conductive pattern 12A is made of a metal such as copper and is formed on the surface of the insulating film 11. The first conductive pattern 12 </ b> A includes a dummy pattern 22, a pad 24, a wiring part 25, a first recognition pattern 20, and a second recognition pattern 21. The dummy pattern 22 is divided into a plurality. See FIG. 5 for details. The pad 24 is a part that is electrically connected to the electrode on the circuit element 15. Furthermore, the wiring part 25 is a part that connects the pad 24 and the connection part 13 together.

  The first recognition pattern 20 is used to recognize the position of the conductive pattern, and is used when performing die bonding and wire bonding of circuit elements. Further, two first recognition patterns 20 are formed in the vicinity of opposite corners of a unit constituting one circuit device. The shape of the first recognition pattern 20 has a circular outer shape, and a cross-shaped opening is formed inside. Position recognition is performed by recognizing the center of the cross shape.

  The second recognition pattern 21 is used when confirming the position of the arranged circuit element 15. In a circuit device having a stack structure as in the present embodiment, since the circuit elements are stacked, the positional accuracy of the circuit elements becomes more important. For example, there is a risk that the electrode of the lower circuit element is covered by the displacement of the position of the upper circuit element. In addition, due to the inclination of the circuit element in the lower layer, the inclination of the circuit element stacked on the upper part is also caused. When the circuit elements are displaced from each other, it is difficult to wire-bond the circuit elements and the circuit elements or the circuit elements and the conductive pattern accurately. Therefore, in the present embodiment, by providing the second recognition pattern 21, it is possible to confirm the position of the arranged circuit element.

  Specifically, the second recognition pattern 21 is formed on the substrate corresponding to the extension of the side of each circuit element 15. Therefore, when the circuit element 15 is accurately arranged, the side of the circuit element 15 is positioned on a line connecting the pair of second recognition patterns 21 formed on the opposite side of the substrate. Here, a virtual line connecting the centers of the recognition patterns 21 is formed. Therefore, by comparing the positions of the second recognition pattern 21 and the circuit element 15, it is possible to confirm the displacement of the arranged circuit element in the XY direction (plane direction). In addition, since the position of the circuit element can be confirmed by visual observation, more accurate position confirmation can be performed. Furthermore, it becomes possible to easily select circuit elements that should be defective due to the displacement. Moreover, the inclination of the circuit element 15 can also be confirmed by confirming the deviation of the circuit element in the planar direction.

  As shown in FIG. 5, the dummy pattern 22 includes the first conductive pattern 20 and is provided below the first circuit element 15 </ b> A. The dummy pattern 22 is subdivided into a plurality of pieces and formed so as to be separated from each other. By forming the dummy pattern 22 in such a shape, the warpage of the substrate 14 can be prevented. The warpage of the substrate 14 is caused by a difference in thermal expansion coefficient between the dummy pattern 22 and the insulating film 11. Thus, by subdividing the dummy pattern 22, the stress acting between the insulating film 11 and the dummy pattern 22 can be dispersed. Therefore, it is possible to prevent the substrate 14 from warping. Further, by forming the dummy pattern 22, the area of the first conductive pattern 12A and the area of the second conductive pattern 12B can be made comparable. This also contributes to prevention of warpage of the substrate 14.

  On the other hand, a solder resist is coated on the dummy pattern 22. This solder resist has poor adhesion to the Cu foil. For this reason, the recessed part is formed by subdividing the dummy pattern, and the adhesiveness of the solder resist is improved.

  If the dummy pattern is not formed, the solder resist has a shape recessed downward due to the thickness of the conductive pattern formed around the dummy pattern, and a recess is formed in the die bond agent applied thereon. If the first circuit element is mounted in a state where there is a dent, air may be taken into the back surface of the circuit element and a crack may occur later.

  However, here, since the dummy pattern is provided in the portion corresponding to the dent, this dent can be suppressed, and since the die bond agent is formed on the solder resist, the dent can be further suppressed. The air intake described above can be prevented. Moreover, since this dent can be suppressed, the die bonding agent can ensure a relatively flat property, so that the flatness of the circuit element fixed thereon can be maintained. Here, it is possible to configure the circuit device without applying the solder resist.

  The second conductive pattern 12B is patterned on the back surface of the insulating film 11. The second conductive pattern 12B may function as a pad for forming the external electrode 18. Further, the second conductive pattern 12B itself may be used as an external electrode. Further, the second conductive pattern 12B may be formed so as to intersect the upper first conductive pattern 12A in a plane. Therefore, even when the circuit element 15 has a large number of electrodes, by forming a multilayer wiring structure, a crossover is possible and a pattern can be routed freely. Although this embodiment has a two-layer structure, it can be increased to three layers, four layers, five layers or more depending on the number of electrodes of circuit elements, the mounting density of elements, and the like. The second conductive pattern 12B is covered with the solder resist 19 except for the region where the external electrode is formed.

  The connection portion 13 is a portion that penetrates the insulating film 11 and electrically connects the first conductive pattern 12A and the second conductive pattern 12B.

  The circuit element 15 is fixed on the first conductive pattern 12A. Further, the second circuit element 15B is fixed to the upper part of the first circuit element 15A, and the third circuit element 15C is fixed to the upper part of the second circuit element 15B. The first circuit element 15A is fixed on the first conductive pattern 12A by a die bond agent 23A. Resin paste, solder, or the like is used for the die bond agent 23A. When the chip back surface of the first circuit element 15A is grounded with GND, it is grounded with the dummy pattern 22 via solder, and at least one of the dummy patterns 22 is in contact with the GND line.

  Furthermore, a sheet-like resin can be adopted as the die bond agent 23B. As the circuit element 15, an active element such as a transistor, a diode, an IC, or a system LSI is employed. The circuit element 15 may be a circuit element having several tens to several hundreds of pads on its surface, or a so-called system LSI. Here, the system LSI is a large-scale element that has an analog arithmetic circuit, a digital arithmetic circuit, a storage unit, or the like and realizes a system function with one LSI. Furthermore, passive elements such as resistors and capacitors can be used as the circuit element 15. Further, a SIP (System In Package) may be configured by connecting a plurality of the above-described elements inside the apparatus.

  The sealing resin 17 is formed by a transfer mold using a thermosetting resin or an injection mold using a thermoplastic resin. Here, the sealing resin 17 is formed so as to seal the first conductive pattern 12 </ b> A and the stacked circuit elements 15. Furthermore, as a sealing method other than the mold, for example, a known sealing method such as sealing by potting or sealing by a case material can be applied.

  The external electrode 18 is made of a brazing material such as solder, is formed at a predetermined position on the back surface of the second conductive pattern 12B, and functions as a connection unit when the circuit device 10 is fixed to the mounting substrate.

  Although a circuit device having two wiring layers has been described here, the present invention can also be applied to a circuit device having a single layer or a multilayer wiring structure of three or more layers.

  A method for manufacturing the circuit device of this embodiment will be described with reference to FIGS.

  First, referring to FIG. 2A, a substrate 14 in which a first conductive foil 30A and a second conductive foil 30B are stacked with an insulating film 11 interposed therebetween is prepared. The insulating film 11 is made of an insulating material made of a polymer such as polyimide resin or epoxy resin. In the case of a casting method in which a paste is applied to form a sheet, the thickness of the insulating layer 14 is about 10 μm to 100 μm. Further, in consideration of thermal conductivity, a filler may be mixed in the insulating layer 14. The first conductive foil 30A and the second conductive foil 30B are preferably made of Cu as a main material or a known lead frame material. Further, the first conductive foil 30A and the second conductive foil 30B are formed on the insulating film 11 by a plating method, a vapor deposition method or a sputtering method, or a metal foil formed by a rolling method or a plating method is attached. Also good.

  With reference to FIG. 2 (B) to FIG. 2 (D), a process of forming the connection portion 13 that electrically connects the first conductive foil 30A and the second conductive foil 30B will be described.

  Referring to FIG. 2B, after applying resist 31 to the surface of first conductive foil 30A, patterning is performed to partially expose first conductive foil 30A. Specifically, the resist 31 is patterned so that a portion that electrically connects two conductive foils is exposed. Then, the first conductive foil 30A is etched using the resist 31 as a mask. In this embodiment, since the first conductive foil 30A is mainly made of Cu, ferric chloride or cupric chloride can be used as the etchant. The opening diameter of the through hole 32 formed by etching is, for example, about 50 to 100 μm.

  Referring to FIG. 2C, after removing resist 31, insulating film 11 directly under through-hole 32 is removed by laser using first conductive foil 30A as a mask. Then, the upper surface of the second conductive foil 30 </ b> B is exposed at the bottom of the through hole 32. As the laser, a carbon dioxide laser is preferable. In addition, after the insulating film 11 is evaporated by the laser, if there is a residue at the bottom of the through hole 32, the residue is removed by wet etching with sodium permanganate or ammonium persulfate.

  Referring to FIG. 2D, a plating film is formed on the entire surface of first conductive foil 30A including through hole 32. This plating film can be formed by electroless plating, electrolytic plating, or a combination thereof. Here, a Cu film having a thickness of about 2 μm is first formed on the entire surface of the first conductive foil 30A including at least the through holes 32 by electroless plating. Thereby, the first conductive foil 30A and the second conductive foil 30B are electrically connected. Thereafter, electrolytic plating is performed using the first and second conductive foils 30A and 30B as electrodes, and a Cu film having a thickness of about 20 μm is plated. Thereby, the through-hole 32 is embedded with Cu, and the connection part 13 is formed.

  With reference to FIG. 3, the process of forming the first conductive pattern 12A and the second conductive pattern 12B by patterning the front and back surfaces of the substrate 14 will be described.

  Referring to FIG. 3A, resist 31 is patterned on the surfaces of first conductive foil 30A and second conductive foil 30B. Specifically, the resist 31 is patterned so as to cover the region where the conductive pattern is to be formed.

  Referring to FIG. 3B, the first conductive foil 30A and the second conductive foil 30B are patterned by etching using the resist 31 as a mask. Referring to FIG. 3C, the resist is removed after the etching, and first conductive pattern 12A and second conductive pattern 12B are formed.

  With reference to FIG. 4, the board | substrate 14 formed by the above-mentioned process is demonstrated. 4A is a top view of the substrate, and FIG. 4B is an enlarged view of one block 35.

  Referring to FIG. 4A, a plurality of units 34 are formed in a matrix on the surface of substrate 14. Here, the unit 34 refers to a component forming one circuit device. The substrate 14 is divided into blocks 35, and each block 35 is composed of an assembly of units 34. With reference to FIG. 4 (B), the 1st recognition pattern 20 and the 2nd recognition pattern 21 are formed for every unit 34 which is the point of this invention.

  With reference to FIG. 5, the first conductive pattern 12A and the second conductive pattern 12B formed in the unit 34 will be described. FIG. 5A is a top view of the unit 34, and FIG. 5B is a bottom view of the unit 34.

  With reference to FIG. 5A, the first conductive pattern 12A will be described. Here, the pad 24, the wiring part 25 extending from the pad 24, the dummy pattern 22, the first recognition pattern 20, and the second recognition pattern 21 are formed by the first conductive pattern 12A. ing.

  The pad 24 is a part where a metal thin wire is wire-bonded. Here, the pads 24 are arranged so as to surround the circuit element arrangement region A1.

  The wiring part 25 is a part made of the first conductive pattern 13 extended so as to connect the pad 24 and the connection part 13. Here, when incorporating a plurality of circuit elements in the circuit device, the wiring portion 25 can be extended so as to connect the circuit elements.

  The dummy pattern 22 is provided near the center of the circuit element arrangement region A1. The dummy pattern 22 is subdivided into a plurality of pieces and formed so as to be separated from each other. As described above, the dummy pattern 22 having such a shape prevents the substrate 14 from warping and prevents air from being taken in between the die bond agent 23A and the chip 15A.

  The first recognition pattern 20 is used to recognize the position of the conductive pattern, and is used when performing die bonding and wire bonding of circuit elements. In addition, two first recognition patterns 20 are formed in one unit 34 at opposite corners. This may be provided at four corners. By recognizing the two first recognition patterns 20, the position of the conductive pattern inside the unit 34 is recognized. Specifically, the shape of the first recognition pattern 20 has a circular outer shape, and a cross-shaped opening is formed inside. Then, the positions of the conductive patterns are recognized by recognizing the cross-shaped centers formed at these two locations. Furthermore, by forming the first recognition pattern 20 for each unit, it is possible to further improve the positional accuracy.

  The 2nd recognition pattern 21 is used in order to confirm the position of the circuit element after arrangement | positioning. And each 2nd recognition pattern 21 is located on the extended line of the side of each circuit element to be mounted. Details of this will be described later with reference to FIG.

  Since the 1st recognition pattern 20 and the 2nd recognition pattern 21 are formed simultaneously with the other pattern which comprises 12 A of 1st electroconductive patterns, both positional accuracy is very high. Therefore, a highly reliable recognition pattern is formed.

  Here, the first recognition pattern 20 and the second recognition pattern 21 are arranged in the periphery of each unit 34. These recognition patterns may remain in the circuit device as a product, or may be removed in the middle of the manufacturing process.

  Since it is not necessary in the finished product, more actual patterns can be arranged in the finished product if it is provided in the portion corresponding to the dicing line. Further, if a pattern equivalent to the second recognition pattern 21 is provided on the four sides on the back side of the package, if the same pattern is provided on the mounting substrate side such as a printed circuit board, the external connection electrode 18 is added. Stress can be suppressed.

  With reference to FIG. 5B, the second conductive pattern 12B will be described. The second conductive pattern 12B is electrically connected to the first conductive pattern 12A on the surface via the connection portion 13. Here, the second conductive pattern 12B mainly forms external electrodes. When the area of the second conductive pattern 12B is smaller than the first area, a dummy pattern may be provided in the second conductive pattern 12B.

  With reference to FIG. 6, the process of apply | coating the die-bonding agent 23A on the 1st conductive pattern 12A is demonstrated. 6A is a top view of the unit 34, and FIG. 6B is a cross-sectional view taken along line X-X 'of FIG. 6A.

  First, a solder resist is coated, and an electrical connection site is removed by a well-known photoetching. Then, a die bonding agent 23A is applied to the circuit element mounting area A1. Here, the die bond agent 23 </ b> A is applied on the dummy pattern 22. An insulating or conductive adhesive is used for the die bonding agent 23A. In the case where the die bond agent 23A is applied to a flat surface, if the die bond material is applied excessively, surface tension acts on the die bond agent 23A and the surface is curved. However, as shown in FIG. 6B, the dummy pattern 22 is subdivided to form grooves 37 between the dummy patterns 22, and the excess die bond agent 23 </ b> A flows into the grooves 37, thereby allowing the die bond agent to flow. The surface of 23A can be formed flat. Moreover, the contact area of the die-bonding agent 23A increases because the groove 37 is formed. Therefore, the adhesion strength between the die bonding agent 23A and the insulating film 11 can be increased. In addition, the inclination of the first circuit element 15A fixed by the dummy pattern can be suppressed. Furthermore, it is possible to prevent air from being taken in between the die bonding agent 23A and the first circuit element 15A. Here, it is possible to manufacture the circuit device without coating the solder resist.

  With reference to FIG. 7, the step of arranging the first circuit element 15A will be described. 7A is a top view of the unit 34, and FIG. 7B is a cross-sectional view taken along the line X-X 'of FIG. 7A. Referring to FIG. 7A, first circuit device 15A is fixed to the surface of die bond agent 23A. In this step, the position of the conductive pattern is recognized and fixed using the first recognition pattern 20. 7B, since the surface of the die bond agent 23A is formed flat as described above, the first circuit element 15A can be fixed to the substrate 14 horizontally. . That is, by fixing the circuit element on the subdivided dummy pattern 22, it is possible to prevent the inclination of the circuit element.

  With reference to FIG. 8, the process of arrange | positioning the 2nd circuit element 15B is demonstrated. 8A and 8B are top views of the unit 34. FIG. Specifically, first, after confirming the position of the arranged first circuit element 15A, the second circuit element 15B is laminated.

  With reference to FIG. 8A, a method of confirming the position of the arranged first circuit element 15A will be described. A plurality of second recognition patterns 21 are provided near the periphery of the unit 34. And the 2nd recognition pattern 21 is formed on the extended line of the side of each circuit element 15 to be mounted. Here, the second conductive pattern 21A corresponds to the first circuit element 15A. Then, a line connecting the centers of the second recognition patterns 21A formed in the opposing peripheral portions becomes the extension line L1. In this embodiment, since the second recognition pattern 21A is provided on the extension line of each side of the first circuit element 15A, two extension lines L1 can be drawn in each of the X direction and the Y direction. Therefore, as shown in the figure, if the side of the first circuit element 15A is arranged in the region surrounded by the extension line L1, it is accurately arranged. Furthermore, the 2nd recognition pattern 21 is formed corresponding to each circuit element 15 laminated | stacked.

  Referring to FIG. 8B, after it is confirmed that the first circuit element 15A is accurately arranged, the second circuit element 15B is arranged above the first circuit element 15A. At this time, the second circuit element 15 </ b> B is arranged after recognizing the position to be arranged using the first recognition pattern 20. Therefore, since the first circuit element 15A and the second circuit element 15B are arranged using the same first recognition pattern 20, the positional accuracy of the circuit element 15 can be improved.

  With reference to FIG. 9, the process of arranging the third circuit element 15C will be described. FIG. 9 is a top view of the unit 34. Here, first, the position where the second circuit element 15B is arranged is confirmed, and then the third circuit element 15C is arranged. As described above, a plurality of second recognition patterns 21 are provided near the periphery of the unit 34. And the 2nd recognition pattern 21 is formed on the extended line of the side of each circuit element 15 to be mounted. Here, the second recognition pattern 21B corresponds to the second circuit element 15B, and the second recognition pattern 21C corresponds to the third circuit element 15C. A line connecting the second recognition patterns 21B is an extension line L2. After confirming that the second circuit element 15B is disposed in the region surrounded by the extension line L2, the third circuit element 15C is disposed above the second circuit element 15B. Also here, the third circuit element 15C is arranged by recognizing the position to be arranged using the first recognition pattern 20. Finally, it is confirmed whether the third circuit element 15C is arranged in the region surrounded by the extension line L3.

  In this embodiment, the second recognition pattern 21 is provided on the extended lines of all the sides of the circuit element 15. However, one side in the X direction and one in the Y direction may be selected, and the second recognition pattern 21 may be formed on an extension line of the side.

  In this way, by forming the second recognition pattern 21 on the extension line of the circuit element 15, the position can be easily confirmed by an imaging means such as a CCD camera or visually.

  The circuit element 15 is arranged such that the side of the circuit element 15 is positioned on a line connecting the centers of the second recognition patterns 21 formed in the opposing peripheral portions. Accordingly, it is possible to confirm the deviation and inclination of the arranged circuit device in the XY direction.

  Further, since the position of the circuit element can be confirmed by visual observation, the position can be confirmed more accurately and quickly.

  Furthermore, since it becomes a means for confirming the position where the 2nd recognition pattern 21 is arrange | positioned, the degree of deviation | shift can be recognized correctly. Then, by feeding back the obtained deviation information to the bonding apparatus, the arrangement position can be easily corrected, so that the arrangement accuracy of the circuit elements can be improved. In addition, the production of defective products can be suppressed by feeding back the deviation information at the stage where the circuit elements are arranged.

  Furthermore, the step of further laminating circuit elements and the step of wire bonding can be omitted on the upper part of the circuit element where the shift has occurred. Therefore, productivity can be improved and production cost can be reduced. Further, if the displacement is small enough not to affect the electric circuit, it is possible to perform accurate wire bonding by making the wire bonding apparatus recognize the displacement information.

  In this embodiment, the position is confirmed every time each circuit element 15 is arranged. However, the position may be confirmed when all the circuit elements 15 are arranged. In this case, a manufacturing process such as a wire bonding process can be stopped.

  With reference to FIG. 10, a process of electrically connecting each circuit element 15 and the first conductive pattern 12 </ b> A by the thin metal wire 16 will be described. 10A is a top view of the unit 34, and FIG. 10B is a cross-sectional view taken along the line X-X 'of FIG. 10A. The position of the pad 36A is recognized using the first recognition pattern 20, and wire bonding is performed. Here, the second circuit element 15 </ b> B and the third circuit element 15 </ b> C are electrically connected using the metal thin wire 16. Since the area of the electrode 38 on the circuit element 15 is small, it is necessary to accurately recognize the position between the circuit elements. In this embodiment, by providing the step of confirming the position of the circuit element 15, the positional accuracy between the second circuit element 15B and the third circuit element 15C is improved. Furthermore, the positional relationship of the circuit elements 15 is accurately grasped. Therefore, it becomes possible to wire-bond minute electrodes accurately.

  With reference to FIG. 11 (A), the process of resin-molding the first conductive pattern 12A and the circuit element 15 with the sealing resin 17 will be described.

  As a molding method, transfer molding, injection molding, coating, dipping, and the like are possible. However, in view of mass productivity, transfer molds and injection molds are suitable. In this embodiment, a dummy pattern is provided in the first conductive pattern, and the areas of the upper first conductive pattern 12A and the lower second conductive pattern 12B are substantially the same. Accordingly, it is possible to prevent the substrate 21 from warping in a process involving heating such as a molding process.

  Subsequently, referring to FIG. 11B, the back surface of the substrate 14 is covered with a solder resist 19 except for a portion where the external electrode 18 is formed. Next, the external electrode 18 is formed by solder reflow. Finally, dicing is performed to separate them into individual circuit devices, and the circuit device 10 is completed.

  Further, although this embodiment refers to a method for manufacturing a circuit device having a multilayer wiring structure, the present invention can also be applied to a circuit device having a single-layer wiring structure.

On the other hand, when the plurality of circuit elements are arranged in a plane, the first and second recognition patterns can be used. In this case as well, if they are arranged on the extension lines of the respective sides, it is possible to recognize the positional deviation of each circuit element.

It is (A) perspective view and (B) sectional drawing which show the circuit apparatus of this invention. It is (A) sectional drawing-(D) sectional drawing which shows the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing-(C) sectional drawing which shows the manufacturing method of the circuit apparatus of this invention. It is (A) top view and (B) enlarged view which show the manufacturing method of the circuit apparatus of this invention. It is (A) top view and (B) bottom view which show the manufacturing method of the circuit apparatus of this invention. It is (A) top view and (B) sectional drawing which show the manufacturing method of the circuit apparatus of this invention. It is (A) top view and (B) sectional drawing which show the manufacturing method of the circuit apparatus of this invention. It is (A) top view and (B) top view which show the manufacturing method of the circuit apparatus of this invention. It is a top view which shows the manufacturing method of the circuit apparatus of this invention. It is (A) top view and (B) sectional drawing which show the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing and (B) sectional drawing which show the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing and (B) top view which show the manufacturing method of the conventional circuit device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Circuit apparatus 11 Insulating film 12A 1st conductive pattern 12B 2nd conductive pattern 13 Connection part 14 Board | substrate 15A 1st circuit element 15B 2nd circuit element 15C 3rd circuit element 16 Metal fine wire 17 Sealing resin 18 External Electrode 19 Solder resist 20 First recognition pattern 21 Second recognition pattern 22 Dummy pattern 23A-B Die bond agent 24 Pad 25 Wiring part

Claims (11)

A conductive pattern;
A circuit element electrically connected to the conductive pattern;
A first recognition pattern used to recognize a position where the circuit element is disposed;
A second recognition pattern used for confirming a position where the circuit element is disposed ,
The circuit device, wherein the second recognition pattern is located on an extension line of a side of the circuit element . A conductive pattern;
A plurality of circuit elements stacked in electrical connection with the conductive pattern;
A first recognition pattern used to recognize a position where each of the circuit elements is disposed;
A second recognition pattern used for confirming the position where each circuit element is disposed ,
The circuit device, wherein the second recognition pattern is located on an extension line of a side of the circuit element . 3. The circuit device according to claim 1, wherein a part of the conductive pattern is a dummy pattern divided into a plurality of parts, and the dummy pattern is located below the circuit element.   A conductive pattern electrically connected to a circuit element to be placed, and a first recognition pattern and a second recognition pattern made of the same material as the conductive pattern in a region excluding the region where the circuit element is placed Forming a step;
  Recognizing a position where the circuit element is arranged using the first recognition pattern, and arranging the circuit element;
  Confirming a position where the circuit element is arranged using the second recognition pattern;
  And a step of electrically connecting the circuit element and the conductive pattern. A conductive pattern electrically connected to a plurality of circuit elements to be placed; a first recognition pattern made of the same material as the conductive pattern and a second pattern excluding a region where the circuit elements are placed; Forming a recognition pattern;
  Disposing a first circuit element using the first recognition pattern and confirming a position where the first circuit element is disposed using the second recognition pattern;
  A second circuit element is arranged above the first circuit element using the first recognition pattern, and a position where the second circuit element is arranged is confirmed using the second recognition pattern. And a process of
  And a step of electrically connecting the first circuit element and the second circuit element to the conductive pattern. 6. The method of manufacturing a circuit device according to claim 5, wherein the first circuit element and the second circuit element are arranged using the same first recognition pattern. 6. The method of manufacturing a circuit device according to claim 5, wherein the position where the first circuit element and the second circuit element are arranged is confirmed using the individual second recognition pattern. 6. The method of manufacturing a circuit device according to claim 4, wherein the second recognition pattern is provided on an extension line of a side of the circuit element to be placed. A plurality of units constituting one circuit device are formed by the conductive pattern,
  6. The method of manufacturing a circuit device according to claim 4, wherein the first recognition pattern and the second recognition pattern are formed for each unit. The method of manufacturing a circuit device according to claim 9, wherein the first recognition pattern and the second recognition pattern are provided inside the unit. 6. The circuit device according to claim 4, wherein the conductive pattern includes a dummy pattern divided into a plurality of parts, and the dummy pattern is formed in a region corresponding to a lower portion of the circuit element. Production method.

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