JP4501225B2 - Light emitting device and method for manufacturing light emitting device - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to electrodes used for light emitting elements such as LEDs (light emitting diodes) and LD (laser diodes), particularly nitride semiconductor layers (for example, In_xAl_yGa_1-xyN, 0 ≦ x, 0 ≦ y, x + y ≦ 1) and a method for manufacturing the light emitting device.
[0002]
[Prior art]
In recent years, light-emitting elements having a nitride semiconductor layer, such as blue LEDs and LDs, have attracted attention. The nitride semiconductor layer generally emits light by carrier coupling between carriers injected from the p-type nitride semiconductor layer and carriers injected from the n-type nitride semiconductor layer. In particular, good crystallinity can be obtained by forming on a sapphire substrate. However, sapphire is an insulating material, and an electrode cannot be formed on the surface of the sapphire substrate. For this reason, when a substrate made of an insulating material such as a sapphire substrate is used for a light emitting element, it is necessary to form an electrode on the exposed contact layer by removing the semiconductor layer by etching or the like.
[0003]
[Problems to be solved by the invention]
As described above, when the electrode is formed by removing the semiconductor layer, the number of light-emitting elements obtained per unit area of the wafer is reduced, resulting in an increase in manufacturing cost. Further, since the electrode portions approach, it is necessary to perform highly accurate position control during bonding.
[0004]
On the other hand, there is a technique in which a nitride semiconductor layer is formed on a wafer-like sapphire substrate, then the sapphire substrate is removed by polishing or the like, and positive and negative electrodes are formed at positions facing each other across the semiconductor layer. . However, as the sapphire substrate is polished, the wafer is warped due to the mismatch of the lattice constant between the nitride semiconductor layer and sapphire, and the semiconductor layer is cracked, etc., so that the manufacturing yield deteriorates and the manufacturing cost increases. There was a point. In particular, since the lattice constant mismatch between the sapphire substrate and the nitride semiconductor is large, this warpage is a serious problem in a light-emitting element made of a nitride semiconductor.
[0005]
Therefore, the present invention provides a light-emitting element having a nitride semiconductor layer in which electrodes are formed on both sides of the light-emitting element and a method for manufacturing the light-emitting element at a low cost without incurring a decrease in manufacturing yield. The purpose is to provide.
[0006]
[Means for Solving the Problems]
  A method for manufacturing a light emitting device according to the present invention is the method for manufacturing a light emitting device in which a wafer in which at least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer are stacked on a substrate is divided for each light emitting device. Forming a first metal layer for obtaining ohmic contact with the p-type nitride semiconductor layer on substantially the entire surface of the semiconductor layer, and providing a warp preventing layer for preventing warpage of the wafer above the first metal layer. The p-electrode forming step to be formed, and after the p-electrode forming step, the nitride semiconductor layer is laminated so that at least a part of the n-type nitride semiconductor layer is exposed in each region of the light emitting element to be divided A substrate removing step of removing the substrate from a surface opposite to the substrate surface, an n electrode forming step of forming an n electrode so as to contact at least a part of the exposed n-type nitride semiconductor layer, and the p electrode And n Including a division step of the light emitting device is divided for each region to be divided wafers which poles are formedThe warpage preventing layer includes at least one or more metal bumps formed on the first metal layer and a resin layer formed on the first metal layer excluding a portion where the metal bump is formed. Composed. Accordingly, a light-emitting element having a nitride semiconductor layer in which electrodes are formed on both surfaces of the light-emitting element can be provided at a low cost without causing a decrease in manufacturing yield while obtaining good crystallinity.
[0007]
In the method for manufacturing a light emitting element of the present invention, the warpage preventing layer may include at least a second metal layer having a thickness of 10 μm or more.
[0008]
In the method for manufacturing a light emitting device of the present invention, the second metal layer is made of a metal containing at least Ni.
[0009]
In the method for manufacturing a light emitting device of the present invention, the second metal layer is formed by electroless plating.
[0010]
[0011]
Further, the method for manufacturing a light emitting element of the present invention includes an Au layer forming step of forming an Au layer containing at least Au above the warpage preventing layer,TheIn addition.
[0012]
In the method for manufacturing a light emitting device of the present invention, the substrate uses sapphire.
[0013]
Moreover, in the manufacturing method of the light emitting element of this invention, the said n electrode is a transparent electrode.
[0014]
MaThe light emitting device of the present invention is a light emitting device having at least a semiconductor layer composed of an n-type nitride semiconductor layer and a p-type nitride semiconductor layer, and an n electrode and a p electrode. The p-electrode is formed on almost the entire surface of the p-type nitride semiconductor layer, and the p-type nitride semiconductor layer has an ohmic contact with the p-type nitride semiconductor layer. And at least one light emission including at least one metal bump formed on the first metal layer and a resin layer formed on the first metal layer excluding a portion where the metal bump is formed. It can be set as an element.
  Moreover, the light emitting element of this invention can be set as the structure which the side surface of the said semiconductor layer is exposed from the said resin layer.
  A light emitting device according to another embodiment of the present invention will be described below. In the light emitting device of the present invention, a semiconductor layer in which at least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer are stacked is formed, and in the light emitting device having an n electrode and a p electrode, the n electrode and the p electrode are Each of the p-type nitride semiconductor layer and the p-type nitride semiconductor layer is formed on the substantially entire surface of the p-type nitride semiconductor layer so as to make ohmic contact with the p-type nitride semiconductor layer. It comprises at least a warpage preventing layer for preventing warpage of the wafer above the metal layer.
[0015]
In the light-emitting element of the present invention, a semiconductor layer in which at least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer are stacked is formed. The light-emitting element includes an n-electrode and a p-electrode. At least a first metal layer for obtaining ohmic contact with the p-type nitride semiconductor layer over substantially the entire surface of the p-type nitride semiconductor layer, and a warp prevention layer for preventing warpage of the wafer above the metal layer. The n-type nitride semiconductor layer is exposed by removing at least a part of the substrate, and the n-electrode is formed to be in contact with at least a part of the exposed n-type nitride semiconductor layer. It can be set as a structure.
[0016]
In the light emitting device of the present invention, the warpage preventing layer may include at least a second metal layer having a thickness of 10 μm or more.
[0017]
In the light emitting device of the present invention, the second metal layer is made of a metal containing at least Ni.
[0018]
In the light emitting device of the present invention, the second metal layer is formed by electroless plating.
[0019]
[0020]
In the light emitting device of the present invention, the resin layer has a thickness of 20 μm or more.
[0021]
In the light emitting device of the present invention, the p-electrode has an Au layer containing at least Au above the warpage preventing layer.
[0022]
In the light emitting device of the present invention, the substrate uses sapphire.
[0023]
In the light emitting device of the present invention, the n electrode is a transparent electrode.
[0024]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment Mode 1 A light-emitting element and a method for forming electrodes of the light-emitting element of the present invention will be described below.
[0025]
As shown in FIG. 1A, a semiconductor layer 2 is formed on a wafer-like substrate 1. As the substrate 1, for example, an insulating substrate such as sapphire or spinel is used. The semiconductor layer 2 is formed of a nitride semiconductor layer and is a nitride semiconductor In doped with an n-type impurity such as Si._xAl_yGa_1-xyAn n-type nitride semiconductor layer 21 made of N (0 ≦ x, 0 ≦ y, x + y ≦ 1) and a p-type nitride semiconductor layer 23 made of a nitride semiconductor doped with a p-type impurity such as Mg Is done.
[0026]
Then, after forming the semiconductor layer 2, as shown in FIG. 1B, ohmic contact with the p-type nitride semiconductor layer 23 is obtained on the p-type nitride semiconductor layer 23. For example, Pt is formed on the Ni / Pt layer. The first p electrode 31 and the warp preventing layer 32 which are the first metal layers are sequentially formed. Here, the warp preventing layer 32 is formed of a metal layer having a thickness of 10 μm or more. As described above, the p-electrode 3 including the second metal layer having a thickness of 10 μm or more is formed on almost the entire surface of the wafer, thereby supporting the wafer for removing the substrate 1 with sufficient strength over the entire wafer. A member can be obtained. The support metal layer 32 is preferably formed by electroless plating. This is because when an insulating material such as sapphire is used for the substrate 1, it is difficult to apply a uniform electric field to the entire wafer and form a uniform metal layer. At this time, if the thickness of the warp preventing layer 32 is not uniform, the wafer is distorted and the semiconductor layer 2 is easily broken.
[0027]
Thereafter, as shown in FIG. 1C, the wafer on which the p electrode 3 having the support metal layer 32 is formed on the support base 5 is placed so that the p electrode 3 side faces the support base 5. The substrate 1 is polished and removed so that the n-type nitride semiconductor layer 21 is exposed. Or after leaving a board | substrate 10-100 micrometers, it is good also as a structure which removes at least one part of the board | substrate 1 by an etching or a dicing saw. In this way, at least a part of the n-type nitride semiconductor layer 21 is exposed. Thus, by forming the p-electrode having at least the second metal layer having a thickness of 10 μm or more on the p-type nitride semiconductor layer 23, it is possible to reduce the warpage of the wafer that occurs when the substrate 1 is polished. Prevent crackingButit can. Further, it is possible to polish the substrate 1 while reducing distortion and maintaining parallelism with high accuracy.
[0028]
Then, an n electrode 4 made of, for example, W / Al or ITO is formed on the exposed n-type nitride semiconductor layer 21. In this case, the n electrode may be formed so as to be in contact with at least a part of the exposed n-type nitride semiconductor layer. In particular, by forming the n-electrode 4 as a transparent electrode, the light generated in the semiconductor layer 2 can be extracted with high efficiency by using the p-electrode 3 formed with a sufficient thickness and having a high reflectance as a reflecting surface. Can do. In the case of W / Al, a transparent electrode can be formed by forming W with a thickness of 10 to 30 mm, Al with a thickness of about 20 to 40 mm, and ITO with a thickness of 1000 to 5000 mm.
[0029]
The wafer on which the electrodes are thus formed can be divided into an appropriate size to obtain a light emitting element. According to the method for forming an electrode of a light emitting element of the present invention, since the cracking of the wafer can be prevented, the yield can be improved and the number of light emitting elements obtained per unit area of the wafer can be improved. Further, since the p-electrode 3 and the n-electrode 4 can be formed to face each other with the semiconductor layer 2 interposed therebetween, the light-emitting element of the present invention can obtain uniform light emission. Furthermore, when sapphire is used as the substrate 1, the nitride semiconductor layer 2 with good crystallinity can be formed, and thus light emission with high light emission efficiency can be obtained.
  (Embodiment 2) A light emitting element and a method for forming electrodes of the light emitting element of the present invention will be described below.
[0030]
As shown in FIG. 7A, a semiconductor layer 2 is formed on a wafer-like substrate 1. As the substrate 1, for example, an insulating substrate such as sapphire or spinel is used. The semiconductor layer 2 is formed of a nitride semiconductor layer and is a nitride semiconductor In doped with an n-type impurity such as Si._xAl_yGa_1-xyAn n-type nitride semiconductor layer 21 made of N (0 ≦ x, 0 ≦ y, x + y ≦ 1) and a p-type nitride semiconductor layer 23 made of a nitride semiconductor doped with a p-type impurity such as Mg Is done.
[0031]
Then, after forming the semiconductor layer 2, as shown in FIG. 7B, a metal such as a Ni / Pt layer that can make ohmic contact with the p-type nitride semiconductor layer 23 is formed on almost the entire surface of the p-type nitride semiconductor layer 23. A first p electrode 31 which is the formed metal layer is formed. The first p electrode 31 may have a structure in which a Pt layer is further laminated on the Ni / Pt layer.
[0032]
After forming the first p electrode, a plurality of metal bumps 32 are formed on the first p electrode 31 as shown in FIG.bIs formed. Next, as shown in FIG.bThe resin layer 32 is formed on the first p-electrode 31 except for the portion where is formed.cIs formed. Then, a chamfering process is performed to make the surface uniform by grinding or the like. These metal bumps 32bAnd resin layer 32cThus, a warp preventing layer 32 for preventing the wafer from warping when the substrate 1 is polished is formed. The warp preventing layer 32 is preferably about 40 to 80 μm. As described above, since the warpage preventing layer is formed on almost the entire surface of the wafer, a wafer supporting member for removing the substrate 1 can be obtained with sufficient strength over the entire wafer.
[0033]
Thereafter, as shown in FIG. 7E, the wafer on which the p-electrode 3 having the warp preventing layer 32 is formed on the support base 5 is placed so that the p-electrode 3 side faces the support base 5, and the polishing member 6 The substrate 1 is polished and removed so that the n-type nitride semiconductor layer 21 is exposed. Or after leaving a board | substrate 10-100 micrometers, it is good also as a structure which removes at least one part of the board | substrate 1 by an etching or a dicing saw. In this way, at least a part of the n-type nitride semiconductor layer 21 is exposed. As described above, by forming the p-electrode having at least the warpage preventing layer 32 having a thickness of 10 μm or more on the p-type nitride semiconductor layer 23, the warpage of the wafer that occurs during polishing of the substrate 1 can be reduced. Can be prevented. Further, it is possible to polish the substrate 1 while reducing distortion and maintaining parallelism with high accuracy.
[0034]
Then, an n electrode 4 made of, for example, W / Al or ITO is formed on the exposed n-type nitride semiconductor layer 21. In this case, the n electrode may be formed so as to be in contact with at least a part of the exposed n-type nitride semiconductor layer.
[0035]
The wafer on which the electrodes are formed in this manner is attached to at least one metal bump 32.bThe light emitting element can be obtained by dividing into an appropriate size. According to the method for forming an electrode of a light emitting element of the present invention, since the cracking of the wafer can be prevented, the yield can be improved and the number of light emitting elements obtained per unit area of the wafer can be improved. Further, since the p-electrode 3 and the n-electrode 4 can be formed to face each other with the semiconductor layer 2 interposed therebetween, the light-emitting element of the present invention can obtain uniform light emission. Furthermore, when sapphire is used as the substrate 1, the nitride semiconductor layer 2 with good crystallinity can be formed, and thus light emission with high light emission efficiency can be obtained.
  (Example 1) An example in which the electrode forming method of a light emitting element in the present invention is applied to an LED will be described.
[0036]
For example, the sapphire C surface is used as the substrate 1 and each layer is formed by a metal organic chemical vapor deposition method (MOCVD method). As shown in FIG. 2A, a buffer layer (not shown) that relaxes the mismatch of lattice constant between the substrate 1 and the nitride semiconductor layer 2 on the substrate 1, and an n-type for obtaining ohmic contact with the n electrode From the n-type contact layer that is the nitride semiconductor layer 21, the active layer 22 that generates light by carrier coupling, the p-type cladding layer for confining carriers in the active layer, and the p-type contact layer for obtaining ohmic contact with the p-electrode The p-type nitride semiconductor layer 23 to be configured is sequentially formed.
[0037]
The buffer layer is made of GaN having a film thickness of 10 to 500 mm grown by low temperature. The n-type contact layer is made of Si-doped GaN having a thickness of 1 to 20 μm, preferably 2 to 6 μm. Further, an n-type cladding layer made of, for example, AlGaN doped with Si may be formed on the n-type contact layer. The active layer 22 may be composed of InGaN, or may be composed of a single well layer or multiple quantum well layer of GaN / InGaN / GaN. The p-type cladding layer is made of Mg-doped AlGaN having a thickness of 100 to 500 mm. This p-type cladding layer can also be omitted if the carriers are sufficiently confined in the active layer. The p-type contact layer is made of Mg-doped GaN having a thickness of 0.001 to 0.5 μm, preferably 0.05 to 0.2 μm.
[0038]
As shown in FIG. 2B, Ni is formed with a thickness of 100 mm on the p-type nitride semiconductor layer 23 of the wafer formed as described above, and Pt is sputtered with a thickness of 500 mm on the Ni film. After forming, annealing is performed. This Ni / Pt combination can provide good ohmic contact with the p-type nitride semiconductor layer 23 even as Ni / Au, Co / Au, and Pd / Pt. Further, after forming the Ni / Pt layer, Pt is formed to a thickness of 5000 mm, and annealing is performed to form the first p electrode 31.
[0039]
After the formation of the first p electrode 31, the surface layer is roughened and adsorbed by sputtering or etching with a thickness of several to 1000 mm of palladium Pd to form the underlayer 32a. This Pd acts as a reaction catalyst. Then, P-Ni is formed on the base layer 32a by electroless plating with a thickness of 10 μm or more, preferably 50 to 300 μm, and the second metalLayer andTo do. The phosphorus content is preferably 5 to 10%. MostrearAu is formed in a thickness of 1000 mm by electroless plating or vapor deposition. When an insulator such as sapphire is used for the substrate 1 of the nitride semiconductor layer 2, a uniform electric field is applied to the entire wafer.AdditionTherefore, it is preferable to form a metal layer having a sufficient thickness by electroless plating. Examples of other electroless plating of Ni include Cu, Au, and Ag. In particular, Ni is more preferable because the formation speed is high and it is easy to obtain a sufficient thickness.
[0040]
Thereafter, as shown in FIG. 2C, the wafer on which the p-electrode 3 is formed is placed on a support 5 such as a surface plate, and the surface of the substrate 1 is polished by a polishing member 6 such as a grindstone. Thus, the second metal having a sufficient thickness as compared with the first p electrode 31.LayerBy forming, the wafer can be prevented from being distorted during the polishing of the substrate, and the substrate 1 can be polished in parallel without cracking the wafer.
[0041]
The substrate 1 is polished until the n-type nitride semiconductor layer 21 is exposed as shown in FIG. After the substrate 1 is polished, the region damaged by the polishing of the n-type contact layer 21 is etched by about 1 to 2 μm by RIE. Thereafter, tungsten is formed on the exposed n-type contact layer 21 by sputtering with a thickness of 20 mm and then with aluminum with a thickness of 30 mm, and annealing is performed to form an n-electrode 4 as shown in FIG. 3B. To do. The n electrode 4 may be formed of ITO. The wafer thus formed is divided by a dicing saw to obtain a light emitting element as shown in FIG.
[0042]
Although an example in which the n electrode is formed on the entire surface of the wafer is shown here, the efficiency of extracting light from the light emitting element can be improved by forming the n electrode 4 partially by patterning.
  (Example 2) The steps up to the formation of the p-electrode 3 are performed in the same manner as in Example 1. After the formation of the p-electrode, the light-emitting element is placed on the support base 5 and, as shown in FIG. 4A, the polishing member 6 leaves the substrate 1 on the n-type nitride semiconductor layer 21 side by about 10 μm to 100 μm. Grind. What is necessary is just to set the thickness of this board | substrate 1 which should be left suitably according to the control precision of grinding | polishing. Thereafter, as shown in FIG. 4B, the substrate 1 is cut to a depth of about 0.5 to 2.0 μm of the n-type contact layer by a dicing saw to form a groove. After the groove is formed, the sapphire substrate 1 and the n-type nitride semiconductor layer 21 are etched by RIE so that the n-type nitride semiconductor layer 21 is scraped by about 1 to 2 μm.
[0043]
Then, with respect to the substrate 1 and the n-type nitride semiconductor layer 21, tungsten W is formed by sputtering with a thickness of 20 mm, and then aluminum Al is formed with a thickness of 30 mm, and annealing is performed, as shown in FIG. An n electrode 4 is formed on the substrate. The wafer thus formed is divided into light emitting elements by a dicing saw as shown in FIG.
[0044]
In Example 2, damage to the n-type nitride semiconductor layer 21 due to polishing can be minimized. Further, it is possible to prevent the n-type nitride semiconductor layer 21 from being excessively polished due to variations in the polishing depth control.
[0045]
Further, the n electrode 4 is not necessarily formed on the entire surface of the n-type nitride semiconductor layer 21, and the n electrode 4 is partially formed as shown in the perspective view of the light emitting device shown in FIG. Also good. Here, FIG. 5B is a plan view of the example of the n-electrode 4 shown in FIG. 5A as viewed from directly above the n-electrode 4. The number of grooves formed in the n-type nitride semiconductor layer 21 is not necessarily one, and a plurality of grooves may be formed. Of course, it is not necessary to form the n-electrode 4 in the entire region of the groove, and it is sufficient to form the n-electrode 4 only in a region necessary for carrier injection.
[0046]
Furthermore, grooves formed in the n-type nitride semiconductor layer 21 may be formed from the center of the light emitting element to each corner of the light emitting element as shown in FIG. However, FIG. 6 is a plan view of the n-electrode 4 as viewed from directly above, similarly to FIG. In this example, since the n-electrode 4 is formed in two directions not parallel to each other in the plane of the n-type nitride semiconductor layer 21 from the center of the light-emitting element, carriers are injected relatively uniformly over the entire surface of the light-emitting element. Light emission in the element can be made uniform.
[0047]
Further, it is preferable to form a groove by using a dicing saw because it is not necessary to add a new configuration to the light emitting device manufacturing apparatus, but the shape exposing the n-type nitride semiconductor layer 21 is a groove shape. The n-type nitride semiconductor layer 21 may be exposed by removing at least a part of the substrate necessary for carrier injection regardless of the shape.
  (Example 3) An example in which the method for forming electrodes of a light emitting element in the present invention is applied to an LED will be described.
[0048]
For example, the sapphire C surface is used as the substrate 1 and each layer is formed by a metal organic chemical vapor deposition method (MOCVD method). As shown in FIG. 8A, a buffer layer (not shown) that relaxes the mismatch of the lattice constant between the substrate 1 and the nitride semiconductor layer 2 on the substrate 1, and an n-type for obtaining ohmic contact with the n electrode From the n-type contact layer that is the nitride semiconductor layer 21, the active layer 22 that generates light by carrier coupling, the p-type cladding layer for confining carriers in the active layer, and the p-type contact layer for obtaining ohmic contact with the p-electrode The p-type nitride semiconductor layer 23 to be configured is sequentially formed.
[0049]
The buffer layer is made of GaN having a film thickness of 10 to 500 mm grown by low temperature. The n-type contact layer is made of Si-doped GaN having a thickness of 1 to 20 μm, preferably 2 to 6 μm. Further, an n-type cladding layer made of, for example, AlGaN doped with Si may be formed on the n-type contact layer. The active layer 22 may be composed of InGaN, or may be composed of a single well layer or multiple quantum well layer of GaN / InGaN / GaN. The p-type cladding layer is made of Mg-doped AlGaN having a thickness of 100 to 500 mm. This p-type cladding layer can also be omitted if the carriers are sufficiently confined in the active layer. The p-type contact layer is made of Mg-doped GaN having a thickness of 0.001 to 0.5 μm, preferably 0.05 to 0.2 μm.
[0050]
As shown in FIG. 8B, Ni is formed with a thickness of 100 mm on the p-type nitride semiconductor layer 23 of the wafer formed as described above, and Pt is sputtered with a thickness of 500 mm on the Ni film. After forming, annealing is performed. This Ni / Pt combination can provide good ohmic contact with the p-type nitride semiconductor layer 23 even as Ni / Au, Co / Au, and Pd / Pt. Further, after forming the Ni / Pt layer, Pt is formed to a thickness of 5000 mm and annealed to form the first p electrode 31.
[0051]
After forming the first p electrode 31, a plurality of metal bumps 32 are formed on the first p electrode 31.bThen, the metal bump 32 is formed.bThe resin layer 32 is formed on the first p electrode 31 excluding the portion where the is formed.cIs formed. Metal bump 32bIs composed of gold bumps, copper bumps, solder bumps and the like. Also, the resin layer 32cIs made of epoxy resin or the like. These metal bumps 32bAnd resin layer 32cThus, a warp preventing layer 32 for preventing the wafer from warping when the substrate 1 is polished is formed. The warp prevention layer 32 is preferably 20 μm or more, and more preferably about 40 to 80 μm. As described above, since the warpage preventing layer is formed on almost the entire surface of the wafer, a wafer supporting member for removing the substrate 1 can be obtained with sufficient strength over the entire wafer. Also, this metal bump 32bAnd resin layer 32cAfter the warp prevention layer 32 made of is formed, it is preferable to prevent the wafer from being distorted at the time of polishing the substrate by performing a chamfering process to make the thickness uniform.
[0052]
Also, the bestrearAu is formed to a thickness of 1000 mm by plating or vapor deposition to form an Au layer 34. Thereby, the adhesion between the p-electrode 3 and the lead member or the wire can be improved. The Au layer 34 can be omitted if the warp preventing layer 32 and the lead member or wire are well bonded.
[0053]
Thereafter, as shown in FIG. 8C, the wafer on which the p-electrode 3 is formed is placed on a support 5 such as a surface plate, and the surface of the substrate 1 is polished by a polishing member 6 such as a grindstone. Thus, by forming the warp preventing layer 32 having a sufficient thickness as compared with the first p-electrode 31, it is possible to prevent the wafer from being distorted during the polishing of the substrate. Polishing can be performed.
[0054]
The substrate 1 is polished until the n-type nitride semiconductor layer 21 is exposed as shown in FIG. After the substrate 1 is polished, the region damaged by the polishing of the n-type contact layer 21 is etched by about 1 to 2 μm by RIE. After that, the exposed n-type contact layer 21 is formed by sputtering with tungsten with a thickness of 20 mm and then with aluminum with a thickness of 30 mm, and annealed to form an n-electrode 4 as shown in FIG. 9B. To do. The n electrode 4 may be formed of ITO. The wafer thus formed is divided by a dicing saw to obtain a light emitting element as shown in FIG. In the example shown in FIG. 9, each light emitting element has two metal bumps 32.bHowever, one metal bump 32 per light emitting element is provided.bOr at least one metal bump 32.bAs long as it has.
[0055]
Although an example in which the n electrode is formed on the entire surface of the wafer is shown here, the efficiency of extracting light from the light emitting element can be improved by forming the n electrode 4 partially by patterning.
  (Example 4) The steps up to the formation of the p-electrode 3 are performed in the same manner as in Example 1. After forming the p-electrode 3, the light-emitting element is placed on the support 5, and the polishing member 6 is left so that the substrate 1 is left on the n-type nitride semiconductor layer 21 side by about 10 μm to 100 μm, as shown in FIG. Polish by. What is necessary is just to set the thickness of this board | substrate 1 which should be left suitably according to the control precision of grinding | polishing. Thereafter, as shown in FIG. 10B, the substrate 1 is cut to a depth of about 0.5 to 2.0 μm of the n-type contact layer by a dicing saw to form a groove. After the groove is formed, the sapphire substrate 1 and the n-type nitride semiconductor layer 21 are etched by RIE so that the n-type nitride semiconductor layer 21 is scraped by about 1 to 2 μm.
[0056]
Then, the substrate 1 and the n-type nitride semiconductor layer 21 are formed by sputtering tungsten W with a thickness of 20 mm and then aluminum Al with a thickness of 30 mm and annealing, as shown in FIG. An n electrode 4 is formed on the substrate. The wafer thus formed is divided into light emitting elements by a dicing saw as shown in FIG.
[0057]
This example4Can minimize damage to the n-type nitride semiconductor layer 21 due to polishing. Further, it is possible to prevent the n-type nitride semiconductor layer 21 from being excessively polished due to variations in the polishing depth control.
[0058]
Further, the n-electrode 4 is not necessarily formed on the entire surface of the n-type nitride semiconductor layer 21, and as in the second embodiment, the n-electrode 4 is partially n-shaped as in the perspective view of the light-emitting element shown in FIG. The electrode 4 may be formed. Here, FIG. 5B is a plan view of the example of the n-electrode 4 shown in FIG. 5A as viewed from directly above the n-electrode 4. The number of grooves formed in the n-type nitride semiconductor layer 21 is not necessarily one, and a plurality of grooves may be formed. Of course, it is not necessary to form the n-electrode 4 in the entire region of the groove, and it is sufficient to form the n-electrode 4 only in a region necessary for carrier injection.
[0059]
Furthermore, grooves formed in the n-type nitride semiconductor layer 21 may be formed from the center of the light emitting element to each corner of the light emitting element as shown in FIG. However, FIG. 6 is a plan view of the n-electrode 4 as viewed from directly above, similarly to FIG. In this example, since the n-electrode 4 is formed in two directions not parallel to each other in the plane of the n-type nitride semiconductor layer 21 from the center of the light-emitting element, carriers are injected relatively uniformly over the entire surface of the light-emitting element. Light emission in the element can be made uniform.
[0060]
Further, it is preferable to form a groove by using a dicing saw because it is not necessary to add a new configuration to the light emitting device manufacturing apparatus, but the shape exposing the n-type nitride semiconductor layer 21 is a groove shape. The n-type nitride semiconductor layer 21 may be exposed by removing at least a part of the substrate necessary for carrier injection regardless of the shape.
[0061]
【The invention's effect】
By the light emitting element and the electrode forming method of the light emitting element of the present invention, a light emitting element having a nitride semiconductor layer in which electrodes are formed on both surfaces of the light emitting element can be provided while obtaining good crystallinity.
[Brief description of the drawings]
FIG. 1 is a diagram schematically showing steps from formation of a p-electrode to polishing of a substrate in Embodiment 1 of the present invention.
FIG. 2 is a diagram schematically showing steps from formation of a p-electrode to polishing of a substrate in Example 1 of the present invention.
FIG. 3 is a diagram schematically showing steps from removal of a substrate to formation of an n-electrode and division into light-emitting elements in Example 1 of the present invention.
FIG. 4 is a diagram schematically showing steps from removal of a substrate to formation of an n-electrode and division into light-emitting elements in Example 2 of the present invention.
FIG. 5 is a schematic view of a light emitting device according to a modification in Example 2 of the present invention.
FIG. 6 is a schematic plan view of a light emitting device according to another modification of Example 2 of the present invention as viewed from the n-electrode side.
7 is a drawing schematically showing steps from formation of a p-electrode to polishing of a substrate in Embodiment 2 of the present invention. FIG.
FIG. 8 is a diagram schematically showing steps from formation of a p-electrode to polishing of a substrate in Example 3 of the present invention.
FIG. 9 is a diagram schematically showing steps from removal of a substrate to formation of an n-electrode and division into light-emitting elements in Example 3 of the present invention.
FIG. 10 is a diagram schematically showing steps from removal of a substrate to formation of an n-electrode and division into light-emitting elements in Example 4 of the present invention.
[Explanation of symbols]
1 ... Sapphire substrate
2 ... Nitride semiconductor layer
21... N-type nitride semiconductor layer
22 ... Active layer
23... P-type nitride semiconductor layer
3 ... p electrode
31 ... 1st metal layer
32 ... Warpage prevention layer
32a ... Underlayer
32b ...Metal bump
32c ...Resin layer
34 ... Au layer
4 ... n electrode
5 ... Support stand
6 ... Abrasive member

Claims (9)

In a method for manufacturing a light emitting device, a wafer in which at least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer are stacked on a substrate is divided for each light emitting device.
To prevent forming a first metal layer for obtaining a p-type nitride semiconductor layer and the ohmic contact to all surfaces of the p-type nitride semiconductor layer, a warp of the wafer above the first metal layer forming an anti-curl layer for the p-electrode forming step including,
After the p-electrode forming step, from the surface opposite to the substrate surface on which the nitride semiconductor layer is laminated so that at least a part of the n-type nitride semiconductor layer is exposed in each region of the light emitting element to be divided. A substrate removing step of removing the substrate;
Forming an n electrode so as to be in contact with at least a part of the exposed n-type nitride semiconductor layer;
A dividing step in which the wafer on which the p-electrode and the n-electrode are formed is divided into regions to be divided into light-emitting elements ;
Only including,
The warpage preventing layer is composed of at least one or more metal bumps formed on the first metal layer and a resin layer formed on the first metal layer excluding a portion where the metal bumps are formed. method of manufacturing a light-emitting element characterized by that.   The method of manufacturing a light emitting device according to claim 1, wherein the warpage preventing layer includes at least a second metal layer having a thickness of 10 μm or more.   The method of manufacturing a light emitting device according to claim 2, wherein the second metal layer is made of a metal containing at least Ni.   The method of manufacturing a light emitting device according to claim 2, wherein the second metal layer is formed by electroless plating. Method of manufacturing a light-emitting device according to claim 1 to 4, further comprising a Au layer forming step of forming at least comprises Au layer Au above the said anti-curl layer. Method of manufacturing a light emitting device according to claim 1 to 5 wherein the substrate is characterized by using a sapphire. Method of manufacturing a light-emitting device according to claim 1 to 6, wherein the n electrode are transparent electrodes. In a light emitting device having a semiconductor layer at least composed of an n-type nitride semiconductor layer and a p-type nitride semiconductor layer, and an n-electrode and a p-electrode,
The n electrode and the p electrode are opposed to each other across the semiconductor layer,
The p-electrode is formed in said full face of the p-type nitride semiconductor layer, a first metal layer for obtaining said p-type nitride semiconductor layer and the ohmic contact was formed on the first metal layer A light emitting device comprising at least one metal bump and a resin layer formed on the first metal layer excluding a portion where the metal bump is formed. The light emitting device according to claim 8 , wherein a side surface of the semiconductor layer is exposed from the resin layer.

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