JP4498905B2 - Light emitting unit and image forming apparatus - Google Patents

Description

  The present invention relates to a light emitting unit including a predetermined light emitting element and an image forming apparatus including the light emitting unit.

  In a conventional electrophotographic recording type image forming apparatus, a charged photosensitive drum is selectively irradiated with light according to print information to form an electrostatic latent image, and then toner is attached to the electrostatic latent image. Then, development is performed to form a toner image, and the toner image is transferred to a sheet as a recording medium and fixed, thereby forming an image on the sheet.

  As such an image forming apparatus, an apparatus using a light emitting diode (hereinafter referred to as LED) as a light source for irradiating a photosensitive drum with light for exposure is known. An LED head used in such an image forming apparatus includes an LED array chip in which a plurality of LED elements are arranged, and a drive IC (Integrated Circuit) that drives each of the LED array chips. The LED head also includes a reference voltage generation circuit that generates a reference voltage, generates a reference current based on the generated reference voltage and a resistance built in the driving IC, and changes the LED element in accordance with the reference current. A driving current for driving is generated. At this time, in the LED head, a positive temperature coefficient is given to the applied reference voltage to compensate for the decrease in the light emission power with respect to the temperature rise of the LED element (for example, see Patent Document 1).

Japanese Patent Laid-Open No. 10-332494

  By the way, in the conventional LED heads including the above-mentioned Patent Document 1, for example, when performing printing such as solid black coating, a large number of LED elements are driven all at once. A large peak current is generated, which causes a voltage drop in the power supply voltage. In the LED head, the reference voltage value decreases due to the voltage drop of the power supply voltage, and the drive current of the LED element also fluctuates. As a result, a situation in which the print density decreases or the density unevenness occurs is caused. Was.

  Further, in the conventional LED head, since the self-heating amount of the driving IC and the reference voltage circuit is different, the temperature drift particularly immediately after the power is turned on appears remarkably. If the LED head is left without being driven until a sufficient time has passed since the power is turned on, and the temperature of the entire LED head reaches an equilibrium state and shifts to a printing operation, the effect of such temperature drift There is no problem. However, in an LED head, since the thermal time constant is usually several tens of minutes, such a usage pattern is not realistic.

  Moreover, in the manufacturing process of the LED head, a process of correcting the variation in light emission power caused by the manufacturing variation of the LED array chip is required. Therefore, an image forming apparatus usually includes a circuit for correcting and adjusting the drive current value of the LED element in units of dots.

  However, the light quantity measurement for correcting the variation in the light emission power of the LED element is performed after the completion of the LED head. As described above, the power is turned on to measure the light quantity of the LED head, and the temperature is measured. If it continues to wait until it reaches an equilibrium state, and then light quantity measurement is performed, there is a problem that the completion inspection time of the LED head and the time required for the light quantity correction process increase, resulting in a significant increase in manufacturing cost. .

  On the other hand, when the light quantity measurement for correcting the variation in the light emission power of the LED element is performed without waiting for the LED head to reach the temperature equilibrium state, the influence of the temperature drift of the driving IC described above is measured. Cannot be reflected in Therefore, in such a case, after the LED head is mounted on the actual printer, the effect of temperature drift becomes obvious, which causes a decrease in printing density and density unevenness.

  As described above, in the conventional LED head, the reference voltage fluctuates due to the fluctuation of the power supply voltage, and the driving current of the LED element also fluctuates due to this, and further, the printing due to the change in the light emission power of the LED element. There has been a problem that density reduction and density unevenness occur.

  The present invention has been made in view of such circumstances, and includes a reference voltage generation circuit that has less power supply voltage dependency, and a light emitting unit that can significantly reduce the influence of temperature drift immediately after power-on, and An object of the present invention is to provide an image forming apparatus including the light emitting unit.

The light emitting unit according to the present invention that achieves the above-described object includes a voltage output means for outputting a predetermined voltage based on an applied power supply voltage, and a heat connected at one end to an output terminal provided in the voltage output means. Compensation means, reference voltage divided output means connected to the other end of the thermal compensation means for dividing and outputting a reference voltage, and a control voltage based on the reference voltage output by the reference voltage divided output means A control voltage generating means for generating, a driving means for driving the light emitting means based on the control voltage generated by the control voltage generating means, and the thermal compensation means and the driving means formed by separate chips, respectively. And a substrate to be provided .

  In such a light emitting unit according to the present invention, the desired temperature dependence in the reference voltage generating means is determined by the temperature characteristics of the voltage limiting means, not depending on the power supply voltage. Therefore, in the light emitting unit according to the present invention, the reference voltage generating means can effectively compensate for the increase or decrease in the light emission power caused by the temperature rise of the light emitting means or the driving means without being affected by the fluctuation of the power supply voltage. it can.

  Further, in the light emitting unit according to the present invention, the fluctuation of the driving current value of the light emitting means due to the self-heating of the element immediately after the power is turned on can be reduced, and the temperature rise value in the temperature equilibrium state can be reduced by the temperature detecting element. It is possible to set substantially equal between a certain voltage limiting unit and a driving unit which is a detected element. Therefore, in the light emitting unit according to the present invention, a procedure such as shifting to a printing operation after the light emitting unit as a whole reaches a temperature equilibrium state without being driven until a sufficient time has passed since the power is turned on. There is no need to perform this process, and also in the manufacturing process, the process of correcting the variation in the light emission power caused by the manufacturing variation of the light emitting means, and the temperature equilibrium state is reached after the power is turned on to measure the light quantity of the light emitting unit. Before the light quantity measurement can be completed, the time required for the completion inspection time and the light quantity correction process can be reduced, and the manufacturing cost can be reduced.

  Here, the ratio between the power consumption of the voltage limiting means and the area of the surface of the voltage limiting means connected to the substrate is the power consumption of the driving means and the area of the surface of the driving means connected to the substrate. It is desirable to set it to be substantially equal to the ratio. The ratio of the power consumption of the voltage limiting means and the area of the surface of the voltage limiting means connected to the substrate is the power consumption of the driving means and the area of the surface of the driving means connected to the substrate. Even if it is set to be in the range of 1/10 to 10 times the ratio, it is sufficiently practical.

  In other words, the area of the surface of the driving unit connected to the substrate is equal to the area of the surface of the voltage limiting unit connected to the substrate, (power consumption of the driving unit) / (of the voltage limiting unit). It is desirable to set it approximately equal to the product of (power consumption), and the area of the surface of the voltage limiting means connected to the substrate and (power consumption of the driving means) / (power consumption of the voltage limiting means) It is practical enough even if it is set to be in the range of 1/10 to 10 times the product of

  More specifically, the voltage limiting means can be one having a diode connected in the forward direction to the output terminal of the voltage output means for outputting a predetermined voltage based on the applied power supply voltage, As the current limiting means, one having a load resistance having one end connected to the diode can be used.

  Further, as the voltage limiting means, an NPN bipolar transistor in which a base terminal is connected to an output terminal of a voltage output means for outputting a predetermined voltage based on an applied power supply voltage and the power supply voltage is applied to a collector terminal As the current limiting means, one having a load resistance having one end connected to the emitter terminal of the NPN bipolar transistor may be used.

  The voltage limiting means includes a first NPN bipolar transistor having a base terminal connected to an output terminal of a voltage output means for outputting a predetermined voltage based on an applied power supply voltage, and the first NPN bipolar transistor. A transistor having a base terminal connected to the emitter terminal of the transistor and a second NPN bipolar transistor to which the power supply voltage is applied to the collector terminal can be used. The current limiting means can be the second NPN bipolar transistor. A transistor having a load resistance having one end connected to the emitter terminal of the transistor may be used.

  Furthermore, the voltage limiting means includes an N channel in which a gate terminal is connected to an output terminal of a voltage output means for outputting a predetermined voltage based on an applied power supply voltage, and the power supply voltage is applied to a drain terminal. A device having a MOS transistor can be used, and the current limiting means may have a load resistance having one end connected to the source terminal of the N-channel MOS transistor.

The light emitting unit according to the present invention that achieves the above-described object is a light emitting unit including a light emitting unit in which a plurality of light emitting elements are arranged, and a voltage output unit that outputs a predetermined voltage based on an applied power supply voltage. A thermal compensation means connected at one end to an output terminal provided in the voltage output means; a reference voltage divided output means connected to the other end of the thermal compensation means for dividing and outputting a reference voltage; and the reference Control voltage generating means for generating a control voltage based on the reference voltage output by the voltage division output means; and driving means for driving the light emitting means based on the control voltage generated by the control voltage generating means; The thermal compensation means and the substrate on which the drive means are mounted, each of which is formed by a separate chip .

Furthermore, an image forming apparatus according to the present invention that achieves the above-described object includes a light-emitting unit having a light-emitting unit in which a plurality of light-emitting elements are arranged as a light source that irradiates and exposes a light to a photoconductor. In the image forming apparatus for causing the light emitting element to emit light and exposing the photoreceptor to form an image on the photoreceptor, voltage output means for outputting a predetermined voltage based on an applied power supply voltage, and A thermal compensation means connected at one end to an output terminal provided in the voltage output means; a reference voltage divided output means connected to the other end of the thermal compensation means for dividing and outputting a reference voltage; and Control voltage generating means for generating a control voltage based on the reference voltage output by the pressure output means, and driving the light emitting means based on the control voltage generated by the control voltage generating means. And drive means, characterized by comprising a substrate for mounting said drive means and each separate said thermal compensation means formed by the chip.

  In such a light emitting unit and image forming apparatus according to the present invention, the desired temperature dependence in the reference voltage generating means is determined by the temperature characteristics of the voltage limiting means, not depending on the power supply voltage. Therefore, in the light emitting unit and the image forming apparatus according to the present invention, the reference voltage generating unit is effectively affected by fluctuations in the power supply voltage, and the increase or decrease in the light emission power due to the temperature rise of the light emitting unit or the driving unit is effectively performed. Can be compensated.

  Further, in the light emitting unit and the image forming apparatus according to the present invention, the fluctuation of the drive current value of the light emitting means due to the self-heating of the element immediately after the power is turned on can be reduced, and the temperature rise value in the temperature equilibrium state is It is possible to set the voltage limiting means that is a temperature detecting element and the driving means that is a detected element to be approximately equal. Therefore, in the light emitting unit and the image forming apparatus according to the present invention, the light emitting unit and the image forming apparatus are left without being driven until a sufficient time has passed since the power is turned on, and the whole light emitting unit reaches the temperature equilibrium state, and then the printing operation is started. In addition, in the manufacturing process, in the process of correcting the variation in the light emission power caused by the manufacturing variation of the light emitting means, the temperature is measured after the power is turned on to measure the light quantity of the light emitting unit. The light quantity measurement can be completed before reaching the equilibrium state, and the time required for the completion inspection time and the light quantity correction process can be reduced, and the manufacturing cost can be reduced.

  In the present invention, it is possible to provide a reference voltage generating means with less power supply voltage dependency, and it is possible to effectively compensate for the increase or decrease in the light emission power caused by the temperature rise of the light emitting means or the driving means, and to turn on the power. The influence of the temperature drift immediately after this can be remarkably reduced.

  Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings.

  In this embodiment, charging and exposure of a photosensitive drum as an electrostatic latent image carrier, development of the electrostatic latent image formed on the photosensitive drum with toner, and onto the recording medium of the obtained toner image The electrophotographic recording type image forming apparatus performs image formation through a process such as transfer of toner and fixing of a toner image on the recording medium. In the following, for convenience of explanation, an image forming apparatus including a row of a plurality of light emitting diodes (hereinafter referred to as LEDs) is taken up as a light source for irradiating the photosensitive drum with light for exposure. The case where the present invention is applied using these LED elements as driven elements will be described.

  First, the image forming apparatus shown as the first embodiment of the present invention will be described.

  The image forming apparatus includes a control circuit as shown in FIG. That is, the image forming apparatus includes a print control unit 1 that performs overall control of the image forming apparatus. The print control unit 1 includes, for example, a microprocessor, a ROM (Read Only Memory), a RAM (Random Access Memory), an input / output port, a timer, and the like, and is disposed inside the printing unit in the image forming apparatus. . The print control unit 1 performs a printing operation by performing sequence control on the entire image forming apparatus based on a control signal SG1 transmitted from a host controller (not shown), a video signal SG2 in which dot map data is arranged one-dimensionally, and the like. .

  More specifically, when the printing control unit 1 receives a printing instruction included in the control signal SG1, first, the printing control unit 1 detects the temperature detected by the fixing device temperature sensor 23 that detects the temperature of the fixing device 22 including the heater 22a. Reading is performed to determine whether or not the fixing device 22 is within a usable temperature range. When it is determined that the fixing device 22 is not within the usable temperature range, the print control unit 1 energizes the heater 22a to heat the fixing device 22 to a usable temperature. On the other hand, when the print controller 1 determines that the fixing device 22 is within the usable temperature range, the print controller 1 rotates the development / transfer process motor 3 via the driver 2 and also supplies the charge signal SGC for charging. By supplying the high voltage power supply 25, the charging high voltage power supply 25 is turned on, and the developing device 27 is charged.

  The print control unit 1 detects the presence or absence of a sheet as a recording medium in a sheet feeding tray (not shown) through the sheet remaining amount sensor 8 and detects the type of the sheet set in the sheet feeding tray. 9, and feeding of a sheet corresponding to the sheet is started. Here, the paper feed motor 5 can be rotated in both directions via the driver 4, and the print control unit 1 first rotates the paper feed motor 5 in the reverse direction and is detected by the paper inlet sensor 6. Until then, the paper set in the paper feed tray is fed by a preset amount. Then, the print controller 1 rotates the paper feed motor 5 forward via the driver 4 and conveys the paper to the printing mechanism inside the image forming apparatus.

  Subsequently, when the print control unit 1 reaches a printable position, as shown in FIG. 2, the print control unit 1 transmits a timing signal SG3 including a main scanning synchronization signal and a sub-operation synchronization signal to the host controller. In response, the video signal SG2 edited for each page is received from the host controller. Then, the print controller 1 transfers the received video signal SG2 to the LED head 19 as a print data signal HD-DATA based on a predetermined clock signal HD-CLK. Note that. As will be described in detail later, the LED head 19 is formed by arraying a plurality of LED elements provided for printing one dot (pixel).

  Such transmission / reception of the video signal SG2 is performed for each print line. Upon receiving the video signal SG2 for one line, the print control unit 1 transmits a latch signal HD-LOAD to the LED head 19 and holds the print data signal HD-DATA in the LED head 19. The print control unit 1 can cause the print data signal HD-DATA held in the LED head 19 to perform printing even while the video signal SG2 of the next line is being received from the host controller. .

  Information printed by the LED head 19 is formed into a latent image as a dot having an increased potential on a photosensitive drum (not shown) charged to a predetermined negative potential. Then, the printing control unit 1 controls the developing device 27 to suck the image forming toner charged to a predetermined negative potential to each dot carried on the photosensitive drum by an electric suction force. To form a toner image. The formed toner image is supplied to the transfer device 28. The printing control unit 1 supplies the transfer signal SG4 to the transfer high-voltage power supply 26 to turn on the transfer high-voltage power supply 26 and apply a predetermined positive potential to the transfer device 28. At this time, based on the detection by the paper size sensor 9 and the paper inlet sensor 6, the print control unit 1 applies the voltage from the transfer high-voltage power supply 26 only while the paper passes through the transfer device 28. 28 is applied. In response to this, the transfer unit 28 transfers the toner image onto a sheet passing between the photosensitive drum and the transfer unit 28.

  The sheet on which the toner image is transferred in this way is conveyed to the fixing device 22. The fixing device 22 fixes the toner image on the paper by the heat from the heater 22a. The sheet on which the image is fixed is further conveyed and discharged from the printing mechanism to the outside. At this time, the print control unit 1 detects that the sheet has been discharged via the sheet discharge port sensor 7 provided in the vicinity of the discharge port. When the printing is completed and the sheet passes through the position where the sheet discharge sensor 7 is provided, the printing control unit 1 terminates the application of the voltage to the developing device 27 by the charging high-voltage power supply 25 and the driver 2. Then, the rotation of the motor 3 for development / transfer process is stopped.

  The image forming apparatus can perform image formation on a plurality of sheets by repeatedly performing such a series of operations under the control of the print control unit 1.

Now, such an image forming apparatus includes the LED head 19 as described above. The LED head 19 has a circuit configuration as shown in FIG. 3, for example. That is, the LED head 19 includes a plurality of flip-flop circuits FF ₁ , FF ₂ ,... And a plurality of latches provided corresponding to each of the plurality of flip-flop circuits FF ₁ , FF ₂ ,. Circuits LT ₁ , LT ₂ ,... The print data signal HD-DATA transferred from the print control unit 1 is input to the LED head 19 together with the clock signal HD-CLK, and sequentially to a shift register including the plurality of flip-flop circuits FF ₁ , FF ₂ ,. Transferred. For example, in an image forming apparatus capable of printing on A4 size paper and having a resolution of 600 dots per inch, 4992 bit data of 4992 flip-flop circuits FF ₁ , FF ₂ ,. The data is sequentially transferred to a shift register composed of FF ₄₉₉₂ . The bit data sequentially transferred to the shift register including the flip-flop circuits FF ₁ , FF ₂ ,..., FF ₄₉₉₂ is input to the LED head 19 by the latch signal HD-LOAD transmitted from the print control unit 1. As a result, the latch circuits LT ₁ , LT _{2 ,.} In the LED head 19, the bit data held in the latch circuits LT ₁ , LT ₂ ,..., LT ₄₉₉₂ and the print drive signal HD transmitted from the print control unit 1 and passed through the inverter circuit G _0. -STB-N is supplied to a plurality of pre-buffer circuits G ₁ , G ₂ ,..., G ₄₉₉₂ and based on these bit data and the print drive signal HD-STB-N, from a predetermined power supply VDD The switch elements Tr ₁ , Tr ₂ ,..., Tr ₄₉₉₂ that are driven by the supplied power are opened and closed, and dot data that is at a high level among the plurality of LED elements LD ₁ , LD _{2 ,.} The LED element corresponding to is turned on.

  Such an internal structure of the LED head 19 is as shown in FIG. 4, for example. Here, the LED head 19 capable of printing on A4 size paper with a resolution of 600 dots per inch is illustrated.

The LED head 19 includes 26 LED array chips CHP ₁ , CHP ₂ ,..., CHP _{26 in} which 192 LED elements are arranged, and these LED array chips CHP ₁ , CHP ₂ ,. ₂₆ drive ICs (Integrated Circuits) DRV ₁ , DRV ₂ ,..., DRV ₂₆ that drive each of ₂₆ are arranged. Each of the driving ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ is configured by the same circuit and is cascade-connected to adjacent driving ICs.

The drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ are each composed of 192 flip-flop circuits and are configured to shift-input the print data signal HD-DATA in synchronization with the clock signal HD-CLK. A shift register circuit 100 (corresponding to the above-described flip-flop circuit FF), and a latch circuit 101 (corresponding to the above-described latch circuit LT) that holds an output signal of the shift register circuit 100 based on the latch signal HD-LOAD. , the strobe signal is a negative logic signal (hereinafter, the print drive signal HD-STB-N that.) the inverter circuit 102 is input (corresponding to the inverter circuit _{G 0} as described above.), the output signal of the latch circuit 101 and the inverter A logical product circuit 103 that performs a logical product with the output signal of the circuit 102, and the logical product circuit Based on the output signal 103, an LED drive circuit 104 that supplies a drive current based on the power supplied from a predetermined power supply VDD to the LED element, and a command for making the drive current constant to the LED drive circuit 104 And a control voltage generation circuit 105 for applying a voltage.

Further, the LED head 19 has a reference voltage generation circuit 106. In the LED head 19, the reference voltage V _ref generated by the reference voltage generation circuit 106 is supplied to the control voltage generation circuit 105, thereby generating a reference current for driving the LED element.

Here, the drive current value for driving the LED element is determined based on the reference voltage value generated by the drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ . In the following, a further internal configuration of the drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ will be described and an outline of the operation will be described.

FIG. 5 shows the connection relationship between the prebuffer circuit G shown in FIG. 3 and its peripheral circuits. In FIG. 5, a portion surrounded by a broken line corresponds to the prebuffer circuit G, and here, representatively, the configuration of the dot 1, that is, the latch circuit LT ₁ , the prebuffer circuit G ₁ , and the switch element A circuit unit constituted by Tr ₁ , LED element LD _{1 and the} like is shown.

The pre-buffer circuit G ₁ includes a logical product circuit AD ₁ (corresponding to the logical product circuit 103 described above) that takes a logical product of the output signal of the latch circuit 101 and the output signal of the inverter circuit 102, and the LED drive circuit described above. A P-channel MOS (Metal-Oxide Semiconductor) transistor TP ₁ and an N-channel MOS transistor TN ₁ constituting 104 are provided.

5 is the control voltage generation circuit 105 previously shown in FIG. 4, and one circuit is provided for each of the drive ICs DRV ₁ , DRV ₂ ,..., DRV _26. Provided. The control voltage generation circuit 105 is provided with an operational amplifier 110, and the reference voltage V _ref supplied from the input terminal VREF of the reference voltage generation circuit 106 is applied to the inverting input terminal of the operational amplifier 110. Further, the non-inverting input terminal of the operational amplifier 110 is monolithically formed inside the drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ by using a semiconductor process technology such as polysilicon or impurity diffusion resistance. Is connected to a reference resistor R _ref integrated therein. Further, a P-channel MOS transistor 111 corresponding to the switch element Tr and the like previously shown in FIG. 3 is connected to the reference resistor R _ref . A control voltage V _cont output from the operational amplifier 110 is applied to the gate terminal of the P-channel MOS transistor 111. As a result, a current of V _ref / R _ref flows through the P channel MOS transistor 111. Note that the gate lengths of the P-channel MOS transistors 111 are configured to have the same size.

In the pre-buffer circuit G ₁ and the control voltage generation circuit 105 as described above, the control voltage V _cont output from the operational amplifier 110 is applied to the source terminal of the N-channel MOS transistor TN ₁ . The output from the pre-buffer circuit _{G 1} is applied to the gate terminal of the P-channel MOS transistor 112 which constitute the LED drive circuit 104 described above. The gate length of P channel MOS transistor 112 is set to a size equal to the gate length of P channel MOS transistor 111.

In such a circuit configuration, the reference current I _ref flowing through the reference resistor R _ref is equal to the current flowing through the P-channel MOS transistor 111. The operational amplifier 110 is
The control voltage V _cont is changed so that the reference current I _ref flows, and the P-channel MOS transistor 111 is controlled. Thus, by configuring the feedback control circuit with the operational amplifier 110, the P-channel MOS transistor 111, and the reference resistor R _ref , the reference current I _ref , that is, the current flowing through the P-channel MOS transistor 111 is changed to the power supply voltage VDD. Yorazu is determined only by the value of the reference voltage _{V ref} and the reference resistor _{R ref.}

In such a circuit configuration, when the LED elements are driven state, since the N-channel MOS transistor TN ₁ in the pre-buffer circuit _{G 1} is turned, the gate potential of the P-channel MOS transistor 112, a control voltage V _It is substantially equal to _cont . That is, in this circuit configuration, when the LED element is driven, the gate potential of P channel MOS transistor 112 becomes substantially equal to the gate potential of P channel MOS transistor 111 in control voltage generation circuit 105. Therefore, the drain current of P channel MOS transistor 112 is determined by the ratio of the gate width dimension of P channel MOS transistor 111. That is, in this circuit configuration, the drive current value of the LED element can be adjusted by changing the reference voltage V _ref and adjusting the control voltage V _cont .

By the way, it is known that the temperature dependence of the light emission power of the LED element has a negative temperature coefficient, and the light emission power of the LED element decreases as the junction temperature of the chip increases. The LED head 19 needs to be driven so as to compensate for the temperature dependence of the light emission power of the LED element even if there is a temperature fluctuation accompanying the drive of the LED element. There is. The driving means for this purpose is provided in the LED head 19, and in order to compensate for the negative temperature coefficient of the light emission power of the LED element, the temperature coefficient of the driving current value of the LED element is configured as a positive one. It will be. Since the drive current value output from the drive IC DRV is determined by the values of the reference resistor R _ref and the reference voltage V _ref as described above, the temperature coefficient of the reference resistor R _ref having a positive value is usually set. Considering this, a positive temperature characteristic is given to the reference voltage _Vref .

In this case, the reference voltage V _ref needs to be unaffected by fluctuations in the power supply voltage VDD. This is because, for example, a voltage drop occurs in the power supply voltage VDD due to a large peak current that occurs when printing is performed such that the LED head 19 is solid black, and the reference voltage V _ref due to the voltage drop of the power supply voltage VDD. This is because if the fluctuation occurs, the driving current of the LED element fluctuates, which is not desirable.

  Here, an example of a conventional reference voltage generation circuit will be described.

  As shown in FIG. 6, the conventional reference voltage generating circuit includes three P-channel MOS transistors 1001, 1002, and 1003 having the same size to which the power supply voltage VDD is applied to the source terminal, and two NPN bipolar transistors 1004 and 1005. And have.

  In this reference voltage generating circuit, P-channel MOS transistors 1001, 1002, and 1003 are connected to their gate terminals to form a so-called current mirror circuit, and the drain output that constitutes the current mirror output has two series-connected drain outputs. It is connected to the collector terminal of the NPN bipolar transistor 1004 via load resistors R1 and R2. The emitter terminal of the NPN bipolar transistor 1004 is connected to the ground, and its base terminal is connected to the midpoint of connection of the load resistors R1 and R2. On the other hand, the drain terminal of the P-channel MOS transistor 1002 constituting the current mirror circuit is connected to the collector terminal of the NPN bipolar transistor 1005. The emitter terminal of the NPN bipolar transistor 1005 is connected to the ground, and the base of the NPN bipolar transistor 1005. The terminal is connected to the collector terminal of NPN bipolar transistor 1004. Further, the drain terminal of the P-channel MOS transistor 1003 is connected to the ground via the load resistor R3. Here, the emitter area of the NPN bipolar transistor 1005 is set to N times the emitter area of the NPN bipolar transistor 1004.

In such a reference voltage generation circuit, the voltage at the connection point between the drain terminal of the P-channel MOS transistor 1003 and the load resistor R3 is output to the drive IC as the reference voltage _Vref .

In such a reference voltage generation circuit, assuming that the base current is negligible with respect to the collector current flowing through the collector terminals of the NPN bipolar transistors 1004 and 1005, the reference voltage V _ref output from the reference voltage generation circuit is ,
Given in. In the above equation (2), k represents the Boltzmann constant, T represents the absolute temperature, q represents the charge of the electron, and ln () is a natural logarithmic function.

Here, the temperature coefficient of the reference voltage V _ref is
, The temperature coefficient of the reference voltage V _ref is given by 1 / T, and the value at room temperature (about 300 K) is about + 0.33% / ° C.

An LED element made of a GaAlAs base material used in an LED head has a temperature dependency of light emission power of approximately −0.25% / ° C., and is included in a drive IC configured by a complementary metal-oxide semiconductor (CMOS) process. The temperature coefficient of the reference resistance R _ref is about + 0.1% / ° C.

Since the temperature of the LED element is substantially equal to the temperature of the drive ICs disposed adjacent to each other, in order to compensate for the decrease in the light emission power accompanying the increase in the temperature of the LED element, the reference voltage V _{ref is-} ( A temperature coefficient of about −0.25−0.1) = + 0.35% / ° C. may be given. This value is approximately equal to the temperature coefficient of the above-described conventional reference voltage generation circuit.

Here, when the reference voltage V _ref when the power supply voltage VDD is changed in the reference voltage generating circuit shown in FIG. 6 is obtained, it is as shown in FIG. That is, in the reference voltage generation circuit, when the power supply voltage VDD is increased from 0V, there is a characteristic that the reference voltage _Vref rises in a region where the power supply voltage VDD is about 2V. Thereafter, the power supply voltage VDD is increased. Accordingly, there is a positive dependency that the reference voltage V _ref increases. Although the figure shows a characteristic in which the reference voltage _Vref slightly increases when the power supply voltage VDD is increased in a region where the power supply voltage VDD is about 2 V or more, the dependency of the reference voltage _{Vref on} the power supply voltage VDD is still shown. The coefficient is as large as about 2% / V.

  That is, in the LED head using the conventional reference voltage generation circuit, as described above, when performing printing such as solid black coating, a large number of LED elements are driven all at once. A large peak current is generated in the power supply current, and thus a voltage drop is unavoidable in the power supply voltage. In the LED head, the reference voltage value is lowered due to the voltage drop of the power supply voltage, and the drive current of the LED element also fluctuates.

Therefore, in the image forming apparatus, the reference voltage generation circuit 106 provided in the LED head 19 has a circuit configuration as shown in FIG. That is, the reference voltage generating circuit 106, a regulator circuit 201 that the output voltage _{V O} is controlled to be constant, and a diode 204 which diodes 202 and 203 are connected in series, is composed of two load resistors R1, R2 Prefecture The

The regulator circuit 201, regardless of the power supply voltage VDD applied to the power supply terminal, as long as the predetermined output voltage V _O is obtained, can be used be any one. Specifically, the regulator circuit 201, it is desirable that the temperature coefficient of the output voltage V _O is substantially zero, for example, can be used by Seiko Instruments Inc. CMOS VOLTAGE REGULATOR S-817 series. This CMOS voltage regulator has a very low temperature coefficient of the output voltage of about 100 ppm / ° C., and has little temperature dependency of the output voltage. Of course, the regulator circuit 201 is not limited to this specific example, and the output voltage V _O can be arbitrarily selected to an optimum value according to the use conditions. The ground terminal of the regulator circuit 201 is commonly connected to the ground terminal of the driving IC DRV.

  Further, the output terminal of the regulator circuit 201 is connected to the anode terminal of the first-stage diode 202 constituting the subsequent-stage diode 204, and the cathode terminal of the diode 102 is connected to the anode terminal of the diode 203. Furthermore, the cathode terminal of the diode 203 is connected to one end of a series connection circuit composed of load resistors R1, R2, such as a carbon film fixed resistor, and the other end of the series connection circuit composed of these load resistors R1, R2 is connected to the ground. Connected to. In the figure, a diode 204 in which two diodes 202 and 203 are connected in series is shown. However, the diode 204 may be composed of one diode, or three or more diodes in series. It may be connected.

In such a reference voltage generating circuit 106, a reference voltage _{V ref} voltage at the connection midpoint of the load resistor R1, R2, the driving _{IC DRV 1, DRV 2, ···} , is output to each of the _{DRV 26} The

Here, the resistance values of the load resistors R1 and R2 can be calculated as follows. First, diodes each forward voltage and the forward current _V f of 202 and 203, and _{I f,} the output voltage _{V O,} each of the forward voltage of the diode 202, 203 _{V f} and the forward current I of the regulator circuit 201 _{Let f} and the reference voltage V _ref be known. In this case, the potential V1 of the cathode terminal of the diode 203 is
It becomes. Further, from the potential V1 Metropolitan of the cathode terminal of each of the forward current _{I f} and the diode 203 of diode 202, the resistance value of the series connection circuit consisting of the load resistors R1, R2 are,
You can see that. Also, according to Ohm's law, the reference voltage V _ref is
Therefore, the resistance value of the load resistor R2 is
The resistance value of the load resistor R1 is
It becomes.

In the reference voltage generation circuit 106, a desired reference voltage V _ref can be obtained by using load resistors R 1 and R 2 having such resistance values. As is apparent from the calculation processes of the above equations (4) to (8), when the temperature coefficients of the load resistors R1 and R2 are equal or when the temperature coefficients are small enough to be ignored, the reference voltage V _ref The temperature dependence of the load resistances R1 and R2 is not affected by the temperature coefficient, and the voltage division ratio by the load resistances R1 and R2 is not affected.

In the image forming apparatus, by providing such a reference voltage generation circuit 106 in the LED head 19, temperature compensation of the LED element is performed. Here, in LED head 19, each component is mounted as shown, for example in FIG. In the figure, the diode 204 in the reference voltage generation circuit 106, which is a main element for temperature detection, and the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,. A state of being mounted on 206 is shown.

The drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,... Are made of, for example, silicon and have a thin plate shape with a rectangular bottom surface. The diode 204 is made of, for example, a silicon switching diode, and specifically, a switching diode DA221 manufactured by ROHM can be used. Furthermore, as long as the printed wiring board 206 is generally used as a so-called copper clad laminate for printed wiring, it can be configured by any type. Specifically, the printed wiring board 206 is a paper phenol board specified by the National Electrical Manufacturers Association (NEMA) as a symbol XXP, XPC, etc., and a paper specified as the symbol FR-2. Polyester substrate, paper epoxy substrate specified as FR-3, glass paper composite epoxy substrate specified as CEM-1, glass nonwoven paper composite epoxy substrate specified as CHE-3 The glass cloth epoxy substrate defined as G-10 and the glass cloth epoxy substrate defined as FR-4 are so-called rigid substrates having copper foil on both sides. Of these, a glass cloth epoxy substrate (FR-4) having a low hygroscopic property and dimensional change and having a self-extinguishing property is most suitable.

The LED head 19 corresponds to each of the ₂₆ drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ arranged in a line on the printed wiring board 206, and is not shown here. The LED array chips CHP ₁ , CHP ₂ ,..., CHP ₂₆ are arranged in a line, and one diode 204 is arranged in a predetermined place. At this time, each of the driving ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ and the diode 204 are fixed so that their bottom surfaces are in close contact with the printed wiring board 206 as shown in FIG. In the figure, the bottom area of each drive IC DRV ₁ , DRV ₂ ,..., DRV ₂₆ is S1, and the bottom area of the diode 204 is S2. From such driving ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ and the diode 204, heat flow is generated as indicated by arrows in the figure through their bottom surfaces connected to the printed wiring board 206. It will flow to the printed wiring board 206.

In the image forming apparatus, in order to obtain the best characteristics using such a LED head 19, and each of the power consumption of the drive _{IC DRV 1, DRV 2, ···} , DRV 26 and the diode 204, which drive The ratios of IC DRV ₁ , DRV ₂ ,..., DRV ₂₆ and the respective bottom areas of the diode 204 are set to be equal.

  In the following, the reason why the LED element 19 can optimally compensate the temperature of the LED element by the reference voltage generation circuit 106 will be considered.

In the reference voltage generation circuit 106 shown in FIG. 8, the output voltage of the regulator circuit 201 is V _O , the forward voltages and forward currents of the diodes 202 and 203 are V _f and _If , and the diode 203 If the cathode terminal potential is V1, and the resistance values of the load resistors R1 and R2 are R1 and R2, as described above,
Is established.

In the above equations (9) and (10), the forward voltage V _f of each of the diodes 202 and 203 decreases at a rate of about −2 mV / ° C. with respect to the temperature rise, so the reference voltage V _ref It turns out that it becomes the characteristic which increases substantially linearly with a temperature rise. Further, regarding the temperature differential dV _ref / dT of the reference voltage V _ref ,
Is established.

Here, since the temperature coefficients of the load resistors R1 and R2 such as the carbon film fixed resistor are small, the third term and the fourth term on the right side in the above formula (11) can be ignored. In the above equation (11), the first term on the right side is the temperature coefficient of the regulator circuit 201 itself. As described above, it is usually as small as about 100 ppm / ° C. at the maximum and can be ignored. ) To obtain the temperature coefficient of the reference voltage V _ref
It becomes.

For the above equation (12), as typical numerical values, the forward voltages V _f of the diodes 202 and 203 are set to 0.6 V, the temperature coefficient is set to −2 mV / ° C., and the regulator circuit 201 is further set. selecting 2.5V as the output voltage _{V O} of
Is obtained.

  Here, the temperature dependence of the light emission power with respect to the temperature of the LED element is mainly determined by the wafer material used for the LED element. For example, when the base material of the LED element is made of GaAsP, the temperature dependency coefficient of the light emission power is −0.6% / ° C. Further, when the base material of the LED element is made of AlGaAs and emits red light, the temperature dependency coefficient of the light emission power is −0.2% / ° C. to −0.3% / ° C. Yes, it is -1% / ° C when it is made of the same base material and emits green light. In view of this fact, the value shown in the above equation (13) is extremely close to a desired value for performing temperature compensation of the LED element. Therefore, in the LED head 19, the temperature compensation of the LED element is sufficiently accurate. It can be seen that can be done.

Then, the LED head 19, the drive IC _DRV 1 is a diode 204 and the object to be detected is a main body of the temperature _sensing, DRV 2, _DRV 3, consider the temperature increase of ....

The following table 1 shows the driving ICs DRV ₁ , DRV ₂ , DRV ₃ ,... And the diodes 204, 203 with respect to the bottom areas S 1, S 2 of the driving ICs DRV ₁ , DRV ₂ , DRV _3. ,..., The static consumption current IDDs, the forward voltage 2V _f of the diode 204, the forward current _{If, and the} like, the amount of heat generated in each element is calculated. Here, the bottom area S1 of each chip of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,... Is about 8 mm × 0.6 mm = 4.8 mm ² , and the diode formed by the diodes 202 and 203. The equivalent bottom area S2 of 204 is assumed to be 2 mm × 1.2 mm = 2.4 mm ² .

Here, the respective heat generation amounts P _d of the driving ICs DRV ₁ , DRV ₂ , DRV ₃ ,... And the diode 204 are obtained by multiplying the applied voltage value by the flowing current value, resistor R _theta equivalently, can be thought of as being proportional to the reciprocal of the base area S1, S2. From this, the temperature rise value ΔT of each element in the temperature equilibrium state is
And approximately
Can be compared.

In such an LED head 19, in order to reduce the influence of temperature drift due to self-heating immediately after power-on, as described above, the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,. , And the ratios of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,... And the bottom areas of the diodes 204 are set substantially equal to each other. Specifically, as shown in Table 1 above, when the forward current _If of the diode 204 is about 10 mA, the ratio between the heat generation amount _Pd and the bottom areas S1 and S2 shown in the above equation (15). However, the driving ICs DRV ₁ , DRV ₂ , DRV ₃ ,... Are “5.2” and the diode 204 is “5”. Thus, in the LED head 19, the ratio between the heat generation amount _Pd and the bottom areas S1 and S2 can be made very close. In other words, in the LED head 19, under this condition, the temperature rise values due to self-heating of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,.

The same consideration is also true in a thermal transient state immediately after the LED head 19 is turned on. That is, assuming that the chip thicknesses of the driving ICs DRV ₁ , DRV ₂ , DRV ₃ ,... And the diode 204 are the same, the mass is proportional to the bottom area, so the driving ICs DRV ₁ , DRV ₂ ,. The thermal time constant when the specific heats of DRV ₃ ,... And the diode 204 are set to the same level is proportional to the bottom area of each element.

  FIG. 10 shows how the temperature rises immediately after the LED head 19 is turned on under the conditions shown in Table 1 above. For comparison, FIG. 11 shows a state of temperature rise immediately after power-on of a conventional LED head.

First, the temperature rise values ΔT (DRV) of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,... Immediately after the LED head 19 is turned on show a tendency as shown in FIG. That is, the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,... Increase in chip temperature mainly due to self-heating with the passage of time when the power is turned on. In addition, as shown in FIG. 11A, the conventional LED head driving IC also has its chip temperature increased with the passage of time mainly by self-heating.

On the other hand, the temperature rise value ΔT (D _i ) of the reference voltage generation circuit 106 having the circuit configuration shown in FIG. 8 immediately after the LED head 19 is turned on has a tendency as shown in FIG. Indicates. That is, the reference voltage generation circuit 106 has a smaller circuit size and smaller chip size than each of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,... As described above, since the consumption current is given so as to be inversely proportional to the chip area, the temperature rise value ΔT (D _i ) is the temperature rise of each of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,. It is about the same as the value ΔT (DRV). On the other hand, the reference voltage generation circuit in the conventional LED head has a smaller circuit scale and a smaller chip size than each of the driving ICs, so that the current consumption is small and the amount of heat generation is also small. For this reason, the temperature rise value ΔT (D _i ) of the conventional reference voltage generation circuit has a smaller time constant than the graph shown in FIG. 11A, and the temperature rise value in the temperature saturation state is also small.

Further, the reference voltage V _ref generated by the reference voltage generation circuit 106 is as shown in FIG. The temperature rise due to self-heating of the reference voltage generation circuit 106 is mainly due to the diode 204. Therefore, the reference voltage V _ref increases as the temperature increases as shown in FIG. On the other hand, the reference voltage V _ref generated by the conventional reference voltage generation circuit is as shown in FIG. In the conventional LED head, although the reference voltage generation circuit and the drive IC are mounted on the same printed wiring board, it cannot be said that both of them are arranged in close proximity, and heat conduction is performed via the printed wiring board. Therefore, the thermal coupling between the two is weak. For this reason, in the thermal transient state immediately after power-on of the conventional LED head, the temperature rise of each of the reference voltage generation circuit and the drive IC is mainly due to self-heating, and the power consumption of the reference voltage generation circuit is small. As shown in FIG. 11B, the temperature rise of the reference voltage generating circuit is small, and the increase of the reference voltage value due to the temperature rise is also small.

Further, the drive current _IO flowing in each of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,... Is as shown in FIG. Here, a case where only one dot is driven is illustrated in order to eliminate the influence of driving the LED element. In the LED head 19, as shown in FIG. 10C, the reference voltage V _ref also increases as the temperature rises. Therefore, the temperature rise of each of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,. As a result, the characteristic that the fluctuation of the drive current of the LED element is small can be obtained as shown in FIG. On the other hand, the drive current _IO flowing in the conventional drive IC is as shown in FIG. As described above, in a transient state immediately after the power supply of the conventional LED head, a temperature rise mainly occurs only in the driving IC, and the reference voltage value does not increase. Therefore, in the conventional LED head, the reference resistance value disposed inside the drive IC increases due to the temperature rise of the drive IC, so the reference current value flowing through the drive IC decreases, and a value proportional to this. As a result, the drive current value of the LED element taking the value also decreases.

As described above, the LED head 19 is set so that the temperature rises of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,... And the reference voltage generation circuit 106 immediately after power-on are balanced. As a result, the influence of temperature drift can be significantly reduced as compared with the prior art.

The characteristic described above, the drive _{IC DRV 1, DRV 2, DRV} 3, and each of the power consumption of ... and the diode 204, which drive _{IC DRV 1, DRV 2, DRV} 3, ..., and the diode 204 Are obtained by setting the ratios of the respective base areas to be approximately equal to each other, and the applicant of the present application has determined that the power consumption amounts of the drive ICs DRV ₁ , DRV ₂ , DRV ₃ ,. It is confirmed that practically sufficient characteristics can be obtained if the ratio of the power consumption of the diode 204 and the bottom area is in the range of 1/10 to 10 times the ratio to the bottom area. is doing.

As described above, in the LED head 19 of the image forming apparatus shown as the first embodiment of the present invention, the regulator circuit 201 in the reference voltage generation circuit 106 has a predetermined value regardless of the input power supply voltage VDD. The output voltage V _O can be obtained, and the temperature coefficient of the output voltage V _O is configured to be substantially zero, and the desired temperature dependency in the reference voltage generation circuit 106 is determined by the regulator. It is determined only by the output voltage V _O of the circuit 201 and the temperature characteristics of the diode 204. Therefore, in the LED head 19, the reference voltage generation circuit 106 is not affected by fluctuations in the power supply voltage VDD, and the LED array chips CHP ₁ , CHP ₂ ,..., CHP ₂₆ and drive ICs DRV ₁ , DRV ₂ , ..., increase / decrease of the light emission power caused by the temperature rise of the DRV ₂₆ can be effectively compensated.

Further, the LED head 19 can reduce fluctuations in the drive current value of the LED element due to self-heating of the element immediately after the power is turned on, and the temperature rise value in the temperature equilibrium state can be expressed by the diode 204 which is a temperature detection element. And drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ that are detected elements can be set to be approximately equal. Therefore, in the LED head 19, the procedure required in the conventional LED head, that is, the LED head as a whole reaches a temperature equilibrium state by being left without being driven until a sufficient time has passed since the power was turned on. There is no need to perform a procedure such as shifting from a printing operation to a printing operation.

In the manufacturing process of the LED head 19, LED array chip _{CHP 1,} CHP 2, · · ·, in the step of correcting a variation in the light emission power due to manufacturing variation of the _{CHP 26,} the light amount measurement of the LED head 19 Therefore, after turning on the power, it is possible to complete the light quantity measurement before reaching the temperature equilibrium state, and it is possible to reduce the time required for completion inspection time and light quantity correction processing, which is advantageous from the viewpoint of manufacturing cost. It becomes.

  Next, an image forming apparatus shown as the second embodiment will be described.

  The image forming apparatus shown as the second embodiment is provided with a reference voltage generating circuit obtained by modifying the reference voltage generating circuit 106 in the image forming apparatus shown as the first embodiment. Therefore, in the description of the second embodiment, the same components as those in the description of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the image forming apparatus shown as the second embodiment, the reference voltage generation circuit 106 provided in the LED head 19 has a circuit configuration as shown in FIG. That is, the reference voltage generation circuit 106 includes the regulator circuit 201 and the two load resistors R1 and R2, the load resistor 301 connected to the output terminal of the regulator circuit 201, and the NPN bipolar transistor 302.

  In this reference voltage generation circuit 106, the output terminal of the regulator circuit 201 is connected to the base terminal of the NPN bipolar transistor 302 via the load resistor 301 at the subsequent stage, and the collector terminal of the NPN bipolar transistor 302 has a power supply voltage VDD. Is applied. The emitter terminal of the NPN bipolar transistor 302 is connected to one end of a series connection circuit composed of load resistors R1 and R2, and the other end of the series connection circuit composed of these load resistors R1 and R2 is connected to the ground.

In such a reference voltage generation circuit 106, the voltage at the connection midpoint of the load resistors R1 and R2 is output to the drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ as the reference voltage V _ref. The

In such a reference voltage generation circuit 106, the output voltage of the regulator circuit 201 is V _O , the base-emitter voltage of the NPN bipolar transistor 302 is V _be , the emitter potential of the NPN bipolar transistor 302 is V1, and the load resistance R1 , R2 resistance values R1, R2,
Is established.

In the above equations (16) and (17), the base-emitter voltage V _be of the NPN bipolar transistor 302 decreases at a rate of about −2 mV / ° C. with respect to the temperature rise, so the reference voltage V _ref is It can be seen that the characteristic increases approximately linearly with increasing temperature.

Also, the base current I _b flowing into the base terminal of the NPN bipolar transistor 302 is a value obtained by dividing the substantially same collector current I _c in the current amplification factor of the transistor to the emitter current, compared with the collector current I _c, negligible .

Therefore, the power consumption of the NPN bipolar transistor 302 itself is largely determined by the voltage between the collector current I _c and the collector-emitter.

Furthermore, the base current _{I b} of the NPN bipolar transistor 302, as described above, is equal to the output current of the regulator circuit 201. In the reference voltage generation circuit 106, since this base current _Ib is a small value, the power consumption of the regulator circuit 201 itself is also small, the amount of self-heating is small, and the temperature rise hardly occurs. The influence on the reference voltage V _ref can be significantly reduced.

As described above, in the LED head 19 of the image forming apparatus shown as the second embodiment of the present invention, the regulator circuit 201 in the reference voltage generation circuit 106 has a predetermined value regardless of the input power supply voltage VDD. Since the output voltage V _O can be obtained and the temperature coefficient of the output voltage V _O is configured to be substantially zero, and the power consumption of the regulator circuit 201 is reduced. Self-heating is also small, and the temperature rise can be extremely small.

In the LED head 19, the desired temperature dependency in the reference voltage generation circuit 106 is determined only by the output voltage V _O of the regulator circuit 201 and the temperature characteristics of the NPN bipolar transistor 302. Therefore, in the LED head 19, the reference voltage generation circuit 106 is not affected by fluctuations in the power supply voltage VDD, and the LED array chips CHP ₁ , CHP ₂ ,..., CHP ₂₆ and drive ICs DRV ₁ , DRV ₂ , ..., increase / decrease of the light emission power caused by the temperature rise of the DRV ₂₆ can be effectively compensated.

  Further, in the LED head 19, since the fluctuation of the drive current value of the LED element due to the self-heating of the element immediately after the power is turned on can be reduced, the procedure required in the conventional LED head, that is, the power supply is turned on. There is no need to perform a procedure such as shifting to a printing operation after the LED head as a whole reaches a temperature equilibrium state without being driven until a sufficient time has passed.

Furthermore, in the manufacturing process of the LED head 19, LED array chip _{CHP 1,} CHP 2, · · ·, in the step of correcting a variation in the light emission power due to manufacturing variation of the _{CHP 26,} the light amount measurement of the LED head 19 After turning on the power, it is possible to complete the light quantity measurement before reaching the temperature equilibrium state, and it is possible to reduce the time required for the completion inspection time and the light quantity correction processing from the viewpoint of manufacturing cost. It will be advantageous.

  Next, an image forming apparatus shown as a third embodiment will be described.

  The image forming apparatus shown as the third embodiment is provided with a reference voltage generating circuit obtained by modifying the reference voltage generating circuit 106 in the image forming apparatus shown as the second embodiment. Accordingly, in the description of the third embodiment, the same reference numerals are given to the same configurations as those in the first embodiment and the second embodiment, and the detailed description thereof is omitted. To do.

  In the image forming apparatus shown as the third embodiment, the reference voltage generating circuit 106 provided in the LED head 19 has a circuit configuration as shown in FIG. That is, the reference voltage generation circuit 106 includes the regulator circuit 201, the load resistor 301, the two load resistors R1 and R2, and the NPN bipolar transistor 401 in which two NPN bipolar transistors 401a and 401b are Darlington-connected. The

  In this reference voltage generating circuit 106, the output terminal of the regulator circuit 201 is connected to the base terminal of the NPN bipolar transistor 401a via the load resistor 301 in the subsequent stage, and the emitter terminal of the NPN bipolar transistor 401a is connected to the NPN bipolar transistor 401b. Connected to the base terminal. The power supply voltage VDD is applied to the collector terminal of the NPN bipolar transistor 401b. The emitter terminal of the NPN bipolar transistor 401b is connected to one end of a series connection circuit composed of load resistors R1 and R2, and these load resistors R1, R2 The other end of the series connection circuit composed of R2 is connected to the ground.

In such a reference voltage generation circuit 106, the voltage at the connection midpoint of the load resistors R1 and R2 is output to the drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ as the reference voltage V _ref. The

In such a reference voltage generating circuit 106, the output voltage of the regulator circuit 201 and _{V O,} NPN bipolar transistors 401a, the base-emitter voltage of 401b as a _{V BE,} the emitter potential of the NPN bipolar transistor 401b and V1, the load When the resistance values of the resistors R1 and R2 are R1 and R2,
Is established.

In the above formula (18) and the above formula (19), the base-emitter voltage V _be of the NPN bipolar transistors 401a and 401b decreases at a rate of about −2 mV / ° C. with respect to the temperature rise. _It can be seen that _ref has a characteristic that increases substantially linearly with increasing temperature.

Also, the base current I _b flowing into the base terminal of the NPN bipolar transistor 401a is a value obtained by dividing the substantially same collector current I _c in the current amplification factor of the transistor to the emitter current, compared with the collector current I _c, negligible .

Therefore, the power consumption of the NPN bipolar transistor 401a itself is largely determined by the voltage between the collector current I _c and the collector-emitter.

Furthermore, the base current _{I b} of the NPN bipolar transistor 401a, as described above, is equal to the output current of the regulator circuit 201. In the reference voltage generation circuit 106, since this base current _Ib is a small value, the power consumption of the regulator circuit 201 itself is also small, the amount of self-heating is small, and the temperature rise hardly occurs. The influence on the reference voltage V _ref can be significantly reduced.

The reference voltage V _ref output from the reference voltage generation circuit 106 is level-shifted over two stages by the base-emitter voltage V _be of the NPN bipolar transistors 401a and 401b with respect to the output voltage V _O output from the regulator circuit 201. Since it becomes a value, the amount of change due to temperature is also doubled.

Here, as described above, the temperature coefficient of the reference voltage V _ref is determined by the base-emitter voltage V _be of the NPN bipolar transistors 401 a and 401 b and the output voltage V _O output by the regulator circuit 201. Therefore, in the reference voltage generation circuit 106, it is possible to easily obtain a desired temperature coefficient mainly by appropriately selecting the output voltage V _O of the regulator circuit 201.

As described above, in the LED head 19 of the image forming apparatus shown as the third embodiment of the present invention, the regulator circuit 201 in the reference voltage generation circuit 106 has a predetermined value regardless of the input power supply voltage VDD. Since the output voltage V _O can be obtained and the temperature coefficient of the output voltage V _O is configured to be substantially zero, and the power consumption of the regulator circuit 201 is reduced. Self-heating is also small, and the temperature rise can be extremely small.

In the LED head 19, the desired temperature dependency in the reference voltage generation circuit 106 is determined only by the output voltage V _O of the regulator circuit 201 and the temperature characteristics of the NPN bipolar transistor 401. Therefore, in the LED head 19, the reference voltage generation circuit 106 is not affected by fluctuations in the power supply voltage VDD, and the LED array chips CHP ₁ , CHP ₂ ,..., CHP ₂₆ and drive ICs DRV ₁ , DRV ₂ , ..., increase / decrease of the light emission power caused by the temperature rise of the DRV ₂₆ can be effectively compensated.

  Further, in the LED head 19, since the fluctuation of the drive current value of the LED element due to the self-heating of the element immediately after the power is turned on can be reduced, the procedure required in the conventional LED head, that is, the power supply is turned on. There is no need to perform a procedure such as shifting to a printing operation after the LED head as a whole reaches a temperature equilibrium state without being driven until a sufficient time has passed.

Furthermore, in the manufacturing process of the LED head 19, LED array chip _{CHP 1,} CHP 2, · · ·, in the step of correcting a variation in the light emission power due to manufacturing variation of the _{CHP 26,} the light amount measurement of the LED head 19 After turning on the power, it is possible to complete the light quantity measurement before reaching the temperature equilibrium state, and it is possible to reduce the time required for the completion inspection time and the light quantity correction processing from the viewpoint of manufacturing cost. It will be advantageous.

  Finally, an image forming apparatus shown as the fourth embodiment will be described.

  The image forming apparatus shown as the fourth embodiment is provided with a reference voltage generating circuit obtained by modifying the reference voltage generating circuit 106 in the image forming apparatus shown as the second embodiment. Therefore, in the description of the fourth embodiment, the same components as those in the first to third embodiments are denoted by the same reference numerals, and detailed description thereof is omitted. To do.

  In the image forming apparatus shown as the fourth embodiment, the reference voltage generation circuit 106 provided in the LED head 19 has a circuit configuration as shown in FIG. That is, the reference voltage generation circuit 106 includes an N-channel MOS transistor 501 and a load resistor 502 connected to the drain terminal of the N-channel MOS transistor 501 in addition to the regulator circuit 201 and the two load resistors R1 and R2. Composed.

  In this reference voltage generation circuit 106, the output terminal of the regulator circuit 201 is connected to the gate terminal of the N-channel MOS transistor 501, and the power supply voltage VDD is supplied to the drain terminal of the N-channel MOS transistor 501 through the load resistor 502. Applied. The source terminal of the N-channel MOS transistor 501 is connected to one end of a series connection circuit made up of load resistors R1, R2, and the other end of the series connection circuit made up of these load resistors R1, R2 is connected to the ground.

In such a reference voltage generation circuit 106, the voltage at the connection midpoint of the load resistors R1 and R2 is output to the drive ICs DRV ₁ , DRV ₂ ,..., DRV ₂₆ as the reference voltage V _ref. The

In such a reference voltage generating circuit 106, the output voltage of the regulator circuit 201 and _{V O,} the gate-source voltage of N-channel MOS transistor 501 and _{V gs,} the source potential of the N-channel MOS transistor 501 is V1, the load When the resistance values of the resistors R1 and R2 are R1 and R2,
Is established.

Here, between the drain current I _d and the gate-source voltage V _gs of the MOS transistor operating in the saturation region, in general,
There is a relationship.

Β in the above equation (22) is
Where V _th is a threshold voltage. In the above equation (23), μ represents carrier mobility, C _ox represents gate oxide film capacitance, W represents gate width, and L represents gate length.

Here, carrier mobility μ and threshold voltage T _th are respectively
It is known to have a temperature dependence of A typical value of κ in the above equation (25) is κ = 2.5 mV / ° C. From these, it can be seen that the reduction in the threshold voltage _Vth due to the temperature rise and the reduction in the carrier mobility μ are combined.

In order to graph such characteristics, the gate-source voltage V _gs and drain current I _d when the temperature is changed are obtained as shown in FIG.

From the figure, it can be seen that the curve group obtained by changing the temperature intersects at the point where the gate-source voltage V _gs becomes the value V _ztc . The gate-source voltage V _gs has a characteristic of decreasing with increasing temperature under a predetermined drain current I _d = A in a voltage region lower than the voltage value V _ztc .

As described above, in the reference voltage generation circuit 106, by appropriately setting the operating point of the N-channel MOS transistor 501, it is possible to give a characteristic of reducing the gate-source voltage V _gs with respect to the temperature rise. Become.

In such a reference voltage generation circuit 106, the gate-source voltage V _gs of the N-channel MOS transistor 501 is dependent on the temperature rise as described above, and therefore the reference voltage V _ref is the temperature rise. It can be seen that the characteristic increases almost linearly. Further, the gate current flowing through the gate terminal of the N channel MOS transistor 501 is negligibly small.

Therefore, the power consumption of N channel MOS transistor 501 itself is mainly determined by drain current _Id and drain-source voltage.

Furthermore, as described above, the gate current of N-channel MOS transistor 501 is equal to the output current of regulator circuit 201 and is substantially zero. Therefore, in reference voltage generation circuit 106, power consumption of regulator circuit 201 itself is minimal. Value, the amount of self-heating is small, and the temperature rise hardly occurs. Therefore, in the reference voltage generation circuit 106, the influence on the reference voltage _Vref due to self-heating of the regulator circuit 201 can be significantly reduced.

As described above, in the LED head 19 of the image forming apparatus shown as the fourth embodiment of the present invention, the regulator circuit 201 in the reference voltage generation circuit 106 has a predetermined value regardless of the input power supply voltage VDD. Since the output voltage V _O can be obtained and the temperature coefficient of the output voltage V _O is configured to be substantially zero, and the power consumption of the regulator circuit 201 is reduced. Self-heating is also small, and the temperature rise can be extremely small.

In the LED head 19, the desired temperature dependency in the reference voltage generation circuit 106 is determined only by the output voltage V _O of the regulator circuit 201 and the temperature characteristics of the N-channel MOS transistor 501. Therefore, in the LED head 19, the reference voltage generation circuit 106 is not affected by fluctuations in the power supply voltage VDD, and the LED array chips CHP ₁ , CHP ₂ ,..., CHP ₂₆ and drive ICs DRV ₁ , DRV ₂ , ..., increase / decrease of the light emission power caused by the temperature rise of the DRV ₂₆ can be effectively compensated.

  Further, in the LED head 19, since the fluctuation of the drive current value of the LED element due to the self-heating of the element immediately after the power is turned on can be reduced, the procedure required in the conventional LED head, that is, the power supply is turned on. There is no need to perform a procedure such as shifting to a printing operation after the LED head as a whole reaches a temperature equilibrium state without being driven until a sufficient time has passed.

Furthermore, in the manufacturing process of the LED head 19, LED array chip _{CHP 1,} CHP 2, · · ·, in the step of correcting a variation in the light emission power due to manufacturing variation of the _{CHP 26,} the light amount measurement of the LED head 19 After turning on the power, it is possible to complete the light quantity measurement before reaching the temperature equilibrium state, and it is possible to reduce the time required for the completion inspection time and the light quantity correction processing from the viewpoint of manufacturing cost. It will be advantageous.

  The present invention is not limited to the embodiment described above. For example, in the above-described embodiment, the LED head in the electrophotographic recording type image forming apparatus using the LED element as the light source for irradiating the photosensitive drum with light has been described. The present invention can also be applied to an organic EL head using an organic EL (ElectroLuminescent) element.

  Further, in the above-described embodiment, the light source is used as the driven element. However, the present invention is not limited to, for example, a column of heating resistors in a thermal printer or a column of display elements in a display device. Any device can be applied as long as the row of driven elements is selectively and periodically driven.

  Thus, it goes without saying that the present invention can be modified as appropriate without departing from the spirit of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a control circuit included in the image forming apparatus shown as the first embodiment of the present invention. 6 is a timing chart for explaining the transmission and reception timings of various signals used in the image forming apparatus. It is a figure explaining the circuit structure of the LED head in the image forming apparatus. It is a block diagram explaining the internal structure of the LED head. FIG. 4 is a diagram illustrating a connection relationship between the prebuffer circuit shown in FIG. 3 and its peripheral circuits in the LED head. It is a figure explaining the circuit structure of the conventional reference voltage generation circuit. It is the figure which calculated | required the reference voltage when changing a power supply voltage in the reference voltage generation circuit shown in FIG. It is a figure explaining the circuit structure of the reference voltage generation circuit provided in the LED head. It is a principal part perspective view explaining a mode that each component in the LED head is mounted. It is a figure explaining the mode of the temperature rise immediately after powering on the LED head, (a) shows the time transition of the temperature rise value of the drive IC, (b) is a reference voltage generation circuit shown in FIG. (C) shows the time transition of the reference voltage value generated by the reference voltage generation circuit, and (d) shows the time transition of the drive current value flowing through the drive IC. FIG. It is a figure explaining the mode of the temperature rise immediately after power-on of the conventional LED head, (a) shows the time transition of the temperature rise value of drive IC, (b) is the conventional reference voltage generation circuit. The time transition of the temperature rise value is shown, (c) shows the time transition of the reference voltage value generated by the conventional reference voltage generation circuit, and (d) shows the time transition of the drive current value flowing in the drive IC. FIG. It is a figure explaining the circuit structure of the reference voltage generation circuit provided in the LED head in the image forming apparatus shown as the 2nd Embodiment of this invention. It is a figure explaining the circuit structure of the reference voltage generation circuit provided in the LED head in the image forming apparatus shown as the 3rd Embodiment of this invention. It is a figure explaining the circuit structure of the reference voltage generation circuit provided in the LED head in the image forming apparatus shown as the 4th Embodiment of this invention. It is the figure which calculated | required the gate-source voltage and drain current when changing temperature about the reference voltage generation circuit provided in the LED head in the image forming apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Print control part 2,4 Driver 3 Development / transfer process motor 5 Paper feed motor 6 Paper inlet sensor 7 Paper discharge sensor 8 Paper remaining amount sensor 9 Paper size sensor 19 LED head 22 Fixing device 22a Heater 23 Fixing device temperature sensor 25 High Voltage Power Supply for Charging 26 High Voltage Power Supply for Transfer 27 Developer 28 Transfer Device 100 Shift Register Circuit 101, LT, LT ₁ , LT ₂ ,..., LT ₄₉₉₂ Latch Circuit 102, G ₀ Inverter Circuit 103 Logical Product Circuit 104 LED drive circuit 105 control voltage generating circuit 106 a reference voltage generating circuit 110 operational amplifier 111 and 112, TP ₁ P-channel MOS transistor 201 regulator circuit 202, 203, 204 diodes 206 printed circuit board 301,502, R1, R2 load resistor 30 , 401,401a, 401b NPN bipolar transistor 501, TN ₁ N-channel MOS transistor AD ₁ AND circuit _{CHP 1, CHP 2, ···,} CHP 26 LED array chips C _ox gate oxide film capacitance _DRV, DRV _1, DRV ₂ , DRV ₃ , ..., DRV ₂₆ drive IC
FF, FF ₁ , FF ₂ ,..., FF ₄₉₉₂ flip-flop circuit G, G ₁ , G ₂ ,..., G ₄₉₉₂ pre-buffer circuit HD-CLK clock signal HD-DATA print data signal HD-LOAD latch signal HD-STB-N print drive signal I _b base current I _c collector current I _d drain current I _f forward current I _ref reference current L gate length _{LD 1, LD 2, ···,} LD 4992 LED element P _d calorific value R _ref reference resistance R _θ thermal resistance S, S1, S2 bottom area SG1 control signal SG2 video signal SG3 timing signal SG4 transfer signal SGC charge signal Tr, Tr ₁ , Tr ₂ ,..., Tr ₄₉₉₂ switch element V1 cathode potential, Emitter potential, source potential V _be Base-emitter voltage V _cont control Control voltage VDD power supply V _f forward voltage V _gs gate-source voltage V _O output voltage V _ref reference voltage VREF input terminal V _th threshold voltage V _ztc voltage W gate width β transconductance parameter ΔT temperature rise value μ carrier movement Every time

Claims (11)

Voltage output means for outputting a predetermined voltage based on the applied power supply voltage;
Thermal compensation means connected at one end to an output terminal provided in the voltage output means;
A reference voltage divided output means connected to the other end of the thermal compensation means for dividing and outputting a reference voltage;
Control voltage generating means for generating a control voltage based on the reference voltage output by the reference voltage divided output means;
Driving means for driving the light emitting means based on the control voltage generated by the control voltage generating means;
A light emitting unit comprising: the heat compensating means formed by different chips and a substrate on which the driving means is mounted . Ratio of the ratio of the area of the connected surface to the substrate, the area of the connected surface in the substrate of the power consumption and the drive means of said driving means in the power consumption and the heat compensating means of said thermal compensation means The light emitting unit according to claim 1, wherein the light emitting unit is substantially equal to: Ratio of the ratio of the area of the connected surface to the substrate, the area of the connected surface in the substrate of the power consumption and the drive means of said driving means in the power consumption and the heat compensating means of said thermal compensation means The light emitting unit according to claim 1, wherein the light emitting unit is in a range of 1/10 to 10 times. The area of the surface of the driving unit connected to the substrate is the area of the surface of the thermal compensation unit connected to the substrate, (power consumption of the driving unit) / (power consumption of the thermal compensation unit ). The light emitting unit according to claim 1, wherein the light emitting unit is substantially equal to a product of The area of the surface of the driving unit connected to the substrate is the area of the surface of the thermal compensation unit connected to the substrate, (power consumption of the driving unit) / (power consumption of the thermal compensation unit ). The light emitting unit according to claim 1, wherein the light emitting unit is in a range of 1/10 to 10 times the product of. The thermal compensation means includes a diode forward-connected to the output terminal of the voltage output means ,
The light emitting unit according to claim 1, wherein the reference voltage divided output means has a load resistance having one end connected to the diode. The thermal compensation means includes an NPN bipolar transistor in which a base terminal is connected to the output terminal of the voltage output means and the power supply voltage is applied to a collector terminal,
2. The light emitting unit according to claim 1, wherein the reference voltage divided output unit includes a load resistor having one end connected to an emitter terminal of the NPN bipolar transistor. The thermal compensation means includes a first NPN bipolar transistor having a base terminal connected to the output terminal of the voltage output means , a base terminal connected to the emitter terminal of the first NPN bipolar transistor, and a collector terminal. A second NPN bipolar transistor to which the power supply voltage is applied,
2. The light emitting unit according to claim 1, wherein the reference voltage divided output unit includes a load resistor having one end connected to an emitter terminal of the second NPN bipolar transistor. The thermal compensation means includes an N-channel MOS transistor in which a gate terminal is connected to the output terminal of the voltage output means and the power supply voltage is applied to a drain terminal,
2. The light emitting unit according to claim 1, wherein the reference voltage divided output unit includes a load resistor having one end connected to a source terminal of the N-channel MOS transistor. In a light emitting unit comprising a light emitting means in which a plurality of light emitting elements are arranged,
Voltage output means for outputting a predetermined voltage based on the applied power supply voltage;
Thermal compensation means connected at one end to an output terminal provided in the voltage output means;
A reference voltage divided output means connected to the other end of the thermal compensation means for dividing and outputting a reference voltage;
Control voltage generating means for generating a control voltage based on the reference voltage output by the reference voltage divided output means;
Driving means for driving the light emitting means based on the control voltage generated by the control voltage generating means;
A light emitting unit comprising: the heat compensating means formed by different chips and a substrate on which the driving means is mounted . A light-emitting unit having a light-emitting unit in which a plurality of light-emitting elements are arranged as a light source for irradiating the photosensitive member with light; exposing the photosensitive member by emitting light from the light-emitting element based on image data; In an image forming apparatus for forming an image on a photoreceptor,
Voltage output means for outputting a predetermined voltage based on the applied power supply voltage;
Thermal compensation means connected at one end to an output terminal provided in the voltage output means;
A reference voltage divided output means connected to the other end of the thermal compensation means for dividing and outputting a reference voltage;
Control voltage generating means for generating a control voltage based on the reference voltage output by the reference voltage divided output means;
Driving means for driving the light emitting means based on the control voltage generated by the control voltage generating means;
An image forming apparatus , comprising: the thermal compensation unit and a substrate on which the driving unit is mounted, each formed by a separate chip .