JP4496991B2 - Plasma display panel, plasma display device, and driving method of plasma display device - Google Patents

Description

  The present invention relates to a plasma display panel, a plasma display device, and a driving method of the plasma display device, and more particularly to a plasma display panel, a plasma display device, and a driving method of the plasma display device suitable for improving image quality.

  In recent years, development of flat panel displays has progressed. As a flat panel display, for example, there is a plasma display device (hereinafter referred to as a PD device) which is a display device provided with a plasma display panel (hereinafter referred to as a PDP).

  Unlike a display device equipped with a CRT (Cathode-Ray Tube) or LCD (Liquid Crystal Display), the PD device cannot control the light emission amount of each light emitting cell in an analog manner, and the light emitting cell (hereinafter also simply referred to as a cell). ) Light emission (lighting) and non-light emission (non-lighting) binary image display only.

  For this reason, the PD device divides one field (one frame) into a plurality of subfields (hereinafter referred to as SF) each having a different light emission period corresponding to the weighting according to the gradation to be displayed, The gradation of the image to be displayed is expressed by controlling whether each light emitting cell emits light for each SF or not.

  In a PD device, in order to display a 10-bit (binary digit) gradation image, one field needs to be at least 10 SFs.

  In 1SF, a reset period for erasing unnecessary charge in the light emitting cell, a scanning period for selecting the light emitting cell to emit light (address period), and a display period for causing the light emitting cell to emit light (sustain discharge period) are necessary.

  The PD device is provided with an address driver, a scan driver, a sustain discharge driver, and the like that apply a predetermined voltage to the PDP in the reset period, the scan period, and the display period.

  As flat panel displays are being developed, various technologies for improving the image quality of PD devices have been proposed.

  For example, in a WXGA (Wide XGA (eXtended Graphics Array)) PD device, in order to shorten the scanning period, the address electrodes provided in the PDP are divided into upper and lower parts of the PDP, and each of the address electrodes divided into upper and lower parts. There has been proposed a method of driving the PDP by controlling the voltage applied to the upper and lower address drivers (hereinafter referred to as an upper and lower divided driving method).

  In Patent Document 1, each of red, green, and blue cells constituting one pixel is divided into a plurality of cells, address electrodes are provided by the number of cells, and the number of cells to be lit is set. A technique for controlling in stages is disclosed.

In Patent Document 2, one unit pixel is composed of six subpixels including two R subpixels, two G subpixels, and two B subpixels. Is connected to each of a plurality of corresponding address electrodes, and gradation display is performed by controlling the number of lighting of sub-pixels stepwise.
JP 2000-66637 A JP 2003-131615 A

  In the WXGA PD device, when the vertical split drive method is used, when displaying a 10-bit gradation image, when the reset period in 1SF is about 0.3 msec, the reset period in 1 field (= 10SF) is about 3 msec. (Millisecond) (= 0.3 msec × 10).

  When the width of one pulse in the scanning period is 0.002 msec and the number of scanning lines on the PDP screen is 728, the vertical division driving method is used, so the scanning period is reduced to half and one field (= 10SF) ) Scanning period is about 7.7 msec (= 0.002 msec × 768/2 × 10).

  When the period of one pulse of the display period is 0.004 msec per cycle and 1023 gradation display is performed with 10SF, the display period is approximately 4.1 msec (= 0.004 msec × 1023 (= 1 + 2 + 4 +... +512)). .

  The black luminance at which the luminance of the light emitting cell is 0 is substantially proportional to the number of times that the charged light emitting cell is reset. Here, when the number of gradations is increased and an image having a 12-bit gradation is displayed on the PDP, each of the reset period, the scanning period, and the display period is approximately 1.2 times the numerical value described above.

  Therefore, when the number of gradations is increased and an image with 12-bit gradation is displayed on the PDP, the reset period is about 3.6 msec, the scanning period is about 9.2 msec, and the display period is about 4.9 msec. The total of the reset period, the scanning period, and the display period is 17.7 msec.

  If 60 fields are displayed per second, it is 16.7 msec per field. In this case, the time required to display an image of one field must be within 16.7 msec. Therefore, it becomes impossible to display a 12-bit gradation image on the PDP.

  When a 10-bit gradation image is displayed on a PDP with 1080 full high-definition television scanning lines, the scanning period is approximately 10.8 msec (= 0.002 msec x 1080/2 x 10). . Since the reset period is about 3 msec, the time taken for the display period is about 2.9 msec (= 16.7 msec− (3 msec + 10.8 msec)). Therefore, the time of about 4.1 msec required for the display period cannot be obtained, and it is impossible to display a 10-bit gradation image in full high-definition.

  As described above, there is a problem that it is difficult to increase the gradation of an image to be displayed in order to improve the image quality only by using the vertical division driving method in the PD device.

  In the techniques described in Patent Document 1 and Patent Document 2, since it is necessary to provide an address electrode for each light emitting cell, the number of address drivers that apply a voltage to the address electrode is increased as compared with a PD device having the same number of pixels. There was a problem that the cost would increase.

  Furthermore, in the technique described in Patent Document 2, since two address electrodes are provided in the same subpixel, the process of manufacturing the PDP is difficult when the conductive layer is formed, and high definition of the pixel is difficult. There was a problem of difficulty.

  The present invention has been made in view of such circumstances, and is intended to easily improve the image quality at low cost.

In the plasma display panel of the present invention, the first cell, the second cell provided to be adjacent to the first cell, and the period for selecting whether to emit light in the subfield, When the first voltage is applied, an amount of electric charge that causes the first cell to emit light in the subfield is accumulated in the first cell, and an amount of electric charge that does not cause the second cell to emit light in the subfield. When the second voltage is applied to the first cell and the second cell, an electrode for causing the first cell and the second cell to store an amount of electric charge that causes the first cell and the second cell to emit light in the subfield. The electrode is configured by connecting the first electrode and the second electrode by a third electrode formed with a width narrower than the width of the first electrode. The electrode is a first electrical When either the first voltage or the second voltage is applied to the first cell, an amount of electric charge that causes the first cell to emit light is changed based on either the applied first voltage or the second voltage. The first electrode is accumulated in one cell, and the second electrode is applied from the first electrode through the third electrode when the first voltage is applied to the first electrode. Based on the low voltage, an amount of electric charge that does not cause the second cell to emit light is accumulated in the second cell, and when the second voltage is applied to the first electrode, the third electrode is moved from the first electrode to the third electrode. Based on a voltage lower than the second voltage applied through the first cell, an amount of electric charge that causes the second cell to emit light is accumulated in the second cell.

  The plasma display panel may further include a dielectric layer that suppresses the amount of charge accumulated in the second cell as compared to the amount of charge accumulated in the first cell.

  The plasma display panel can emit light of the same color, which is either red, green, or blue, when the first cell and the second cell emit light.

  In the plasma display panel, the ratio between the luminance when the first cell emits light and the luminance when the first cell and second cell emit light can be 1: 2. .

In the plasma display device of the present invention, the first cell, the second cell provided to be adjacent to the first cell, and the period for selecting whether to emit light in the subfield, When the first voltage is applied, an amount of electric charge that causes the first cell to emit light in the subfield is accumulated in the first cell, and an amount of electric charge that does not cause the second cell to emit light in the subfield. When the second voltage is applied to the first cell and the second cell, an electrode for causing the first cell and the second cell to store an amount of electric charge that causes the first cell and the second cell to emit light in the subfield. The electrode is configured such that the first electrode and the second electrode are connected by a third electrode formed with a width narrower than the width of the first electrode. The first electrode is the first electrode When either the first voltage or the second voltage is applied, an amount of electric charge that causes the first cell to emit light is set based on either the applied first voltage or the second voltage. The second electrode is lower than the first voltage applied from the first electrode through the third electrode when the first voltage is applied to the first electrode. When an amount of electric charge that does not cause the second cell to emit light is accumulated in the second cell based on the voltage, and the second voltage is applied to the first electrode, the first electrode passes through the third electrode. And a period for selecting whether to emit light or not , and a plasma display panel that accumulates in the second cell an amount of electric charge that causes the second cell to emit light based on a voltage lower than the second voltage applied In the electrode, the first voltage, the second voltage, or the first cell and And a voltage applying means for applying one of the third voltage so as not to emit second cell.

The plasma display panel of the plasma display apparatus may further include a dielectric layer that suppresses the amount of charge accumulated in the second cell as compared to the amount of charge accumulated in the first cell. .

  In the plasma display device, when the first cell and the second cell emit light, the same color light, which is either red, green, or blue, can be emitted.

  In the plasma display device, the ratio between the luminance when the first cell emits light and the luminance when the first cell and second cell emit light can be 1: 2. .

A plasma display apparatus, the period for selecting or not emit light or emit light in each subfield, according to the voltage application means, a first voltage to the electrodes, a second voltage or any one of the third voltage, Control means for controlling the application can be further provided.

According to the driving method of the plasma display apparatus of the present invention, the first cell, the second cell provided adjacent to the first cell, and whether to emit light in the subfield are selected. In the period, when a first voltage is applied, an amount of electric charge that causes the first cell to emit light in the subfield is accumulated in the first cell, and an amount of electric charge that does not cause the second cell to emit light in the subfield. Is stored in the second cell, and when the second voltage is applied, the first cell and the second cell store an amount of charge that causes the first cell and the second cell to emit light in the subfield. The electrode is configured such that the first electrode and the second electrode are connected by a third electrode formed with a width smaller than the width of the first electrode. The first electrode is When either the first voltage or the second voltage is applied to one electrode, the amount of light that causes the first cell to emit light based on either the applied first voltage or the second voltage The charge is accumulated in the first cell, and the second electrode is applied from the first electrode through the third electrode when the first voltage is applied to the first electrode. When an amount of electric charge that does not cause the second cell to emit light is accumulated in the second cell based on a voltage lower than the voltage and the second voltage is applied to the first electrode, It is applied via the electrodes, based on a voltage lower than the second voltage, the driving of the flop plasma display device comprising a plasma display panel which stores the electric charge quantity to emit a second cell to the second cell During the period for selecting whether to emit light or not. , Including the electrodes, a first voltage, the second voltage or application step of applying one of the first cell and the third voltage to the second cell does not emit light.

  In the plasma display panel of the present invention, the first cell and the second cell provided so as to be adjacent to the first cell are provided, and the electrode emits light in the subfield or does not emit light. When a first voltage is applied during a period in which the first cell is selected, an amount of electric charge that causes the first cell to emit light is accumulated in the first cell in the subfield, and the second cell is accumulated in the subfield. When an amount of electric charge that does not cause light emission is accumulated in the second cell and a second voltage is applied, the amount of electric charge that causes the first cell and the second cell to emit light in the subfield is increased. Stored in two cells.

  In the plasma display device of the present invention, the first cell and the second cell provided adjacent to the first cell are provided, and the electrode emits light in the subfield or does not emit light. When a first voltage is applied during a period in which the first cell is selected, an amount of electric charge that causes the first cell to emit light is accumulated in the first cell in the subfield, and the second cell is accumulated in the subfield. When an amount of electric charge that does not cause light emission is accumulated in the second cell and a second voltage is applied, the amount of electric charge that causes the first cell and the second cell to emit light in the subfield is increased. Stored in two cells. In addition, in the period for selecting whether to emit light or not, a first voltage, a second voltage, or a third voltage for preventing the first cell and the second cell from emitting light is applied to the electrode. .

In the driving method of the plasma display apparatus of the present invention, the first cell, the second cell provided adjacent to the first cell, and whether to emit light in the subfield or not are selected. When a first voltage is applied during the period, an amount of charge that causes the first cell to emit light in the subfield is accumulated in the first cell, and an amount that does not cause the second cell to emit light in the subfield. Is stored in the second cell, and when the second voltage is applied, the first cell and the second cell have an amount of charge that causes the first cell and the second cell to emit light in the subfield. a method of driving a plasma display apparatus comprising a plasma display and an electrode to accumulate, in a period for selecting or not allowed or emit light emit light, the electrode , The first voltage, the second voltage, or the first cell and the second third order not to emit the cell of any one of the voltage applied.

  According to the present invention, an image can be displayed. Further, according to the present invention, the image quality can be easily improved at low cost.

  Embodiments of the present invention will be described below. Correspondences between constituent elements described in the claims and specific examples in the embodiments of the present invention are exemplified as follows. This description is to confirm that specific examples supporting the invention described in the claims are described in the embodiments of the invention. Therefore, even if there are specific examples that are described in the embodiment of the invention but are not described here as corresponding to the configuration requirements, the specific examples are not included in the configuration. It does not mean that it does not correspond to a requirement. On the contrary, even if a specific example is described here as corresponding to a configuration requirement, this means that the specific example does not correspond to a configuration requirement other than the configuration requirement. not.

  Further, this description does not mean that all the inventions corresponding to the specific examples described in the embodiments of the invention are described in the claims. In other words, this description is an invention corresponding to the specific example described in the embodiment of the invention, and the existence of an invention not described in the claims of this application, that is, in the future, a divisional application will be made. Nor does it deny the existence of an invention added by amendment.

The plasma display panel according to claim 1 (for example, the PDP 11 in FIG. 1) is provided adjacent to the first cell (for example, the light emitting cell 101-1 in FIG. 8 ) and the first cell. In the second cell (for example, the light emitting cell 101-2 in FIG. 8 ) and a period (for example, “scanning period” in FIG. 4) for selecting whether to emit light or not in the subfield, the first voltage When (for example, the driving voltage P _a1 in FIG. 4) is applied, an amount of electric charge that causes the first cell to emit light in the subfield is accumulated in the first cell, and the second cell emits light in the subfield. An amount of electric charge that is not generated is accumulated in the second cell, and when a second voltage (for example, the drive voltage P _{a2 in} FIG. 4) is applied, the first cell and the second cell are caused to emit light in the subfield. Amount of charge Electrodes to accumulate in a cell and the second cell (e.g., the address electrodes 41-N in FIG. 8) and an electrode includes a first electrode (e.g., the address electrodes 41-Na in FIG. 8) and the second 8 (for example, the address electrode 41-Nd in FIG. 8) is connected by a third electrode (for example, the address electrode 41-Nc in FIG. 8) formed to be narrower than the width of the first electrode. When the first voltage or the second voltage is applied to the first electrode, the first electrode has the first voltage or the second voltage applied. Based on any of the above, an amount of electric charge that causes the first cell to emit light is accumulated in the first cell, and the second electrode has the first electrode when the first voltage is applied to the first electrode. To the second cell based on a voltage lower than the first voltage applied through the third electrode. When a second voltage is applied to the first electrode by storing an amount of charge that does not cause light in the second cell, the second voltage is applied from the first electrode through the third electrode. Based on the lower voltage, an amount of electric charge that causes the second cell to emit light is accumulated in the second cell.

The plasma display panel according to claim 2 is a dielectric layer that suppresses the amount of charge accumulated in the second cell as compared to the amount of charge accumulated in the first cell (for example, FIG. 11). The protrusion 334a) of the rear substrate dielectric layer 334 may be further provided.

The plasma display device according to claim 5 (for example, the PD device 1 of FIG. 1) is provided adjacent to the first cell (for example, the light emitting cell 101-1 of FIG. 8 ) and the first cell. In the second cell (for example, the light emitting cell 101-2 in FIG. 8 ) and the period (for example, “scanning period” in FIG. 4) of selecting whether to emit light in the subfield or not. Is applied (for example, the driving voltage _Pa1 in FIG. 4), the first cell stores an amount of charge that causes the first cell to emit light in the subfield, and the second cell in the subfield. When a second voltage (for example, the drive voltage P _{a2 in} FIG. 4) is applied to the second cell, the first cell and the second cell are stored in the second cell. The amount of charge to be emitted 1 and an electrode (for example, the address electrode 41-N in FIG. 8 ) to be stored in the second cell, and the electrodes are the first electrode (for example, the address electrode 41-Na in FIG. 8) and the first electrode. The second electrode (for example, the address electrode 41-Nd in FIG. 8) is connected by a third electrode (for example, the address electrode 41-Nc in FIG. 8) formed to be narrower than the width of the first electrode. When the first electrode or the second voltage is applied to the first electrode, the first electrode is applied to the first electrode or the second voltage. Based on any one of the above, the first cell accumulates an amount of electric charge for causing the first cell to emit light, and the second electrode has the first voltage applied to the first electrode when the first voltage is applied to the first cell. The second cell is generated based on a voltage lower than the first voltage applied from the electrode through the third electrode. When a second voltage is applied to the first electrode by storing an amount of charge that is not to be generated in the second cell, the second voltage is applied from the first electrode through the third electrode, rather than the second voltage. Based on a low voltage, a plasma display panel (for example, PDP 11 in FIG. 1) that accumulates an amount of electric charge for causing the second cell to emit light in the second cell , and an electrode in a period for selecting whether to emit light or not. Voltage application means for applying any one of the first voltage, the second voltage, or the third voltage for preventing the first cell and the second cell from emitting light (for example, the address driver of FIG. 1) 55-1 and 55-2) .

The plasma display apparatus according to claim 9 , wherein the first voltage, the second voltage, or the third voltage applied to the electrode by the voltage applying unit is selected in a period for selecting whether to emit light in each subfield. Control means (for example, the data processing circuit 53 in FIG. 1) for controlling any one of the above can be further provided.

The driving method according to claim 10 includes a first cell (for example, light emitting cell 101-1 in FIG. 2) and a second cell (for example, FIG. 2) provided adjacent to the first cell. In the light emitting cell 101-2) and a period (for example, “scanning period” in FIG. 4) for selecting whether to emit light or not in the subfield, the first voltage (for example, the driving voltage Pa1 in FIG. 4). ) Is applied, the amount of electric charge that causes the first cell to emit light in the subfield is accumulated in the first cell, and the amount of electric charge that does not cause the second cell to emit light in the subfield is stored in the second cell. When the second voltage (for example, the driving voltage Pa2 in FIG. 4) is accumulated, the first cell and the second cell are charged with an amount of charge that causes the first cell and the second cell to emit light in the subfield. Electrodes to be stored in the cell ( For example, the first electrode (for example, the address electrode 41-Na in FIG. 8) and the second electrode (for example, the address electrode 41-N in FIG. 8) are included. Nd) is connected by a third electrode (for example, the address electrode 41-Nc in FIG. 8) formed to be narrower than the width of the first electrode, and the first electrode Emits the first cell based on either the applied first voltage or the second voltage when either the first voltage or the second voltage is applied to the first electrode. An amount of charge to be accumulated in the first cell, and the second electrode is applied from the first electrode through the third electrode when the first voltage is applied to the first electrode. Based on a voltage lower than the first voltage, an amount of charge that does not cause the second cell to emit light is accumulated in the second cell; When a second voltage is applied to one electrode, an amount that causes the second cell to emit light based on a voltage lower than the second voltage applied from the first electrode through the third electrode In a driving method of a plasma display device (for example, the PD device 1 in FIG. 1 ) including a plasma display panel (for example, the PDP 11 in FIG. 1) that accumulates the electric charges of the second cell, whether to emit light or not is selected. An application step of applying any one of a first voltage, a second voltage, or a third voltage for preventing the first cell and the second cell to emit light to the electrode during the period (for example, FIG. 7 Step S4) .

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing an example of the configuration of a PD device 1 according to an embodiment of the present invention. The PD device 1 includes a PDP 11 and a drive unit 12 that displays an image on the PDP 11. The PD device 1 uses a vertically divided drive system.

  The PDP 11 is a matrix type color display device that emits light by plasma discharge. The PDP 11 is provided with a display area 21 that is an area (screen) on which an image is displayed. In the display area 21 of the PDP 11, light emitting cells, which are small fluorescent discharge tubes, are arranged so as to be arranged vertically and horizontally. Each light emitting cell emits light. The light emitting cell emits (emits) light of any one color of red, green, and blue.

  An image is displayed in the display area 21 by controlling light emission and non-light emission of the plurality of light emitting cells.

  In the display area 21, a predetermined number of pixel units 31 including a plurality of light emitting cells constituting one pixel among the pixels of the display area 21 are provided. That is, the pixel unit 31 represents one pixel (pixel) among 1280 × 768 pixels (pixels) when the PDP 11 is of the WXGA system.

  Address electrodes 41-1 to 41-n are arranged in the upper half column direction of the display area 21 in FIG. 1, and address electrodes 41- (n + 1) to 41-2n are arranged in the lower half column direction. ing.

  Scan / sustain discharge electrodes 42-1 to 42-m (not shown) are arranged in the row direction of FIG. 1 in the display area 21 so as to intersect the address electrodes 41-1 to 41-n. Further, in the row direction of the display region 21 in FIG. 1, scan / sustain discharge electrodes 42- (m + 1) (not shown) to 42-2m are provided so as to intersect the address electrodes 41- (n + 1) to 41-2n. Has been placed.

  A predetermined voltage is applied to each of the address electrodes 41-1 to 41-2n during the scanning period. Each of the address electrodes 41-1 to 41-2n is an electrode for selecting a light emitting cell to emit light by applying a voltage to the light emitting cells arranged in a vertical line in the drawing.

  Further, a predetermined voltage is applied to each of the scan / sustain discharge electrodes 42-1 to 42-2m in the scan period. Each of the scan / sustain discharge electrodes 42-1 to 42-2m is an electrode for selecting a light emitting cell to emit light by applying a voltage to the light emitting cells arranged in a horizontal row in the drawing.

  Further, sustain discharge electrodes 43-1 to 43-2m are provided in the row direction of FIG. Each of sustain discharge electrodes 43-1 to 43-2m is arranged in display area 21 to form a pair with each of corresponding scan / sustain discharge electrodes 42-1 to 42-2m, and is arranged in a horizontal row in the figure. A voltage is applied to the aligned light emitting cells.

  Each of sustain discharge electrodes 43-1 to 43-2m and each of scan / sustain discharge electrodes 42-1 to 42-2m cause a predetermined discharge in the light emitting cells selected in the scan period during the display period. And an electrode to which a voltage for emitting light is applied.

  Hereinafter, when the address electrodes 41-1 to 41-2n do not need to be individually distinguished, they are simply referred to as address electrodes 41. Similarly, when it is not necessary to individually distinguish the scan / sustain discharge electrodes 42-1 to 42-2m, they are simply referred to as scan / sustain discharge electrodes 42. Further, when it is not necessary to individually distinguish sustain discharge electrodes 43-1 to 43-2m, they are simply referred to as sustain discharge electrodes 43.

  In the pixel portion 31, address electrodes 41-N to 41- (N + 2) are arranged. In the pixel portion 31, a pair of scan / sustain discharge electrodes 42-M and sustain discharge electrodes 43-M are arranged. That is, three address electrodes 41 are disposed in each pixel of the display area 21, and a pair of scan / sustain discharge electrodes 42 and sustain discharge electrodes 43 are disposed.

  Here, the address electrodes 41-N to 41- (N + 2) are three consecutive address electrodes 41 arranged in one pixel among the address electrodes 41-1 to 41-2n. The scan / sustain discharge electrode 42-M is one scan / sustain discharge electrode 42 among the scan / sustain discharge electrodes 42-1 to 42-2m. Sustain discharge electrode 43-M is sustain discharge electrode 43 that forms a pair with scan / sustain discharge electrode 42 among sustain discharge electrodes 43-1 to 43-2m.

  The drive unit 12 is supplied with an image signal in pixel units indicating the luminance (gradation) of each color of red, green, and blue in pixel units from an external device such as a TV (TeleVision) tuner or a computer. The image signal includes various synchronization signals, or various synchronization signals are supplied to the drive unit 12 separately from the image signal. Further, the drive unit 12 selects the light emitting cells arranged in the vertical and horizontal directions constituting the pixels in the display area 21 of the PDP 11 based on the supplied image signal and synchronization signal to emit light.

  The drive unit 12 includes a controller 51, a frame memory 52, a data processing circuit 53, an SF memory 54, an address driver 55-1, an address driver 55-2, a scan driver 56-1, a scan driver 56-2, and an X sustain discharge driver 57. , Y sustain discharge driver 58, and power supply circuit 59.

  The controller 51 is configured by a general-purpose CPU (Central Processing Unit), DSP (Digital Signal Processor), and the like, and based on various synchronization signals supplied, the frame memory 52, the data processing circuit 53, the SF memory 54, the address The driver 55-1, the address driver 55-2, the scan driver 56-1, the scan driver 56-2, the X sustain discharge driver 57, and the Y sustain discharge driver 58 are controlled.

  The frame memory 52 stores an image signal supplied in units of one field under the control of the controller 51. The image signal stored in the frame memory 52 is supplied to the data processing circuit 53 under the control of the controller 51.

  Based on the control of the controller 51, the data processing circuit 53 performs predetermined display in order to display an image in gradation from the pixel value of the pixel of one field image corresponding to the supplied image signal in units of one field. In each of the number of SFs, SF data for determining whether each light emitting cell emits light or not emits light is generated. The data processing circuit 53 supplies SF data corresponding to SF to the SF memory 54 under the control of the controller 51.

  The SF memory 54 stores the supplied SF data under the control of the controller 51, and supplies the stored SF data to the address driver 55-1 and the address driver 55-2.

  The address driver 55-1 applies a predetermined voltage to each of the address electrodes 41-1 to 41-n in accordance with the supplied SF data under the control of the controller 51 during the scanning period.

  The address driver 55-2 applies a predetermined voltage to each of the address electrodes 41- (n + 1) to 41-2n in accordance with the supplied SF data under the control of the controller 51 during the scanning period.

  The scan driver 56-1 applies a predetermined voltage to each of the scan / sustain discharge electrodes 42-1 to 42-m in the scan period under the control of the controller 51.

  The scan driver 56-2 applies a predetermined voltage to each of the scan / sustain discharge electrodes 42- (m + 1) to 42-2m in the scan period under the control of the controller 51.

  The X sustain discharge driver 57 applies a predetermined voltage to the sustain discharge electrodes 43-1 to 43-2m under the control of the controller 51 in the reset period and the display period.

  The Y sustain discharge driver 58 connected to the scan driver 56-1 and the scan driver 56-2 passes through the scan driver 56-1 and the scan driver 56-2 under the control of the controller 51 in the display period. A predetermined voltage is applied to each of the scan / sustain discharge electrodes 42-1 to 42-2m.

  The power supply circuit 59 supplies predetermined power to each of the address driver 55-1, address driver 55-2, scan driver 56-1, scan driver 56-2, X sustain discharge driver 57, and Y sustain discharge driver 58. .

  Next, the configuration of the pixel unit 31 of the PDP 11 will be described with reference to FIGS. Here, FIG. 2 is a transmission diagram illustrating an example of the configuration of the pixel unit 31 of the PDP 11 as viewed from the display surface side. The vertical direction in FIG. 2 indicates the direction in which the pixels on the display surface of the PDP 11 are arranged vertically, and the horizontal direction in FIG. 2 indicates the direction in which the pixels on the display surface of the PDP 11 are aligned horizontally. FIG. 3 is a longitudinal sectional view of the pixel portion 31 taken along the line AA in FIG.

  As shown in FIG. 2, the pixel unit 31 emits red light emitting cells 101-1 and 101-2, green light emitting cells 102-1 and 102-2, and blue light. The light emitting cell 103-1 and the light emitting cell 103-2 are configured by six light emitting cells.

  Each of the light-emitting cell 101-1, the light-emitting cell 101-2, the light-emitting cell 102-1, the light-emitting cell 102-2, the light-emitting cell 103-1, and the light-emitting cell 103-2 is sequentially adjacent in the horizontal direction of FIG. Are arranged to be.

  The pixel unit 31 is viewed from the display surface side by the light emitting cell 101-1, the light emitting cell 101-2, the light emitting cell 102-1, the light emitting cell 102-2, the light emitting cell 103-1, and the light emitting cell 103-2. It is comprised so that it may become a square.

  In FIG. 2, each of the light emitting cell 101-1, the light emitting cell 101-2, the light emitting cell 102-1, the light emitting cell 102-2, the light emitting cell 103-1, and the light emitting cell 103-2 is clarified. For the sake of illustration, it is shown slightly apart.

  As shown in FIG. 3, scan / sustain discharge electrode 42 -M and sustain discharge electrode 43 -M are formed on the lower side of surface substrate 130, which is a glass substrate on the surface of PDP 11, in the drawing. The scan / sustain discharge electrode 42 -M is composed of transparent electrodes 111-1 to 111-6 that are transparent electrodes and a bus electrode 121. The sustain discharge electrode 43-M is composed of transparent electrodes 112-1 to 112-6 and a bus electrode 122.

  A bus electrode 121 is connected to the transparent electrodes 111-1 to 111-6. A bus electrode 122 is connected to the transparent electrodes 112-1 to 112-6.

  The transparent electrode 111-1 is disposed on the upper side in FIG. 2 of the light emitting cell 101-1, and the transparent electrode 112-1 is disposed on the lower side in FIG. Similarly, each of the light emitting cell 101-2, the light emitting cell 102-1, the light emitting cell 102-2, the light emitting cell 103-1, and the light emitting cell 103-2, and each of the transparent electrodes 111-2 to 111-6 and transparent Each of the electrodes 112-2 to 112-6 is separately arranged on the upper side and the lower side in FIG.

  Each of the transparent electrodes 111-1 to 111-6 is applied with a voltage to each of the transparent electrodes 111-1 to 111-6, whereby the light-emitting cell 101-1, the light-emitting cell 101-2, and the light-emitting cell 102-1. The light emitting cell 102-2, the light emitting cell 103-1, and the light emitting cell 103-2 are disposed so as to accumulate predetermined charges.

  Similarly, each of the transparent electrodes 112-1 to 112-6 is applied with a voltage to each of the transparent electrodes 112-1 to 112-6, so that the light emitting cell 101-1, the light emitting cell 101-2, and the light emitting cell are applied. 102-1, the light emitting cell 102-2, the light emitting cell 103-1, and the light emitting cell 103-2 are disposed so as to accumulate predetermined charges.

  The lower side of the surface substrate 130 in FIG. 3 is made of low-melting glass so as to cover the transparent electrodes 111-1 to 111-6, the bus electrode 121, the transparent electrodes 112-1 to 112-6, and the bus electrode 122. A surface substrate dielectric layer 131 is formed.

  A protective layer 132 made of magnesium oxide is formed on the lower side of the front substrate dielectric layer 131 in FIG.

  Address electrodes 41-N to 41- (N + 2) are formed on the upper side in FIG. 3 of the back substrate 133, which is a glass substrate on the back of the PDP 11, and the address electrodes 41-N to 41- (N + 2) are low. It is covered with a back substrate dielectric layer 134 which is a melting point glass. Further, the PDP 11 is sandwiched between the protective layer 132 and the back substrate dielectric layer 134, maintains the discharge space 135, and contains phosphors of red, green, and blue colors (blue phosphor 136 in FIG. 3). A partition wall 137 for preventing color mixing is formed.

  The discharge space 135 is filled with a discharge gas such as mercury gas or xenon gas.

  The red, green, and blue phosphors in the discharge space 135 are applied to the wall surfaces of the partition walls 137.

  As shown in FIG. 2, the address electrode 41-N is formed by an electrode 41-Na and an electrode 41-Nb. The electrode 41-Na is linearly formed and arranged in the vertical direction of FIG. 2 in the light emitting cell 101-1.

  The address electrode 41-Na accumulates a predetermined charge in the light emitting cell 101-1, when a predetermined voltage is applied.

  The electrode 41-Nb protrudes from the center of the electrode 41-Na (of the light emitting cell 101-1) to the light emitting cell 101-2 in the lateral direction of FIG. 2 with the same thickness (not shown) as the electrode 41-Na. Formed and arranged. The vertical width of the electrode 41-Nb in FIG. 2 is the same as the horizontal width of the electrode 41-Na in FIG. For example, in the light emitting cell 101-1 and the light emitting cell 101-2, the address electrode 41-N has a shape in which the T-shape is turned 90 degrees counterclockwise when viewed from the display surface side.

  As shown in FIG. 2, the light emitting cell 101-2 is provided with an electrode 41-Nb having a smaller area than the area of the electrode 41-Na.

  The address electrode 41-Nb accumulates a predetermined charge in the light emitting cell 101-2 when a predetermined voltage is applied.

  The address electrode 41- (N + 1) is formed by an electrode 41- (N + 1) a and an electrode 41- (N + 1) b.

  Here, each of the electrode 41- (N + 1) a and the electrode 41- (N + 1) b in each of the light emitting cell 102-1 and the light emitting cell 102-2 is the same as that of the light emitting cell 101-1 and the light emitting cell 101-2 described above. Since the configuration is the same as that of each of the electrode 41-Na and the electrode 41-Nb, description thereof will be omitted.

  The address electrode 41- (N + 2) is formed by the electrode 41- (N + 2) a and the electrode 41- (N + 2) b.

  Here, each of the electrode 41- (N + 2) a and the electrode 41- (N + 2) b in each of the light emitting cell 103-1 and the light emitting cell 103-2 is the same as that of the light emitting cell 101-1 and the light emitting cell 101-2. Since the configuration is the same as that of each of the electrode 41-Na and the electrode 41-Nb, description thereof will be omitted.

  The relationship among the voltages applied to sustain discharge electrode 43, scan / sustain discharge electrodes 42-1 to 42-m, and address electrode 41 will be described with reference to the timing chart of FIG.

  The “drive voltage waveform of the sustain discharge electrode 43” shown in FIG. 4 indicates the waveform of the voltage applied to the sustain discharge electrode 43. “Drive voltage waveform of scan / sustain discharge electrode 42-1” and “drive voltage waveform of scan / sustain discharge electrode 42-m” are voltages applied to scan / sustain discharge electrodes 42-1 to 42-m, respectively. Among these, the waveform of the voltage applied to the scan / sustain discharge electrode 42-1 and the scan / sustain discharge electrode 42-m is shown. The “driving voltage waveform of the first address electrode 41” indicates a low voltage waveform among a high voltage waveform and a low voltage waveform applied to the address electrode 41. The “driving voltage waveform of the second address electrode 41” indicates a high voltage waveform among a high voltage waveform and a low voltage waveform applied to the address electrode 41.

  Hereinafter, when it is not necessary to individually distinguish the light emitting cell 101-1, the light emitting cell 101-2, the light emitting cell 102-1, the light emitting cell 102-2, the light emitting cell 103-1, and the light emitting cell 103-2, simply This is referred to as a light emitting cell 101.

  As shown in FIG. 4, one SF includes a reset period, a scanning period (address period), and a display period (sustain discharge period).

  The reset period is a period for resetting all the light emitting cells 101 of the PDP 11 to remove unnecessary charges. The scanning period is a period for selecting the light emitting cell 101 to emit light, which is specified by the SF data. The display period is a period in which the light emitting cell 101 selected in the scanning period emits light.

In the reset period, the X sustain discharge driver 57 applies the drive voltage P _X1 to the sustain discharge electrodes 43-1 to 43-m. The drive voltage P _X1 is set to a predetermined positive voltage V ₁ volt at the start of the reset period, and is set to 0 volt at time t ₂ when the predetermined period has elapsed from the start of the reset period. Drive voltage P _X1 at time t ₄ when further predetermined period of time has elapsed from the time t _2, the is the same V ₁ volts beginning of the reset period.

In the reset period, the Y sustain discharge driver 58 applies the drive voltage P _Y1 to the scan / sustain discharge electrodes 42-1 to 42-m. Drive voltage P _Y1 is a V ₂ volts at the time of the start of the reset period, from the start of the reset period to time t ₁ a predetermined period of time has elapsed, it is lowered in proportion to time, at time t _1, 0 It is said to be a bolt. Drive voltage P _Y1 is from time t ₁ to time t ₂ is 0 volt at time t _2, are V ₂ volts. The drive voltage P _Y1 is increased in proportion to time from time t ₂ to time t ₃ when a predetermined period has elapsed, and is set to V ₃ volts at time t ₃ . The drive voltage P _Y1 is set to V ₃ volts from time t ₃ until time t ₄ when a predetermined period has elapsed. Drive voltage P _Y1 At time t _4, is a V ₂ volts, from time t ₄ to time t ₅ a predetermined period of time has elapsed, is lowered in proportion to time, is zero volts at time t _5. Drive voltage P _Y1 is from time t ₅ to time t ₆ in which the predetermined period of time, set to 0 volts, at time t _6, is a V ₄ V is lower than V ₂ volts.

  In the reset period, the address electrodes 41-1 to 41-n are at the ground (GND) level, that is, the voltage applied to the address electrodes 41-1 to 41-n is 0 volts.

  As described above, a low voltage is applied to the scan / sustain discharge electrode 42 and the sustain discharge electrode 43 in each light emitting cell 101 regardless of the image display state in the PDP 11 until then, and a weak discharge is generated in the light emitting cell 101. And the wall charges in the light emitting cells 101 are erased, and all the light emitting cells 101 are in a uniform potential state without wall charges.

  Thereby, the discharge in the scanning period next to the reset period can be stably performed.

During the scanning period, the voltage applied to the sustain discharge electrode 43 is maintained at V ₁ volts.

In the scanning period, the driving voltage P _Y2 is applied to each of the scan / sustain discharge electrodes 42-1 to 42-m. For example, the drive voltage P _Y2 of V ₄ volts is applied to the scan / sustain discharge electrode 42-1. The drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-1 is set to 0 volt at time t ₇ when a predetermined period has elapsed from the start of the scan period.

The drive voltage P _Y2 is set to V ₄ volts at a predetermined period from time t ₇ , for example, at time t ₈ when 0.002 msec has elapsed, and the voltage applied to the scan / sustain discharge electrode 42-1 during the scan period is V ₄ volts.

The drive voltage P _Y2 applied to each of the scan / sustain discharge electrodes 42-2 to 42-m is sequentially from time t _{7 in the same} manner as the drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-1. Until a time t ₉ when the predetermined period has elapsed, the voltage is set to 0 volt for a predetermined period, for example, 0.002 msec, and the driving voltage P _Y2 is set to V ₄ volt in other scanning periods.

At time t ₇ in the scan sustain discharge electrodes 42-1, the address electrodes 41 corresponding to the light emitting cells 101 to emit light, for example, the drive voltage P _a1 is V ₅ volts is applied.

That is, in the scanning period, a voltage of V ₅ volts is applied to the address electrode 41 corresponding to the light emitting cell 101 to emit light during the period of 0 volts at the scan sustain discharge electrode 42 corresponding to the light emitting cell 101 to emit light. In the display period, the light emitting cell 101 that emits light is selected.

V ₆ volt driving voltage P _a2 is voltage higher than V ₅ volts, like the drive voltage P _a1, in the scanning period, it is applied to the address electrodes 41 corresponding to the light emitting cells 101 to emit light.

As described above, in the scanning period, the drive voltage P _a1 or drive voltage P _a2 is applied to the address electrodes 41-1 to 41-n, is applied to the scan and sustain discharge electrodes 42-1 to 42-1 2m The light emitting cell 101 is selected and deselected according to the combination with the driving voltage P _Y2 .

  That is, a discharge occurs between the scan / sustain discharge electrode 42 and the address electrode 41 in the light emitting cell 101 that emits light, and this is used as a fire, and the sustain discharge electrode 43 and the scan / sustain discharge electrode 42 in the light emitting cell 101 A discharge for accumulating wall charges occurs between the two, and the wall charges are accumulated.

  As a result, a predetermined discharge can be maintained in the next display period on the sustain discharge electrode 43 corresponding to the light emitting cell 101 to emit light and the surface substrate dielectric layer 131 (protective layer 132) covering the scan / sustain discharge electrode 42. A significant amount of wall charge is accumulated.

In the display period, the X sustain discharge driver 57 applies a rectangular wave drive voltage P _X2 to the sustain discharge electrodes 43-1 to 43-m, and the Y sustain discharge driver 58 alternately scans and outputs the drive voltage P _X2. A rectangular wave driving voltage P _Y3 is applied to the sustain discharge electrodes 42-1 to 42-m.

That is, the drive voltage P _X2 is applied to the sustain discharge electrode 43 at the start point of the display period, and the drive voltage P _X2 is set to V ₁ volts at the start point of the display period. at time t ₁₀ that period has elapsed, it is set to 0 volts. Thereafter, the drive voltage P _X2 is set to 0 volt from time t ₁₀ until time t ₁₁ when a predetermined period has elapsed, and is set to V ₁ volt at time t ₁₁ .

At the start of the display period, the drive voltage P _Y3 applied to the scan and sustain discharge electrodes 42-1 to 42-m is a V ₂ volts are at time t ₁₁ 0 volts. Thereafter, the drive voltage P _Y3 is set to 0 volt until time t ₁₂ when a predetermined period has elapsed from time t _11, and is set to V ₂ volt at time t ₁₂ .

That is, in the display period, each of the drive voltage P _X2 and the drive voltage P _Y3 is alternately (for each cycle of the drive voltage P _X2 (or drive voltage P _Y3 )), the sustain discharge electrodes 43-1 to 43-m. Further, it is repeatedly applied to each of the scan / sustain discharge electrodes 42-1 to 42-m.

Thereby, in the light emitting cell 101 selected in the scanning period (wall charges are accumulated), the discharge is maintained by the driving voltage P _X2 and the driving voltage P _Y3 that are alternately and repeatedly applied, and the light emitting cells 101 of the respective colors. Emits light.

  The brightness viewed by a person in the image displayed in one subfield is determined by the length of the display period.

  Although not shown, sustain discharge electrode 43 (sustain discharge electrode 43- (m + 1) to 43-2m), scan / sustain discharge electrode 42- (m + 1) to 42-2m, and address electrode 41 (address electrode 41-) Also in (n + 1) to 41-2n), as in FIG. 4, a predetermined drive voltage is applied in the reset period, scanning period, and display period, and the light emitting cell 101 emits light.

  As described above, in the SF, the light emitting cell 101 emits light, and the PDP 11 can display an image.

Hereinafter, the address electrode 41 when the driving voltage _Pa1 or the driving voltage _Pa2 is applied in the scanning period will be described.

The electrode 41-Na is the address electrode 41-N shown in FIG. 2, the driving voltage P _a1 by is applied, the driving voltage P _a1 driving voltage is applied to the scan and sustain discharge electrodes 42-M and P _Y2 As a result, discharge occurs in the light emitting cell 101-1, and the light emitting cell 101-1 accumulates an amount of electric charge necessary for causing the light emitting cell 101-1 to emit light during the display period.

When the drive voltage _Pa1 is applied to the electrode 41-Na, a predetermined voltage is also applied to the electrode 41-Nb formed integrally with the electrode 41-Na.

At this time, a discharge occurs in the light emitting cell 101-2 due to the voltage applied to the electrode 41-Nb and the drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-M. In the display period, an amount of electric charge that does not cause the light emitting cell 101-2 to emit light is accumulated.

As described above, since the area of the electrode 41-Nb in the light emitting cell 101-2 is small, the driving voltage _Pa1 , which is a low voltage applied to the electrode 41-Na, causes the light emitting cell 101-2 to have a display period. This is because the amount of charge that causes the light emitting cell 101-2 to emit light cannot be accumulated.

In other words, the drive voltage _Pa1 has such a magnitude (strong) that the electrode 41-Nb cannot accumulate the amount of charge necessary for causing the light emitting cell 101-2 to emit light during the display period. Voltage).

Therefore, in the scanning period, when the driving voltage _Pa1 is applied to the address electrode 41-N, the light emitting cell 101-2 is not selected as a light emitting cell to emit light. That is, the light emitting cell 101-2 does not emit light during the display period.

Thus, when the drive voltage _Pa1 is applied to the address electrode 41-N, only the light emitting cell 101-1 emits light, and the light emitting cell 101-2 does not emit light.

In the scanning period, if it is higher than the driving voltage P _a1 voltage drive voltage P _a2 is applied to the electrode 41-Na, the driving voltage P _Y2 applied to the drive voltage P _a1 and scan and sustain discharge electrodes 42-M As a result, discharge occurs in the light emitting cell 101-1, and the light emitting cell 101-1 accumulates an amount of charge necessary for causing the light emitting cell 101-1 to emit light during the display period.

When the drive voltage _Pa2 is applied to the electrode 41-Na, the voltage is also applied to the electrode 41-Nb formed integrally with the electrode 41-Na.

At this time, the voltage applied to the electrode 41-Nb, by the drive voltage P _Y2 applied to the drive voltage P _a1 and scan and sustain discharge electrodes 42-M, discharge occurs in the discharge cells 101-2, emission The cell 101-2 accumulates an amount of electric charge necessary for causing the light emitting cell 101-2 to emit light during the display period.

In other words, the drive voltage P _a2 is used to cause the light emitting cell 101-2 to cause the light emitting cell 101-2 to cause the light emitting cell 101-2 to emit light during the display period. It is a voltage of a magnitude (strength) that can accumulate a necessary amount of charge.

In the scanning period, when the driving voltage _Pa2 is applied to the address electrode 41-N, the light emitting cell 101-2 is selected as a light emitting cell that emits light in the display period. That is, the light emitting cell 101-2 emits light during the display period.

When the drive voltage _Pa2 is applied to the address electrode 41-N, both the light emitting cell 101-1 and the light emitting cell 101-2 emit light.

Here, the electrode by the drive voltage P _a1 and the drive voltage _{P a2 41- (N + 1)} a and the electrode 41- (N + 1) and the voltage applied to b, the light emitting cell 102-1 and the light emitting cells 102-2 emission and non relationship emission voltage applied to the electrode 41-Na, and the electrode 41-Nb by the drive voltage P _a1 and the drive voltage P _a2, and emission and non-emission relationship emitting cell 101-1 and the light emitting cells 101-2 Since it is the same, the description is omitted.

The electrode by the drive voltage P _a1 and the drive voltage _{P a2 41- (N + 2)} a and the electrode 41- (N + 2) and the voltage applied to b, emission and non-light emission of the light emitting cell 103-1 and the light emitting cells 103-2 the relationship between the voltage applied to the electrode 41-Na, and the electrode 41-Nb by the drive voltage P _a1 and the drive voltage P _a2, similarly to the light emission and non-emission relationship emitting cell 101-1 and the light emitting cells 101-2 Therefore, the description thereof is omitted.

  Referring to FIGS. 5 and 6, the relationship between the gradation of one field image corresponding to the image signal supplied to PD device 1 from the outside and the gradation of the one field image actually displayed on PDP 11. Will be explained.

  The “subfield” in FIGS. 5 and 6 divides each SF into 7 SFs, that is, the 1st SF to the 7th SF, and 1 field into 8 SFs. Each SF in the case, that is, each of the first to eighth SFs is shown.

  “Selected cells” in FIGS. 5 and 6 indicate the light emitting cells 101 selected in the scanning period when an image is displayed on the PDP 11. Also, in each SF, whether two light emitting cells 101 of the same color among the two light emitting cells 101 of the same color in the pixel unit 31 are made non-light emitting or one light emitting cell 101 is made to emit light, Alternatively, the selection of whether or not to emit both of the two light emitting cells 101 of the same color, that is, the number of the light emitting cells 101 to emit light in the two light emitting cells 101 of the same color is shown.

  For example, the “first cell” hatched in FIGS. 5 and 6 causes the light emitting cell 101-1 shown in FIG. 2 to emit light when the red light emitting cell 101 emits light, and the light emitting cell 101-2. Indicates that no light is emitted.

  5 and FIG. 6, the hatched “first cell and second cell” indicate the light emitting cell 101-1 and the light emitting cell 101 shown in FIG. 2 when the red light emitting cell 101 emits light. -2 indicates that both light emitting cells 101 emit light.

  The “first cell” and “first cell and second cell” not hatched in FIGS. 5 and 6 are, for example, the light emitting cell 101 that emits red light and the light emitting cell 101-1. This indicates that both the cell 101-2 and the cell 101-2 are not allowed to emit light.

“Luminance weighting” in FIGS. 5 and 6 indicates the luminance weighting of each SF, that is, the gradation of one SF actually displayed on the PDP 11. Here, one SF gradation actually displayed on the PDP 11 means the number of driving voltages P _X2 (driving voltage P _Y3 ) shown in FIG. The length of the display period in SF.

  Here, “weight” in “luminance weighting” is a product of the time during which the light emitting cell 101 emits light and the luminance of unit time. Since human vision has a characteristic of perceiving the product of light intensity and time of light as brightness, the “weight” is perceived by the person watching the light emitting cell 101-1 and the light emitting cell 101-2. It can be said that it shows brightness.

  In “luminance weighting”, in the same SF, the gradation of “first cell”, that is, for example, the luminance when only the light emitting cell 101-1 is caused to emit light, and “first cell and second cell” ", That is, the ratio with the luminance when both the light emitting cell 101-1 and the light emitting cell 101-2 are made to emit light is 1: 2.

  Also, in the “luminance weighting”, when only the “first cell”, that is, the light emitting cell 101-1, for example, emits light, the first SF to the eighth SF The gradation (luminance) is a power of “3”. More precisely, in the “first cell”, the gradation of the x-th SF is “3 ^ (x−1)”.

  Although the reason will be described later, in the “first cell”, the gradation of the eighth SF is not three times the gradation of the seventh SF. For example, the gradation of the eighth SF is “955”. At this time, the gray level of the x-th SF in the “first cell” is “3 ^ (x−1) −A (A = 0 when x = 1 to 7, A = 1123 when x = 8”). ) ”.

  Furthermore, in the “luminance weighting”, the “first cell and the second cell”, that is, for example, the luminance in the case where both the light emitting cell 101-1 and the light emitting cell 101-2 emit light, This is twice as much as when only the cell emits light. That is, the gray level of the xth SF in “first cell and second cell” is “2 · 3 ^ (x−1)”.

  Although the reason will be described later, in the “first cell and the second cell”, the gradation of the eighth SF is not three times the gradation of the seventh SF. The gradation of the eighth SF is “1910”. At this time, the gray level of the xth SF in “first cell and second cell” is “2 · 3 ^ (x−1) −2 · A”.

  “1 to 4096 gradation” indicates the gradation (pixel value of one pixel) of an image in one field in an image signal supplied from the outside.

  FIG. 5 is a diagram showing the gradation of one field image actually displayed on the PDP 11 when one field image in the image signal supplied to the PD device 1 has 1 to 2186 gradations.

  When an image of one field in the image signal supplied to the PD apparatus 1 has 1 to 2186 gradations, an image of one field can be expressed using the first SF to the seventh SF.

  Hereinafter, a method of selecting “first cell” or “first cell and second cell” of “selected cells” in each SF in FIG. 5 will be described.

  First, the gradation of one field image in the image signal supplied to the PD device 1 is converted into a ternary number.

  In each value represented by a ternary number, when the value of each digit of the ternary number is “0”, there is no “selected cell” in the corresponding SF (the light emitting cell 101 does not emit light). When the value of each digit is “1”, the “selected cell” in the corresponding SF is “first cell”, and when the value of each digit of the ternary number is “2”, “ “Selected cells” are defined as “first cell and second cell”.

  For example, when the image of one field in the image signal supplied to the PD device 1 has 19 gradations, the decimal number “19” is “201” in ternary number and the last digit is “1”. Since the “selected cell” in the first SF is “first cell” and the second digit from the lower order is “0”, there is no “selected cell” in the second SF. Since the third digit is “2”, the “selected cell” in the third SF is “first cell and second cell”.

  At this time, the “luminance weighting” is one gradation in the first SF and 18 gradations in the third SF, so that 19 gradations are obtained by adding these.

  When an image of one field in the image signal supplied to the PD apparatus 1 has 1 to 2186 gradations, an image of one field can be expressed using the first SF to the seventh SF.

  FIG. 6 shows an example of a one-field image actually displayed on the PDP 11 when one-field image corresponding to the image signal supplied to the PD device 1 has 955 to 2186 gradation and 2187 to 4096 gradation. It is a figure which shows a tone.

  When an image of one field in the image signal supplied to the PD device 1 has 955 to 2186 gradations, an image of one field can be expressed using the first SF to the eighth SF.

  A method of selecting “first cell” or “first cell and second cell” of “selected cells” in each SF of FIG. 6 will be described below.

  The gradation of one field image in the image signal supplied to the PD device 1 is changed to “first cell” in “luminance weighting” in order from the eighth SF to the first SF of “subfield”. And the gradation of the “second cell” or the gradation of the “first cell”.

  At this time, the gradation of the “first cell and the second cell” has priority over the gradation of the “first cell”, and the gradation of the image of one field in the image signal supplied to the PD device 1 is determined. Divide.

  For example, when it is possible to divide by the gradation of “first cell and second cell” of the eighth SF, the remainder is “first cell and second cell” of the seventh SF. Divide by “gradation” or “first cell” gradation.

  In this way, the remainder calculated by dividing can be divided by dividing the gradation of “first cell and second cell” or the gradation of “first cell” of the next SF. In this case, the cell of the gradation, that is, “first cell and second cell” or “first cell” is selected.

  For example, when one field image in the image signal supplied to the PD device 1 has 2186 gradations, “2186” is the gradation of “first cell and second cell” of the eighth SF. Dividing by “1910”, the remainder “276” is divided by “243” which is the gradation of “first cell and second cell” of the sixth SF, and the remainder “33” Is divided by “27” which is the gradation of “first cell and second cell” of the fourth SF, and the remainder “6” is divided into “first cell of the second SF” And “6” which is the gradation of the second cell.

  As a result, “first cell and second cell” are selected in the second SF, “first cell” is selected in the fourth SF, and “first cell” is selected in the sixth SF. “Cell” is selected, and “first cell and second cell” are selected in the eighth SF.

  When an image of one field in the image signal supplied to the PD device 1 has 2187 to 4096 gradations, an image of one field can be expressed using the first SF to the eighth SF.

  In each SF, the selection method of “first cell” or “first cell and second cell” of “selected cell” is the same as that in the above-described case of 955 to 2186 gray scale. Description is omitted.

  As described above, according to the present invention, the 955 to 2186 gradations can be expressed by the first SF to the seventh SF, or expressed by the first SF to the eighth SF. You can also

  As described above, the gradation of the “first cell and the second cell” of the eighth SF is three times the gradation of the “first cell and the second cell” of the seventh SF. is not.

  For example, when an image of one field in the image signal supplied to the PD device 1 has 4096 gradations, the first SF to the seventh SF have 2186 (2 + 6 + 18 + 54 + 162 + 486 + 1458) gradations.

  At this time, 1910 (4096-2186) gradation is sufficient for the eighth SF, so the gradation of the SF of the eighth proposal is 4374th floor, which is three times the gradation of the seventh SF. There is no need to be key.

  The gradation of the “first cell” of the eighth SF is not three times the gradation of the “first cell” of the seventh SF.

  For example, when one field image in the image signal supplied to the PD device 1 has 2048 gradations, the first SF to the seventh SF have 1093 (1 + 3 + 9 + 27 + 81 + 243 + 729) gradations.

  At this time, since the 955 (2048-1093) gradation is sufficient for the eighth SF, the gradation of the eighth SF is 2187 gradations, which is three times the gradation of the seventh SF. There is no need to be.

  Further, in the “luminance weighting” in the “first cell” of FIG. 6, the first SF is “1”, the second SF is “3”, the third SF is “9”, The fourth SF is “27”, the fifth SF is “81”, the sixth SF is “230”, the seventh SF is “703”, and the eighth SF is “994”. You may do it.

  Furthermore, in each SF, the number of times of “luminance weighting” emission may be arbitrarily changed.

  Next, the process of applying a voltage to the address electrode 41 will be described with reference to the flowchart of FIG.

  In step S1, the controller 51 causes the data processing circuit 53 to extract the gradation of each pixel in the image of one field. That is, the data processing circuit 53 extracts the gradation of each pixel of the image of one field included in the image signal supplied to the PD device 1.

  In step S2, the controller 51 performs non-light emission of the first cell and the second cell, light emission of the first cell, or first light emission in each pixel of each SF based on the gradation extracted in the process of step S1. One of the light emission of the first cell and the second cell is selected.

  That is, using the cell selection method described above with reference to FIGS. 5 and 6, the first cell and the second cell emit no light, only the first cell emits light (the second cell does not emit light). Or light emission of both the first cell and the second cell, for example, non-light emission of the red light emitting cell 101-1 and the light emitting cell 101-2 shown in FIG. 2, light emission of only the light emitting cell 101-1 (light emission) The cell 101-2 does not emit light), or either one of the light emission of the light emitting cell 101-1 and the light emitting cell 101-2 is selected.

In step S3, the controller 51 sets the value of the voltage applied to the address electrode 41 to 0 volt, V ₅ volt shown in FIG. 4, based on the number of cells to be lit selected in the process of step S2. Select from three values of V ₆ volts.

  In step S4, the controller 51 controls the address driver 55-1 or the address driver 55-2 to apply the voltage selected in the process of step S3 to the address electrode 41.

That is, in the process of step S3, when 0 volt is selected, the first cell and the second cell are not lit, and when V ₅ volt is selected, only the first cell is lit. When V ₆ volts is selected, both the first cell and the second cell emit light.

  As described above, the PD device 1 can display an image with 12 bits of gradation (= 4096 gradations) using eight SFs.

  When one field is expressed by 8 SFs, the reset period is about 2.4 msec (0.3 msec x 8), the scanning period is about 6.1 msec (0.002 msec x 768/2 x 8), and the display period is 8.2 msec (= 0.004 mssec) × 2048).

  “2048” in the display period of 8.2 msec is due to the following reason. In the conventional PDP, gradation is expressed by one light emitting cell in one pixel. In the PDP 11, gradation is expressed by using two light emitting cells of the same color in one pixel. As a result, the PDP 11 can express twice as many gradations as the conventional PDP with the same number of times of light emission. Therefore, in 12-bit display, 4096 + 1 gradation can be expressed by 2048 (1 + 3 + 9 + 27 + 81 + 243 + 729 + 955) light emission.

  In addition, the black luminance of the PD device 1 is 0.8 times and the display luminance is 1.4 times that of a conventional PD device that displays a 10-bit gradation image (hereinafter referred to as a conventional PD device).

  Here, 0.8 times in black luminance means that one light emitting cell in one pixel of a conventional PDP is divided into two, for example, transparent electrode 111-1 and transparent electrode 112- shown in FIG. 1 and the black luminance generated between the transparent electrode 111-2 and the transparent electrode 112-2 is 0.8 times the black luminance in one light emitting cell in the conventional PDP. Yes.

  The display luminance of 1.4 times is because the display period of the PD device 1 is 2.0 times that of the conventional PD device, and the light emission area is about 0.7 times that of the conventional PD device. Here, 0.7 times in the light emitting area is because one light emitting cell is divided into two light emitting cells, so that the light shielding portion by the partition 137 increases.

  As described above, the PD device 1 can reduce the black luminance, increase the luminance, and increase the gradation of the image.

  In the PDP 11 of the PD device 1, it is possible to drive two light emitting cells of the same color, for example, the light emitting cell 101-1 and the light emitting cell 101-2, with one address electrode 41. Thereby, when providing the light emitting cell of the same color in 1 pixel, it can prevent that cost becomes high by increasing an address driver.

  Further, since it is only necessary to change the shape of the address electrode 41, it is possible to easily increase the definition of the pixel.

  Therefore, the PD device 1 can easily improve the image quality at low cost.

  In full high-definition that displays 10-bit gradation images, if the number of scanning lines is 1080, the reset period is about 2.1 msec (0.03 msec x 7), and the scanning period is about 7.56 msec (0.002 x 1080 / 2 × 7), the display period is about 4.1 msec (0.004 × 1023), the total is 13.76 msec, and one field can be accommodated in 16.7 msec.

  Therefore, the number of scanning lines can be set to 1080 in full high-definition in the WXGA system.

  FIG. 8 is a diagram illustrating another example of the configuration of the pixel unit 31 of the PDP 11. The configuration of the pixel unit 31 in FIG. 8 is the same as the configuration of the pixel unit 31 in FIG. 2 except for the shape of the address electrodes 41-N to 41- (N + 1). Therefore, the same components as those of the pixel unit 31 in FIG. 2 are denoted by the same reference numerals, and the description thereof is omitted.

  The address electrode 41-N is formed by an electrode 41-Na, an electrode 41-Nc, and an electrode 41-Nd. The electrode 41-Na is linearly formed and arranged in the vertical direction of FIG. 8 in the light emitting cell 101-1.

  Further, the electrode 41-Nc protrudes from the center of the electrode 41-Na (of the light emitting cell 101-1) to the light emitting cell 101-2 in the lateral direction of FIG. 8 with the same thickness (not shown) as the electrode 41-Na. Are formed and arranged. The vertical width of the electrode 41-Nc in FIG. 8 is narrower than the horizontal width of the electrode 41-Na in FIG.

  The electrode 41-Nd has the same thickness (not shown) and the same width (lateral direction of FIG. 8) as the electrode 41-Na linearly in the vertical direction of FIG. 8 from the end of the electrode 41-Nc in the light emitting cell 101-2. ) And are arranged. Note that the length of the electrode 41-Nd in the vertical direction in FIG. 8 only needs to be within the light emitting cell 101-2, and may be an arbitrary length. For example, in the light emitting cell 101-1 and the light emitting cell 101-2, the address electrode 41-N has a shape in which “d” is turned 90 degrees counterclockwise when viewed from the display surface.

Electrode 41-Na, by driving voltage P _a1 is applied by the discharge in the light emitting cell 101-1 by the drive voltage P _Y2 applied to the drive voltage P _a1 and scan and sustain discharge electrodes 42-M, In the light emitting cell 101-1, an amount of electric charge necessary for causing the light emitting cell 101-1 to emit light in the display period is accumulated. When the drive voltage _Pa1 is applied to the electrode 41-Na, a resistance is generated in the electrode 41-Nc. This is because the electrode 41-Nc is formed with a narrow width in the vertical direction in FIG.

When the drive voltage _Pa1 is applied to the electrode 41-Na, resistance is generated in the electrode 41-Nc, and thus the voltage applied to the electrode 41-Nd is lower than the drive voltage _Pa1 . Thus, the electrode 41-Nd has a light emitting cell due to discharge in the light emitting cell 101-1 by the voltage applied to the electrode 41-Nd and the drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-M. No voltage is applied to 101-2 to accumulate an amount of charge necessary for causing the light emitting cell 101-2 to emit light during the display period.

At this time, a discharge occurs in the light emitting cell 101-2 due to the voltage applied to the electrode 41-Nd and the drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-M, In the display period, an amount of electric charge that does not cause the light emitting cell 101-2 to emit light is accumulated.

In other words, the driving voltage P _a1 is the amount of charge necessary for the electrode 41-Nd to cause the light emitting cell 101-2 to emit light during the display period due to the resistance generated in the electrode 41-Nc. This is a voltage of a magnitude (strength) that cannot be stored.

That is, when the driving voltage _Pa1 is applied to the address electrode 41-N, the light emitting cell 101-1 emits light and the light emitting cell 101-2 does not emit light.

Electrode 41-Na, by driving voltage P _a2 is applied, the discharge in the light emitting cell 101-1 by the drive voltage P _Y2 applied to the drive voltage P _a2 and scan and sustain discharge electrodes 42-M, In the light emitting cell 101-1, an amount of electric charge necessary for causing the light emitting cell 101-1 to emit light in the display period is accumulated. At this time, since the width of the electrode 41-Nc in the vertical direction of FIG. 8 is narrow, resistance is generated in the electrode 41-Nc.

When the drive voltage _Pa2 is applied to the electrode 41-Na, resistance is generated in the electrode 41-Nc, and thus the voltage applied to the electrode 41-Nd is lower than the drive voltage _Pa2 .

However, at this time, the electrode 41-Nd is connected to the light emitting cell 101-1 by the drive voltage P _Y2 applied to the light emitting cell 101-2 and the scan / sustain discharge electrode 42-M via the electrode 41-Nc. Due to the internal discharge, a voltage having a magnitude that accumulates an amount of charge necessary for causing the light emitting cell 101-2 to emit light in the display period is applied.

That is, the driving voltage _Pa2 is equal to the amount of charge necessary for the electrode 41-Nd to cause the light emitting cell 101-2 to emit light in the light emitting cell 101-2 during the display period even if resistance occurs in the electrode 41-Nc. Is a voltage of a magnitude to which a voltage capable of accumulating is applied.

Thus, when the drive voltage _Pa2 is applied to the address electrode 41-N, the light emitting cell 101-1 and the light emitting cell 101-2 emit light.

  The address electrode 41- (N + 1) is formed by an electrode 41- (N + 1) a, an electrode 41- (N + 1) c, and an electrode 41- (N + 1) d.

  Here, each of the electrode 41- (N + 1) a, the electrode 41- (N + 1) c, and the electrode 41- (N + 1) d in the light emitting cell 102-1 and the light emitting cell 102-2 is the light emitting cell 101-1 described above. And since it has the structure similar to each of the electrode 41-Na, the electrode 41-Nc, and the electrode 41-Nd in the light emitting cell 101-2, the description is abbreviate | omitted.

Also, the drive voltage P _a1 and the drive voltage P _a2 by the electrodes 41- (N + 1) a, the electrodes 41- (N + 1) c, and the electrode 41- (N + 1) and the voltage applied to the d, the light emitting cells 102-1 and emission emission and the relationship of the non-light emitting cell 102-2, the driving voltage P _a1 and the drive voltage P _a2 by the electrode 41-Na, and the voltage applied electrode 41-Nc, and the electrode 41-Nd, light emitting cell 101-1 Since the light emitting cell 101-2 has the same light emission and non-light emission relationship, the description thereof is omitted.

  The address electrode 41- (N + 2) is formed by an electrode 41- (N + 2) a, an electrode 41- (N + 2) c, and an electrode 41- (N + 2) d.

  Here, each of the electrode 41- (N + 2) a, the electrode 41- (N + 2) c, and the electrode 41- (N + 2) d in the light emitting cell 103-1 and the light emitting cell 103-2 is the light emitting cell 101-1 described above. And since it has the structure similar to each of the electrode 41-Na, the electrode 41-Nc, and the electrode 41-Nd in the light emitting cell 101-2, the description is abbreviate | omitted.

Also, the drive voltage P _a1 and the drive voltage P _a2 by the electrodes 41- (N + 2) a, the electrodes 41- (N + 2) c, and the electrode 41- (N + 2) and the voltage applied to the d, the light emitting cells 103-1 and emission emission and the relationship of the non-light emitting cell 103-2, the driving voltage P _a1 and the drive voltage P _a2 by the electrode 41-Na, and the voltage applied electrode 41-Nc, and the electrode 41-Nd, light emitting cell 101-1 Since the light emitting cell 101-2 has the same light emission and non-light emission relationship, the description thereof is omitted.

  With the above configuration, the PDP 11 including the pixel unit 31 illustrated in FIG. 8 can have the same effect as the PDP 11 including the pixel unit 31 illustrated in FIG. 2 described above.

  FIG. 9 is a diagram illustrating another example of the configuration of the pixel unit 31 of the PDP 11. The configuration of the pixel unit 31 in FIG. 8 is the same as the configuration of the pixel unit 31 in FIG. 2 except for the shape of the address electrodes 41-N to 41- (N + 1). Therefore, the same components as those of the pixel unit 31 in FIG. 2 are denoted by the same reference numerals, and the description thereof is omitted.

  The address electrode 41-N is formed of an electrode 41-Na, an electrode 41-Ne, an electrode 41-Nf, and an electrode 41-Ng. The electrode 41-Na is linearly formed and arranged in the vertical direction of FIG. 9 in the light emitting cell 101-1.

  The electrode 41-Ne protrudes from the upper side of the electrode 41-Na in the light emitting cell 101-1 in FIG. 9 to the light emitting cell 101-2 in the lateral direction of FIG. 9 with the same thickness (not shown) as the electrode 41-Na. Formed and arranged. Further, the electrode 41-Nf has the same thickness (not shown) as the electrode 41-Na from the lower side of the electrode 41-Na in the light emitting cell 101-1 in FIG. It is formed and arranged to protrude.

  The vertical width of the electrode 41-Ne and the electrode 41-Nf in FIG. 9 is narrower than the horizontal width of the electrode 41-Na in FIG.

  The electrode 41-Ng has the same thickness (not shown) and the same width (not shown) as the electrode 41-Na linearly in the vertical direction of FIG. 9 from the ends of the electrode 41-Ne and the electrode 41-Nf in the light emitting cell 101-2. (Width in the horizontal direction in FIG. 9). The length of the electrode 41-Ng in the vertical direction in FIG. 9 only needs to be within the light emitting cell 101-2, and may be any length.

Electrode 41-Na, by driving voltage P _a1 is applied by the discharge in the light emitting cell 101-1 by the drive voltage P _Y2 applied to the drive voltage P _a1 and scan and sustain discharge electrodes 42-M, In the light emitting cell 101-1, an amount of electric charge necessary for causing the light emitting cell 101-1 to emit light in the display period is accumulated.

When the drive voltage _Pa1 is applied to the electrode 41-Na, resistance is generated in the electrode 41-Ne and the electrode 41-Nf. This is because the width of the electrode 41-Ne and the electrode 41-Nf in the vertical direction in FIG. 9 is narrow.

When the drive voltage _Pa1 is applied to the electrode 41-Na, resistance is generated in the electrode 41-Ne and the electrode 41-Nf. Therefore, the voltage applied to the electrode 41-Ng is the drive voltage P to the electrode 41-Ng. _The voltage is lower than _a1 . As a result, the electrode 41-Ng has a light emitting cell due to discharge in the light emitting cell 101-1 by the voltage applied to the electrode 41-Ng and the drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-M. No voltage is applied to 101-2 to accumulate an amount of charge necessary for causing the light emitting cell 101-2 to emit light during the display period.

At this time, discharge occurs in the light emitting cell 101-2 due to the voltage applied to the electrode 41-Ng and the drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-M, In the display period, an amount of electric charge that does not cause the light emitting cell 101-2 to emit light is accumulated.

In other words, the drive voltage P _a1 causes the electrode 41-Ng to cause the light emitting cell 101-2 to cause the light emitting cell 101-2 to emit light during the display period due to the resistance generated in the electrode 41-Ne and the electrode 41-Nf. The voltage has a magnitude (strength) that cannot store a necessary amount of electric charge.

That is, when the driving voltage _Pa1 is applied to the address electrode 41-N, the light emitting cell 101-1 emits light and the light emitting cell 101-2 does not emit light.

The electrode 41-Na causes the light emitting cell 101-1 to accumulate an amount of electric charge necessary for causing the light emitting cell 101-1 to emit light during the display period when the driving voltage _Pa2 is applied. At this time, since the vertical width of the electrode 41-Ne and the electrode 41-Nf in FIG. 9 is narrow, resistance is generated in the electrode 41-Ne and the electrode 41-Nf.

However, at this time, the electrode 41-Ng is connected to the drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-M via the electrode 41-Ne and the electrode 41-Nf. Due to the discharge, a voltage having a magnitude that causes the light emitting cell 101-2 to accumulate an amount of electric charge necessary for causing the light emitting cell 101-2 to emit light during the display period is applied.

In other words, the drive voltage _Pa2 is used to cause the light emitting cell 101-2 to cause the light emitting cell 101-2 to emit light during the display period even if the electrode 41-Ne and the electrode 41-Nf have resistance. The voltage is large enough to accumulate the required amount of charge.

Thus, when the drive voltage _Pa2 is applied to the address electrode 41-N, the light emitting cell 101-1 and the light emitting cell 101-2 emit light.

  The address electrode 41- (N + 1) is formed by an electrode 41- (N + 1) a, an electrode 41- (N + 1) e, an electrode 41- (N + 1) f, and an electrode 41- (N + 1) g.

  Here, each of the electrode 41- (N + 1) a, the electrode 41- (N + 1) e, the electrode 41- (N + 1) f, and the electrode 41- (N + 1) g in the light emitting cell 102-1 and the light emitting cell 102-2 is as follows. Since the electrode 41-Na, the electrode 41-Ne, the electrode 41-Nf, and the electrode 41-Ng in the light emitting cell 101-1 and the light emitting cell 101-2 are configured in the same manner, the description thereof is as follows. Omitted.

The electrode by the drive voltage P _a1 and the drive voltage _{P a2 41- (N + 1)} a, the electrodes 41- (N + 1) e, electrodes 41- (N + 1) f, and the electrode 41- (N + 1) voltage applied to the g and , the light emitting and relationships non-light emission of the light emitting cell 102-1 and the light emitting cell 102-2, the driving voltage P _a1 and the drive voltage P _a2 by the electrode 41-Na, the electrode 41-Ne, the electrode 41-Nf, and the electrode 41- Since the relationship between the voltage applied to Ng and the light emission and non-light emission relationships of the light emitting cell 101-1 and the light emitting cell 101-2 is the same, the description thereof is omitted.

  The address electrode 41- (N + 2) is formed by an electrode 41- (N + 2) a, an electrode 41- (N + 2) e, an electrode 41- (N + 2) f, and an electrode 41- (N + 2) g.

  Here, each of the electrode 41- (N + 2) a, the electrode 41- (N + 2) e, the electrode 41- (N + 2) f, and the electrode 41- (N + 2) g in the light emitting cell 103-1 and the light emitting cell 103-2 is Since the electrode 41-Na, the electrode 41-Ne, the electrode 41-Nf, and the electrode 41-Ng in the light emitting cell 101-1 and the light emitting cell 101-2 are configured in the same manner, the description thereof is as follows. Omitted.

Also, the drive voltage P _a1 and the drive voltage P _a2 by the electrodes 41- (N + 2) a, the electrodes 41- (N + 2) e, electrodes 41- (N + 2) f, and the electrode 41- (N + 2) the voltage applied to the g and , the light emitting and relationships non-light emission of the light emitting cell 103-1 and the light emitting cell 103-2, the driving voltage P _a1 and the drive voltage P _a2 by the electrode 41-Na, the electrode 41-Ne, the electrode 41-Nf, and the electrode 41- Since the relationship between the voltage applied to Ng and the light emission and non-light emission relationships of the light emitting cell 101-1 and the light emitting cell 101-2 is the same, the description thereof is omitted.

  With the above configuration, the PDP 11 including the pixel unit 31 illustrated in FIG. 9 can have the same effect as the PDP 11 including the pixel unit 31 illustrated in FIG. 2 described above.

  FIG. 10 is a block diagram showing another example of the configuration of the PD device 1 according to the embodiment of the present invention. In addition, the same code | symbol is attached | subjected to the structure similar to PD apparatus 1 shown by FIG. 1, The description is abbreviate | omitted suitably.

  The PD device 1 includes a PDP 201 and a drive unit 12 that causes the PDP 201 to display an image.

  The PDP 201 is a matrix type color display device that emits light by plasma discharge. The PDP 201 is provided with a display area 221 that is an area (screen) on which an image is displayed. In the display area 221 of the PDP 201, light emitting cells, which are small fluorescent discharge tubes, are arranged so as to be arranged vertically and horizontally. The light emitting cell emits (lights) one of red, green, and blue.

  An image is displayed in the display area 221 by controlling light emission and non-light emission of the plurality of light emitting cells.

  The display area 221 is provided with a predetermined number of pixel portions 231 including a plurality of light emitting cells constituting one pixel among the pixels of the display area 221. That is, the pixel unit 231 represents one pixel of 1280 × 768 pixels when the PDP 201 is a WXGA system.

  Address electrodes 241-1 to 241-n are arranged in the upper half column direction of the display region 221 in FIG. 10, and address electrodes 241-(n + 1) to 241-2 n are arranged in the lower half column direction. ing.

  Scan / sustain discharge electrodes 242-1 to 242-m (not shown) are arranged in the row direction of FIG. 10 in the display region 221 so as to cross the address electrodes 241-1 to 241-n. Further, in the row direction of FIG. 10 in the display region 221, scan / sustain discharge electrodes 242- (m + 1) (not shown) to 242-2m intersect with the address electrodes 241- (n + 1) to 241-2n. Has been placed.

  A predetermined voltage is applied to each of the address electrodes 241-1 to 241-2n in the scanning period. Each of the address electrodes 241-1 to 241-2n is an electrode for selecting a light emitting cell to emit light by applying a voltage to the light emitting cells arranged in a vertical line in the drawing.

  A predetermined voltage is applied to each of the scan / sustain discharge electrodes 242-1 to 242-2m in the scan period. Each of the scan / sustain discharge electrodes 242-1 to 242-2m is an electrode for selecting a light emitting cell to emit light by applying a voltage to the light emitting cells arranged in a horizontal row in the drawing.

  Further, sustain discharge electrodes 243-1 to 243- (2m + 1) are provided in the row direction of FIG. Each of sustain discharge electrodes 243-1 to 243- (2m + 1) applies a voltage to the light emitting cells arranged in a horizontal row in the drawing.

  Each of sustain discharge electrodes 243-1 to 243- (2m + 1) and each of scan / sustain discharge electrodes 242-1 to 242-2m is subjected to a predetermined discharge in the light emitting cell selected in the scan period during the display period. This is an electrode to which a predetermined voltage is applied in order to cause

  Hereinafter, when it is not necessary to distinguish the address electrodes 241-1 to 241-2n from each other, they are simply referred to as address electrodes 241. Similarly, when it is not necessary to individually distinguish the scan / sustain discharge electrodes 242-1 to 242-2m, they are simply referred to as scan / sustain discharge electrodes 242. Further, when it is not necessary to individually distinguish sustain discharge electrodes 243-1 to 243- (2m + 1), they are simply referred to as sustain discharge electrodes 243.

  In the pixel portion 231, address electrodes 241 -N to 241-(N + 2) are arranged. In the pixel portion 231, the scan / sustain discharge electrode 242 -M, the sustain discharge electrode 243 -M, and the sustain discharge electrode 243-(M + 1) are arranged. That is, three address electrodes 241 are arranged in each pixel of the display area 221, and the scan / sustain discharge electrode 242 and the two sustain discharge electrodes 243 are arranged.

  Here, the address electrodes 241 -N to 241-(N + 2) are three continuous address electrodes 241 arranged in one pixel among the address electrodes 241-1 to 241-2n. The scan / sustain discharge electrode 242 -M is one scan / sustain discharge electrode 242 among the scan / sustain discharge electrodes 242-1 to 242-2m. Sustain discharge electrode 243-M and sustain discharge electrode 243- (M + 1) are two continuous sustain discharge electrodes 243 among sustain discharge electrodes 243-1 to 243- (2m + 1).

  The address driver 55-1 applies a predetermined voltage to each of the address electrodes 241-1 to 241-n in accordance with the SF data supplied under the control of the controller 51 in the scanning period.

  The address driver 55-2 applies a predetermined voltage to each of the address electrodes 241- (n + 1) to 241-2n in accordance with the SF data supplied under the control of the controller 51 in the scanning period.

  The scan driver 56-1 applies a predetermined voltage to each of the scan / sustain discharge electrodes 242-1 to 242-m in the scan period under the control of the controller 51.

  The scan driver 56-2 applies a predetermined voltage to each of the scan / sustain discharge electrodes 242- (m + 1) to 242-2m in the scan period under the control of the controller 51.

  The X sustain discharge driver 57 applies a predetermined voltage to the sustain discharge electrodes 243-1 to 243- (2m + 1) under the control of the controller 51 in the reset period and the display period.

  The Y sustain discharge driver 58 connected to the scan driver 56-1 and the scan driver 56-2 scans through the scan driver 56-1 and the scan driver 56-2 under the control of the controller 51 in the display period. A predetermined voltage is applied to each of the sustain discharge electrodes 242-1 to 242-2m.

  Next, the configuration of the pixel portion 231 of the PDP 201 will be described with reference to FIGS. 11 and 12. Here, FIG. 11 is a transparent diagram illustrating an example of the configuration of the pixel portion 231 of the PDP 201. FIG. 12 is a longitudinal sectional view of the pixel portion 231 taken along the line BB in FIG.

  As shown in FIG. 11, the pixel unit 231 emits light emitting cells 291-1 and 291-2 that emit red light, light emitting cells 292-1 and 292-2 that emit green light, and blue light. The light emitting cell 293-1 and the light emitting cell 293-2 are constituted by six light emitting cells.

  The light emitting cell 291-1 and the light emitting cell 291-2 are arranged so as to be adjacent to each other in the vertical direction of FIG. 11, and similarly, the light emitting cell 292-1 and the light emitting cell 292-2 are adjacent to each other in the vertical direction of FIG. The light emitting cell 293-1 and the light emitting cell 293-2 are arranged adjacent to each other in the vertical direction of FIG.

  As shown in FIG. 12, on the lower side of the surface substrate 330 which is the glass substrate on the surface of the PDP 201, the scan / sustain discharge electrode 242-M, the sustain discharge electrode 243-M, and the sustain discharge electrode 243- ( M + 1) is formed. The scan / sustain discharge electrode 242 -M is composed of transparent electrodes 301-1 to 301-3 and bus electrodes 311 which are transparent electrodes. The sustain discharge electrode 243 -M is composed of transparent electrodes 302-1 to 302-3 and a bus electrode 312. Sustain discharge electrode 243-(M + 1) includes transparent electrodes 303-1 to 303-3 and bus electrode 313.

  A bus electrode 311 is connected to the transparent electrodes 301-1 to 301-3. A bus electrode 312 is connected to the transparent electrodes 302-1 to 302-3. A bus electrode 313 is connected to the transparent electrodes 303-1 to 303-3.

  As shown in FIG. 11, the transparent electrode 301-1 is arranged so that charges are accumulated in the light emitting cell 291-1 and the light emitting cell 291-2 by applying a voltage to the transparent electrode 301-1. Yes.

  In addition, the transparent electrode 301-2 is disposed so that charges are accumulated in the light emitting cell 292-1 and the light emitting cell 292-2 when a voltage is applied to the transparent electrode 301-2.

  Furthermore, the transparent electrode 301-3 is disposed so that charges are accumulated in the light emitting cell 293-1 and the light emitting cell 293-2 when a voltage is applied to the transparent electrode 301-3.

  The transparent electrode 302-1 is configured to accumulate electric charge in the light emitting cell that emits red light of the pixel on the light emitting cell 291-1 and the pixel portion 231 by applying a voltage to the transparent electrode 302-1. Has been placed.

  The transparent electrode 302-2 accumulates electric charge in the light emitting cell that emits green light of the pixel on the light emitting cell 292-1 and the pixel portion 231 when a voltage is applied to the transparent electrode 302-2. Are arranged as follows.

  Further, the transparent electrode 302-3 accumulates electric charge in the light emitting cell that emits blue light of the pixel on the light emitting cell 293-1 and the pixel portion 231 when a voltage is applied to the transparent electrode 302-3. Are arranged as follows.

  The transparent electrode 303-1 is configured to accumulate charges in the light emitting cell that emits red light of the pixel immediately below the light emitting cell 291-2 and the pixel unit 231 by applying a voltage to the transparent electrode 302-1. Has been placed.

  In addition, the transparent electrode 303-2 accumulates electric charge in the light emitting cell that emits green light of the pixel immediately below the light emitting cell 292-2 and the pixel portion 231 by applying a voltage to the transparent electrode 302-2. Are arranged as follows.

  Further, the transparent electrode 303-3 accumulates electric charge in the light emitting cell that emits blue light of the pixel below the light emitting cell 293-2 and the pixel portion 231 by applying a voltage to the transparent electrode 302-3. Are arranged as follows.

  That is, the transparent electrode 301-1 and the transparent electrode 302-1 are disposed in the light emitting cell 291-1, and the transparent electrode 301-1 and the transparent electrode 303-1 are disposed in the light emitting cell 291-2. Similarly, the transparent electrode 301-2 and the transparent electrode 302-2 are disposed in the light emitting cell 292-1, and the transparent electrode 301-2 and the transparent electrode 303-2 are disposed in the light emitting cell 292-2. . The transparent electrode 301-3 and the transparent electrode 302-3 are disposed in the light emitting cell 293-1, and the transparent electrode 301-3 and the transparent electrode 303-3 are disposed in the light emitting cell 293-2.

  On the lower side of the front substrate 330 in FIG. 12, the transparent electrodes 301-1 to 301-3, the bus electrode 311, the transparent electrodes 302-1 to 302-3, the bus electrode 312, and the transparent electrodes 303-1 to 303 are provided. −3 and the bus electrode 313 are covered with a surface substrate dielectric layer 331 made of low-melting glass.

  A protective layer 332 made of magnesium oxide is formed on the lower side of the front substrate dielectric layer 331 in FIG.

  Address electrodes 241 -N to 241-(N + 2) are formed on the upper side of FIG. 12 of the rear substrate 333, which is a rear glass substrate in the PDP 201, and the address electrodes 241 -N to 241-(N + 2) have a low melting point. It is formed so as to be covered with a back substrate dielectric layer 334 made of glass.

  In the back substrate dielectric layer 334, the convex portion 334a, the convex portion 334b, and the convex portion 334c are formed in each of the light emitting cell 291-2, the light emitting cell 292-2, and the light emitting cell 293-2. . That is, the back substrate dielectric layer 334 in each of the light emitting cell 291-2, the light emitting cell 292-2, and the light emitting cell 293-2 is the same as that of the light emitting cell 291-1, the light emitting cell 292-1, and the light emitting cell 293-1. Each is formed thicker than the back substrate dielectric layer 334.

  The PDP 201 is sandwiched between the protective layer 332 and the back substrate dielectric layer 334, maintains the discharge space 335 and the discharge space 336, and also has phosphors of red, green, and blue colors (blue phosphor 337 in FIG. 12). And a partition wall 339 for preventing color mixture of the phosphor 338).

  The discharge space 335 and the discharge space 336 are filled with a discharge gas such as mercury gas or xenon gas.

  The red, green, and blue phosphors in the discharge space 335 and the discharge space 336 are applied to the wall surface of the partition wall 339.

  As shown in FIG. 11, the address electrode 241 -N is formed (arranged) in a line shape in the vertical direction of FIG. 11 in the light emitting cell 291-1 and the light emitting cell 291-2.

Electrode 241-N in the light emitting cell 291-1, by driving voltage P _a1 to the electrodes 241-N is applied, a drive voltage P _Y2 applied to the drive voltage P _a1 and scan and sustain discharge electrodes 242-M Due to the discharge in the light emitting cell 291-1, the light emitting cell 291-1 accumulates an amount of charge necessary for causing the light emitting cell 291-1 to emit light during the display period.

Also, when the drive voltage P _a1 to the electrodes 241-N is applied, the electrode 241-N in the light emitting cell 291-2, the drive voltage applied to the drive voltage P _a1 and scan and sustain discharge electrodes 242- (M + 1) Due to the discharge in the light emitting cell 291-2 due to P _Y2 , a voltage sufficient to cause the light emitting cell 291-2 to accumulate an amount of charge necessary for causing the light emitting cell 291-2 to emit light during the display period is not applied.

At this time, discharge occurs in the light emitting cell 291-2 due to the voltage applied to the electrode 241-N in the light emitting cell 291-2 and the drive voltage P _Y2 applied to the scan / sustain discharge electrode 242-M. In the cell 291-2, an amount of electric charge that does not cause the light emitting cell 291-2 to emit light during the display period is accumulated.

  That is, the back substrate dielectric layer 334 is formed on the electrode 241 -N in the light emitting cell 291-2 by the convex portion 334a, for example, twice the thickness of the back substrate dielectric layer 334 in the light emitting cell 291-1. ing.

Therefore, the voltage applied to the address electrode 241 is suppressed by the convex portion 334 a which is the back substrate dielectric layer 334. Accordingly, charges in the light emitting cell 291-2 by the drive voltage P _a1 has been difficult to accumulate.

  Also, the discharge space of the light emitting cell 291-2 (the discharge space 336 in the light emitting cell 293-2 in FIG. 12) is narrowed by the height of the discharge space of the light emitting cell 291-2 in the vertical direction in FIG. Therefore, it is difficult to discharge in the discharge space of the light emitting cell 291-2.

In other words, the driving voltage P _a1 causes the address electrode 241 -N in the light emitting cell 291-1 to accumulate an amount of charge necessary for causing the light emitting cell 291-1 to emit light during the display period. The voltage applied to the address electrode 241 -N in the light emitting cell 291-2 is suppressed by the convex portion 334a of the back substrate dielectric layer 334, and the light emitting cell 291-2 has a light emitting cell in the display period. This is a voltage of a magnitude (strength) that cannot accumulate the amount of charge necessary to cause 291-2 to emit light.

That is, when the driving voltage P _a1 is applied to the address electrodes 241-N, the light emitting cells 291-1 emits light, the light emitting cells 291-2 does not emit light.

Electrode 241-N in the light emitting cell 291-1, by driving voltage P _a2 to the electrode 241-N is applied, a drive voltage P _Y2 applied to the drive voltage P _a2 and scan and sustain discharge electrodes 242-M Due to the discharge in the light emitting cell 291-1, the light emitting cell 291-1 accumulates an amount of charge necessary for causing the light emitting cell 291-1 to emit light during the display period.

Also, when the drive voltage P _a2 to the electrode 241-N is applied, the electrode 241-N in the light emitting cell 291-2 is the light emitting cells 291-2, required to the light emitting cell 291-2 in the display period Accumulate a significant amount of charge.

That is, the drive voltage P _a2 is applied to the light emitting cell 291-2 even if the voltage applied to the address electrode 241-N in the light emitting cell 291-2 is suppressed by the convex portion 334a of the back substrate dielectric layer 334. Due to the discharge in the light emitting cell 291-2 due to the drive voltage P _Y2 applied to the scan / sustain discharge electrode 42-M, an amount of electric charge necessary for causing the light emitting cell 291-2 to emit light is accumulated in the display period. A voltage of magnitude (strength) that is possible.

Thus, when the driving voltage P _a2 is applied to the address electrodes 241-N, the light emitting cell 291-1 and the light emitting cells 291-2 emits light.

  Here, the address electrode 241-(N + 1) and the protrusion 334 b of the back substrate dielectric layer 334 in the light emitting cell 292-1 and the light emitting cell 292-2 are respectively the light emitting cell 291-1 and the light emitting cell 291-2. Since the configuration is the same as that of each of the address electrodes 241 -N and the convex portions 334 a of the back substrate dielectric layer 334, description thereof is omitted.

Further, the convex portion 334b of the voltage and the back substrate dielectric layer 334 is applied to the address electrodes 241- (N + 1) by the drive voltage P _a1 and the drive voltage P _a2, light emission of the light emitting cells 292-1 and the light emitting cells 292-2 and the relationship between the non-emission, and the convex portion 334a of the voltage and the back substrate dielectric layer 334 is applied to the address electrodes 241-N by the drive voltage P _a1 and the drive voltage P _a2, light emitting cell 291-1 and the light emitting cells 291 -2 is similar to the relationship between light emission and non-light emission, and the description thereof is omitted.

  Here, in the light emitting cell 293-1 and the light emitting cell 293-2, the address electrode 241- (N + 2) and the convex portion 334c of the back substrate dielectric layer 334 are respectively the light emitting cell 291-1 and the light emitting cell 291-2. Since the configuration is the same as that of each of the address electrodes 241 -N and the convex portions 334 a of the back substrate dielectric layer 334, description thereof is omitted.

Further, the convex portion 334c of the voltage and the back substrate dielectric layer 334 is applied to the address electrodes 241- (N + 2) by the drive voltage P _a1 and the drive voltage P _a2, light emission of the light emitting cells 293-1 and the light emitting cells 293-2 and the relationship between the non-emission, and the convex portion 334a of the voltage and the back substrate dielectric layer 334 is applied to the address electrodes 241-N by the drive voltage P _a1 and the drive voltage P _a2, light emitting cell 291-1 and the light emitting cells 291 -2 is similar to the relationship between light emission and non-light emission, and the description thereof is omitted.

  As described above, in the PD device 1 shown in FIG. 10, the discharge area in the reset period increases. That is, for example, when the discharge area between the transparent electrode 301-1 and the transparent electrode 302-1 in the light emitting cell 291-1 is increased, the black luminance cannot be reduced.

  However, in the pixel portion 231 that is one pixel, one light emitting cell in each color is divided into two in the vertical direction of FIG. 11, that is, for example, the light emitting cell 291-1 and the light emitting cell 291-2. 2 is arranged vertically, the partition 339 can be formed more easily than the pixel portion 31 in which the light emitting cells of each color are divided into two in the horizontal direction of FIG. 2 shown in FIG.

  In the case of the pixel portion 231 shown in FIG. 13, the display luminance is 1.8 times that in the conventional case where three red, green, and blue light emitting cells are arranged in one pixel.

  In the pixel portion 231, the light emitting cells of each color in one pixel are divided into two in the vertical direction in FIG. 11, so that the display period is 2.0 times and the light emitting area is about 0.9 times.

  As described above, since the two light emitting cells of each color can be driven by one address electrode 241, the cost is not significantly increased due to an increase in the number of address drivers.

  In addition, since only the shape of the conventional back substrate dielectric layer is changed as a process of manufacturing the PDP 201, it is possible to easily increase the pixel definition.

  With the above configuration, the PDP 201 including the pixel unit 231 illustrated in FIG. 11 can have the same effect as the PDP 11 including the pixel unit 31 illustrated in FIG. 2 described above. Further, high definition of pixels in the PDP 201 can be easily performed.

  FIG. 13 is a diagram illustrating another example of the configuration of the pixel unit 231 of the PDP 201. Note that in the configuration of the pixel portion 231 in FIG. 13, the shape of the address electrodes 241 -N to 241-(N + 2) is different from the configuration of the pixel portion 231 in FIG. 11.

  Further, in the configuration of the pixel portion 231 in FIG. 13, the back substrate dielectric layer 334 (not shown) of the pixel portion 231 in FIG. 13 does not have the convex portions 334 a to 334 c, and the light emitting cells 291-1 and 292-1 The back substrate dielectric layer 334 in the light emitting cell 293-1 and the back substrate dielectric layer 334 in the light emitting cell 291-2, the light emitting cell 292-2, and the light emitting cell 293-2 may have a uniform thickness. This is different from the configuration of the pixel portion 231 in FIG.

  Except for the two points described above, the configuration is the same as that of the pixel portion 231 in FIG. Therefore, the same components as those of the pixel portion 231 in FIG. 11 are denoted by the same reference numerals, and the description thereof is omitted.

  The address electrode 241 -N is formed by the electrode 241 -Na, the electrode 241 -Nb, and the electrode 241 -Nc. The address electrode 241 -N is formed and arranged in a line shape in the vertical direction of FIG. 13 in the light emitting cell 291-1.

  The lateral width of the electrode 241 -Na in FIG. 13 is formed narrower than the lateral width of the electrode 241 -Nb in FIG. 13 which will be described later. The electrode 241 -Nb has the same thickness (not shown) as the electrode 241 -Na from the end of the electrode 241 -Na in the light emitting cell 291-1, and the lateral width in FIG. It is thicker (longer) than the horizontal width of 13 and is formed and arranged so as to be accommodated in the light emitting cell 101-1. That is, for example, the electrode 241 -Nb has a rectangular shape wider (longer) than the lateral width (lateral length) of FIG. 13 of the electrode 241 -Na in the light emitting cell 101-1.

  The electrode 241 -Nc is linearly formed and arranged in the vertical direction of FIG. 13 so as to extend from the lower end of the electrode 241 -Nb of FIG. 13 in the light emitting cell 291-1 to the light emitting cell 291-2. Yes. The electrode 241 -Nc has the same thickness as the electrode 241 -Na (not shown), and the lateral width of the electrode 241 -Nc in FIG. 13 is the same as the lateral width of the electrode 241 -Na in FIG. Has been.

Electrode 241-Nb, by driving voltage P _a1 to the electrodes 241-Na is applied, light emitting cells due to the drive voltage P _Y2 applied to the drive voltage P _a1 and scan and sustain discharge electrodes 242-M 291-1 Due to the internal discharge, the light emitting cell 291-1 accumulates an amount of electric charge necessary for causing the light emitting cell 291-1 to emit light during the display period.

Also, when the drive voltage P _a1 to the electrodes 241-Na is applied, the electrode 241-Nc, the discharge of the light emitting cell 291-2 by the drive voltage P _Y2 applied to the scan and sustain discharge electrodes 242-M Thus, no voltage is applied to the light emitting cell 291-2 so as to accumulate an amount of charge necessary for causing the light emitting cell 291-2 to emit light during the display period.

At this time, a discharge occurs in the light emitting cell 291-2 due to the voltage applied to the electrode 241-Nc in the light emitting cell 291-2 and the drive voltage P _Y2 applied to the scan / sustain discharge electrode 242-M. In the cell 291-2, an amount of electric charge that does not cause the light emitting cell 291-2 to emit light during the display period is accumulated.

That is, the area of the electrode 241 -Nb in the light emitting cell 291-1 is the amount necessary for causing the light emitting cell 291-1 to emit light during the display period when the driving voltage _Pa1 is applied. The area of the electrode 241 -Nc in the light emitting cell 291-2 is necessary for causing the light emitting cell 291-2 to emit light during the display period. The amount of charge cannot be stored.

In other words, the drive voltage P _a1 allows the electrode 241 -Nb to cause the light emitting cell 291-1 to accumulate an amount of charge necessary for causing the light emitting cell 291-1 to emit light during the display period. The electrode 241 -Nc is a voltage having a magnitude (strength) that cannot accumulate the amount of charge necessary for causing the light emitting cell 291-2 to emit light in the display period in the light emitting cell 291-2.

That is, when the driving voltage P _a1 is applied to the address electrodes 241-N, the light emitting cells 291-1 emits light, the light emitting cells 291-2 does not emit light.

Electrode 241-Nb, by driving voltage P _a2 to the electrode 241-Na is applied, light emitting cells due to the drive voltage P _Y2 applied to the drive voltage P _a2 and scan and sustain discharge electrodes 242-M 291-1 Due to the internal discharge, the light emitting cell 291-1 accumulates an amount of electric charge necessary for causing the light emitting cell 291-1 to emit light during the display period.

Also, when the drive voltage P _a2 to the electrode 241-Na is applied, the electrode 241-Nc, the discharge of the light emitting cell 291-2 by the drive voltage P _Y2 applied to the scan and sustain discharge electrodes 242-M Thus, a voltage having a magnitude that can accumulate an amount of electric charge necessary for causing the light emitting cell 291-2 to emit light during the display period is applied to the light emitting cell 291-2.

That is, the area of the electrode 241 -Nb in the light emitting cell 291-1 is the amount necessary for causing the light emitting cell 291-1 to emit light during the display period when the driving voltage _Pa2 is applied. The area of the electrode 241 -Nc in the light emitting cell 291-2 is necessary for causing the light emitting cell 291-2 to emit light during the display period. It is a size capable of accumulating an amount of charge.

In other words, the drive voltage P _a1, from the area in the light emitting cell 291-1 of the electrode 241-Nb, the area in the light emitting cell 291-2 of small electrodes 241-Nc, causes the light emitting cell 291-2 in the display period It is a voltage of a magnitude (strength) that can accumulate an amount of electric charge necessary for this.

Thus, when the driving voltage P _a2 is applied to the address electrodes 241-N, the light emitting cell 291-1 and the light emitting cells 291-2 emits light.

  The address electrode 241-(N + 1) is formed by the electrode 241-(N + 1) a, the electrode 241-(N + 1) b, and the electrode 241-(N + 1) c.

  Here, each of the electrode 241-(N + 1) a, the electrode 241-(N + 1) b, and the electrode 241-(N + 1) c in the light emitting cell 292-1 and the light emitting cell 292-2 is the light emitting cell 291-1 described above. In addition, since the electrode 241-Na, the electrode 241-Nb, and the electrode 241-Nc in the light emitting cell 291-2 have the same configuration, description thereof is omitted.

The electrode by the drive voltage P _a1 and the drive voltage _{P a2 241- (N + 1)} a, the electrode 241- (N + 1) b, and the electrode 241- (N + 1) and the voltage applied to c, the light emitting cells 292-1 and emission the relationship between light emission and non-light emitting cell 292-2, the driving voltage P _a1 and the drive voltage P _a2 by the electrode 241-Na, and the voltage applied electrode 241-Nb, and the electrode 241-Nc, the light emitting cells 291 1 and the light emitting cell 291-2 are similar to the relationship between light emission and non-light emission, and thus the description thereof is omitted.

  The address electrode 241-(N + 2) is formed by the electrode 241-(N + 2) a, the electrode 241-(N + 2) b, and the electrode 241-(N + 2) c.

  Here, each of the electrode 241-(N + 2) a, the electrode 241-(N + 2) b, and the electrode 241-(N + 2) c in the light emitting cell 293-1 and the light emitting cell 293-2 is the light emitting cell 291-1 described above. In addition, since the electrode 241-Na, the electrode 241-Nb, and the electrode 241-Nc in the light emitting cell 291-2 have the same configuration, description thereof is omitted.

The electrode by the drive voltage P _a1 and the drive voltage _{P a2 241- (N + 2)} a, the electrode 241- (N + 2) b, and the electrode 241- (N + 2) and the voltage applied to c, the light emitting cells 293-1 and emission the relationship between light emission and non-light emitting cell 293-2, the driving voltage P _a1 and the drive voltage P _a2 by the electrode 241-Na, and the voltage applied electrode 241-Nb, and the electrode 241-Nc, the light emitting cells 291 1 and the light emitting cell 291-2 are similar to the relationship between light emission and non-light emission, and thus the description thereof is omitted.

  In the pixel portion 231 of FIG. 13, since the shape of the conventional address electrode is only changed as a process of manufacturing the PDP 201, it is possible to easily increase the pixel definition.

  With the above configuration, the PDP 201 including the pixel portion 231 illustrated in FIG. 13 can have the same effect as the PDP 201 including the pixel portion 231 illustrated in FIG. 11 described above.

  In the pixel portion 31 shown in FIG. 8 described above, the vertical width of the electrode 41-Nc in FIG. 8 is set to the same length as the horizontal width of the electrode 41-Na in FIG. The back substrate dielectric layer 2 in FIG. 2 may be formed thick like the convex portion 334a shown in FIG.

  In this manner, when two light emitting cells of each color are provided in each pixel of the PDP in the PD device, the pixel can be made high definition. The first voltage is applied in a period in which the first cell, the second cell provided adjacent to the first cell, and whether to emit light in the subfield are selected. In this case, an amount of electric charge that causes the first cell to emit light in the subfield is accumulated in the first cell, and an amount of electric charge that does not cause the second cell to emit light in the subfield is accumulated in the second cell. In the subfield, when the first cell and the second cell are provided with an electrode for storing an amount of electric charge for causing the first cell and the second cell to emit light, The image quality can be improved at a lower cost.

It is a block diagram which shows the example of a structure of the plasma display apparatus which concerns on one embodiment of this invention. It is a permeation | transmission figure which shows the example of a structure of the pixel part of the plasma display panel of FIG. FIG. 3 is a longitudinal sectional view of a pixel portion taken along line AA in FIG. 2. 6 is a timing chart for explaining a relationship among drive voltage waveforms in a sustain discharge electrode, a scan / sustain discharge electrode, and an address electrode. It is a figure explaining the relationship between the gradation of the image of 1 field in the image signal supplied from the outside, and the gradation of the image of 1 field actually displayed. It is a figure explaining the relationship between the gradation of the image of 1 field in the image signal supplied from the outside, and the gradation of the image of 1 field actually displayed. It is a flowchart explaining the process of the application of the voltage to an address electrode. It is a figure which shows the other example of a structure of the pixel part of the plasma display panel of FIG. It is a figure which shows the other example of a structure of the pixel part of the plasma display panel of FIG. It is a block diagram which shows the other example of a structure of the plasma display apparatus which concerns on one embodiment of this invention. It is a figure which shows the example of a structure of the pixel part of the plasma display panel of FIG. FIG. 12 is a longitudinal sectional view of the pixel portion taken along line BB in FIG. 11. It is a figure which shows the other example of a structure of the pixel part of the plasma display panel of FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Plasma display apparatus, 11 Plasma display panel, 12 Drive unit, 51 Controller, 55-1 and 55-2 Address driver, 41-1 thru | or 41-2n Address electrode, 101-1 and 101-2 Light emitting cell, 102-1 And 102-2 light emitting cells, 103-1 and 103-2 light emitting cells, 201 plasma display panels, 241-1 to 241-2n address electrodes, 291-1 and 291-2 light emitting cells, 292-1 and 292-2 light emitting Cell, 293-1 and 293-2 light emitting cell, 334 back substrate dielectric layer, 334a, 334b, and 334c convex

Claims (10)

A first cell;
A second cell provided adjacent to the first cell;
When a first voltage is applied during a period for selecting whether to emit light in a sub-field, an amount of electric charge that causes the first cell to emit light in that sub-field is stored in the first cell. And when the second voltage is applied to the second cell, an amount of electric charge that does not cause the second cell to emit light in the subfield is applied to the second cell. An electrode for storing an amount of electric charge for causing the cell to emit light in the first cell and the second cell ,
The electrode is configured such that the first electrode and the second electrode are connected by a third electrode formed with a width smaller than the width of the first electrode,
When the first voltage or the second voltage is applied to the first electrode, the first electrode is either the applied first voltage or the second voltage. The first cell is caused to store an amount of charge that causes the first cell to emit light,
The second electrode is
When the first voltage is applied to the first electrode, the first voltage is applied from the first electrode through the third electrode, based on a voltage lower than the first voltage. An amount of charge that does not cause two cells to emit light is stored in the second cell;
When the second voltage is applied to the first electrode, the second voltage is applied from the first electrode through the third electrode, and the second voltage is lower than the second voltage. The second cell stores an amount of charge that causes the second cell to emit light.
Flop plasma display panel. A dielectric layer is further provided for suppressing the amount of charge stored in the second cell as compared to the amount of charge stored in the first cell.
Plasma display panel according to 請 Motomeko 1. When the first cell and the second cell emit light, they emit light of the same color that is either red, green, or blue
The plasma display panel according to 請 Motomeko 2. The ratio between the luminance when the first cell emits light and the luminance when the first cell and second cell emit light is 1: 2.
Plasma display panel according to 請 Motomeko 3. A first cell;
A second cell provided adjacent to the first cell;
When a first voltage is applied during a period for selecting whether to emit light in a sub-field, an amount of electric charge that causes the first cell to emit light in that sub-field is stored in the first cell. And when the second voltage is applied to the second cell, an amount of electric charge that does not cause the second cell to emit light in the subfield is applied to the second cell. An electrode for accumulating charges in the first cell and the second cell in an amount to cause the cell to emit light
Have
The electrode is configured such that the first electrode and the second electrode are connected by a third electrode formed with a width smaller than the width of the first electrode,
When the first voltage or the second voltage is applied to the first electrode, the first electrode is either the applied first voltage or the second voltage. The first cell is caused to store an amount of charge that causes the first cell to emit light,
The second electrode is
When the first voltage is applied to the first electrode, the first voltage is applied from the first electrode through the third electrode, based on a voltage lower than the first voltage. An amount of charge that does not cause two cells to emit light is stored in the second cell;
When the second voltage is applied to the first electrode, the second voltage is applied from the first electrode through the third electrode, and the second voltage is lower than the second voltage. The second cell stores an amount of charge that causes the second cell to emit light.
A plasma display panel;
In a period for selecting whether to emit light or not, the first voltage, the second voltage, or a third voltage for preventing the first cell and the second cell from emitting light to the electrode . flop plasma display device and a voltage applying means for applying a one. The plasma display panel further includes a dielectric layer that suppresses the amount of charge accumulated in the second cell as compared to the amount of charge accumulated in the first cell.
The plasma display apparatus as claimed in 請 Motomeko 5. When the first cell and the second cell emit light, they emit light of the same color that is either red, green, or blue
The plasma display apparatus as claimed in 請 Motomeko 6. The ratio between the luminance when the first cell emits light and the luminance when the first cell and second cell emit light is 1: 2.
The plasma display apparatus as claimed in 請 Motomeko 7. In a period for selecting or not emit light or emit light in each subfield, according to the voltage applying means, said first voltage to said electrode, said second voltage or any one of the third voltage, Control means for controlling application is further provided
The plasma display apparatus as claimed in 請 Motomeko 6. A first cell;
A second cell provided adjacent to the first cell;
When a first voltage is applied during a period for selecting whether to emit light in a sub-field, an amount of electric charge that causes the first cell to emit light in that sub-field is stored in the first cell. And when the second voltage is applied to the second cell, an amount of electric charge that does not cause the second cell to emit light in the subfield is applied to the second cell. An electrode for storing an amount of electric charge for causing the cell to emit light in the first cell and the second cell ,
The electrode is configured such that the first electrode and the second electrode are connected by a third electrode formed with a width smaller than the width of the first electrode,
When the first voltage or the second voltage is applied to the first electrode, the first electrode is either the applied first voltage or the second voltage. The first cell is caused to store an amount of charge that causes the first cell to emit light,
The second electrode is
When the first voltage is applied to the first electrode, the first voltage is applied from the first electrode through the third electrode, based on a voltage lower than the first voltage. An amount of charge that does not cause two cells to emit light is stored in the second cell;
When the second voltage is applied to the first electrode, the second voltage is applied from the first electrode through the third electrode, and the second voltage is lower than the second voltage. The second cell stores an amount of charge that causes the second cell to emit light.
A method of driving a flop plasma display device comprising a plasma display panel,
In the period for selecting whether to emit light or not, the first voltage, the second voltage, or the third voltage for preventing the first cell and the second cell from emitting light to the electrode. An application step of applying any one of
Driving dynamic way.

Images