JP4487619B2 - Power supply circuit for electronic equipment with built-in secondary battery - Google Patents

Power supply circuit for electronic equipment with built-in secondary battery Download PDF

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JP4487619B2
JP4487619B2 JP2004123338A JP2004123338A JP4487619B2 JP 4487619 B2 JP4487619 B2 JP 4487619B2 JP 2004123338 A JP2004123338 A JP 2004123338A JP 2004123338 A JP2004123338 A JP 2004123338A JP 4487619 B2 JP4487619 B2 JP 4487619B2
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浩二 梅津
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Sony Corp
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Description

本発明はカムコーダ等に適用して好適な、２次電池を内蔵した電子機器の電源回路に関する。   The present invention relates to a power supply circuit for an electronic device incorporating a secondary battery, which is suitable for application to a camcorder or the like.

従来カムコーダ等の２次電池を内蔵した電子機器の電源回路として図５に示す如きものが提案されている。図５において、１は商用電源が供給される電源プラグを示し、この電源プラグ１に供給される商用電源を入力フィルタ２を介して整流回路３に供給する。   Conventionally, as shown in FIG. 5, a power supply circuit for an electronic apparatus incorporating a secondary battery such as a camcorder has been proposed. In FIG. 5, reference numeral 1 denotes a power plug to which commercial power is supplied. The commercial power supplied to the power plug 1 is supplied to the rectifier circuit 3 through the input filter 2.

この整流回路３の出力側に得られる直流電圧Ｖｉｎをトランス４の一次巻線４ａを介してスイッチング素子を構成するｎｐｎ形トランジスタ５のコレクタに供給する。このトランジスタ５のエミッタを接地し、このトランジスタ５のベースに後述するパルス幅変調制御回路６よりのパルス幅変調信号を供給する如くする。また整流回路３の出力側に得られる直流電圧Ｖｉｎを起動回路を構成する抵抗器７を介してこのパルス幅変調制御回路６に供給する。   The DC voltage Vin obtained on the output side of the rectifier circuit 3 is supplied to the collector of the npn transistor 5 constituting the switching element via the primary winding 4a of the transformer 4. The emitter of the transistor 5 is grounded, and a pulse width modulation signal from a pulse width modulation control circuit 6 described later is supplied to the base of the transistor 5. Further, the DC voltage Vin obtained on the output side of the rectifier circuit 3 is supplied to the pulse width modulation control circuit 6 through the resistor 7 constituting the starting circuit.

またトランス４の２次巻線４ｂの一端を整流回路８を構成するダイオード８ａ及び平滑用コンデンサ８ｂを介してこの２次巻線４ｂの他端に接続する。この整流回路８の出力直流電圧を内蔵した２次電池９ａを含む例えばカムコーダ等の電子機器の負荷回路９に供給する。   Further, one end of the secondary winding 4b of the transformer 4 is connected to the other end of the secondary winding 4b via a diode 8a and a smoothing capacitor 8b constituting the rectifier circuit 8. The output DC voltage of the rectifier circuit 8 is supplied to a load circuit 9 of an electronic device such as a camcorder including a secondary battery 9a with a built-in output.

即ちダイオード８ａ及びコンデンサ８ｂの接続点をＤＣ接続コードの抵抗成分１０を介して負荷回路９の一方の電源端子に接続し、この負荷回路９の他方の電源端子をＤＣ接続コードの抵抗成分１１及び電流検出用の抵抗器１２の直列回路を介して２次巻線４ｂの他端に接続する。   That is, the connection point of the diode 8a and the capacitor 8b is connected to one power supply terminal of the load circuit 9 via the resistance component 10 of the DC connection cord, and the other power supply terminal of the load circuit 9 is connected to the resistance component 11 of the DC connection cord and The other end of the secondary winding 4b is connected through a series circuit of a resistor 12 for current detection.

また、整流回路８の一方の出力端即ちダイオード８ａ及びコンデンサ８ｂの接続点を出力直流電圧検出用の抵抗器１３及び１４の直列回路を介して接地し、この抵抗器１４の接地側を抵抗器１２を介して、２次巻線４ｂの他端に接続する。   Further, one output terminal of the rectifier circuit 8, that is, a connection point between the diode 8a and the capacitor 8b is grounded through a series circuit of resistors 13 and 14 for detecting output DC voltage, and the ground side of the resistor 14 is connected to the resistor. 12 is connected to the other end of the secondary winding 4b.

この出力直流電圧検出用の抵抗器１３及び１４の接続中点に得られる検出電圧を誤差電圧検出手段を構成する演算増幅回路１５の反転入力端子−に供給する。またこの演算増幅回路１５の非反転入力端子＋に基準電圧発生源１６よりの基準電圧ＲＥＦ１を供給する。   The detection voltage obtained at the connection midpoint of the output DC voltage detection resistors 13 and 14 is supplied to the inverting input terminal − of the operational amplifier circuit 15 constituting the error voltage detection means. Further, the reference voltage REF 1 from the reference voltage generation source 16 is supplied to the non-inverting input terminal + of the operational amplifier circuit 15.

この場合、この基準電圧発生源１６よりの基準電圧ＲＥＦ１は整流回路８の出力側に所定の定電圧Ｖ0１例えば８．４０Ｖを得る直流電圧値とする。 In this case, the reference voltage REF1 from the reference voltage generation source 16 is a DC voltage value that obtains a predetermined constant voltage V 0 1 such as 8.40 V on the output side of the rectifier circuit 8.

この誤差電圧検出手段を構成する演算増幅回路１５の出力側に得られる誤差信号をダイオード１７のカソードに供給する。このダイオード１７のアノードをホトカプラ１８を構成する誤差信号に応じた輝度で発光する発光ダイオード１８ａのカソードに接続し、この発光ダイオード１８ａのアノードを抵抗器１９を介して整流回路８の出力側であるダイオード８ａ及びコンデンサ８ｂの接続点に接続する。   An error signal obtained on the output side of the operational amplifier circuit 15 constituting this error voltage detection means is supplied to the cathode of the diode 17. The anode of the diode 17 is connected to the cathode of a light emitting diode 18a that emits light with a luminance corresponding to the error signal constituting the photocoupler 18, and the anode of the light emitting diode 18a is connected to the output side of the rectifier circuit 8 via a resistor 19. Connected to the connection point of the diode 8a and the capacitor 8b.

このホトカプラ１８の受光ダイオード１８ｂに得られる受光信号をパルス幅変調制御回路６に供給し、この受光信号に応じて、スイッチング素子を構成するトランジスタ５のベースに供給するパルス幅変調信号のパルス幅を変調し、この演算増幅回路１５の出力側に得られる誤差信号により、整流回路８の出力側に得られる出力直流電圧を一定電圧Ｖ0１例えば８．４０Ｖにする如く制御する。この場合このパルス幅変調制御回路６よりのパルス幅変調信号の周波数を所定周波数例えば１００ｋＨｚとする。 The light reception signal obtained by the light receiving diode 18b of the photocoupler 18 is supplied to the pulse width modulation control circuit 6, and the pulse width of the pulse width modulation signal supplied to the base of the transistor 5 constituting the switching element is set according to the light reception signal. The output DC voltage obtained on the output side of the rectifier circuit 8 is controlled to be a constant voltage V 0, for example, 8.40 V, based on the error signal obtained on the output side of the operational amplifier circuit 15 after modulation. In this case, the frequency of the pulse width modulation signal from the pulse width modulation control circuit 6 is set to a predetermined frequency, for example, 100 kHz.

また、負荷電流検出用の抵抗器（抵抗値をＲ１とする）１２の両端間に得られる、この負荷電流Ｉ0 に応じた電圧（Ｉ0 ×Ｒ１）を誤差電流検出手段を構成する演算増幅回路２０の反転入力端子−に抵抗器２１を介して供給する。また、この演算増幅回路２０の非反転入力端子＋に基準電圧発生源２２よりの基準電圧ＲＥＦ２を抵抗器２３を介して供給する如くする。 Further, a voltage (I 0 × R1) corresponding to the load current I 0 obtained between both ends of a load current detection resistor (resistance value R 1) 12 is an operational amplification constituting the error current detection means. The voltage is supplied to the inverting input terminal − of the circuit 20 through the resistor 21. Further, the reference voltage REF2 from the reference voltage generation source 22 is supplied to the non-inverting input terminal + of the operational amplifier circuit 20 through the resistor 23.

この場合、この基準電圧発生源２２よりの基準電圧ＲＥＦ２はこの電流検出用の抵抗器１２に流れる電流が一定電流Ｉ0 例えば１．６Ａとなる直流電圧値とする。 In this case, the reference voltage REF2 from the reference voltage generation source 22 is a DC voltage value at which the current flowing through the current detection resistor 12 becomes a constant current I 0, for example, 1.6A.

この誤差電流検出手段を構成する演算増幅回路２０の出力側に得られる誤差信号をダイオード２４のカソードに供給する。このダイオード２４のアノードをホトカプラ１８を構成する誤差信号に応じた輝度で発光する発光ダイオード１８ａのカソードに接続する。   An error signal obtained on the output side of the operational amplifier circuit 20 constituting the error current detection means is supplied to the cathode of the diode 24. The anode of the diode 24 is connected to the cathode of a light emitting diode 18a that emits light with a luminance corresponding to an error signal constituting the photocoupler 18.

また、この場合、この誤差電流検出手段を構成する演算増幅回路２０の出力側に得られる誤差信号により、トランジスタ５のベースに供給するパルス幅変調信号を制御し電流検出用の抵抗器１２に流れる負荷電流が一定電流Ｉ0 例えば１．６Ａとなる如く制御する。 In this case, the pulse width modulation signal supplied to the base of the transistor 5 is controlled by the error signal obtained on the output side of the operational amplifier circuit 20 constituting the error current detecting means and flows to the resistor 12 for current detection. Control is performed so that the load current is a constant current I 0, for example, 1.6 A.

またトランス４の３次巻線４ｃの一端を整流回路２５を構成するダイオード２５ａ及び平滑用コンデンサ２５ｂを介して接地すると共に、この３次巻線４ｃの他端を接地し、このダイオード２５ａ及びコンデンサ２５ｂの接続点に得られる直流電圧を電源としてパルス幅変調制御回路６に供給する。   One end of the tertiary winding 4c of the transformer 4 is grounded via a diode 25a and a smoothing capacitor 25b constituting the rectifier circuit 25, and the other end of the tertiary winding 4c is grounded. The diode 25a and the capacitor The DC voltage obtained at the connection point 25b is supplied to the pulse width modulation control circuit 6 as a power source.

以上述べた如く、図５に示す如き従来の２次電池を内蔵した電子機器の電源回路においては、比較的簡単な構成で演算増幅回路１５は整流回路８の出力直流電圧が所定の一定電圧Ｖ0１例えば８．４０Ｖになるように制御し、演算増幅回路２０は抵抗器１２を流れる負荷電流（出力電流）Ｉ0 が所定の一定電流例えば１．６Ａになるように制御する。 As described above, in the power supply circuit of the electronic device incorporating the conventional secondary battery as shown in FIG. 5, the operational amplifier circuit 15 has a relatively simple configuration and the output DC voltage of the rectifier circuit 8 is a predetermined constant voltage V. 0 1 example controlled to be 8.40V, the operational amplifier circuit 20 controls so that the load current flowing through the resistor 12 (the output current) I 0 is a predetermined constant current example 1.6A.

従って図５に示す如き２次電池を内蔵した電子機器の電源回路の出力電流対出力電圧特性は図６に示す如くである。この図５に示す如く２次電池を内蔵した電子機器においては整流回路８と２次電池９ａを含む負荷回路９との間はＤＣ接続コードで接続される場合が一般的である。このＤＣ接続コードの抵抗成分１０及び１１の抵抗値をｒｓ１及びｒｓ２とする。   Therefore, the output current vs. output voltage characteristics of the power supply circuit of the electronic device incorporating the secondary battery as shown in FIG. 5 are as shown in FIG. As shown in FIG. 5, in an electronic device incorporating a secondary battery, the rectifier circuit 8 and the load circuit 9 including the secondary battery 9a are generally connected by a DC connection cord. The resistance values of the resistance components 10 and 11 of the DC connection cord are rs1 and rs2.

この整流回路８よりＤＣ接続コードを経由して、２次電池９ａを含む負荷回路９へ電力を供給する場合、このＤＣ接続コードの抵抗成分１０及び１１により電圧降下Ｖｄが発生する。この電圧降下Ｖｄにつき図６の出力電流対出力電圧特性に示す。   When power is supplied from the rectifier circuit 8 to the load circuit 9 including the secondary battery 9a via the DC connection cord, a voltage drop Vd is generated by the resistance components 10 and 11 of the DC connection cord. This voltage drop Vd is shown in the output current vs. output voltage characteristics of FIG.

整流回路８の出力直流電圧は例えば８．４０Ｖの一定電圧Ｖ0１に負荷電流例えば０Ａから１．６Ａまで制御する（図６のＶＣモード、破線参照）。ところが、ＤＣ接続コードの抵抗成分１０，１１による電圧降下Ｖｄが発生し、負荷回路９には出力直流電圧Ｖ0１よりこの電圧降下Ｖｄ分が下がった電圧例えば負荷電流（出力電流）が１．６Ａのとき出力電圧が８．２０Ｖ供給されることになる。 The output DC voltage of the rectifier circuit 8 is controlled to a constant current V 0 1 of 8.40 V, for example, from 0 A to 1.6 A (see VC mode in FIG. 6, broken line). However, a voltage drop Vd due to the resistance components 10 and 11 of the DC connection cord is generated, and the load circuit 9 is supplied with a voltage, for example, a load current (output current), which is reduced by the voltage drop Vd from the output DC voltage V 0 1. At 6A, an output voltage of 8.20V is supplied.

一方、負荷回路９内には２次電池９ａが組み込まれており、この２次電池９ａへの充電（本体内充電）も行われる。このときの充電特性を図７に示す。   On the other hand, the secondary battery 9a is incorporated in the load circuit 9, and the secondary battery 9a is charged (in-body charging). The charging characteristics at this time are shown in FIG.

この図５において、２次電池９ａに充電を行うときは定電圧（ＶＣモード）、定電流（ＣＣモード）充電を行う。即ち図７に示す如く、充電開始直後は定電流（ＣＣモード）での充電が開始され、充電が進むにつれて、図７Ａに示す如く負荷回路９内の２次電池９ａの電池電圧Ｖ0２が上昇するが、この電池電圧Ｖ0２は整流回路８の出力直流電圧Ｖ0１よ
りもＤＣ接続コードの抵抗成分１０，１１による電圧降下Ｖｄ分電圧が下がる。 In FIG. 5, when charging the secondary battery 9a, constant voltage ( VC mode) and constant current (CC mode) charging are performed. That is, as shown in FIG. 7, immediately after the start of charging, charging at a constant current (CC mode) is started, and as the charging proceeds, the battery voltage V 0 2 of the secondary battery 9a in the load circuit 9 is increased as shown in FIG. 7A. Although the battery voltage V 0 2 rises, the voltage drop Vd due to the resistance components 10 and 11 of the DC connection cord is lower than the output DC voltage V 0 1 of the rectifier circuit 8.

従って、この２次電池９ａの充電電流Ｉ0 は図７Ｂの曲線ａに示す如くなり、充電時間Ｔ２は、この電圧降下Ｖｄがないとき（電圧降下Ｖｄのないときの充電電流Ｉｓは破線ｂに示す如くである。）の充電時間Ｔ１に比較し長くなる。 Accordingly, the charging current I 0 of the secondary battery 9a is as shown by the curve a in FIG. 7B, and the charging time T2 is when there is no voltage drop Vd (the charging current Is when there is no voltage drop Vd is shown by the broken line b. It is longer than the charging time T1).

ところで、この充電時間Ｔ２を短くするようにした充電装置が特許文献１に提案されている。   Incidentally, Patent Document 1 proposes a charging device in which the charging time T2 is shortened.

この特許文献１に記載された充電装置は、接続された２次電池に対して定電圧以下の定電流で充電を行い、この２次電池の端子電圧が、この定電圧に上昇したとき、この定電流以下の定電圧で充電を行うように制御する充電装置であり、充電電流をある周期で遮断するスイッチ手段と、この充電電流の遮断時におけるこのスイッチ手段より電源側の第１の電圧及びこの２次電池側の第２の電圧の電圧差と、基準電圧とを比較する比較手段と、この充電電流の通電時にはこの第１の電圧より高い電圧に切り替え、この充電電流の遮断時にはこの第１の電圧と同一の電圧に切り替えると共に、この比較の結果に従って、充電を終了するときにはこの第１の電圧と同一の電圧に切り替える制御手段とを備えるものである。
特開平１０−３２９３８号公報 The charging device described in Patent Document 1 charges a connected secondary battery with a constant current equal to or lower than a constant voltage, and when the terminal voltage of the secondary battery rises to the constant voltage, A charging device that controls charging at a constant voltage equal to or lower than a constant current, a switching unit that cuts off the charging current at a certain period, a first voltage on a power source side from the switching unit when the charging current is cut off, The comparison means for comparing the voltage difference between the second voltage on the secondary battery side and the reference voltage, and switching to a voltage higher than the first voltage when the charging current is energized, and the first voltage when the charging current is interrupted. And a control means for switching to the same voltage as the first voltage when charging is terminated according to the result of the comparison.
JP 10-32938 A

然しながら、この特許文献１に記載された充電装置は充電電流をある周期で遮断するスイッチ手段、充電電流の通電時には第１の電圧より高い電圧に切り替え、この充電電流の遮断時にはこの第１の電圧と同一の電圧に切り替えると共に、比較の結果に従って充電を終了するときにはこの第１の電圧と同一の電圧に切り替える制御手段とを必要とし、構成が複雑となる不都合があった。   However, the charging device described in Patent Document 1 is a switching means that cuts off the charging current at a certain period. When the charging current is energized, the charging device switches to a voltage higher than the first voltage, and when the charging current is cut off, the first voltage. When the charging is terminated according to the result of the comparison, a control means for switching to the same voltage as the first voltage is required, resulting in a complicated configuration.

本発明は斯る点に鑑み、比較的簡単な構成で、２次電池の充電時間を短縮できるようにすることを目的とする。   In view of the above, an object of the present invention is to reduce the charging time of a secondary battery with a relatively simple configuration.

上記課題を解決し、本発明の目的を達成するため、本発明の２次電池を内蔵した電子機器の電源回路は、出力直流電圧を検出する電圧検出手段と、該電圧検出手段よりの検出電圧と第１の基準電圧とから第１の誤差信号を得る誤差電圧検出手段と、該誤差電圧検出手段の第１の誤差信号により出力直流電圧を一定とする定電圧制御手段と、負荷電流を検出する電流検出手段と、該電流検出手段よりの電流検出信号に応じた電圧と第２の基準電圧とから第２の誤差信号を得る誤差電流検出手段と、該誤差電流検出手段の第２の誤差信号により前記負荷電流を一定にするようにした定電流制御手段と、を有する２次電池を内蔵した電子機器の電源回路である。そして、さらに、第１及び第２の誤差信号を比較する比較手段を備え、この比較手段の比較出力を、電圧検出手段に帰還させて、第１の誤差信号より第２の誤差信号が小さくなる定電流制御のときに、電圧検出手段の出力直流電圧に負荷電流による電圧降下分を加算して、電圧検出手段の検出電圧をこの電圧降下に対応する分小さくすることを特徴としている。 In order to solve the above-described problems and achieve the object of the present invention, a power supply circuit for an electronic device incorporating the secondary battery of the present invention includes a voltage detection means for detecting an output DC voltage, and a detection voltage from the voltage detection means. Error voltage detecting means for obtaining a first error signal from the first reference voltage, a constant voltage control means for making the output DC voltage constant by the first error signal of the error voltage detecting means, and detecting a load current Current detecting means for detecting, an error current detecting means for obtaining a second error signal from a voltage corresponding to a current detection signal from the current detecting means and a second reference voltage, and a second error of the error current detecting means And a constant current control means for making the load current constant according to a signal. Further, a comparison means for comparing the first and second error signals is provided, and a comparison output of the comparison means is fed back to the voltage detection means so that the second error signal becomes smaller than the first error signal. In the constant current control, the voltage drop due to the load current is added to the output DC voltage of the voltage detection means, and the detection voltage of the voltage detection means is reduced by an amount corresponding to this voltage drop .

本発明によれば、誤差電圧検出手段の出力の第１の誤差信号と誤差電流検出手段の出力の第２の誤差信号とを比較し、この比較出力が、この第１の誤差信号よりこの第２の誤差信号が大きく定電流制御のときに、定電圧制御手段は出力直流電圧が定常の定電圧に負荷電流による電圧降下分を加算した電圧になるように制御しているので、比較的簡単な構成で２次電池の充電時間を短くすることができる。 According to the present invention, the first error signal output from the error voltage detector is compared with the second error signal output from the error current detector, and the comparison output is compared with the first error signal. When the error signal of 2 is large and constant current control is performed , the constant voltage control means is controlled so that the output DC voltage becomes a voltage obtained by adding the voltage drop due to the load current to the steady constant voltage. With this configuration, the charging time of the secondary battery can be shortened.

以下図１〜図３を参照して本発明２次電池を内蔵した電子機器の電源回路を実施するための最良の形態の例を説明する。
図１において、図５に対応する部分には同一符号を付して示す。 Hereinafter, an example of the best mode for implementing a power supply circuit of an electronic apparatus incorporating a secondary battery of the present invention will be described with reference to FIGS.
In FIG. 1, parts corresponding to those in FIG.

図１において、１は商用電源が供給される電源プラグを示し、この電源プラグ１に供給される商用電源を入力フィルタ２を介して整流回路３に供給する。   In FIG. 1, reference numeral 1 denotes a power plug to which commercial power is supplied. The commercial power supplied to the power plug 1 is supplied to the rectifier circuit 3 through the input filter 2.

この整流回路３の出力側に得られる直流電圧Ｖｉｎをトランス４の一次巻線４ａを介してスイッチング素子を構成するｎｐｎ形トランジスタ５のコレクタに供給する。このトランジスタ５のエミッタを接地し、このトランジスタ５のベースに後述するパルス幅変調制御回路６よりのパルス幅変調信号を供給する如くする。また整流回路３の出力側に得られる直流電圧Ｖｉｎを起動回路を構成する抵抗器７を介してこのパルス幅変調制御回路６に供給し、このパルス幅変調制御回路６を起動する如くする。   The DC voltage Vin obtained on the output side of the rectifier circuit 3 is supplied to the collector of the npn transistor 5 constituting the switching element via the primary winding 4a of the transformer 4. The emitter of the transistor 5 is grounded, and a pulse width modulation signal from a pulse width modulation control circuit 6 described later is supplied to the base of the transistor 5. The DC voltage Vin obtained on the output side of the rectifier circuit 3 is supplied to the pulse width modulation control circuit 6 via the resistor 7 constituting the start circuit, so that the pulse width modulation control circuit 6 is started.

またトランス４の２次巻線４ｂの一端を整流回路８を構成するダイオード８ａ及び平滑用コンデンサ８ｂを介してこの２次巻線４ｂの他端に接続する。この整流回路８の出力直流電圧を内蔵した２次電池９ａを含む例えばカムコーダ等の電子機器の負荷回路９に供給する。   Further, one end of the secondary winding 4b of the transformer 4 is connected to the other end of the secondary winding 4b via a diode 8a and a smoothing capacitor 8b constituting the rectifier circuit 8. The output DC voltage of the rectifier circuit 8 is supplied to a load circuit 9 of an electronic device such as a camcorder including a secondary battery 9a with a built-in output.

即ちダイオード８ａ及びコンデンサ８ｂの接続点をＤＣ接続コードの抵抗成分１０を介して負荷回路９の一方の電源端子に接続し、この負荷回路９の他方の電源端子をＤＣ接続コードの抵抗成分１１及び電流検出用の抵抗器１２の直列回路を介して２次巻線４ｂの他端に接続する。   That is, the connection point of the diode 8a and the capacitor 8b is connected to one power supply terminal of the load circuit 9 via the resistance component 10 of the DC connection cord, and the other power supply terminal of the load circuit 9 is connected to the resistance component 11 of the DC connection cord and The other end of the secondary winding 4b is connected through a series circuit of a resistor 12 for current detection.

また、整流回路８の一方の出力端即ちダイオード８ａ及びコンデンサ８ｂの接続点を出力直流電圧検出用の抵抗器１３及び１４の直列回路を介して接地し、この抵抗器１４の接地側を抵抗器１２を介して、２次巻線４ｂの他端に接続する。   Further, one output terminal of the rectifier circuit 8, that is, a connection point between the diode 8a and the capacitor 8b is grounded through a series circuit of resistors 13 and 14 for detecting output DC voltage, and the ground side of the resistor 14 is connected to the resistor. 12 is connected to the other end of the secondary winding 4b.

この出力直流電圧検出用の抵抗器１３及び１４の接続中点に得られる検出電圧を誤差電圧検出手段を構成する演算増幅回路１５の反転入力端子−に供給する。またこの演算増幅回路１５の非反転入力端子＋に基準電圧発生源１６よりの基準電圧ＲＥＦ１を供給する。   The detection voltage obtained at the connection midpoint of the output DC voltage detection resistors 13 and 14 is supplied to the inverting input terminal − of the operational amplifier circuit 15 constituting the error voltage detection means. Further, the reference voltage REF 1 from the reference voltage generation source 16 is supplied to the non-inverting input terminal + of the operational amplifier circuit 15.

この場合、この基準電圧発生源１６よりの基準電圧ＲＥＦ１は整流回路８の出力側に所定の定電圧Ｖ0１例えば８．４０Ｖを得る直流電圧値とする。 In this case, the reference voltage REF1 from the reference voltage generation source 16 is a DC voltage value that obtains a predetermined constant voltage V 0 1 such as 8.40 V on the output side of the rectifier circuit 8.

この誤差電圧検出手段を構成する演算増幅回路１５の出力側に得られる誤差信号をダイオード１７のカソードに供給する。このダイオード１７のアノードをホトカプラ１８を構成する誤差信号に応じた輝度で発光する発光ダイオード１８ａのカソードに接続し、この発光ダイオード１８ａのアノードを抵抗器１９を介して整流回路８の出力側であるダイオード８ａ及びコンデンサ８ｂの接続点に接続する。   An error signal obtained on the output side of the operational amplifier circuit 15 constituting this error voltage detection means is supplied to the cathode of the diode 17. The anode of the diode 17 is connected to the cathode of a light emitting diode 18a that emits light with a luminance corresponding to the error signal constituting the photocoupler 18, and the anode of the light emitting diode 18a is connected to the output side of the rectifier circuit 8 via a resistor 19. Connected to the connection point of the diode 8a and the capacitor 8b.

このホトカプラ１８の受光ダイオード１８ｂに得られる受光信号をパルス幅変調制御回路６に供給し、この受光信号に応じて、スイッチング素子を構成するトランジスタ５のベースに供給するパルス幅変調信号のパルス幅を変調し、この演算増幅回路１５の出力側に得られる誤差信号により、整流回路８の出力側に得られる出力直流電圧を一定電圧Ｖ0１例えば８．４０Ｖにする如く制御する。この場合このパルス幅変調制御回路６よりのパルス幅変調信号の周波数を所定周波数例えば１００ｋＨｚとする。 The light reception signal obtained by the light receiving diode 18b of the photocoupler 18 is supplied to the pulse width modulation control circuit 6, and the pulse width of the pulse width modulation signal supplied to the base of the transistor 5 constituting the switching element is set according to the light reception signal. The output DC voltage obtained on the output side of the rectifier circuit 8 is controlled to be a constant voltage V 0, for example, 8.40 V, based on the error signal obtained on the output side of the operational amplifier circuit 15 after modulation. In this case, the frequency of the pulse width modulation signal from the pulse width modulation control circuit 6 is set to a predetermined frequency, for example, 100 kHz.

また、負荷電流検出用の抵抗器（抵抗値をＲ１とする）１２の両端間に得られる、この負荷電流Ｉ0 に応じた電圧（Ｉ0 ×Ｒ１）を誤差電流検出手段を構成する演算増幅回路２０の反転入力端子−に抵抗器２１を介して供給する。また、この演算増幅回路２０の非反転入力端子＋に基準電圧発生源２２よりの基準電圧ＲＥＦ２を抵抗器２３を介して供給する如くする。 Further, a voltage (I 0 × R1) corresponding to the load current I 0 obtained between both ends of a load current detection resistor (resistance value R 1) 12 is an operational amplification constituting the error current detection means. The voltage is supplied to the inverting input terminal − of the circuit 20 through the resistor 21. Further, the reference voltage REF2 from the reference voltage generation source 22 is supplied to the non-inverting input terminal + of the operational amplifier circuit 20 through the resistor 23.

この場合、この基準電圧発生源２２よりの基準電圧ＲＥＦ２はこの電流検出用の抵抗器１２に流れる電流が一定電流Ｉ0 例えば１．６Ａとなる直流電圧値とする。 In this case, the reference voltage REF2 from the reference voltage generation source 22 is a DC voltage value at which the current flowing through the current detection resistor 12 becomes a constant current I 0, for example, 1.6A.

この誤差電流検出手段を構成する演算増幅回路２０の出力側に得られる誤差信号をダイオード２４のカソードに供給する。このダイオード２４のアノードをホトカプラ１８を構成する誤差信号に応じた輝度で発光する発光ダイオード１８ａのカソードに接続する。   An error signal obtained on the output side of the operational amplifier circuit 20 constituting the error current detection means is supplied to the cathode of the diode 24. The anode of the diode 24 is connected to the cathode of a light emitting diode 18a that emits light with a luminance corresponding to an error signal constituting the photocoupler 18.

また、この場合、この誤差電流検出手段を構成する演算増幅回路２０の出力側に得られる誤差信号により、トランジスタ５のベースに供給するパルス幅変調信号を制御し電流検出用の抵抗器１２に流れる負荷電流が一定電流Ｉ0 例えば１．６Ａとなる如く制御する。 In this case, the pulse width modulation signal supplied to the base of the transistor 5 is controlled by the error signal obtained on the output side of the operational amplifier circuit 20 constituting the error current detecting means and flows to the resistor 12 for current detection. Control is performed so that the load current is a constant current I 0, for example, 1.6 A.

またトランス４の３次巻線４ｃの一端を整流回路２５を構成するダイオード２５ａ及び平滑用コンデンサ２５ｂを介して接地すると共に、この３次巻線４ｃの他端を接地し、このダイオード２５ａ及び平滑用コンデンサ２５ｂの接続点に得られる直流電圧を電源として、パルス幅変調制御回路６に供給する。   One end of the tertiary winding 4c of the transformer 4 is grounded via a diode 25a and a smoothing capacitor 25b constituting the rectifier circuit 25, and the other end of the tertiary winding 4c is grounded. The DC voltage obtained at the connection point of the capacitor 25b is supplied to the pulse width modulation control circuit 6 as a power source.

本例においては誤差電圧検出手段を構成する演算増幅回路１５の出力側に得られる誤差信号を比較手段を構成する演算増幅回路３０の反転入力端子−に供給する。また、誤差電流検出手段を構成する演算増幅回路２０の出力側に得られる誤差信号をこの比較手段を構成する演算増幅回路３０の非反転入力端子＋に供給する。   In this example, the error signal obtained on the output side of the operational amplifier circuit 15 constituting the error voltage detecting means is supplied to the inverting input terminal − of the operational amplifier circuit 30 constituting the comparing means. Further, an error signal obtained on the output side of the operational amplifier circuit 20 constituting the error current detecting means is supplied to the non-inverting input terminal + of the operational amplifier circuit 30 constituting the comparing means.

また、この演算増幅回路３０の出力端子を抵抗器３１を介して抵抗器１３及び１４の接続中点と演算増幅回路１５の反転入力端子−との接続点に接続する。   Further, the output terminal of the operational amplifier circuit 30 is connected via a resistor 31 to the connection point between the connection midpoint of the resistors 13 and 14 and the inverting input terminal − of the operational amplifier circuit 15.

この場合、比較手段を構成する演算増幅回路３０の出力側がローレベル“０”のときは抵抗器１４と抵抗器３１とが並列接続されたこととなり、この並列接続の抵抗値Ｒ２は抵抗器１４の抵抗値Ｒ３より小さくなる。   In this case, when the output side of the operational amplifier circuit 30 constituting the comparison means is at a low level “0”, the resistor 14 and the resistor 31 are connected in parallel, and the resistance value R2 of this parallel connection is the resistor 14 The resistance value R3 becomes smaller.

この抵抗値Ｒ２の抵抗値Ｒ３より小さい値は整流回路８の出力直流電圧Ｖ0１がＤＣ接続コードの抵抗成分１０，１１による電圧降下
Ｖｄ＝Ｉ0（ｒｓ１＋ｒｓ２）
分だけ高い電圧値
Ｖ0１＋Ｖｄ
となるように制御する検出電圧となる如くする。 When the resistance value R2 is smaller than the resistance value R3, the output DC voltage V 0 1 of the rectifier circuit 8 is a voltage drop due to the resistance components 10 and 11 of the DC connection cord Vd = I 0 (rs1 + rs2)
Higher voltage value V 0 1 + Vd
The detection voltage is controlled so that

また比較手段を構成する演算増幅回路３０の出力側がハイレベル“１”のときは、演算増幅回路３０の出力側はオープンコレクタ出力となっており、抵抗器３１はオープン状態となり抵抗器１４と抵抗器３１の並列接続は無い状態となり、整流回路８の出力直流電圧がＶ0１となるように制御する検出電圧となる。 When the output side of the operational amplifier circuit 30 constituting the comparison means is at a high level “1”, the output side of the operational amplifier circuit 30 is an open collector output, the resistor 31 is in an open state, and the resistor 14 and the resistor Thus, the detector 31 is not connected in parallel and becomes a detection voltage for controlling the output DC voltage of the rectifier circuit 8 to be V 0 1.

図１に示す如き本例の２次電池を内蔵した電子機器の電源回路において、演算増幅回路１５は整流回路８の出力直流電圧（出力電圧）が所定の一定電圧（Ｖ0１又はＶ0１＋Ｖｄ）になるように制御し、一方出力電流が増加して抵抗器１２に流れる電流量を検出し、ある一定の電流量に達すると、出力電圧制御の演算増幅回路１５の動作が電流制御の演算増幅回路２０の動作に切り替わる。演算増幅回路２０は抵抗器１２を流れる負荷電流（出力電流）Ｉ0 が所定の一定電流例えば１．６Ａになるように制御する。 In the power supply circuit of the electronic apparatus incorporating the secondary battery of this example as shown in FIG. 1, the operational amplifier circuit 15 has an output DC voltage (output voltage) of the rectifier circuit 8 that is a predetermined constant voltage (V 0 1 or V 0 1 + Vd). On the other hand, when the output current increases and the amount of current flowing through the resistor 12 is detected and reaches a certain amount of current, the operation of the operational amplifier circuit 15 for output voltage control is calculated for current control. The operation is switched to the operation of the amplifier circuit 20. The operational amplifier circuit 20 controls so that the load current (output current) I 0 flowing through the resistor 12 becomes a predetermined constant current, for example, 1.6A.

このとき電流量を一定にすると電圧が降下するために演算増幅回路１５の出力はローレベルからハイレベルへ変化する。この結果から、演算増幅回路１５の動作中は演算増幅回路１５の出力（誤差信号）は演算増幅回路２０の出力（誤差信号）と比べて電圧が低くなり、また演算増幅回路２０の動作中は演算増幅回路２０の出力（誤差信号）は演算増幅回路１５の出力（誤差信号）に比べて電圧が低くなる。この出力電圧制御の演算増幅回路１５の動作中をＶＣモード、出力電流制御の演算増幅回路２０の動作中をＣＣモードという。 At this time, if the amount of current is made constant, the voltage drops, so the output of the operational amplifier circuit 15 changes from low level to high level. From this result, during operation of the operational amplifier circuit 15, the output (error signal) of the operational amplifier circuit 15 is lower in voltage than the output (error signal) of the operational amplifier circuit 20, and during operation of the operational amplifier circuit 20, The output (error signal) of the operational amplifier circuit 20 is lower in voltage than the output (error signal) of the operational amplifier circuit 15. The operation of the operational amplifier circuit 15 for output voltage control is referred to as a VC mode, and the operational amplifier circuit 20 for output current control is referred to as a CC mode.

この図１に示す如き２次電池を内蔵した電子機器の電源回路の出力電流対出力電圧特性は図２に示す如くである。   The output current vs. output voltage characteristics of the power supply circuit of the electronic device incorporating the secondary battery as shown in FIG. 1 are as shown in FIG.

この演算増幅回路１５及び２０の夫々の出力（誤差信号）を比較手段である演算増幅回路３０の出力側がハイレベル“１”のときは、演算増幅回路１５の動作中となり、定電圧制御動作（ＶＣモード）となり、この演算増幅回路３０の出力側がローレベル“０”のときは演算増幅回路２０の動作中となり、定電流制御動作（ＣＣモード）となっている。 When the output side of each of the operational amplifier circuits 15 and 20 (error signal) is high level “1”, the operational amplifier circuit 15 is in operation and the constant voltage control operation ( VC mode), and when the output side of the operational amplifier circuit 30 is at a low level “0”, the operational amplifier circuit 20 is in operation and is in constant current control operation (CC mode).

この演算増幅回路３０の出力がローレベル“０”のときは抵抗器１４と抵抗器３１とが並列接続となり、この抵抗器１４及び３１の合成抵抗値Ｒ２は抵抗器１４の抵抗値Ｒ３よりも小さな抵抗値となる。   When the output of the operational amplifier circuit 30 is at a low level “0”, the resistor 14 and the resistor 31 are connected in parallel, and the combined resistance value R2 of the resistors 14 and 31 is greater than the resistance value R3 of the resistor 14. Small resistance value.

結果、電圧検出用の抵抗器１３及び１４の接続点から演算増幅回路１５の反転入力端子−に供給される検出電圧は減少し、このため電源回路は演算増幅回路１５により、この反転入力端子−に供給される検出電圧が上昇するように制御される。またこの演算増幅回路３０の出力がハイレベル“１”のときは抵抗器３１はオープン状態となる。   As a result, the detection voltage supplied from the connection point of the voltage detection resistors 13 and 14 to the inverting input terminal − of the operational amplifier circuit 15 decreases, and therefore the power supply circuit is connected to the inverting input terminal − by the operational amplifier circuit 15. The detection voltage supplied to is controlled so as to increase. When the output of the operational amplifier circuit 30 is at a high level “1”, the resistor 31 is in an open state.

この図１に示す如き電源回路は電圧制御動作中は、演算増幅回路１５が動作中となり比較手段を構成する演算増幅回路３０の出力はハイレベル“１”状態となり、図２の出力特性図のＶＣモードとなって、整流回路８の出力直流電圧を定常の定電圧Ｖ0１例えば８．４０Ｖになるように制御する。 In the power supply circuit as shown in FIG. 1, during the voltage control operation, the operational amplifier circuit 15 is in operation and the output of the operational amplifier circuit 30 constituting the comparison means is in a high level “1” state. In the VC mode, the output DC voltage of the rectifier circuit 8 is controlled to be a constant constant voltage V 0 1 such as 8.40V.

また、この図１に示す如き電源回路が電流制御動作中は演算増幅回路２０が動作中となり、比較手段を構成する演算増幅回路３０の出力はローレベル“０”状態となり抵抗器１４及び３１は並列接続となって整流回路８の出力直流電圧は上昇した電圧Ｖ0１＋Ｖｄに制御される。 Further, during the current control operation of the power supply circuit as shown in FIG. 1, the operational amplifier circuit 20 is in operation, and the output of the operational amplifier circuit 30 constituting the comparison means becomes a low level “0” state, and the resistors 14 and 31 are In parallel connection, the output DC voltage of the rectifier circuit 8 is controlled to the increased voltage V 0 1 + Vd.

本例２次電池を内蔵した電子機器の電源回路によれば負荷回路９の２次電池９ａの充電時にこのＤＣ接続コードの抵抗成分１０及び１１の抵抗値ｒｓ１及びｒｓ２例えば夫々０．１Ωとしたとき、この電圧降下Ｖｄは
Ｖｄ＝（ｒｓ１＋ｒｓ２）×Ｉ0
例えばＶｄ＝（０．１Ω＋０．１Ω）×１．６Ａ＝０．３２Ｖ
となる。 According to the power supply circuit of the electronic device incorporating the secondary battery of this example, when the secondary battery 9a of the load circuit 9 is charged, the resistance values rs1 and rs2 of the resistance components 10 and 11 of the DC connection cord are set to 0.1Ω, for example, respectively. The voltage drop Vd is Vd = (rs1 + rs2) × I 0
For example, Vd = (0.1Ω + 0.1Ω) × 1.6A = 0.32V
It becomes.

図２によればＶＣモード時は整流回路８の出力直流電圧を一定電圧Ｖ0１例えば８．４０Ｖになる如く制御し、ＣＣモード時はこの整流回路８の出力直流電圧を電圧Ｖ0１＋Ｖｄ例えば８．４０Ｖ＋０．３２Ｖ＝８．７２Ｖになる如く制御する（図３Ａ参照）。 According to FIG. 2, in the VC mode, the output DC voltage of the rectifier circuit 8 is controlled to be a constant voltage V 0 1 such as 8.40V, and in the CC mode, the output DC voltage of the rectifier circuit 8 is set to the voltage V 0 1 + Vd such as Control is performed so that 8.40V + 0.32V = 8.72V (see FIG. 3A).

図３に、この負荷回路９の２次電池９ａを充電したときの充電特性を示す。これによると、放電された２次電池９ａの充電は充電開始時、定電流制御（ＣＣモード）で充電されて、図３Ｂに示す如く充電が進むにつれ、２次電池９ａの電池電圧Ｖ0２も上昇する。 FIG. 3 shows the charging characteristics when the secondary battery 9a of the load circuit 9 is charged. According to this, charging of the discharged secondary battery 9a is performed by constant current control (CC mode) at the start of charging, and as the charging proceeds as shown in FIG. 3B, the battery voltage V 0 2 of the secondary battery 9a. Also rises.

この場合本例においては、整流回路８の出力直流電圧がＶ0１＋Ｖｄ例えば８．７２Ｖになる如く電圧制御される。よって、図３Ａに示す如く定電流制御（ＣＣモード）から定電圧制御（ＶＣモード）へ切り替わる直前まで、この整流回路８の出力直流電圧がＶ0１＋Ｖｄ例えば８．７２Ｖになるように電圧制御し、定電圧制御（ＶＣモード）へ切り替わったところで、この整流回路８の出力直流電圧が一定電圧Ｖ0１例えば８．４０Ｖになるように電圧制御する。 In this case, in this example, voltage control is performed so that the output DC voltage of the rectifier circuit 8 becomes V 0 1 + Vd, for example, 8.72V. Therefore, as shown in FIG. 3A, voltage control is performed so that the output DC voltage of the rectifier circuit 8 becomes V 0 1 + Vd, for example, 8.72 V until immediately before switching from constant current control (CC mode) to constant voltage control ( VC mode). When switching to constant voltage control ( VC mode), voltage control is performed such that the output DC voltage of the rectifier circuit 8 becomes a constant voltage V 0 1, for example, 8.40V.

従って本例によれば充電時間は図３Ｃの曲線ｃに示す如く、充電電流値である一定の収束電流値で従来例と比較すれば従来時間Ｔ２例えば１．５時間に対し、本例電源回路による充電時間Ｔ３ではＤＣ接続コードの抵抗成分１０，１１による電圧降下Ｖｄのないときと同じ充電時間Ｔ１例えば１時間と充電時間を短縮することができる。   Therefore, according to the present example, as shown by a curve c in FIG. 3C, the power supply circuit of this example is compared with the conventional time T2, for example, 1.5 hours when compared with the conventional example at a constant convergence current value that is a charging current value. In the charging time T3, the charging time can be shortened to the same charging time T1, for example 1 hour, when there is no voltage drop Vd due to the resistance components 10 and 11 of the DC connection cord.

本例によれば、誤差電圧検出手段を構成する演算増幅回路１５の出力の誤差信号と誤差電流検出手段を構成する演算増幅回路２０の出力の誤差信号とを比較し、この比較出力に応じて定電圧制御手段は出力直流電圧が定常の定電圧Ｖ0１に負荷電流Ｉ0 による電圧降下Ｖｄ分を加算した電圧Ｖ0１＋Ｖｄになるように制御しているので、比較的簡単な構成で２次電池９ａの充電時間を短縮することができる。 According to this example, the error signal output from the operational amplifier circuit 15 constituting the error voltage detecting means is compared with the error signal output from the operational amplifier circuit 20 constituting the error current detecting means, and according to the comparison output. Since the constant voltage control means controls the output DC voltage to be a voltage V 0 1 + Vd obtained by adding the voltage drop Vd due to the load current I 0 to the steady constant voltage V 0 1, the constant voltage control means 2 has a relatively simple configuration. The charging time of the secondary battery 9a can be shortened.

また、図４は本発明を実施するための最良の形態の他の例を示す。この図４例は基準電圧ＲＥＦ１を定電流制御動作中と定電圧制御動作中とで変えるようにしたものである。この図４につき説明するに図１に対応する部分には同一符号を付し、その詳細説明は省略する。   FIG. 4 shows another example of the best mode for carrying out the present invention. In the example of FIG. 4, the reference voltage REF1 is changed between the constant current control operation and the constant voltage control operation. In FIG. 4, parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted.

この図４例においては、図１において基準電圧発生源１６を設けずに、比較手段を構成する演算増幅回路３０の出力端子をスイッチを構成するｐｎｐ形トランジスタ３２のベースに接続し、このトランジスタ３２のエミッタを抵抗器３３を介して整流回路８のダイオード８ａ及びコンデンサ８ｂの接続点に接続し、この抵抗器３３及びトランジスタ３２のエミッタとの接続点をシャントレギュレータを構成するツェナーダイオード３４のカソードに接続し、このツェナーダイオード３４のアノードを接地する。   In the example of FIG. 4, without providing the reference voltage generating source 16 in FIG. 1, the output terminal of the operational amplifier circuit 30 constituting the comparing means is connected to the base of the pnp transistor 32 constituting the switch. Is connected to the connection point of the diode 8a and the capacitor 8b of the rectifier circuit 8 via the resistor 33, and the connection point of the resistor 33 and the emitter of the transistor 32 is connected to the cathode of the Zener diode 34 constituting the shunt regulator. The anode of this Zener diode 34 is grounded.

またこのトランジスタ３２のエミッタを分圧用の抵抗器３５及び３６の直列回路を介して接地し、このトランジスタ３２のコレクタを抵抗器３７を介して、この抵抗器３５及び３６の接続中点に接続し、この抵抗器３５及び３６の接続中点を演算増幅回路１５の非反転入力端子＋に接続し、その他は図１と同様に構成したものである。   The emitter of the transistor 32 is grounded through a series circuit of resistors 35 and 36 for voltage division, and the collector of the transistor 32 is connected to a connection midpoint of the resistors 35 and 36 through a resistor 37. The connection midpoint of the resistors 35 and 36 is connected to the non-inverting input terminal + of the operational amplifier circuit 15, and the rest is configured in the same manner as in FIG.

この場合、演算増幅回路３０の出力側がハイレベル“１”のときはトランジスタ３２がオフとなり、ツェナーダイオード３４による定電圧が抵抗器３５及び３６で分圧された第１の基準電圧ＲＥＦ３が、この演算増幅回路１５の非反転入力端子＋に供給される。   In this case, when the output side of the operational amplifier circuit 30 is at the high level “1”, the transistor 32 is turned off, and the first reference voltage REF3 obtained by dividing the constant voltage by the Zener diode 34 by the resistors 35 and 36 is This is supplied to the non-inverting input terminal + of the operational amplifier circuit 15.

またこの演算増幅回路３０の出力側がローレベル“０”のときはトランジスタ３２がオンとなり、抵抗器３５及び３７の並列回路の合成抵抗値と抵抗器３６とによるツェナーダイオード３４による定電圧の分圧が第２の基準電圧ＲＥＦ４として、この演算増幅回路１５の非反転入力端子＋に供給される。   When the output side of the operational amplifier circuit 30 is at a low level “0”, the transistor 32 is turned on, and the constant voltage is divided by the Zener diode 34 by the combined resistance value of the parallel circuit of the resistors 35 and 37 and the resistor 36. Is supplied to the non-inverting input terminal + of the operational amplifier circuit 15 as the second reference voltage REF4.

このときの抵抗器３５及び３７の並列回路の合成抵抗値Ｒ４は抵抗器３５の抵抗値Ｒ５より小さくなるので、第１の基準電圧ＲＥＦ３は第２の基準電圧ＲＥＦ４より小さくなる。   Since the combined resistance value R4 of the parallel circuit of the resistors 35 and 37 at this time is smaller than the resistance value R5 of the resistor 35, the first reference voltage REF3 is smaller than the second reference voltage REF4.

本例においては、この第１の基準電圧ＲＥＦ３の値は、この第１の基準電圧ＲＥＦ３が供給されたとき、整流回路８の出力直流電圧がある定常の定電圧Ｖ0１になるように制御する電圧とし、この第２の基準電圧ＲＥＦ４の値は、この第２の基準電圧ＲＥＦ４が演算増幅回路１５の非反転入力端子＋に供給されたとき、整流回路８の出力直流電圧がこの定常の定電圧Ｖ0１にＤＣ接続コードの抵抗成分１０，１１による電圧降下Ｖｄを加算した定電圧（Ｖ0１＋Ｖｄ）になるように制御する電圧とする。 In this example, the value of the first reference voltage REF3 is controlled so that when the first reference voltage REF3 is supplied, the output DC voltage of the rectifier circuit 8 becomes a certain constant voltage V 0 1. The value of the second reference voltage REF4 is such that when the second reference voltage REF4 is supplied to the non-inverting input terminal + of the operational amplifier circuit 15, the output DC voltage of the rectifier circuit 8 is constant. a voltage controlled to be constant voltage V 0 1 to the constant voltage obtained by adding the voltage drop Vd caused by the resistance component 10, 11 of the DC connecting cord (V 0 1 + Vd).

斯る図４例の電源回路においても、電圧制御動作中は、演算増幅回路１５が動作中となり比較手段を構成する演算増幅回路３０の出力はハイレベル“１”状態となり、トランジスタ３２はオフで基準電圧は第１の基準電圧ＲＥＦ３となり図２の出力特性図のＣＶモードとなって、整流回路８の出力直流電圧を定常の定電圧Ｖ0１例えば８．４０Ｖになるように制御する。 In the power supply circuit of FIG. 4 as well, during the voltage control operation, the operational amplifier circuit 15 is in operation, the output of the operational amplifier circuit 30 constituting the comparison means is in the high level “1” state, and the transistor 32 is off. The reference voltage becomes the first reference voltage REF3, the CV mode of the output characteristic diagram of FIG. 2 is entered, and the output DC voltage of the rectifier circuit 8 is controlled to be a constant constant voltage V 0 1 such as 8.40V.

また、この図４例の電源回路が電流制御動作中は演算増幅回路２０が動作中となり比較手段を構成する演算増幅回路３０の出力はローレベル“０”状態となり、トランジスタ３２はオンで基準電圧は第２の基準電圧ＲＥＦ４となり、図２の出力特性図のＣＣモードとなって、整流回路８の出力直流電圧は上昇した電圧Ｖ0１＋Ｖｄに制御される。 Further, during the current control operation of the power supply circuit of FIG. 4, the operational amplifier circuit 20 is in operation, the output of the operational amplifier circuit 30 constituting the comparison means is in a low level “0” state, the transistor 32 is on and the reference voltage is Becomes the second reference voltage REF4, the CC mode of the output characteristic diagram of FIG. 2, and the output DC voltage of the rectifier circuit 8 is controlled to the increased voltage V 0 1 + Vd.

従って図４例においても、図１例と同様の作用効果が得られることは容易に理解できよう。   Therefore, it can be easily understood that the same effect as in the example of FIG. 1 can be obtained in the example of FIG.

尚本発明は上述例に限ることなく、本発明の要旨を逸脱することなく、その他種々の構成が採り得ることは勿論である。   Of course, the present invention is not limited to the above-mentioned examples, and various other configurations can be adopted without departing from the gist of the present invention.

本発明２次電池を内蔵した電子機器の電源回路を実施するための最良の形態の例を示す構成図である。It is a block diagram which shows the example of the best form for implementing the power supply circuit of the electronic device which incorporated the secondary battery of this invention. 本発明の説明に供する線図である。It is a diagram with which it uses for description of this invention. 本発明の説明に供する線図である。It is a diagram with which it uses for description of this invention. 本発明を実施するための最良の形態の他の例を示す構成図である。It is a block diagram which shows the other example of the best form for implementing this invention. 従来の２次電池を内蔵した電子機器の電源回路の例を示す構成図である。It is a block diagram which shows the example of the power supply circuit of the electronic device incorporating the conventional secondary battery. 図５の説明に供する線図である。It is a diagram with which it uses for description of FIG. 図５の説明に供する線図である。It is a diagram with which it uses for description of FIG.

符号の説明Explanation of symbols

１‥‥電源プラグ、２‥‥入力フィルタ、３，８，２５‥‥整流回路、４‥‥トランス、５‥‥トランジスタ、６‥‥パルス幅変調制御回路、９‥‥負荷回路、９ａ‥‥２次電池、１０，１１‥‥ＤＣ接続ケーブルの抵抗成分、１２，１３，１４，１９，３１‥‥抵抗器、１５，２０，３０‥‥演算増幅回路、１６，２１‥‥基準電圧発生源、１７，２４‥‥ダイオード、１８‥‥ホトカプラ   DESCRIPTION OF SYMBOLS 1 ... Power plug, 2 ... Input filter, 3, 8, 25 ... Rectifier circuit, 4 ... Transformer, 5 ... Transistor, 6 ... Pulse width modulation control circuit, 9 ... Load circuit, 9a ... Secondary battery, 10, 11... DC connection cable resistance component, 12, 13, 14, 19, 31... Resistor, 15, 20, 30... Operational amplifier circuit, 16, 21. , 17, 24 ... Diode, 18 ... Photocoupler

Claims (1)

出力直流電圧を検出する電圧検出手段と、
該電圧検出手段よりの検出電圧と第１の基準電圧とから第１の誤差信号を得る誤差電圧検出手段と、
該誤差電圧検出手段の第１の誤差信号により出力直流電圧を一定とする定電圧制御手段と、
負荷電流を検出する電流検出手段と、
該電流検出手段よりの電流検出信号に応じた電圧と第２の基準電圧とから第２の誤差信号を得る誤差電流検出手段と、
該誤差電流検出手段の第２の誤差信号により前記負荷電流を一定にするようにした定電流制御手段と、を有する２次電池を内蔵した電子機器の電源回路であって、
前記第１及び第２の誤差信号を比較する比較手段を備え、
前記比較手段の比較出力を、前記電圧検出手段に帰還させて、前記第１の誤差信号より前記第２の誤差信号が小さくなる定電流制御のときに、前記電圧検出手段の出力直流電圧に前記負荷電流による電圧降下分を加算して、前記電圧検出手段の検出電圧を前記電圧降下に対応する分小さくすることを特徴とする、
２次電池を内蔵した電子機器の電源回路。 Voltage detection means for detecting the output DC voltage;
An error voltage detection means for obtaining a first error signal from the detection voltage and a first reference voltage from said voltage detecting means,
Constant voltage control means for making the output DC voltage constant by the first error signal of the error voltage detection means;
Current detection means for detecting a load current;
Error current detection means for obtaining a second error signal from a voltage according to a current detection signal from the current detection means and a second reference voltage;
A constant current control means for making the load current constant by a second error signal of the error current detection means;
Comparing means for comparing the first and second error signals ;
The comparison output of the comparison means is fed back to the voltage detection means, and in the constant current control in which the second error signal is smaller than the first error signal , the output DC voltage of the voltage detection means is The voltage drop due to the load current is added, and the detection voltage of the voltage detection means is reduced by an amount corresponding to the voltage drop ,
Power supply circuit for electronic devices with a built-in secondary battery.
JP2004123338A 2004-04-19 2004-04-19 Power supply circuit for electronic equipment with built-in secondary battery Expired - Fee Related JP4487619B2 (en)

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