JP4487369B2 - Solid-state imaging device, manufacturing method thereof, and exposure time control method for solid-state imaging device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a back-illuminated solid-state image sensor, a manufacturing method thereof, and an exposure time control method for a back-illuminated solid-state image sensor.
[0002]
[Prior art]
Conventionally, as a CCD solid-state imaging device, a so-called back-illuminated CCD solid-state imaging device in which an imaging device is formed on one surface of a p-type semiconductor substrate and image light is incident from the back side of the substrate is known. (See US Pat. No. 5,376,810, US Pat. No. 4,476,0031).
In such a back-illuminated solid-state imaging device, the aperture ratio is close to 100%, and a highly sensitive device is obtained. On the other hand, if the semiconductor substrate is thick, the incident light is absorbed in the middle and hardly becomes a signal. For this reason, an imaging device is formed on a single crystal silicon substrate, and after the silicon substrate is bonded to a support substrate, the silicon substrate is thinned by mechanically grinding from the back surface of the substrate to a predetermined thickness. (See US Pat. No. 5,376,810).
[0003]
[Problems to be solved by the invention]
By the way, since the back surface of the conventional solid state imaging device of the back side is a p-type semiconductor, it is necessary to have a lateral overflow drain structure in order to discharge excessive charges. This hindered the increase in the number of pixels, and consequently led to a decrease in the dynamic range.
On the other hand, as described above, since the silicon thin film is formed by mechanical grinding in manufacturing, the in-plane variation of the film thickness increases, and the in-plane variation of sensitivity and saturation signal amount also increases. In addition, there are problems such as high manufacturing cost and long manufacturing time.
[0004]
In view of the above-described points, the present invention provides a back-illuminated solid-state imaging device that enables a large number of pixels, a high dynamic range, and the like, and that enables a vertical overflow drain structure.
The present invention provides a method for manufacturing a back-illuminated solid-state imaging device that enables high-precision thinning of a semiconductor substrate on which an imaging device is formed, and that can manufacture a large-area, high-sensitivity solid-state imaging device. Is.
The present invention provides an exposure time control method for a back-illuminated solid-state imaging device that can control exposure time with high accuracy.
[0005]
[Means for Solving the Problems]
  The solid-state imaging device according to the present invention isAn imaging element is formed on the surface of the high-resistance semiconductor layer to the extent that the entire surface is depleted, and a second conductive type semiconductor region and a first conductive type semiconductor region to be an overflow barrier layer are sequentially formed on the back surface of the high-resistance semiconductor layer, A transparent electrode is formed on the surface of the first conductivity type semiconductor region, the charge is swept away on the back surface side through the transparent electrode, and a back-illuminated type in which light is incident from the back surface side is configured.
  In the solid-state imaging device according to the present invention, the imaging device is formed on the surface of the high-resistance semiconductor layer to the extent that the entire surface is depleted, and the p-type semiconductor region serving as the overflow barrier layer is formed on the back surface of the high-resistance semiconductor layer. A transparent electrode made of n-type ZnO is formed on the surface of the n-type semiconductor region, and charges are swept away to the back side through the transparent electrode, so that a back-illuminated type in which light is incident from the back side.
  The solid-state imaging device according to the present invention has a p-type semiconductor region and an n-type semiconductor region in which an imaging device is formed on the surface of a high-resistance semiconductor layer to which the entire surface is depleted, and an overflow barrier layer is formed on the back surface of the high-resistance semiconductor layer. Are formed in sequence, a transparent electrode made of n-type ZnO is formed on the surface of the n-type semiconductor region, the charge is swept away on the back side through the transparent electrode, and a back-illuminated type in which light is incident from the back side is configured. .
[0006]
  A method for manufacturing a solid-state imaging device according to the present invention includes forming a porous semiconductor layer on a semiconductor substrate and forming the porous semiconductor layer on an upper surface of the porous semiconductor layer.Two-conductivity type semiconductor region to be an overflow barrier layerForming a step;Forming a high-resistance semiconductor layer to a degree that the entire surface is depleted in the second conductivity type semiconductor region;A step of forming an image pickup device, a step of bonding a support substrate to the surface on the image pickup device side, and a step of peeling the semiconductor substrate at the release surface of the porous semiconductor layer;The remaining porous semiconductor layer on the second conductivity type semiconductor region side is removed, and the second conductivity type semiconductor region is removed.Forming a first conductive type semiconductor region on the back surface of the substrate, and forming a transparent electrode on the surface of the first conductive type semiconductor region,A backside illumination type in which charges are swept away to the backside through the transparent electrode and light is incident from the backside is formed.
  A method of manufacturing a solid-state imaging device according to the present invention includes a step of forming a porous semiconductor layer on a semiconductor substrate, forming a p-type semiconductor region serving as an overflow barrier layer on the upper surface of the porous semiconductor layer, and a p-type semiconductor region Forming a high-resistance semiconductor layer to a degree that the entire surface is depleted, forming an image sensor on the surface of the high-resistance semiconductor layer, attaching a support substrate to the surface on the image sensor side, and then forming a porous semiconductor layer A step of peeling the semiconductor substrate on the peeling surface of the step, removing a remaining porous semiconductor layer on the p-type semiconductor region side, and forming a transparent electrode of n-type ZnO on the surface of the p-type semiconductor region, A backside illumination type in which charges are swept away to the backside through the transparent electrode and light is incident from the backside is formed.
  A method of manufacturing a solid-state imaging device according to the present invention includes a step of forming a porous semiconductor layer on a semiconductor substrate, forming a p-type semiconductor region serving as an overflow barrier layer on the upper surface of the porous semiconductor layer, and a p-type semiconductor region Forming a high-resistance semiconductor layer to a degree that the entire surface is depleted, forming an image sensor on the surface of the high-resistance semiconductor layer, attaching a support substrate to the surface on the image sensor side, and then forming a porous semiconductor layer A step of peeling the semiconductor substrate at the peeling surface, a step of removing the remaining porous semiconductor layer on the p-type semiconductor region side, forming an n-type semiconductor region on the surface of the p-type semiconductor region, It has a step of forming a transparent electrode made of n-type ZnO on the surface, the charge is swept away on the back surface side through the transparent electrode, and the back surface irradiation type in which light is incident from the back surface side.
[0007]
  An exposure time control method for a solid-state imaging device according to the present invention includes:An imaging element is formed on the surface of the high-resistance semiconductor layer to the extent that the entire surface is depleted, and a second conductive type semiconductor region and a first conductive type semiconductor region to be an overflow barrier layer are sequentially formed on the back surface of the high-resistance semiconductor layer, A transparent electrode is formed on the surface of the first conductivity type semiconductor region, the charge is swept away on the back side through the transparent electrode, and a solid-state imaging device configured to be a back-illuminated type in which light is incident from the back side,An exposure time is controlled by applying a shutter pulse to the transparent electrode and sweeping out charges toward the transparent electrode.
  The exposure time control method for a solid-state imaging device according to the present invention is a p-type semiconductor region in which an imaging device is formed on the surface of a high-resistance semiconductor layer that is depleted on the entire surface, and an overflow barrier layer is formed on the back surface of the high-resistance semiconductor layer. Is formed on the surface of the p-type semiconductor region, a transparent electrode made of n-type ZnO is formed, charges are swept away to the back side through the transparent electrode, and a solid-state imaging configured as a back-illuminated type in which light is incident from the back side The exposure time is controlled by applying a shutter pulse to the transparent electrode and sweeping out charges toward the transparent electrode.
  An exposure time control method for a solid-state imaging device according to the present invention includes:An imaging device is formed on the surface of the high-resistance semiconductor layer that is depleted on the entire surface, and a p-type semiconductor region and an n-type semiconductor region serving as an overflow barrier layer are sequentially formed on the back surface of the high-resistance semiconductor layer. A transparent electrode made of n-type ZnO is formed on the surface of the substrate, and the charge is swept away to the back side through the transparent electrode. An exposure time is controlled by applying a shutter pulse and sweeping out charges toward the transparent electrode.
[0008]
  In the backside illumination type solid-state imaging device according to the present invention, by having a transparent electrode on the back surface and sweeping away charges on the back surface side, a so-called vertical overflow structure is formed, which increases the number of pixels and the high dynamic range. In addition, it enables an electronic shutter by sweeping out charges on the back side.Moreover, since it is a backside illumination type, high sensitivity can be achieved.
[0009]
In the method for manufacturing a solid-state imaging device according to the present invention, an epitaxial layer is formed on a semiconductor substrate via a porous semiconductor layer, an imaging device is formed on the epitaxial layer, and a support substrate is bonded to the surface on the imaging device side. By providing the step of peeling the semiconductor substrate at the peeling surface of the porous semiconductor layer, the semiconductor substrate on which the imaging element is formed can be uniformly thinned with no variation in film thickness.
[0010]
In the exposure time control method for the backside illumination type solid-state imaging device according to the present invention, the exposure time is controlled by applying a shutter pulse to the transparent electrode on the back surface and sweeping out charges to the back surface side, thereby controlling the exposure time. Can be performed with high accuracy.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
The present invention is a back-illuminated solid-state imaging device, which has a transparent electrode on the back surface and sweeps away charges on the back surface side.
[0012]
The present invention is a back-illuminated solid-state imaging device, in which an imaging device is formed on one surface of a high-resistance semiconductor layer to which the entire surface is depleted, and a second conductivity type layer is formed on the back surface of the high-resistance semiconductor layer. This is a solid-state imaging device in which first conductive type layers are sequentially formed.
[0013]
The method for manufacturing a solid-state imaging device according to the present invention includes forming a porous semiconductor layer on a semiconductor substrate, forming an epitaxial layer on the upper surface of the porous semiconductor layer, forming an imaging device on the epitaxial layer, After the support substrate is bonded to the surface on the imaging element side, the semiconductor substrate is peeled off at the peeling surface of the porous semiconductor layer.
[0014]
A step of removing the porous semiconductor layer may be included after the step of peeling the semiconductor substrate.
An epitaxial layer is an n-type epitaxial layer, a step of removing a porous semiconductor layer after a semiconductor substrate peeling step, and a step of sequentially forming a p-type semiconductor layer, an n-type semiconductor layer and a transparent electrode on the back surface of the epitaxial layer Can have.
[0015]
The epitaxial layer is an n-type epitaxial layer, the step of removing the porous semiconductor layer after the semiconductor substrate peeling step, and the n-type transparent electrode on the surface of the p-type semiconductor layer formed on the back side of the epitaxial layer It can have the process of forming.
[0016]
The epitaxial layer is an n-type epitaxial layer, and after the semiconductor substrate peeling step, there is a step of removing the porous semiconductor layer and a step of sequentially forming a p-type semiconductor layer and an n-type transparent electrode on the back surface of the epitaxial layer. Can do.
[0017]
The present invention is a method for controlling the exposure time of a backside illuminated solid-state imaging device having a transparent electrode on the back surface, applying a shutter pulse to the transparent electrode, and sweeping out charges to the transparent electrode side of the back surface, The exposure time is controlled.
[0018]
Embodiments of the present invention will be described below with reference to the drawings.
[0019]
1 and 2 show an embodiment of a back-illuminated solid-state imaging device according to the present invention.
The solid-state imaging device 1 according to the present embodiment is applied to a frame transfer (FT) type solid-state imaging device. As shown in FIG. 1, the solid-state imaging device 1 includes an imaging region 2 in which a plurality of light receiving sensor units serving as pixels are two-dimensionally arranged, and an accumulation region 3 that temporarily accumulates signal charges in the imaging region 2. The horizontal transfer register 4 connected to the storage area 3 and the output circuit 5 connected to the end of the horizontal transfer register 4 are provided.
[0020]
In the imaging region 2, a semiconductor region 6 serving as a transfer channel that also serves as a light receiving sensor of a semiconductor substrate is divided into a plurality of channels according to the number of pixels in a horizontal direction in a channel stop region 7. A plurality of strip-like vertical transfer electrodes 8 extending in the vertical direction are arranged in the vertical direction. Reference numeral 9 denotes each vertical transfer register also serving as a light receiving sensor.
[0021]
Similar to the imaging region 2, the storage region 3 is divided into a plurality of semiconductor regions 6 serving as transfer channels in the horizontal direction according to the number of pixels in the channel stop region 7, and the horizontal direction is formed on the semiconductor region 6 via an insulating film. A plurality of strip-like vertical transfer electrodes 10 extending in the vertical direction are arranged in the vertical direction. Reference numeral 11 denotes each vertical transfer register.
[0022]
The horizontal transfer register 4 is configured by arranging a plurality of horizontal transfer electrodes (not shown) via an insulating film on a semiconductor region serving as a transfer channel. The storage area 3 and the horizontal transfer register 4 are shielded from light.
[0023]
The vertical transfer electrode 8 includes, for example, a transfer clock pulse ΦV for four-phase driving.₁~ ΦV_FourIs applied. ΦV₁~ ΦV_FourIn the region to which 2 electrodes are applied, the region divided by the channel stop region 7 for two or four electrodes, that is, the region for four electrodes in this example is one pixel (so-called light receiving sensor unit) 12.
That is, at the time of field reading, two vertical transfer electrodes 8 correspond to one pixel, and in this case, signal charges of two pixels adjacent in the vertical direction are added. When all pixels are read, four vertical transfer electrodes 8 correspond to one pixel.
For example, the transfer clock pulse ΦM for four-phase driving is applied to the vertical transfer electrode 10 in the storage region 3.₁~ ΦM_FourIs applied.
The horizontal transfer register 7 includes, for example, a transfer clock pulse ΦH for two-phase driving.₁And ΦH₂Is applied.
[0024]
FIG. 2 shows a cross-sectional structure of the solid-state imaging device 1 along the line AA in FIG.
In the solid-state imaging device 1 of the present embodiment, a first conductivity type semiconductor region, in this example, an n-type semiconductor region (a buried transfer channel region that also serves as a light receiving sensor) 6 is formed on one surface of a high-resistance semiconductor layer 21. A vertical transfer electrode 8 having a two-layer structure made of, for example, polycrystalline silicon is formed on the n-type semiconductor region 6 via an insulating film 22.
In addition, a second conductivity type layer, in this example, a p-type semiconductor region 23, is formed on the other surface of the high resistance semiconductor layer 21, that is, the back surface, and n is a first conductivity type layer thereon.⁺A semiconductor region 24 is formed, and a transparent electrode 25 made of, for example, ITO (indium tin oxide), ZnO or the like is formed thereon.
[0025]
The high resistance semiconductor layer 21 can have a specific resistance of 100 Ωcm or more, and in this example, about 500 Ωcm. As the high-resistance semiconductor layer 21, for example, a low-concentration n-type semiconductor layer (n^-Layer), low-concentration p-type semiconductor layer (p^-Layer) or an intrinsic semiconductor layer (i layer).
[0026]
From the high resistance semiconductor layer 21 in which the n-type semiconductor region 6 of the channel region is formed to n⁺The semiconductor substrate 26 up to the semiconductor region 24 is formed in a thin film so that incident light from the back surface is incident on the n-type semiconductor region 6 serving as a light receiving sensor portion. For example, the thickness t can be set to 20 μm or less.
Then, a support substrate 27 for supporting the thin-film semiconductor substrate 26 is bonded to the imaging element side via an adhesive 29.
[0027]
Furthermore, the mechanical shutter 28 can be disposed so as to face the transparent electrode 25 on the back surface.
[0028]
In this back-illuminated solid-state imaging device 1, the n-type semiconductor region 6 and the high-resistance semiconductor layer 21 are the emitter, the p-type semiconductor region 23 is the base,⁺A vertical npn transistor using the semiconductor region 24 as a collector is formed, and this transistor operation enables a vertical overflow drain and an electronic shutter that sweeps out charges to the back side.
[0029]
  For example, as shown in FIG. 3, the transparent electrode 25 includes a p-type semiconductor region 23 and an n-type semiconductor region.⁺It is preferable to deposit the entire surface so as to be connected to the semiconductor region 24. At this time, the vertical npn transistor becomes an equivalent circuit in which a collector and a base are connected as shown in FIG. As the vertical npn transistor formed on the back surface, the transparent electrode 25 is n⁺A structure in which the p-type semiconductor region 23 is floated by being deposited only on the semiconductor region 24,p-typeThe semiconductor region 23 is connected to Al or the like different from the transparent electrode, and Aln-typeIt is also possible to connect the semiconductor region 23.
[0030]
FIG. 7 shows an impurity concentration profile on the BB line of the solid-state imaging device 1 of FIG.
[0031]
Next, the operation of the backside illumination type solid-state imaging device 1 of the present embodiment will be described.
The image light is incident from the back side where the transparent electrode 25 is formed. At the time of receiving light, a predetermined voltage, for example, 5V is applied to the transparent electrode 25, the n-type semiconductor region 6 and the high-resistance semiconductor layer 21 are completely depleted and subjected to photoelectric conversion, as shown in FIG. Are accumulated as signal charges (electrons in this example) 31. 32 is the other charge (holes in this example).
[0032]
When strong image light is received, surplus charges (electrons) 33 are swept away to the transparent electrode 25 through the p-type semiconductor region 23 serving as an overflow barrier layer by the above-described vertical npn transistor operation.
[0033]
After a predetermined light-receiving period, a four-phase transfer clock pulse ΦV applied to the vertical transfer electrode 8 in the imaging region 2₁~ ΦV_Four(For example, clock pulses of 0V and −9V), a four-phase transfer clock pulse ΦM applied to the vertical transfer electrode 10 in the storage region 3₁~ ΦM_Four(For example, 0 V and −9 V clock pulses), the signal charge of each pixel is transferred from the imaging region 2 to the storage region 3 at high speed (so-called frame shift) and temporarily stored. Thereafter, the signal charge in the storage region 3 is transferred to the horizontal transfer register 4 for each line. Then, the signal charge is transferred through the horizontal transfer register 4, converted into a charge voltage, and output through the output circuit 5.
[0034]
On the other hand, when a predetermined shutter pulse, for example, a shutter pulse of about 30 V, is applied to the transparent electrode 25 during the light receiving period, the potential distribution shown in FIG. 6 is obtained, and the charge 31 accumulated so far is transparent due to the above-described vertical npn transistor operation. The electrode 25 is swept away and a so-called electronic shutter operation is performed. Thereby, the exposure time is controlled with high accuracy.
[0035]
Since the solid-state imaging device 1 according to the above-described embodiment is configured as a back-illuminated type, the light receiving aperture ratio can be set to 100% or nearly 100%, and a highly sensitive solid-state imaging device is realized. be able to.
A p-type semiconductor region 23, n is formed on the back surface of the high-resistance semiconductor layer 21.⁺By forming the semiconductor region 24 and the transparent electrode 25 sequentially and operating as a vertical npn transistor, a vertical overflow drain structure in which charges are swept away on the back surface side can be obtained. In addition, an electronic shutter function can be provided so that charges are swept away on the back surface side.
[0036]
Since the solid-state imaging device 1 has a vertical overflow drain structure, the amount of charge handled by so-called vertical transfer registers 9 and 11 having transfer electrodes can be increased accordingly, and a high dynamic range can be obtained.
[0037]
As shown in FIG. 5, the p-type semiconductor region 23 formed on the back surface side functions as an accumulation layer of the holes 32 that are the other charge, so that dark current can be reduced.
[0038]
Further, when the mechanical shutter 28 is disposed facing the back surface on the incident light side of the back-illuminated solid-state imaging device 1, there is no problem of smear, and a high-sensitivity, multi-pixel still image CCD camera can be realized. .
[0039]
FIG. 8 shows another embodiment of the backside illumination type solid-state imaging device of the present invention.
The solid-state imaging device 35 according to the present embodiment utilizes the fact that, for example, a ZnO film, which is a transparent electrode, functions as an n-type layer, an n-type semiconductor region 6, an insulating film on one surface of the high-resistance semiconductor layer 21. 22, an image pickup device is formed by the vertical transfer electrode 8 and the like, a p-type semiconductor region 23 and a transparent electrode 36 made of, for example, a ZnO film acting as an n-type layer are formed on the other surface, and the image pickup device side of the semiconductor substrate 26 is further formed. The support substrate 27 is adhered to the substrate. Other configurations are the same as those in FIG.
[0040]
The impurity concentration profile in the solid-state imaging device 35 is n in FIG.⁺The semiconductor region 24 has a omitted profile.
[0041]
In this back-illuminated solid-state imaging device 35, a vertical npn transistor is formed with the n-type semiconductor region 6 and the high-resistance semiconductor layer 21 as an emitter, the p-type semiconductor region 23 as a base, and the transparent electrode 36 as a collector. This enables a vertical overflow drain and an electronic shutter that sweeps away charges to the back side.
[0042]
According to the solid-state imaging device 35 according to the present embodiment, the same effects as those of the solid-state imaging device 1 described above can be obtained.
That is, since it is configured as a back-illuminated type, a highly sensitive solid-state imaging device can be realized. A vertical type in which a p-type semiconductor region 23 and a transparent electrode 36 acting as an n-type layer are sequentially formed on the back surface of the high-resistance semiconductor layer 21 and operated as a vertical npn transistor, thereby sweeping out charges on the back surface side. An overflow drain structure can be used, and an electronic shutter function can be provided so that charges are swept away on the back surface side.
[0043]
  Because of the vertical overflow drain structure,Transfer electrode 8The so-called vertical transfer register having a large amount of charge can be increased and a high dynamic range can be obtained.
  Since the p-type semiconductor region 23 formed on the back side functions as an accumulation layer of the holes 32 that are the other charges, the dark current can be reduced.
[0044]
  Also, back-illuminatedSolid-state image sensor 35When the mechanical shutter 28 is disposed facing the back surface on the incident light side, there is no problem of smear, and a high-sensitivity, multi-pixel still image CCD camera can be realized.
[0045]
Next, an embodiment of a method for manufacturing a backside illumination type solid-state imaging device according to the present invention will be described.
[0046]
9 to 11 show a method for manufacturing a solid-state imaging device according to an embodiment of the present invention.
First, as shown in FIG. 9A, the porous semiconductor layer 42 is formed on the upper surface of the semiconductor substrate 41. In this example, the semiconductor substrate 41 is a p-type single crystal silicon substrate having a specific resistance of about 0.01 to 0.02 Ω · cm into which a p-type impurity such as boron is introduced. In this example, the porous semiconductor layer 42 is a porous silicon layer.
[0047]
The porous semiconductor layer 42 can be formed, for example, by an anodizing method. That is, for example, 0.5 to 3.0 mA / cm so that an epitaxial layer having excellent crystallinity is formed on the porous semiconductor layer, for example, the porous silicon layer 42.²The first anodizing treatment is performed at a current density of 2 to 10 minutes, in this example for 8 minutes, to form a first porous silicon layer (not shown) having a low porosity. Then, for example, 3-20 mA / cm²The second anodizing treatment is performed at a current density of 2 to 10 minutes, in this example, for 8 minutes to form a second porous silicon layer (not shown) having a medium porosity. Then, for example, 40 to 300 mA / cm²A third anodizing treatment is performed for several seconds at a current density of 3 to form a third porous silicon layer (not shown) having a high porosity.
[0048]
Thickness d of porous silicon layer 42₁Is 2 to 10 μm, preferably about 8 μm.
Here, the anodizing method is a method of conducting electricity in a hydrofluoric acid solution using the silicon substrate 41 as an anode, and examples of the anodizing method include “Surface Technology Vol. 46, No. 5, p8” by Ito et al. ˜13, 1995 “Porous silicon anodization” is known.
[0049]
In this method, a silicon substrate 41 on which a porous silicon layer 42 is to be formed is disposed between two electrolytic solution tanks, platinum electrodes connected to a DC power source are provided in the two electrolytic solution tanks, and two electrolytic solutions are provided. An electrolytic solution is put in a tank, and a DC voltage is applied with the silicon substrate 41 as an anode and a platinum electrode as a cathode, and one surface of the silicon substrate 41 is eroded to make it porous. As the electrolytic solution, for example, an electrolytic solution having a volume ratio of hydrofluoric acid to ethyl alcohol of 3: 1 to 1: 1 is preferably used.
[0050]
Next, a hydrogen annealing process is performed on the surface of the porous silicon layer 42 at 1050 ° C. to 1200 ° C., for example, 110 ° C. for 5 to 30 minutes to block a large number of holes formed on the surface of the porous silicon layer 42.
[0051]
Next, as shown in FIG. 9B, a second conductivity type semiconductor layer, in this example, a p-type silicon layer 43 is formed on the porous silicon layer 42 by epitaxial growth.
For example, SiH_Four, SiCl_Four, SiCl_Three, SiHCl_Three, SiH₂Cl₂A p-type silicon region 43 is epitaxially grown on the porous silicon layer 42 to a thickness of 0.1 μm to 1.0 μm at 1000 ° C. to 1150 ° C., for example, 1070 ° C., using a gas such as.
[0052]
Next, as shown in FIG. 9C, a high resistance semiconductor layer 44 is formed on the p-type silicon region 43 by continuous epitaxial growth. As described above, the high-resistance semiconductor layer 44 is a low-concentration n-type silicon layer (n^-Layer), low-concentration p-type silicon layer (p^-Layer) or an intrinsic silicon layer (i layer). The thickness of the high resistance silicon layer 44 can be, for example, about 10 μm.
[0053]
  Here, in the process of hydrogen annealing treatment or epitaxial growth, the porous silicon layer 42 becomes extremely weak in tensile strength and is converted into a release layer. 45 shows the peeling surface. This release layer is formed of a p-type silicon region 43,High resistance silicon layer 44Has a tensile strength that does not peel from the silicon substrate 41.
[0054]
Next, as shown in FIG. 10D, an n-type impurity is introduced into the surface of the high-resistance silicon layer 44 by ion implantation, for example, to form an n-type semiconductor region to be a transfer channel, in this example, an n-type silicon region 46. To do. Further, a p-type channel stop region (not shown) is formed in the n-type silicon region 46 for dividing the pixels in the horizontal direction and dividing the vertical transfer register.
Next, a vertical transfer electrode 48 made of, for example, polycrystalline silicon having a two-layer film structure is formed on the n-type silicon region 46 via an insulating film 47 made of, for example, a silicon oxide film, a silicon nitride film, etc. 2. The accumulation region 3 is formed.
Furthermore, although not shown, the horizontal transfer register 4 and the output circuit 5 are also formed to form the image sensor 49.
[0055]
Next, as shown in FIG. 10E, a support substrate, for example, an opaque plastic film 52 is bonded to the image sensor 49 side using an adhesive 50. Thereafter, the silicon substrate 41 is immersed in a solution such as water or ethyl alcohol, and the silicon substrate 41 is irradiated with ultrasonic waves of, for example, 25 kHz and 600 W.
As a result, the peeling strength of the peeling layer by the porous silicon layer 42 is weakened by ultrasonic energy, and the silicon substrate 41 is peeled from the peeling surface 45.
[0056]
Next, as shown in FIG. 11F, the porous silicon layer 42 remaining on the back surface of the silicon substrate 53 on which the imaging element 49 from which the silicon substrate 41 has been peeled is removed, and the p-type silicon region 43 is exposed. . The remaining porous silicon layer 42 is removed from the silicon substrate 53 by, for example, a rotating silicon etching method using a mixed solution of hydrofluoric acid and nitric acid.
[0057]
Next, as shown in FIG. 11G, a high-concentration n-type impurity is introduced into the back surface of the p-type silicon region 43 by ion implantation or the like, for example.⁺A silicon region 54 is formed.
[0058]
Next, as shown in FIG.⁺A transparent electrode 55 made of, for example, ITO or ZnO is formed on the surface of the silicon region 54 to obtain a target back-illuminated solid-state imaging device 56 that enables a vertical overflow drain and an electronic shutter.
[0059]
FIG. 12 shows another embodiment of the manufacturing method of the backside illumination type solid-state imaging device of the present invention.
After the aforementioned FIG. 11F, a transparent electrode 57 made of, for example, ZnO acting as an n-type layer is formed directly on the back surface of the p-type silicon region 43 to enable a vertical overflow drain and an electronic shutter, as shown in FIG. The intended back-illuminated solid-state imaging device 58 is manufactured.
[0060]
  After the step of FIG. 11F, if necessary, the p-type silicon region 43 is removed by etching, and then a p-type impurity is ion-implanted into the back surface of the high-resistance silicon layer 44 and activated by excimer laser annealing or the like. Turn intop-typeA silicon region may be formed.
  Then, as shown in FIGS.⁺For example, ion implantation is performed on the surface of the silicon region.⁺It is also possible to form the silicon region 54 and form the transparent electrode 55.
  Or, as shown in FIG.⁺A transparent electrode 57 made of, for example, ZnO that acts as an n-type layer can also be formed directly on the surface of the silicon region.
[0061]
According to the manufacturing method of the solid-state imaging device according to the above-described embodiment, the porous silicon layer 42 that becomes the peeling layer is formed on the silicon substrate 41, and the epitaxial layers 43 and 44 are formed on the porous silicon layer 42. Then, after forming the imaging element 49 on the surface of the epitaxial layer 44 and forming the supporting substrate 52, the supporting substrate 52 is peeled off from the porous silicon layer 42 by chemical treatment, and the silicon on which the imaging element 49 is formed. The base 53 can be thinned. At the time of thinning, the silicon substrate 53 can be formed into a thin film with a uniform thickness because the film is thinned not by mechanical polishing but by peeling by chemical treatment.
[0062]
Therefore, it is possible to manufacture a highly reliable back-illuminated solid-state imaging device with little or little in-plane variation in sensitivity and saturation signal amount. Further, the manufacturing time is short, and it can be manufactured easily and at low cost.
[0063]
Therefore, a large area back-illuminated solid-state imaging device can be easily manufactured at low cost. In addition, a solid-state imaging device having multiple pixels, high sensitivity, and high dynamic range can be manufactured.
[0064]
13 to 14 show another embodiment of the method for manufacturing the backside illumination type solid-state imaging device of the present invention.
In this embodiment, as shown in FIG. 13A, a porous silicon layer 42 to be a release layer is formed on the surface of a semiconductor substrate, for example, a p-type single crystal silicon substrate 41, by an anodizing method, for example.
[0065]
Next, as shown in FIG. 13B, a high-resistance semiconductor layer or a p-type semiconductor layer, in this example, p is formed by epitaxial growth on the porous silicon layer 42.^-A silicon layer 61 is formed.
[0066]
Next, as shown in FIG.^-An n-type silicon region 46 serving as a transfer channel is formed on the surface of the silicon layer 61. In addition, a p-type channel stop region (not shown) for dividing horizontal pixels and vertical transfer registers is formed in the n-type silicon region 46. At the same time, p^-P serving as an electrode extraction region in the silicon layer 61⁺Layer 62 is formed.
[0067]
Next, a vertical transfer electrode 48 made of, for example, polycrystalline silicon having a two-layer film structure is formed on the n-type silicon region 46 via an insulating film 47 made of, for example, a silicon oxide film, a silicon nitride film, etc. 2. The accumulation region 3 is formed. Furthermore, although not shown, the horizontal transfer register 4 and the output circuit 5 are also formed to form the image sensor 49.
Next, a support substrate, for example, an opaque plastic film 52 is bonded to the image sensor 49 side through an adhesive 50.
[0068]
Next, as shown in FIG. 14D, the silicon substrate 41 is peeled off from the peeling surface 45 of the peeling layer by the porous silicon layer 42 as described above. Thereby, the silicon substrate 53 on which the image sensor 49 is formed is thinned.
[0069]
Next, as shown in FIG. 14E, after removing the porous silicon layer 42 remaining on the back surface of the silicon substrate 53, p^-A transparent insulating protective film 64 is formed on the back surface of the silicon layer 61 to obtain a target back-illuminated solid-state imaging device 65.
[0070]
P, which becomes the electrode extraction region⁺Instead of the layer 62, as shown in FIG.^-P on the back surface of the silicon layer 61⁺A silicon region 66 may be formed. p⁺A transparent electrode 55 may be formed on the surface of the silicon region 66, or the transparent electrode 55 may be omitted.
[0071]
According to the solid-state imaging device 65 of FIGS. 13 to 14 or the solid-state imaging device 67 of FIG. 15, the film thickness of the back-illuminated solid-state imaging device using the p-type silicon layer 61 is the same as that of the above-described embodiment. It is possible to make the silicon substrate 53 thin.
Therefore, a large area back-illuminated solid-state imaging device can be easily manufactured at low cost. In addition, a solid-state imaging device having multiple pixels, high sensitivity, and high dynamic range can be manufactured.
[0072]
In the above example, the present invention is applied to a CCD solid-state imaging device. However, the present invention can also be applied to a MOS solid-state imaging device.
[0073]
【The invention's effect】
According to the solid-state imaging device of the present invention, since it is a backside illumination type, the aperture ratio can be made 100% or nearly 100%, and a highly sensitive solid-state imaging device can be realized.
Since the structure is such that charges are swept away to the back side, a vertical overflow drain structure is formed, enabling multiple pixels and a high dynamic range, and an electronic shutter that sweeps charges to the back side.
[0074]
When the second conductivity type layer and the first conductivity type layer are provided on the back surface side, the vertical bipolar drain transistor can be operated to form a vertical overflow drain structure. For example, when applied to a CCD solid-state imaging device, the amount of charge handled by the vertical transfer register can be increased, and a high dynamic range can be obtained. Further, it is possible to provide an electronic shutter function that sweeps charges to the back surface side.
Since the second conductivity type layer is provided on the back surface side, when the signal charge is, for example, electrons, the second conductivity type layer can act as a hole charge accumulation layer, and a low dark current can be obtained.
By combining a mechanical shutter, a multi-pixel CCD camera for still images can be provided.
[0075]
According to the method for manufacturing a solid-state imaging device according to the present invention, the semiconductor substrate on which the imaging device is formed can be thinned with a uniform thickness. Therefore, a large area back-illuminated solid-state imaging device can be manufactured easily and at low cost.
In addition, a solid-state imaging device having multiple pixels, high sensitivity, and high dynamic range can be manufactured.
[0076]
According to the exposure time control method for the backside illumination type solid-state imaging device according to the present invention, the charge sweeping is performed to the transparent electrode side on the back surface by the shutter pulse, so that the exposure time can be controlled with high accuracy.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram of a back-illuminated solid-state imaging device according to an embodiment of the present invention.
FIG. 2 is a configuration diagram showing an embodiment of a cross-sectional structure taken along line AA in FIG.
FIG. 3 is a plan view showing a state of forming a transparent electrode on the back side.
FIG. 4 is an equivalent circuit diagram of a vertical npn transistor for explaining the present invention.
FIG. 5 is a potential distribution diagram during a light receiving and accumulation period of a backside illumination type solid-state imaging device according to an embodiment of the present invention.
FIG. 6 is a potential distribution diagram at the time of an electronic shutter of a backside illumination type solid-state imaging device according to an embodiment of the present invention.
7 is an impurity concentration distribution diagram on the BB line in FIG. 2; FIG.
FIG. 8 is a configuration diagram of a backside illumination type solid-state imaging device according to another embodiment of the present invention.
FIGS. 9A to 9C are manufacturing process diagrams showing an embodiment of a method for manufacturing a backside illumination type solid-state imaging device according to the present invention. FIGS.
FIGS. 10A to 10E are manufacturing process diagrams showing an embodiment of a method for manufacturing a backside illumination type solid-state imaging device according to the present invention. FIGS.
11A to 11H are manufacturing process diagrams showing an embodiment of a method for manufacturing a backside illumination type solid-state imaging device according to the present invention.
FIG. 12 is a manufacturing process diagram illustrating another embodiment of a method for manufacturing a back-illuminated solid-state imaging device according to the present invention.
FIGS. 13A to 13C are manufacturing process diagrams showing another embodiment of a method for manufacturing a back-illuminated solid-state imaging device according to the present invention. FIGS.
FIGS. 14A to 14E are manufacturing process diagrams showing another embodiment of a method for manufacturing a backside illumination type solid-state imaging device according to the present invention. FIGS.
FIG. 15 is a manufacturing process diagram showing still another embodiment of a method for manufacturing a backside illumination type solid-state imaging device according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Back-illuminated solid-state image sensor, 2 ... Imaging area, 3 ... Storage area, 4 ... Horizontal transfer register, 5 ... Output circuit, 8, 10 ... Vertical transfer electrode 6, transfer channel region, 7 ... channel stop region, 9, 11 ... vertical transfer register, 12 ... one pixel (when all pixels are read), 21 ... high resistance semiconductor layer, 23 ... p-type semiconductor region, 24 ... n⁺Semiconductor region 25, 36 ... Transparent electrode, 27 ... Support substrate, 28 ... Mechanical shutter, 41 ... Single crystal silicon substrate, 42 ... Porous semiconductor layer, 43 ... P-type semiconductor Region 44... High resistance semiconductor layer 46... N-type semiconductor region 48... Vertical transfer electrode 49... Imaging element 52. ... n⁺Semiconductor region, 55... Transparent electrode, 56, 58, 65, 67... Back-illuminated solid-state image sensor, 61.^-Semiconductor layer, 62... P⁺Layer, 64 ... transparent protective film, 66 ... p⁺Semiconductor area

Claims (9)

The imaging device is formed on the surface of the high-resistance semiconductor layer to the extent that all the surface is depleted,
A second conductive type semiconductor region and a first conductive type semiconductor region to be an overflow barrier layer are sequentially formed on the back surface of the high-resistance semiconductor layer;
A transparent electrode is formed on a surface of the first conductive type semiconductor region;
Charge is swept away on the back side through the transparent electrode,
A solid-state imaging device comprising a back-illuminated type in which light is incident from the back side . An image sensor is formed on the surface of the high-resistance semiconductor layer to the extent that the entire surface is depleted,
A p-type semiconductor region serving as an overflow barrier layer is formed on the back surface of the high-resistance semiconductor layer;
A transparent electrode made of n-type ZnO is formed on the surface of the p-type semiconductor region,
Charge is swept away on the back side through the transparent electrode,
It is configured as a backside illumination type in which light is incident from the backside.
The solid-state image sensor characterized by the above-mentioned. An image sensor is formed on the surface of the high-resistance semiconductor layer to the extent that the entire surface is depleted,
A p-type semiconductor region and an n-type semiconductor region to be an overflow barrier layer are sequentially formed on the back surface of the high-resistance semiconductor layer,
A transparent electrode made of n-type ZnO is formed on the surface of the n-type semiconductor region,
Charge is swept away on the back side through the transparent electrode,
It is configured as a backside illumination type in which light is incident from the backside.
The solid-state image sensor characterized by the above-mentioned. Forming a porous semiconductor layer on a semiconductor substrate, and forming a second conductivity type semiconductor region serving as an overflow barrier layer on the upper surface of the porous semiconductor layer;
Forming a high-resistance semiconductor layer to the extent that the entire surface is depleted in the second conductivity type semiconductor region;
Forming an image sensor on a surface of the high-resistance semiconductor layer ;
After bonding a support substrate to the surface on the imaging element side, peeling the semiconductor substrate at the peeling surface of the porous semiconductor layer;
Removing the remaining porous semiconductor layer on the second conductivity type semiconductor region side, and forming a first conductivity type semiconductor region on the back surface of the second conductivity type semiconductor region;
Forming a transparent electrode on the surface of the first conductivity type semiconductor region;
A method for manufacturing a solid-state imaging device, wherein the charge is swept away on the back surface side through the transparent electrode, and the back surface irradiation type in which light enters from the back surface side . Forming a porous semiconductor layer on a semiconductor substrate and forming a p-type semiconductor region serving as an overflow barrier layer on the upper surface of the porous semiconductor layer;
Forming a high-resistance semiconductor layer to the extent that the entire surface is depleted in the p-type semiconductor region;
Forming an image sensor on a surface of the high-resistance semiconductor layer;
After bonding a support substrate to the surface on the imaging element side, peeling the semiconductor substrate at the peeling surface of the porous semiconductor layer;
Removing the remaining porous semiconductor layer on the p-type semiconductor region side and forming a transparent electrode of n-type ZnO on the surface of the p-type semiconductor region;
The back surface is made to sweep through the transparent electrode, and the back surface irradiation type in which light is incident from the back surface.
A method for manufacturing a solid-state imaging device. Forming a porous semiconductor layer on a semiconductor substrate and forming a p-type semiconductor region serving as an overflow barrier layer on the upper surface of the porous semiconductor layer;
Forming a high-resistance semiconductor layer to the extent that the entire surface is depleted in the p-type semiconductor region;
Forming an image sensor on a surface of the high-resistance semiconductor layer;
After bonding the support substrate to the surface on the imaging element side, peeling the semiconductor substrate on the peeling surface of the porous semiconductor layer;
Removing the remaining porous semiconductor layer on the p-type semiconductor region side, and forming an n-type semiconductor region on the surface of the p-type semiconductor region;
Forming a transparent electrode of n-type ZnO on the surface of the n-type semiconductor region;
The back surface is made to sweep through the transparent electrode, and the back surface irradiation type in which light is incident from the back surface.
A method for manufacturing a solid-state imaging device. An image sensor is formed on the surface of the high-resistance semiconductor layer to the extent that the entire surface is depleted,
A second conductive type semiconductor region and a first conductive type semiconductor region to be an overflow barrier layer are sequentially formed on the back surface of the high-resistance semiconductor layer;
A transparent electrode is formed on a surface of the first conductive type semiconductor region;
Charge is swept away on the back side through the transparent electrode,
For a solid-state imaging device configured as a back-illuminated type in which light is incident from the back side,
A method for controlling an exposure time of a solid-state imaging device, comprising: applying a shutter pulse to the transparent electrode, sweeping out charges toward the transparent electrode, and controlling an exposure time. An image sensor is formed on the surface of the high-resistance semiconductor layer to the extent that the entire surface is depleted,
A p-type semiconductor region serving as an overflow barrier layer is formed on the back surface of the high-resistance semiconductor layer;
A transparent electrode made of n-type ZnO is formed on the surface of the p-type semiconductor region,
Charge is swept away on the back side through the transparent electrode,
For a solid-state imaging device configured as a back-illuminated type in which light is incident from the back side,
Applying a shutter pulse to the transparent electrode, sweeping out charges toward the transparent electrode, and controlling the exposure time
An exposure time control method for a solid-state imaging device. An image sensor is formed on the surface of the high-resistance semiconductor layer to the extent that the entire surface is depleted,
A p-type semiconductor region and an n-type semiconductor region to be an overflow barrier layer are sequentially formed on the back surface of the high-resistance semiconductor layer,
A transparent electrode made of n-type ZnO is formed on the surface of the n-type semiconductor region,
Charge is swept away on the back side through the transparent electrode,
For a solid-state imaging device configured as a back-illuminated type in which light is incident from the back side,
Applying a shutter pulse to the transparent electrode, sweeping out charges toward the transparent electrode, and controlling the exposure time
An exposure time control method for a solid-state imaging device.

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