JP4487303B2 - Method for manufacturing light emitting device - Google Patents

Method for manufacturing light emitting device Download PDF

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JP4487303B2
JP4487303B2 JP2003389922A JP2003389922A JP4487303B2 JP 4487303 B2 JP4487303 B2 JP 4487303B2 JP 2003389922 A JP2003389922 A JP 2003389922A JP 2003389922 A JP2003389922 A JP 2003389922A JP 4487303 B2 JP4487303 B2 JP 4487303B2
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雅人 山田
雅宣 高橋
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Shin Etsu Handotai Co Ltd
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Description

この発明は発光素子の製造方法に関する。 The present invention relates to a method for manufacturing a light emitting device.

特開２００１−３３９１００号公報JP 2001-339100 A 日経エレクトロニクス２００２年１０月２１日号１２４頁〜１３２頁Nikkei Electronics October 21, 2002, pages 124-132

発光ダイオードや半導体レーザー等の発光素子に使用される材料及び素子構造は、長年にわたる進歩の結果、素子内部における光電変換効率が理論上の限界に次第に近づきつつある。従って、一層高輝度の素子を得ようとした場合、素子からの光取出し効率が極めて重要となる。例えば、ＡｌＧａＩｎＰ混晶により発光層部が形成された発光素子は、薄いＡｌＧａＩｎＰ（あるいはＧａＩｎＰ）活性層を、それよりもバンドギャップの大きいｎ型ＡｌＧａＩｎＰクラッド層とｐ型ＡｌＧａＩｎＰクラッド層とによりサンドイッチ状に挟んだダブルへテロ構造を採用することにより、高輝度の素子を実現できる。このようなＡｌＧａＩｎＰダブルへテロ構造は、ＡｌＧａＩｎＰ混晶がＧａＡｓと格子整合することを利用して、ＧａＡｓ単結晶基板上にＡｌＧａＩｎＰ混晶からなる各層をエピタキシャル成長させることにより形成できる。そして、これを発光素子として利用する際には、通常、ＧａＡｓ単結晶基板をそのまま素子基板として利用することも多い。しかしながら、発光層部を構成するＡｌＧａＩｎＰ混晶はＧａＡｓよりもバンドギャップが大きいため、発光した光がＧａＡｓ基板に吸収されて十分な光取出し効率が得られにくい難点がある。   As a result of many years of progress in materials and element structures used in light-emitting elements such as light-emitting diodes and semiconductor lasers, the photoelectric conversion efficiency inside the elements is gradually approaching the theoretical limit. Therefore, when an element with higher luminance is to be obtained, the light extraction efficiency from the element is extremely important. For example, in a light emitting device having a light emitting layer portion formed of AlGaInP mixed crystal, a thin AlGaInP (or GaInP) active layer is sandwiched between an n-type AlGaInP cladding layer and a p-type AlGaInP cladding layer having a larger band gap. By adopting a sandwiched double hetero structure, a high-luminance element can be realized. Such an AlGaInP double heterostructure can be formed by epitaxially growing each layer of an AlGaInP mixed crystal on a GaAs single crystal substrate by utilizing the lattice matching of the AlGaInP mixed crystal with GaAs. When this is used as a light emitting element, a GaAs single crystal substrate is usually used as an element substrate as it is. However, since the AlGaInP mixed crystal constituting the light emitting layer has a larger band gap than GaAs, the emitted light is absorbed by the GaAs substrate, and it is difficult to obtain sufficient light extraction efficiency.

そこで、特許文献１には、成長用のＧａＡｓ基板を剥離する一方、補強用の素子基板（導電性を有するもの）を、反射用のＡｕ層を介して剥離面に貼り合わせる技術が開示されている。また、非特許文献１には、反射率の波長依存性がＡｕよりも小さいＡｌにて反射層を構成することにより、反射強度を高めるようにした発光素子が開示されている。該非特許文献１の素子構造においては、発光層部とシリコン基板からなる素子基板との間にＡｌ反射層が配置され、さらに、Ａｌ反射層とシリコン基板との間には、シリコン基板と発光層部との貼り合わせ接合を容易にするために、Ａｕ層を介在させている。具体的には、発光層部側に形成したＡｌ反射層を覆うようにＡｕ層を形成し、他方シリコン基板側にもＡｕ層を形成して、それらＡｕ層同士を密着させて貼り合わせを行なうようにしている。   Therefore, Patent Document 1 discloses a technique in which a growth GaAs substrate is peeled off while a reinforcing element substrate (having conductivity) is bonded to a peeled surface through a reflective Au layer. Yes. Non-Patent Document 1 discloses a light-emitting element in which the reflection intensity is increased by forming a reflective layer with Al whose wavelength dependency of reflectance is smaller than that of Au. In the element structure of Non-Patent Document 1, an Al reflective layer is disposed between a light emitting layer portion and an element substrate made of a silicon substrate, and further, a silicon substrate and a light emitting layer are disposed between the Al reflective layer and the silicon substrate. In order to facilitate the bonding and bonding with the part, an Au layer is interposed. Specifically, an Au layer is formed so as to cover the Al reflective layer formed on the light emitting layer side, and an Au layer is also formed on the other silicon substrate side, and the Au layers are adhered to each other and bonded together. I am doing so.

特許文献１及び非特許文献１は、いずれも発光素子の光取出し効率の向上を図る観点において、光吸収性のＧａＡｓ基板は「百害あって一利なし」の技術思想に立脚しており、ＧａＡｓ基板は完全除去することに主眼が置かれている。シリコン基板などと比較すればかなり高価な成長用のＧａＡｓ基板を、何ら利用の考慮もなく全て除去し、別に補強用の基板を設けるというのは、光取出効率を優先させるためとはいえ、いかにも無駄が多すぎるといえる。また、発光層部成長用のＧａＡｓ基板は、素子製造時に必要なハンドリングのための強度を担う役割も有するのであるが、これを除去すれば、ごく薄い発光層部のみでハンドリング等に耐えうる強度を到底確保できるはずもない。従って、上記文献では、ＧａＡｓ基板を発光層部から除去したあと、Ａｕ層を介してシリコン基板を発光層部に貼り合せ、このシリコン基板をＧａＡｓ基板に代わる補強用の基板として利用するのであるが、新たな基板の貼り合わせ工程が必要となる。   Both Patent Document 1 and Non-Patent Document 1 are based on the technical idea that a light-absorbing GaAs substrate is “no harm and no advantage” in terms of improving the light extraction efficiency of the light-emitting element. The focus is on removing the substrate completely. Compared with silicon substrates, etc., removing all GaAs substrates for growth, which are considerably expensive without considering any use, and providing a separate substrate for reinforcement, even though priority is given to light extraction efficiency, It can be said that there is too much waste. In addition, the GaAs substrate for the growth of the light emitting layer also has a role of handling strength necessary for manufacturing the device, but if this is removed, the strength that can withstand handling etc. with only a very thin light emitting layer portion. There is no way we can ensure it. Therefore, in the above document, after removing the GaAs substrate from the light emitting layer portion, the silicon substrate is bonded to the light emitting layer portion through the Au layer, and this silicon substrate is used as a reinforcing substrate in place of the GaAs substrate. A new substrate bonding process is required.

本発明の課題は、これまで全面的に除去されていた発光層部成長用のＧａＡｓ基板を、機能的素子構成要素として有効利用することができ、しかも、発光光束の外部への取出効率も大幅に高めることができる発光素子の製造方法を提供することにある。 The object of the present invention is to effectively use the GaAs substrate for growing the light emitting layer part, which has been completely removed so far, as a functional element component, and also to greatly take out the luminous flux to the outside. Another object of the present invention is to provide a method for manufacturing a light-emitting element that can be improved.

課題を解決するための手段及び発明の効果Means for Solving the Problems and Effects of the Invention

本発明の発光素子の製造方法は、上記の課題を解決するために、
ＡｌＧａＩｎＰからなる発光層部を有した主化合物半導体層をエピタキシャル成長によってＧａＡｓ基板の第一主表面上に形成し、
ＧａＡｓ基板の一部が主化合物半導体層上の残留基板部となり、主化合物半導体層のＧａＡｓ基板側の一部の面が露出するように、ＧａＡｓ基板の一部を切り欠いて切欠き部を形成し、
ＧａＡｓ基板の一部を切り欠いた結果として形成される残留基板部の表面であって、ＧａＡｓ基板の第一主表面の反対側に位置する第二主表面に、発光層部へ発光駆動電圧を印加するための光取出側電極を形成するとともに、
主化合物半導体層の一部の面が露出する切欠き部の底面を、発光層部を有した主化合物半導体層からの主光取出面として利用することを特徴とする。
なお、素子の「光取出面」とは、発光光束が外部に取出可能となっている素子表面のことであり、「主光取出面」とは、化合物半導体層の第一主表面又は第二主表面に形成される光取出面のことをいう。また、上記主光取出面以外にも、化合物半導体層に含まれる後述の透明厚膜半導体層あるいは補助電流拡散層の側面などが光取出面を構成可能である。また、「主化合物半導体層」は、発光層部を含む化合物半導体の積層体を、切欠き部底面を含む平面にて厚さ方向に二分したとき、発光層部を含んでいる部分のことをいう。 In order to solve the above problems, a method for manufacturing a light emitting device of the present invention is as follows.
A main compound semiconductor layer having a light emitting layer portion made of AlGaInP is formed on the first main surface of the GaAs substrate by epitaxial growth,
A part of the GaAs substrate is notched so that a part of the GaAs substrate becomes a residual substrate part on the main compound semiconductor layer and a part of the main compound semiconductor layer on the GaAs substrate side is exposed. And
A light emission driving voltage is applied to the light emitting layer portion on the surface of the remaining substrate portion formed as a result of cutting out a part of the GaAs substrate, which is opposite to the first main surface of the GaAs substrate. While forming the light extraction side electrode for applying,
The bottom surface of the notch portion at which a part of the surface of the main compound semiconductor layer is exposed is used as a main light extraction surface from the main compound semiconductor layer having the light emitting layer portion.
The “light extraction surface” of the element refers to the surface of the element from which the emitted light beam can be extracted to the outside, and the “main light extraction surface” refers to the first main surface or the second main surface of the compound semiconductor layer. A light extraction surface formed on the main surface. In addition to the main light extraction surface, a transparent thick film semiconductor layer described later included in the compound semiconductor layer or a side surface of the auxiliary current diffusion layer can constitute the light extraction surface. In addition, the “main compound semiconductor layer” refers to a portion including the light emitting layer portion when the compound semiconductor stack including the light emitting layer portion is bisected in the thickness direction by a plane including the bottom surface of the cutout portion. Say.

特許文献１及び非特許文献１においては、発光層部のＧａＡｓ基板に面しているのと反対側の主表面（第一主表面）を主光取出面とし、ＧａＡｓ基板が除去された第二主表面側は金属層の配置により反射面として利用する、というのが基本的な考え方である。この場合、反射面積をなるべく大きくしたほうが光取出効率の向上には好都合であるから、ＧａＡｓ基板を一部でも残せばその分だけ反射面積は減少し、しかもそれが光吸収性であることを考えれば、基板の一部を敢えて残すような思想が生まれるはずもなかった。   In Patent Document 1 and Non-Patent Document 1, the main surface (first main surface) opposite to the light emitting layer portion facing the GaAs substrate is the main light extraction surface, and the second GaAs substrate is removed. The basic idea is that the main surface side is used as a reflecting surface by arranging a metal layer. In this case, it is convenient to increase the reflection area as much as possible to improve the light extraction efficiency. Therefore, if a part of the GaAs substrate is left, the reflection area is reduced by that amount, and it is considered that it is light absorbing. In this case, the idea of leaving a part of the board was not born.

本発明者はそこで発想を転換し、発光層部を含む主化合物半導体層の、ＧａＡｓ基板に面している第二主表面を主光取出面として利用する構成について検討した。光吸収部として作用する成長用のＧａＡｓ基板は、これを除去することで発光層部からの発光光束を取り出すことができる。ただし、そのＧａＡｓ基板の全てを除去するのではなく、ＧａＡｓ基板の一部が主化合物半導体層の第二主表面上への残留基板部となるように、その一部のみを切り欠くようにすれば、形成される切欠き部の底面を主光取出面として利用することができ、該部分へ向かう発光光束も外部へ取り出すことが可能となるので、光取出し効率を高めることができる。また、主化合物半導体層の第二主表面側には、発光駆動用の光取出側電極を形成する必要がある。該光取出側電極の直下領域では、ここに向かう発光光束が存在しても電極に遮られるため、いずれにしろ直接光としては取り出すことができない。そこで、本発明者は、残留基板部の第二主表面を該光取出側電極の形成領域として活用すれば、該残留基板部による光吸収作用を、光取出側電極による光遮断作用により埋没させることができ、その実害を大幅に軽減できることを見出して、本発明を完成させるに至ったのである。これにより、ＧａＡｓからなる残留基板部は、光吸収の影響がそれほど顕著化することがなくなり、ＧａＡｓ特有の物性をむしろ積極利用して、素子構成要素として有効活用するようなことも可能となる。   Therefore, the present inventor changed the way of thinking and examined a configuration in which the second main surface facing the GaAs substrate of the main compound semiconductor layer including the light emitting layer portion was used as the main light extraction surface. The growth GaAs substrate acting as the light absorbing portion can be removed to take out the luminous flux from the light emitting layer portion. However, instead of removing all of the GaAs substrate, only a part of the GaAs substrate is cut out so that a part of the GaAs substrate becomes a residual substrate portion on the second main surface of the main compound semiconductor layer. In this case, the bottom surface of the formed notch can be used as the main light extraction surface, and the emitted light flux toward the portion can be extracted to the outside, so that the light extraction efficiency can be increased. Further, it is necessary to form a light extraction side electrode for driving light emission on the second main surface side of the main compound semiconductor layer. In the region immediately below the light extraction side electrode, even if there is a luminous flux directed toward this area, it is blocked by the electrode, so in any case it cannot be extracted as direct light. In view of this, when the present inventor uses the second main surface of the residual substrate portion as the formation region of the light extraction side electrode, the light absorption effect of the residual substrate portion is buried by the light blocking effect of the light extraction side electrode. The present invention has been completed by finding that the actual damage can be greatly reduced. As a result, the effect of light absorption on the residual substrate portion made of GaAs does not become so significant, and it is possible to effectively utilize the physical properties peculiar to GaAs and effectively use them as element components.

上記の光取出側電極には通電用ワイヤを接合することができる。発光層部と光取出側電極との間に介在する化合物半導体層（例えば後述の補助電流拡散層）の厚さが小さい場合（特に、２μｍ以下の場合）、電極ワイヤを光取出側電極へ接合しようとすると、接合による損傷の影響が発光層部に及びやすく、不良を生じやすい欠点がある。例えばワイヤの接合を、超音波溶接や、これにさらに熱を付加するサーモソニックボンディングにより行なう場合、ボンディングパッド直下の化合物半導体層には、超音波や加熱（さらには加圧）による衝撃応力が集中し、転位などの結晶欠陥が損傷として導入される。その損傷領域が発光層部に及んだ場合、具体的には次のような不具合につながる。
(1)発光輝度の直接的な低下。結晶欠陥による非発光遷移過程の増加が原因として考えられる。
(2)損傷領域が発光層部に及ぶと素子ライフが低下することにつながる。転位の形成された発光層に通電を継続すると、転位に電流が集中して転位の増殖が起こりやすくなり、発光輝度の経時的な劣化を引き起こす。 An energizing wire can be joined to the light extraction side electrode. When the thickness of the compound semiconductor layer (for example, an auxiliary current diffusion layer described later) interposed between the light emitting layer and the light extraction side electrode is small (especially in the case of 2 μm or less), the electrode wire is bonded to the light extraction side electrode. If it is going to be, the influence of the damage by joining tends to reach the light emitting layer part, and there exists a fault which tends to produce a defect. For example, when wire bonding is performed by ultrasonic welding or thermosonic bonding that adds heat to this, impact stress due to ultrasonic waves or heating (and pressurization) is concentrated on the compound semiconductor layer directly under the bonding pad. Then, crystal defects such as dislocations are introduced as damage. When the damaged area reaches the light emitting layer portion, specifically, the following problems are caused.
(1) Direct decrease in emission luminance. This is thought to be due to an increase in the non-luminescent transition process due to crystal defects.
(2) If the damaged region reaches the light emitting layer portion, the device life is reduced. If energization is continued in the light emitting layer in which dislocations are formed, current concentrates on the dislocations, and dislocations are likely to proliferate, which causes deterioration in emission luminance over time.

また、光取出側電極の直下に位置する化合物半導体層（例えば後述の補助電流拡散層）にドーパントの濃度不均一部が形成されていると、損傷領域が発光層部にまでは及ばなくとも、上記濃度不均一部に大きな抉れが生じ、不良を引き起こす惧れがある。   Further, if a dopant concentration nonuniformity portion is formed in a compound semiconductor layer (for example, an auxiliary current diffusion layer described later) located immediately below the light extraction side electrode, even if the damaged region does not reach the light emitting layer portion, There is a possibility that a large wrinkle occurs in the non-uniform density portion, causing a defect.

しかし、光取出側電極の直下に残留基板部が存在していれば、接合時に損傷領域が仮に生じても、その大半は残留基板部内部に留まり、発光層部や電流拡散層等にその影響が及びにくくなり、不良低減を図ることができる。この効果を顕著に達成するには、残留基板部の厚さを３μｍ以上確保しておくことが望ましい。   However, if there is a residual substrate portion directly under the light extraction side electrode, even if a damaged region occurs during bonding, most of it remains inside the residual substrate portion, and this affects the light emitting layer portion, current diffusion layer, etc. This makes it difficult to reduce defects. In order to achieve this effect remarkably, it is desirable to secure a thickness of the residual substrate portion of 3 μm or more.

主化合物半導体層は、残留基板部と発光層部との間に位置する補助電流拡散層を有するものとして形成できる。これにより、切欠き部底面部への電流拡散効果が高められ、該切欠き部に対応した主光取出面領域への分配電流が増加するので、該主光取出面から取り出される発光光束をより増加することができる。また、光取出側電極に通電用ワイヤを接合する場合は、この補助電流拡散層は前述の残留基板部とともに、接合による損傷の影響が発光層部へ及ぶことを抑制するクッション層としての機能も果たしうる。なお、発光層部が、後述のＡｌＧａＩｎＰ等により、残留基板部に近い側から第一導電型クラッド層、活性層及び第二導電型クラッド層がこの順序で積層されたダブルへテロ構造を有するものとして構成される場合、該補助電流拡散層は、第一導電型クラッド層よりも有効キャリア濃度を高めておくことで、電流拡散効果をより顕著なものとすることができる。また、補助電流拡散層を設ける代わりに、第一導電型クラッド層が第二導電型クラッド層よりも厚く形成することもできる。該構成では、第一導電型クラッド層の第二主表面側の部分（主光取出面側の表層部）が電流拡散層の役割を果たしていると見ることもできる。そして、該部分の有効キャリア濃度を残余の部分よりも高めておくことで、電流拡散効果をより顕著なものとすることができる。   The main compound semiconductor layer can be formed as having an auxiliary current diffusion layer located between the residual substrate portion and the light emitting layer portion. This enhances the current diffusion effect to the bottom surface of the notch and increases the distribution current to the main light extraction surface area corresponding to the notch, so that the emitted light flux extracted from the main light extraction surface is more Can be increased. In addition, when a current-carrying wire is bonded to the light extraction side electrode, this auxiliary current diffusion layer functions as a cushion layer that suppresses the influence of damage caused by bonding to the light-emitting layer portion together with the above-described residual substrate portion. It can be done. In addition, the light emitting layer portion has a double hetero structure in which the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer are laminated in this order from the side close to the residual substrate portion by AlGaInP or the like described later. In this case, the auxiliary current diffusion layer can make the current diffusion effect more remarkable by increasing the effective carrier concentration than the first conductivity type cladding layer. Further, instead of providing the auxiliary current diffusion layer, the first conductivity type cladding layer can be formed thicker than the second conductivity type cladding layer. In this configuration, it can also be considered that a portion on the second main surface side of the first conductivity type cladding layer (a surface layer portion on the main light extraction surface side) plays a role of a current diffusion layer. Further, by increasing the effective carrier concentration of the portion higher than that of the remaining portion, the current spreading effect can be made more remarkable.

次に、光取出側電極の直下領域では、発光層部をいくら光らせても発光光束の多くが光取出側電極に遮られ、外部に効率よく取り出すことができない。従って、光取出側電極の直下領域にて通電電流をなるべく少なくすることが望ましくなる。具体的には次のような構成を採用できる。すなわち、光取出側電極を、残留基板部を覆う主電極と、該主電極に導通するとともに切欠き部の底面のうち残留基板部の周囲に位置する一部領域を覆う副電極とを有するものとして形成する。また、接触抵抗低減用の接合合金化層を副電極と接する切欠き部の底面領域に形成する。これにより、光取出側電極は残留基板部外の接合合金化層を介して化合物半導体層と導通する。そして、該構造を前提として、第一の態様では、残留基板部を、発光層部にてｐ−ｎ接合を形成するｐ型層部とｎ型層部とのうち、該残留基板部に近い側のものと逆の導電型を有するものとして構成する。また第二の態様では、残留基板部を、発光層部にてｐ−ｎ接合を形成するｐ型層部とｎ型層部とのうち、該残留基板部に近い側のものと同一の導電型を有するものとし、かつ、発光層部と残留基板部との間に、残留基板部を被覆する形で、該残留基板部と逆の導電型を有する化合物半導体からなる反転層部を介挿する。いずれの構成においても、残留基板部と発光層部との間には、素子に発光駆動電圧（つまり、発光層部をなすｐ−ｎ接合部に対し順方向となる電圧）を印加したとき、逆バイアス状態となる反転ｐ−ｎ接合部が介在することになるので、発光光束が遮光されやすい光取出側電極直下領域への分配電流（すなわち発光）が抑制され、光取出し効率のさらなる向上に寄与する。   Next, in the region immediately below the light extraction side electrode, no matter how much the light emitting layer portion is illuminated, most of the luminous flux is blocked by the light extraction side electrode and cannot be efficiently extracted outside. Therefore, it is desirable to reduce the energization current as much as possible in the region immediately below the light extraction side electrode. Specifically, the following configuration can be adopted. That is, the light extraction side electrode has a main electrode that covers the residual substrate portion, and a sub-electrode that is connected to the main electrode and covers a partial region of the bottom surface of the notch portion that is located around the residual substrate portion Form as. Further, a bonding alloying layer for reducing contact resistance is formed in the bottom surface region of the notch that is in contact with the sub electrode. Thereby, the light extraction side electrode is electrically connected to the compound semiconductor layer through the bonding alloyed layer outside the residual substrate portion. And on the premise of this structure, in the first aspect, the residual substrate portion is close to the residual substrate portion among the p-type layer portion and the n-type layer portion that form a pn junction in the light emitting layer portion. It is configured to have a conductivity type opposite to that of the side. In the second embodiment, the residual substrate portion has the same conductivity as that of the p-type layer portion and the n-type layer portion that form a pn junction in the light emitting layer portion, closer to the residual substrate portion. An inversion layer portion made of a compound semiconductor having a conductivity type opposite to that of the residual substrate portion is interposed between the light emitting layer portion and the residual substrate portion so as to cover the residual substrate portion. To do. In any configuration, when a light emission driving voltage (that is, a voltage in a forward direction with respect to a pn junction portion forming the light emitting layer portion) is applied between the residual substrate portion and the light emitting layer portion, Since the reverse pn junction that is in the reverse bias state is interposed, the distribution current (that is, light emission) to the region immediately below the light extraction side electrode where the luminous flux is likely to be blocked is suppressed, and the light extraction efficiency is further improved. Contribute.

なお、上記のいずれの構成においても、光取出面側電極と残留基板部との間に、両者の接触抵抗を低減するための接合合金化層を形成するか否かは任意に選択できる。すなわち、いずれの構成においても、上記の反転ｐ−ｎ接合部が介在するため、光取出面側電極と残留基板部との間が接合合金化層を介して導通していても、上記の反転ｐ−ｎ接合部により光取出面側電極直下領域への電流は遮断できる。   In any of the above configurations, whether or not to form a bonding alloyed layer for reducing the contact resistance between the light extraction surface side electrode and the residual substrate portion can be arbitrarily selected. That is, in any configuration, since the above-described inversion pn junction is interposed, even if the light extraction surface side electrode and the residual substrate portion are electrically connected through the bonding alloying layer, the inversion is performed. The current to the region immediately below the light extraction surface side electrode can be cut off by the pn junction.

また、光取出側電極が、残留基板部を覆う主電極と、該主電極に導通するとともに切欠き部の底面のうち残留基板部の周囲に位置する一部領域を覆う副電極とを有し、接触抵抗低減用の接合合金化層が、主電極と接する残留基板部には形成されず、副電極と接する切欠き部の底面領域には形成される構成とすることもできる。光取出側電極に上記のような副電極を設け、光取出側電極と主化合物半導体層との電気的な接続を、残留基板部外の切欠部底面に形成された接合合金化層との間でのみ確保することで、発光駆動時における残留基板部での電流密度を効果的に低減できる（この場合、残留基板部と主化合物半導体層との間に前述のような反転ｐ−ｎ接合部が特に形成されていなくともよい）。また、残留基板部を主電極で覆う場合、その主電極は面積を比較的大きくできるので、通電用ワイヤの接続も容易である。そして主電極が、残留基板部の周側面を覆う部分にて副電極と接続されると、通電用ワイヤから接合合金化層への給電部としての役割を果たす。通電用ワイヤの接合時に、残留基板部が損傷吸収効果をもたらすことは既に説明した通りである。   Further, the light extraction side electrode has a main electrode that covers the residual substrate portion, and a sub-electrode that is connected to the main electrode and covers a part of the bottom surface of the notch portion that is located around the residual substrate portion. The bonding alloying layer for reducing the contact resistance may not be formed on the remaining substrate portion in contact with the main electrode, but may be formed in the bottom surface region of the notch portion in contact with the sub electrode. The sub electrode as described above is provided on the light extraction side electrode, and the electrical connection between the light extraction side electrode and the main compound semiconductor layer is made between the bonding alloying layer formed on the bottom surface of the notch portion outside the residual substrate portion. By ensuring only in the above, the current density in the residual substrate portion during light emission driving can be effectively reduced (in this case, the inversion pn junction as described above between the residual substrate portion and the main compound semiconductor layer). May not be formed in particular). Further, when the residual substrate portion is covered with the main electrode, the main electrode can have a relatively large area, and therefore the connection of the energization wire is easy. And if a main electrode is connected with a subelectrode in the part which covers the surrounding side surface of a residual board | substrate part, it will play the role of the electric power feeding part from a wire for electricity supply to a joining alloying layer. As described above, the residual substrate portion provides a damage absorbing effect when the energizing wire is joined.

例えば、残留基板部の第二主表面には、光取出側電極との接触抵抗を減ずるための接合合金化層を形成することもできる。ＧａＡｓはバンドギャップエネルギーが小さく耐酸化性にも優れるので、他のＩＩＩ−Ｖ族化合物半導体（例えば発光層部を形成するＡｌＧａＩｎＰや、電流拡散層を形成するＧａＰ、ＡｌＧａＡｓ、ＧａＡｓＰあるいはＩｎＧａＰなど）と比較して、金属電極との間で格段にオーミックコンタクトを取りやすい利点がある。従って、該ＧａＡｓからなる残留基板部を接合合金化層の形成領域として利用することで、素子の光取出側電極との接触抵抗を効果的に低減でき、ひいては素子の順方向電圧を低減できるようになる。   For example, a bonding alloying layer for reducing the contact resistance with the light extraction side electrode can be formed on the second main surface of the residual substrate portion. Since GaAs has a small band gap energy and excellent oxidation resistance, other III-V group compound semiconductors (for example, AlGaInP forming a light emitting layer portion, GaP, AlGaAs, GaAsP, or InGaP forming a current diffusion layer) and the like In comparison, there is an advantage that an ohmic contact can be easily made with the metal electrode. Therefore, by using the residual substrate portion made of GaAs as the formation region of the bonding alloying layer, the contact resistance with the light extraction side electrode of the element can be effectively reduced, and consequently the forward voltage of the element can be reduced. become.

光取出側電極は、具体的には、残留基板部の第二主表面及び周側面とを覆う主電極と、切欠き部の底面のうち残留基板部の周側面に連なる一部領域を覆う副電極とを有するものとして形成できる。この場合、残留基板部の第二主表面の面積が第一主表面の面積よりも小となるように、該残留基板部の周側面を傾斜面として形成し、光取出側電極をなす主電極と副電極とを一体の金属膜として形成することが望ましい。このようにすると、蒸着やスパッタ等の指向性の強い成膜法により金属膜（光取出側電極）を形成する場合、残留基板部の周側面を上記のような傾斜面としておくことで、該周側面にも金属膜を十分な厚さにて形成することができ、主電極と副電極との電気的導通をより確実なものとすることができる。   Specifically, the light extraction side electrode includes a main electrode that covers the second main surface and the peripheral side surface of the residual substrate portion, and a sub-cover that covers a part of the bottom surface of the notch portion that is continuous with the peripheral side surface of the residual substrate portion. It can form as what has an electrode. In this case, the main electrode forming the light extraction side electrode is formed by forming the peripheral side surface of the residual substrate portion as an inclined surface so that the area of the second main surface of the residual substrate portion is smaller than the area of the first main surface. It is desirable to form the sub-electrode and the sub-electrode as an integral metal film. In this case, when a metal film (light extraction side electrode) is formed by a highly directional film forming method such as vapor deposition or sputtering, the peripheral side surface of the residual substrate portion is set as the inclined surface as described above. A metal film can be formed on the peripheral side surface with a sufficient thickness, and the electrical continuity between the main electrode and the sub electrode can be made more reliable.

なお、光取出側電極とは異極性となる側の電極部（以下、異極性電極部ともいう）は、主化合物半導体層の第一主表面側に形成することができる。この構成によると、光取出側電極から異極性電極部に至る発光通電経路が主化合物半導体の積層方向に主体的に形成され、順方向電圧の低減に有効である。また、主光取出面が形成される主化合物半導体の第二主表面側に異極性電極部が形成されないので、該第二主表面に主光取出面を大きく確保でき、ひいては光取出し効率の向上に寄与する。   In addition, the electrode part (henceforth a different polarity electrode part) by the side which becomes a different polarity from the light extraction side electrode can be formed in the 1st main surface side of the main compound semiconductor layer. According to this configuration, the light-emission energization path from the light extraction side electrode to the heteropolar electrode portion is mainly formed in the stacking direction of the main compound semiconductor, which is effective in reducing the forward voltage. In addition, since the different polarity electrode portion is not formed on the second main surface side of the main compound semiconductor where the main light extraction surface is formed, a large main light extraction surface can be secured on the second main surface, and thus the light extraction efficiency is improved. Contribute to.

発光層部が、残留基板部に近い側から第一導電型クラッド層、活性層及び第二導電型クラッド層がこの順序で積層されたダブルへテロ構造を有する場合、主化合物半導体層の第二主表面側から少なくとも活性層の第一主表面までの区間を、第二主表面の一部領域において切り欠くことにより電極用切欠き部を形成し、その電極用切欠き部の底面に異極性電極（光取出側電極とは異極性となる側の電極）を配置することもできる（以下、同面側電極取出構造ともいう）。この構成は、主化合物半導体の第二主表面側の一部が異極性電極の形成スペースとして消費される難点はあるが、発光駆動用の電極を同一主表面側に形成できる利点を生ずる。   When the light emitting layer portion has a double heterostructure in which the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer are laminated in this order from the side close to the residual substrate portion, A section from the main surface side to at least the first main surface of the active layer is cut out in a part of the second main surface to form a notch for the electrode, and the bottom surface of the notch for the electrode has a different polarity. An electrode (an electrode having a polarity different from that of the light extraction side electrode) may be disposed (hereinafter also referred to as a same-surface side electrode extraction structure). This configuration has the disadvantage that a part of the second main surface side of the main compound semiconductor is consumed as the space for forming the different polarity electrode, but has the advantage that the electrode for driving light emission can be formed on the same main surface side.

例えば、ＩＩＩ族窒化物系の青色発光素子は、ＩＩＩ族窒化物のエピタキシャル成長用の基板としてサファイア基板を使用するが、サファイア基板は絶縁体であり、しかもエッチング等による除去も困難なため、発光層部の下に該サファイア基板を残した形で素子化されるケースが多い。この場合、発光層部とサファイア基板との間に導電性の電極取出層を形成し、発光層部の一部を切り欠いて電極取出層を露出させ、ここに異極性電極を形成することが必須となる。こうした窒化物系青色発光素子のように、製造工程上、同面側電極取出構造を取らざるを得ない発光素子と、本発明の製造方法による発光素子とを組み合わせて一体の発光モジュールを構成する場合に、本発明の製造方法による発光素子に敢えて上記同面側電極取出構造を採用すれば、該別種の発光素子の光取出側電極又は異極性電極のうち、接地側となる電極を共通結線することができ、ワイヤボンディング等のアセンブリ工程を簡略化できる利点がある。また、ＲＧＢフルカラー発光素子モジュールのように、この種の発光素子を３個以上組み合わせてモジュール化する場合、それらの素子の接地側の電極電位は全て等しくなるため、これら電極をワイヤにより順次連結し、その末端に位置する電極のみを、素子チップを接着するステージ側の端子に接続する構成が可能となり、ステージ側端子の面積縮小、ひいてはモジュールの小型化にも寄与する。 For example, a group III nitride blue light emitting device uses a sapphire substrate as a substrate for epitaxial growth of group III nitride, but the sapphire substrate is an insulator and is difficult to remove by etching or the like. In many cases, the sapphire substrate is left under the part to form an element. In this case, a conductive electrode extraction layer is formed between the light emitting layer portion and the sapphire substrate, a part of the light emitting layer portion is notched to expose the electrode extraction layer, and a different polarity electrode is formed here. Required. Like such a nitride-based blue light-emitting element, a light-emitting element that must have the same-surface-side electrode extraction structure in the manufacturing process and a light-emitting element according to the manufacturing method of the present invention are combined to form an integrated light-emitting module. In this case, if the same-surface-side electrode extraction structure is used for the light-emitting element according to the manufacturing method of the present invention, the ground-side electrode of the light-extraction-side electrode or the different-polarity electrode of the different type of light-emitting element is commonly connected. There is an advantage that an assembly process such as wire bonding can be simplified. In addition, when three or more light emitting elements of this type are combined to form a module, such as an RGB full color light emitting element module, the electrode potentials on the ground side of these elements are all equal, so these electrodes are sequentially connected by wires. Thus, it is possible to connect only the electrode located at the end of the terminal to the terminal on the stage side to which the element chip is bonded, which contributes to the reduction of the area of the stage side terminal and the miniaturization of the module.

本発明の製造方法による発光素子においては、発光層部の第一主表面側に、発光層部からの発光光束のピーク波長に相当する光量子エネルギーよりも大きなバンドギャップエネルギーを有するＩＩＩ−Ｖ族化合物半導体からなる厚さ１０μｍ以上の透明厚膜半導体層を設けることができる。このような透明厚膜半導体層を設けることで、薄い発光層部に対し面内方向により均一に発光駆動電流を供給でき、該透明厚膜半導体層の側面からの取出光束も増加するので、素子全体としての光取出し効率を大幅に高めることができる。また、透明厚膜半導体層が素子全体の補強効果を高め、素子製造時のハンドリングがより容易になる。さらに、該透明厚膜半導体層の側で発光素子を、金属ペースト層を介して金属ステージ上に接着する構成とする場合、接着時に金属ペースト層がつぶれて変形して主化合物半導体層の周側面側に這い上がることがある。この這い上がった金属ペーストが発光層部のｐ−ｎ接合部側面に達すると、ｐ−ｎ接合部が短絡するなどの不具合を生ずることがある。しかし、上記のように、この接着側に設ける透明厚膜半導体層の厚さを１０μｍ以上（上限値に制限はないが、例えば２００μｍ以下である）に確保すれば、仮に金属ペーストが這い上がってもｐ−ｎ接合部にまで達する確率は小さくなり、上記短絡等の不具合を効果的に防止できる。 In the light emitting device according to the manufacturing method of the present invention, a III-V group compound having a band gap energy larger than the photon energy corresponding to the peak wavelength of the luminous flux from the light emitting layer portion on the first main surface side of the light emitting layer portion. A transparent thick film semiconductor layer made of a semiconductor and having a thickness of 10 μm or more can be provided. By providing such a transparent thick film semiconductor layer, the light emission drive current can be supplied uniformly to the thin light emitting layer portion in the in-plane direction, and the extracted light flux from the side surface of the transparent thick film semiconductor layer also increases. The light extraction efficiency as a whole can be greatly increased. Further, the transparent thick film semiconductor layer enhances the reinforcing effect of the entire device, and handling during device manufacture becomes easier. Further, when the light-emitting element is bonded on the metal stage via the metal paste layer on the transparent thick film semiconductor layer side, the metal paste layer is crushed and deformed during bonding, and the peripheral side surface of the main compound semiconductor layer May crawl to the side. When this scooped up metal paste reaches the pn junction side surface of the light emitting layer, there may be a problem such as a short circuit of the pn junction. However, as described above, if the thickness of the transparent thick film semiconductor layer provided on the bonding side is secured to 10 μm or more (the upper limit is not limited, but is, for example, 200 μm or less), the metal paste will rise. However, the probability of reaching the pn junction is reduced, and the above short circuit and other problems can be effectively prevented.

特に、上記の同面側電極取出構造を有する発光素子の場合、発光層部が接する層が導電性の透明厚膜半導体層であるから、これを上記の異極性電極を配置するための電極取出層として活用できる。透明厚膜半導体層は層厚が大きいため（１０μｍ以上）、シート抵抗の低減が容易であり、素子の順方向電圧の増加も招きにくい。さらに、基板に相当する部分が上記のように導電性の透明厚膜半導体層にて構成されていることで、該透明厚膜半導体層が静電気の放電路として機能するので、発光層部の帯電が軽減できる。
※「接地」と「カソード端子」は電気的に一致している必要はありません。中の説明でも書きましたが、直流電源の正極（つまりアノード）を接地し、負極（カソード）電圧をコントロールすることもできます。しかし、一般的には電源は負極を接地することが多いです。 In particular, in the case of a light-emitting element having the above-described same-surface electrode extraction structure, the layer in contact with the light-emitting layer portion is a conductive transparent thick film semiconductor layer. Can be used as a layer. Since the transparent thick film semiconductor layer has a large thickness (10 μm or more), it is easy to reduce the sheet resistance and hardly increase the forward voltage of the device. Furthermore, since the portion corresponding to the substrate is composed of the conductive transparent thick film semiconductor layer as described above, the transparent thick film semiconductor layer functions as an electrostatic discharge path. Can be reduced.
* “Grounding” and “Cathode terminal” do not need to match electrically. As described in the explanation above, you can also control the negative (cathode) voltage by grounding the positive electrode (that is, the anode) of the DC power supply. However, in general, the power supply often grounds the negative electrode.

また、主化合物半導体層は、透明厚膜半導体層よりも薄い化合物半導体層よりなる補助電流拡散層を有するものとして構成できる。
ただし、上記構成では、発光層部の第一主表面側に設ける補助電流拡散の厚さは小さくなるので、電流拡散効果は透明厚膜半導体層よりも劣る。そこで、これを補うために光取出側電極を、残留基板部の第二主表面及び周側面とを覆う主電極と、切欠き部の底面をなす補助電流拡散層の第二主表面の一部領域を覆うとともに、主電極の外周縁から延出する線状の副電極とを有するものとして構成することが有効である。上記のような副電極を設けることで、駆動電圧を印加した際に、主光取出面内の電界分布の偏りを軽減することができ、主光取出面全体に、より一様に電圧印加することができるので、電流拡散効果を高めることがでできる。また、主電極の直下に位置する残留基板部を前述のごとく電流阻止層として機能させれば、主電極の直下に向かう電流を遮断でき、主光取出面をなす主電極の背景領域への電流分配量を増加できるので、光取出し効率を高めることができる。この場合、前述のごとく、残留基板部の第二主表面の面積が第一主表面の面積よりも小となるように、該残留基板部の周側面が傾斜面として形成し、光取出側電極をなす主電極と副電極を一体の金属膜として形成すれば、主電極と副電極との電気的導通をより確実なものとすることができる。 The main compound semiconductor layer can be configured to have an auxiliary current diffusion layer made of a compound semiconductor layer thinner than the transparent thick film semiconductor layer.
However, in the above configuration, since the thickness of the auxiliary current diffusion provided on the first main surface side of the light emitting layer portion is small, the current diffusion effect is inferior to that of the transparent thick film semiconductor layer. Therefore, in order to compensate for this, the light extraction side electrode, the main electrode that covers the second main surface and the peripheral side surface of the residual substrate portion, and a part of the second main surface of the auxiliary current diffusion layer that forms the bottom surface of the notch portion It is effective to cover the region and have a linear sub-electrode extending from the outer peripheral edge of the main electrode. By providing the sub-electrode as described above, the bias of the electric field distribution in the main light extraction surface can be reduced when a drive voltage is applied, and the voltage is applied more uniformly across the main light extraction surface. Therefore, the current spreading effect can be enhanced. In addition, if the residual substrate portion located immediately below the main electrode functions as a current blocking layer as described above, the current flowing directly below the main electrode can be cut off, and the current to the background area of the main electrode forming the main light extraction surface can be cut off. Since the amount of distribution can be increased, the light extraction efficiency can be increased. In this case, as described above, the peripheral side surface of the residual substrate portion is formed as an inclined surface so that the area of the second main surface of the residual substrate portion is smaller than the area of the first main surface, and the light extraction side electrode If the main electrode and the sub electrode forming the above are formed as an integral metal film, the electrical continuity between the main electrode and the sub electrode can be further ensured.

次に、本発明に関連する発光素子の構成として、
ＡｌＧａＩｎＰからなる発光層部を有した主化合物半導体層をＧａＡｓ基板の第一主表面上にエピタキシャル成長し、ＧａＡｓ基板の一部が主化合物半導体層の第二主表面上への残留基板部となるように、該ＧａＡｓ基板の一部を切り欠いて切欠き部を形成し、該切欠きの結果として形成される残留基板部の第二主表面を覆うように、発光層部へ発光駆動電圧を印加するための第一電極部を形成する一方、
発光層部が、残留基板部に近い側から第一導電型クラッド層、活性層及び第二導電型クラッド層をこの順序で積層したダブルへテロ構造を有してなり、発光層部の第一主表面側には、発光層部からの発光光束のピーク波長に相当する光量子エネルギーよりも大きなバンドギャップエルギーを有するＩＩＩ−Ｖ族化合物半導体からなる透明半導体層が形成されてなり、さらに、主化合物半導体層の第二主表面側から少なくとも活性層の第一主表面までの区間を、第二主表面の一部領域において切り欠くことにより電極用切欠き部を形成し、該電極用切欠き部の底面に第一電極部とは異極性となる第二電極部を配置するとともに、主化合物半導体層の第一主表面を主光取出面とすることが考えられる。 Next, as a configuration of the light emitting element related to the present invention,
A main compound semiconductor layer having a light emitting layer portion made of AlGaInP is epitaxially grown on the first main surface of the GaAs substrate so that a part of the GaAs substrate becomes a residual substrate portion on the second main surface of the main compound semiconductor layer. Next, a part of the GaAs substrate is notched to form a notch, and a light emission driving voltage is applied to the light emitting layer so as to cover the second main surface of the remaining substrate formed as a result of the notch. While forming a first electrode part for
The light emitting layer portion has a double hetero structure in which the first conductive type cladding layer, the active layer, and the second conductive type cladding layer are laminated in this order from the side close to the residual substrate portion, On the main surface side, a transparent semiconductor layer made of a III-V group compound semiconductor having a band gap energy larger than the photon energy corresponding to the peak wavelength of the luminous flux from the light emitting layer portion is formed. An electrode notch is formed by notching a section from the second main surface side of the semiconductor layer to at least the first main surface of the active layer in a partial region of the second main surface, and the electrode notch It is conceivable that a second electrode part having a polarity different from that of the first electrode part is disposed on the bottom surface of the first compound part and that the first main surface of the main compound semiconductor layer is a main light extraction surface.

この構成は、同面側電極取出構造を採用した本発明の製造方法による発光素子の上下を反転し、透明半導体層の第一主表面側に電極を形成せず、該第一主表面側から発光光束を主に取り出すようにしたものに相当する。同面側電極取出構造では、２つの電極を同一面側に形成する必要があるので、電極形成スペースも限られたものとなる。前述の本発明に関連する発光素子の構成によると、そのうちの第一電極部を残留基板部の第二主表面に形成する。ＧａＡｓはバンドギャップエネルギーが小さく耐酸化性にも優れるので、他のＩＩＩ−Ｖ族化合物半導体（例えば発光層部を形成するＡｌＧａＩｎＰや、電流拡散層を形成するＧａＰ、ＡｌＧａＡｓ、ＧａＡｓＰあるいはＩｎＧａＰなど）と比較して、金属電極との間で格段にオーミックコンタクトを取りやすい利点がある。従って、該ＧａＡｓからなる残留基板部を第一電極部の形成領域として利用することで、素子の第一電極部との接触抵抗を効果的に低減でき、素子の順方向電圧を低減できるようになる。また、第一電極部の形成領域以外にてＧａＡｓ基板を切り欠くことで、該領域でのＧａＡｓ基板による光吸収が抑制され、反射光等の形で外部に取り出すことで光取出し効率の向上に寄与する。そして、電極形成されない透明厚膜半導体層の第一主表面が主光取出面となるので、該主光取出面の面積が拡大され、光取出し効率が大幅に向上する。さらに、主化合物半導体層の第二主表面側に全ての電極が形成されるので、例えば素子チップを基板上に面実装する構成も容易となり、素子チップのアセンブリ工程の簡略化にも寄与する。 In this configuration, the light emitting element according to the manufacturing method of the present invention adopting the same side electrode extraction structure is turned upside down, no electrode is formed on the first main surface side of the transparent semiconductor layer, and the first main surface side is not formed. This corresponds to the one in which the luminous flux is mainly extracted. In the same surface side electrode extraction structure, since it is necessary to form two electrodes on the same surface side, an electrode forming space is limited. According to the structure of the light emitting element related to the present invention described above, the first electrode portion is formed on the second main surface of the residual substrate portion. Since GaAs has a small band gap energy and excellent oxidation resistance, other III-V group compound semiconductors (for example, AlGaInP forming a light emitting layer portion, GaP, AlGaAs, GaAsP, or InGaP forming a current diffusion layer) and the like In comparison, there is an advantage that an ohmic contact can be easily made with the metal electrode. Therefore, by utilizing the residual substrate portion made of GaAs as the formation region of the first electrode portion, the contact resistance with the first electrode portion of the element can be effectively reduced, and the forward voltage of the element can be reduced. Become. In addition, by cutting out the GaAs substrate outside the region where the first electrode is formed, light absorption by the GaAs substrate in this region is suppressed, and the light extraction efficiency is improved by taking it out in the form of reflected light or the like. Contribute. And since the 1st main surface of the transparent thick film semiconductor layer in which an electrode is not formed turns into a main light extraction surface, the area of this main light extraction surface is expanded and light extraction efficiency improves significantly. Furthermore, since all the electrodes are formed on the second main surface side of the main compound semiconductor layer, for example, a configuration in which the element chip is surface-mounted on the substrate is facilitated, which contributes to simplification of the assembly process of the element chip.

また、透明半導体層は、厚さ１０μｍ以上とすることで、薄い発光層部に対し面内方向により均一に発光駆動電流を供給でき、該透明厚膜半導体層の側面からの取出光束も増加するので、素子全体としての光取出し効率を大幅に高めることができる。また、発光層部に対する補強効果も高められ、素子製造時のハンドリングがより容易になる。   In addition, by setting the thickness of the transparent semiconductor layer to 10 μm or more, a light emission drive current can be supplied uniformly to the thin light emitting layer portion in the in-plane direction, and the extracted light flux from the side surface of the transparent thick film semiconductor layer also increases. Therefore, the light extraction efficiency of the entire device can be greatly increased. In addition, the reinforcing effect on the light emitting layer portion is enhanced, and handling during device manufacture becomes easier.

本発明の製造方法による発光素子及び前述の本発明に関連する発光素子の構成においては、発光層部と残留基板部との間に、屈折率の相違する半導体膜を複数積層することにより、ブラッグ反射を利用して光を反射させるＤＢＲ（Distributed Bragg Reflector）層を設けることもできる。ＤＢＲ層は残留基板部上にエピタキシャル成長可能であり、光吸収性の残留基板部の直下に位置する領域であっても、発光光束をＤＢＲ層により下向きに反射することができるので、発光光束が残留基板部への吸収により損失する不具合を解消することができる。反射された発光光束は残留基板部等に吸収されない限り、素子の別部分での反射等を利用して素子外へ取り出すことが可能になるので（吸収されれば素子外へ取り出せる可能性は本質的に喪失する）、素子の光取出し効率向上に寄与する。 In the structure of the light emitting device according to the manufacturing method of the present invention and the light emitting device related to the above-described present invention, a plurality of semiconductor films having different refractive indexes are laminated between the light emitting layer portion and the residual substrate portion, thereby A DBR (Distributed Bragg Reflector) layer that reflects light using reflection can also be provided. The DBR layer can be epitaxially grown on the residual substrate portion, and even in a region located directly below the light-absorbing residual substrate portion, the emitted light beam can be reflected downward by the DBR layer. The problem of loss due to absorption into the substrate portion can be solved. As long as the reflected luminous flux is not absorbed by the residual substrate, etc., it can be taken out of the element by using reflection at another part of the element. This contributes to improving the light extraction efficiency of the device.

なお、残留基板部は主化合物半導体層よりも厚さを小とすることにより、発光素子のチップ部分の低背化を図ることができ、ひいては素子の小型化に寄与する。また、残留基板部の厚みが減じられることで、切欠き部形成により通電断面積が減少しているにもかかわらず、素子の直列抵抗が増加しにくくなり、順方向電圧低減や発光効率向上に寄与する。   Note that the residual substrate portion can be made thinner than the main compound semiconductor layer, so that the height of the chip portion of the light emitting element can be reduced, thereby contributing to the miniaturization of the element. In addition, by reducing the thickness of the residual substrate, the series resistance of the element is less likely to increase despite the reduced cross-sectional area due to the formation of the notch, which reduces forward voltage and improves luminous efficiency. Contribute.

以下、本発明の実施形態を添付の図面を用いて説明する。本実施形態において各層及び基板の主表面は、図１のごとく、発光素子１００の主光取出面ＥＡを上側にした状態を正置状態として、該正置状態における図面下側に表れる面を第一主表面、上側に表れる面を第二主表面として統一的に記載する。従って、工程説明の都合上、上記正置状態に対し上下を反転した転置状態にて図示を行なう場合は、該図示における第一主表面と第二主表面の上下関係も反転する。   Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the present embodiment, as shown in FIG. 1, the main surface of each layer and the substrate is a state where the main light extraction surface EA of the light emitting element 100 is set to the upper side and the surface appearing on the lower side of the drawing in the normal state is the first side. One main surface and the surface appearing on the upper side are collectively described as the second main surface. Therefore, for convenience of description of the process, when the drawing is performed in a transposed state that is upside down with respect to the above-described normal state, the vertical relationship between the first main surface and the second main surface in the drawing is also reversed.

図１は本発明の一実施形態である発光素子１００を模式的に示すものである。発光素子１００において発光層部２４を有した主化合物半導体層４０は、ＧａＡｓ基板１０（図２の工程２参照）の第二主表面上にエピタキシャル成長されたものである。そして、該ＧａＡｓ基板１０の周縁部が切り欠かれることにより切欠き部１ｊが形成され（図２の工程５参照）、当該切欠き部１ｊの周縁に残された基板部分が残留基板部１とされている。図２の工程２は層成長時の上下関係で描いており、図１はこれと上下反転している（従って、第一主表面は、図１中にて層や基板の下面として表れる）。切欠き部１ｊの底面は主光取出面ＥＡを形成し、発光層部２４に発光駆動電圧を印加するための光取出側電極９が残留基板部１の第二主表面を覆うように形成されている。図１において、透明厚膜半導体層９０、結合層７、発光層部２４及び補助電流拡散層９１は主化合物半導体層４０に属し、バッファ層２及び残留基板部１は主化合物半導体層４０に属さない。   FIG. 1 schematically shows a light emitting device 100 according to an embodiment of the present invention. The main compound semiconductor layer 40 having the light emitting layer portion 24 in the light emitting element 100 is epitaxially grown on the second main surface of the GaAs substrate 10 (see Step 2 in FIG. 2). Then, the notched portion 1j is formed by cutting the peripheral portion of the GaAs substrate 10 (see step 5 in FIG. 2), and the substrate portion left on the peripheral portion of the notched portion 1j is the residual substrate portion 1. Has been. Step 2 in FIG. 2 is drawn in a vertical relationship during layer growth, and FIG. 1 is vertically inverted (the first main surface appears as the lower surface of the layer or substrate in FIG. 1). The bottom surface of the cutout portion 1j forms a main light extraction surface EA, and the light extraction side electrode 9 for applying a light emission driving voltage to the light emitting layer portion 24 is formed so as to cover the second main surface of the residual substrate portion 1. ing. In FIG. 1, the transparent thick film semiconductor layer 90, the bonding layer 7, the light emitting layer portion 24, and the auxiliary current diffusion layer 91 belong to the main compound semiconductor layer 40, and the buffer layer 2 and the remaining substrate portion 1 belong to the main compound semiconductor layer 40. Absent.

発光層部２４は、ノンドープ（ＡｌｘＧａ１−ｘ）ｙＩｎ１−ｙＰ（ただし、０≦ｘ≦０．５５，０．４５≦ｙ≦０．５５）混晶からなる活性層５を、第一導電型クラッド層、本実施形態ではｐ型（ＡｌｚＧａ１−ｚ）ｙＩｎ１−ｙＰ（ただしｘ＜ｚ≦１）からなるｐ型クラッド層６と、前記第一導電型クラッド層とは異なる第二導電型クラッド層、本実施形態ではｎ型（ＡｌｚＧａ１−ｚ）ｙＩｎ１−ｙＰ（ただしｘ＜ｚ≦１）からなるｎ型クラッド層４とにより挟んだ構造を有し、活性層５の組成に応じて、発光波長を、緑色から赤色領域（発光波長（ピーク発光波長）が５５０ｎｍ以上６７０ｎｍ以下）にて調整できる。 The light emitting layer portion 24 includes the active layer 5 made of a non-doped (Al x Ga 1-x ) y In 1-y P (where 0 ≦ x ≦ 0.55, 0.45 ≦ y ≦ 0.55) mixed crystal. , the first-conductivity-type cladding layer, in this embodiment the p-type cladding layer 6 made of p-type (Al z Ga 1-z) y in 1-y P ( except x <z ≦ 1), wherein the first conductivity type the second-conductivity-type cladding layer different from the clad layer, in this embodiment interposed by an n-type (Al z Ga 1-z) y in 1-y P ( except x <z ≦ 1) n-type cladding layer 4 made of According to the composition of the active layer 5, the emission wavelength can be adjusted in the green to red region (the emission wavelength (peak emission wavelength) is 550 nm or more and 670 nm or less).

発光素子１００においては、発光層部２４の第一主表面側にｐ型ＡｌＧａＩｎＰクラッド層６が配置されており、第二主表面側（つまり、主光取出面側）にｎ型ＡｌＧａＩｎＰクラッド層４が配置されている。従って、通電極性は光取出側電極９が負である。なお、ここでいう「ノンドープ」とは、「ドーパントの積極添加を行なわない」との意味であり、通常の製造工程上、不可避的に混入するドーパント成分の含有（例えば１０１３〜１０１６／ｃｍ３程度を上限とする）をも排除するものではない。また、残留基板部１はｎ型ＧａＡｓからなり、光取出側電極９はＡｕ薄膜により形成されている。残留基板部１と光取出側電極９との間には、両者の接触抵抗を減ずるための接合合金化層９ａが形成されている。接合合金化層９ａは、Ａｕ又はＡｇを主成分として（５０質量％以上）、これに、コンタクト先となる半導体の種別及び導電型に応じ、オーミックコンタクトを取るための合金成分を適量配合したコンタクト用金属を半導体表面上に膜形成した後、合金化熱処理（いわゆるシンター処理）を施すことにより形成されたものである。ｎ型層とのコンタクトを取るために、ここでは接合合金化層９ａをＡｕＧｅＮｉ合金（例えばＧｅ：１５質量％、Ｎｉ：１０質量％、残部Ａｕ）を用いて形成している。 In the light emitting element 100, the p-type AlGaInP cladding layer 6 is disposed on the first main surface side of the light emitting layer portion 24, and the n-type AlGaInP cladding layer 4 is disposed on the second main surface side (that is, the main light extraction surface side). Is arranged. Therefore, the light extraction side electrode 9 is negative in the energization polarity. The term “non-dope” as used herein means “does not actively add a dopant”, and contains a dopant component inevitably mixed in a normal manufacturing process (for example, 10 13 to 10 16 / cm 3). It is not excluded that the upper limit is about 3 ). The residual substrate portion 1 is made of n-type GaAs, and the light extraction side electrode 9 is formed of an Au thin film. Between the residual substrate part 1 and the light extraction side electrode 9, a bonding alloyed layer 9a is formed for reducing the contact resistance between them. The bonded alloyed layer 9a is a contact containing Au or Ag as a main component (50% by mass or more), and an appropriate amount of an alloy component for taking ohmic contact according to the type and conductivity type of the semiconductor to be contacted. It is formed by forming a metal film on the semiconductor surface and then performing an alloying heat treatment (so-called sintering process). Here, in order to make contact with the n-type layer, the bonded alloyed layer 9a is formed using an AuGeNi alloy (for example, Ge: 15% by mass, Ni: 10% by mass, balance Au).

主化合物半導体層４０においては、発光層部２４の第一主表面上に、ＧａＰ（あるいはＧａＡｓＰやＡｌＧａＡｓでもよい：ここではｐ型）よりなる透明厚膜半導体層９０が形成されている。透明厚膜半導体層９０は接合合金化層２１によりオーミック接触が形成できる程度に有効キャリア濃度（従って、ｐ型ドーパント濃度）が高められている（例えばｐ型クラッド層６と同等以上であって２×１０１８／ｃｍ３以下）。透明厚膜半導体層９０は、例えば１０μｍ以上２００μｍ以下（好ましくは４０μｍ以上２００μｍ以下）の厚膜に形成されることで、層側面からの取出光束も増加させ、発光素子全体の輝度（積分球輝度）を高める役割も担う。また、発光層部２４からの発光光束のピーク波長に相当する光量子エネルギーよりも大きなバンドギャップエネルギーを有するＩＩＩ−Ｖ族化合物半導体にて構成することで、発光光束に対する吸収も抑制されている。 In the main compound semiconductor layer 40, a transparent thick film semiconductor layer 90 made of GaP (or GaAsP or AlGaAs may be used here: p-type) is formed on the first main surface of the light emitting layer portion 24. The transparent thick film semiconductor layer 90 has an effective carrier concentration (and hence a p-type dopant concentration) increased to such an extent that an ohmic contact can be formed by the bonded alloying layer 21 (for example, equal to or higher than the p-type cladding layer 6 and 2 × 10 18 / cm 3 or less). The transparent thick film semiconductor layer 90 is formed in a thick film of, for example, 10 μm or more and 200 μm or less (preferably 40 μm or more and 200 μm or less), thereby increasing the extracted light flux from the side surface of the layer and increasing the brightness of the entire light emitting element (integrated sphere brightness). ) Will also play a role. In addition, absorption of the emitted light beam is also suppressed by using a III-V group compound semiconductor having a band gap energy larger than the photon energy corresponding to the peak wavelength of the emitted light beam from the light emitting layer portion 24.

透明厚膜半導体層９０の第一主表面側は、金属ステージ５２上にＡｇペースト等からなる金属ペースト層１７を介して接着され、該金属ペースト層１７が反射部を形成している。また、透明厚膜半導体層９０の第一主表面には、光取出側電極９側と同様に接合合金化層２１が分散形成され、該接合合金化層２１が金属ペースト層１７より覆われている。これにより、発光層部２４は、金属ペースト層１７を介して金属ステージ５２に電気的に接続される。一方、光取出側電極９は、導体金具５１にＡｕワイヤ等で構成された通電用ワイヤ９ｗを介して電気的に接続される。発光層部２４には、金属ステージ５２及び導体金具５１に一体化された図示しない駆動端子部を介して発光駆動電圧が印加される。   The first main surface side of the transparent thick film semiconductor layer 90 is bonded to the metal stage 52 via the metal paste layer 17 made of Ag paste or the like, and the metal paste layer 17 forms a reflection portion. In addition, the bonding alloyed layer 21 is dispersedly formed on the first main surface of the transparent thick film semiconductor layer 90 in the same manner as the light extraction side electrode 9 side, and the bonding alloyed layer 21 is covered with the metal paste layer 17. Yes. Thereby, the light emitting layer part 24 is electrically connected to the metal stage 52 through the metal paste layer 17. On the other hand, the light extraction side electrode 9 is electrically connected to the conductor metal fitting 51 via a current-carrying wire 9w made of Au wire or the like. A light emission driving voltage is applied to the light emitting layer portion 24 via a drive terminal portion (not shown) integrated with the metal stage 52 and the conductor metal fitting 51.

本実施形態において接合合金化層２１は、ｐ型層とのコンタクトを取るためにＡｕＢｅ合金を用いて形成されている。接合合金化層２１は反射率が比較的低いため、該領域での反射光束を増加させる効果と、接合合金化層２１との接触抵抗を低減する効果とのバランスを考慮し、透明厚膜半導体層９０第一主表面の全面積に対する接合合金化層２１の形成面積の比率を１％以上２５％以下に調整することが望ましい。なお、接合合金化層２１をＡｕ層、Ａｇ層あるいはＡｌ層などの高反射率の金属反射層３２で覆い、該金属反射層３２を、金属ペースト層１７を介して金属ステージ５２に接着してもよい。   In this embodiment, the bonding alloyed layer 21 is formed using an AuBe alloy in order to make contact with the p-type layer. Since the bonding alloyed layer 21 has a relatively low reflectance, a transparent thick film semiconductor is considered in consideration of the balance between the effect of increasing the reflected light flux in the region and the effect of reducing the contact resistance with the bonding alloyed layer 21. It is desirable to adjust the ratio of the formation area of the bonding alloying layer 21 to the total area of the first main surface of the layer 90 to 1% or more and 25% or less. The bonded alloying layer 21 is covered with a highly reflective metal reflective layer 32 such as an Au layer, an Ag layer, or an Al layer, and the metal reflective layer 32 is adhered to the metal stage 52 via the metal paste layer 17. Also good.

なお、透明厚膜半導体層９０の側で発光素子を、金属ペースト層１７を介して金属ステージ５２に接着する場合、図１に一部拡大して示すように、その接着時に金属ペースト層１７がつぶれて変形して主化合物半導体層４０の周側面側に這い上がることがある。しかし、本実施形態では、この接着側に設ける透明厚膜半導体層９０の厚さを４０μｍ以上２００μｍ以下と厚くしてあり、仮に金属ペーストが這い上がっても発光層部（ｐ−ｎ接合部）２４にまで達する確率は小さくなり、ｐ−ｎ接合の短絡等を効果的に防止できる。   When the light emitting element is bonded to the metal stage 52 via the metal paste layer 17 on the transparent thick film semiconductor layer 90 side, the metal paste layer 17 is bonded at the time of bonding as shown in FIG. The material may be crushed and deformed and crawl up to the peripheral side surface of the main compound semiconductor layer 40. However, in the present embodiment, the thickness of the transparent thick film semiconductor layer 90 provided on the bonding side is increased to 40 μm or more and 200 μm or less, and even if the metal paste crawls up, the light emitting layer (pn junction) The probability of reaching 24 is reduced, and a pn junction short circuit or the like can be effectively prevented.

また、残留基板部１と発光層部２４との間には、ＡｌＧａＩｎＰ、ＡｌＧａＡｓ、ＡｌＩｎＰ、ＧａＩｎＰ等の化合物半導体よりなる補助電流拡散層９１が形成されている。補助電流拡散層９１の厚さは例えば０．５μｍ以上３０μｍ以下（望ましくは１μｍ以上１５μｍ以下）であり、発光層部２４の、これに近い側のクラッド層（本実施形態ではｎ型クラッド層４）よりも有効キャリア濃度（従って、ｎ型ドーパント濃度）が高くされ、面内の電流拡散効果が高められている。なお、ｎ型クラッド層４（第一導電型クラッド層）の厚さをｐ型クラッド層６（第二導電型クラッド層）よりも厚くし、該ｎ型クラッド層４の第二主表面側の表層部に補助電流拡散層としての機能を担わせることも可能である。   Further, an auxiliary current diffusion layer 91 made of a compound semiconductor such as AlGaInP, AlGaAs, AlInP, and GaInP is formed between the residual substrate portion 1 and the light emitting layer portion 24. The thickness of the auxiliary current diffusion layer 91 is, for example, not less than 0.5 μm and not more than 30 μm (preferably not less than 1 μm and not more than 15 μm), and the cladding layer closer to the light emitting layer portion 24 (in this embodiment, the n-type cladding layer 4). ), The effective carrier concentration (and hence the n-type dopant concentration) is increased, and the in-plane current diffusion effect is enhanced. The n-type cladding layer 4 (first conductivity type cladding layer) is made thicker than the p-type cladding layer 6 (second conductivity type cladding layer), and the n-type cladding layer 4 has a second main surface side. It is possible to make the surface layer function as an auxiliary current diffusion layer.

上記の構成によると、光吸収部として作用する成長用のＧａＡｓ基板１０（図２）の一部が主化合物半導体層４０の第二主表面上への残留基板部１となるように、その一部のみが切り欠かれている。これにより、形成される切欠き部１ｊの底面を主光取出面ＥＡとして利用することができ、該部分へ向かう発光光束を外部へ直接取り出すことが可能となるので、光取出し効率を大幅に高めることができる。他方、残留基板部１の第二主表面は光取出側電極９の形成領域として活用され、光取出側電極９による光遮断作用により、残留基板部１による光吸収作用が不具合として顕在化しなくなっている。また、バンドギャップエネルギーが小さく耐酸化性にも優れるＧａＡｓからなる残留基板部１の第二主表面に光取出側電極９用の接合合金化層９ａを形成することで、より良好なオーミックコンタクトが実現し、素子の順方向電圧低減に寄与している。   According to the above configuration, a part of the growth GaAs substrate 10 (FIG. 2) acting as a light absorbing portion becomes the residual substrate portion 1 on the second main surface of the main compound semiconductor layer 40. Only the part is cut out. As a result, the bottom surface of the formed notch portion 1j can be used as the main light extraction surface EA, and the emitted light beam directed toward the portion can be directly extracted to the outside, thus greatly improving the light extraction efficiency. be able to. On the other hand, the second main surface of the residual substrate portion 1 is used as a formation region of the light extraction side electrode 9, and the light absorption action by the light extraction side electrode 9 does not reveal the light absorption effect by the residual substrate portion 1 as a defect. Yes. Further, by forming the bonding alloyed layer 9a for the light extraction side electrode 9 on the second main surface of the residual substrate portion 1 made of GaAs having small band gap energy and excellent oxidation resistance, a better ohmic contact can be obtained. Realized and contributes to reduction of the forward voltage of the element.

以下、図１の発光素子１００の製造方法について説明する。
まず、図２の工程１に示すように、ｎ型ＧａＡｓ単結晶からなる成長用基板１０を用意する。そして、工程２に示すように、その成長用基板１０の第一主表面上にＧａＡｓバッファ層２を成長し、さらに、補助電流拡散層９１を成長する。続いて、発光層部２４として、ｎ型ＡｌＧａＩｎＰクラッド層４、ＡｌＧａＩｎＰ活性層（ノンドープ）５、及びｐ型ＡｌＧａＩｎＰクラッド層６を、この順序にて周知のＭＯＶＰＥ（Metal-Organic Vapor Phase Epitaxy）法によりエピタキシャル成長させる。次に工程３に進み、透明厚膜半導体層９０（厚さ：４０μｍ以上２００μｍ以下（例えば１００μｍ））を、例えばハイドライド気相成長法（Hydride Vapor Phase Epitaxial Growth Method：ＨＶＰＥ）あるいはＭＯＶＰＥ法を用いてエピタキシャル成長する。特に、ＧａＰ、ＧａＡｓＰあるいはＡｌＧａＡｓからなる透明厚膜半導体層９０は、ＨＶＰＥ法により良質のものを高速成長しやすく、水素や炭素の残留も少ない利点がある。なお、透明厚膜半導体層９０は、ＧａＰ、ＧａＡｓＰあるいはＡｌＧａＡｓからなる基板を発光層部２４に貼り合わせることにより形成してもよい。この場合は、発光層部２４に続く形でＡｌＩｎＰ、ＧａＩｎＰまたはＡｌＧａＡｓからなる結合層７を形成しておき、この結合層７にＧａＰ、ＧａＡｓＰあるいはＡｌＧａＡｓからなる基板を貼り合わせるようにすれば、該貼り合わせをより確実に行なうことができる。ＨＶＰＥ法を用いる場合は、結合層７は特に不要である。 Hereinafter, a method for manufacturing the light emitting device 100 of FIG. 1 will be described.
First, as shown in step 1 of FIG. 2, a growth substrate 10 made of an n-type GaAs single crystal is prepared. Then, as shown in step 2, the GaAs buffer layer 2 is grown on the first main surface of the growth substrate 10, and the auxiliary current diffusion layer 91 is further grown. Subsequently, an n-type AlGaInP clad layer 4, an AlGaInP active layer (non-doped) 5, and a p-type AlGaInP clad layer 6 are formed as a light emitting layer portion 24 in this order by a well-known MOVPE (Metal-Organic Vapor Phase Epitaxy) method. Epitaxially grow. Next, the process proceeds to Step 3, and the transparent thick film semiconductor layer 90 (thickness: 40 μm or more and 200 μm or less (for example, 100 μm)) is formed using, for example, hydride vapor phase epitaxy (HVPE) or MOVPE. Epitaxial growth. In particular, the transparent thick film semiconductor layer 90 made of GaP, GaAsP, or AlGaAs is advantageous in that a high-quality layer can be easily grown at a high speed by the HVPE method, and there is an advantage that hydrogen and carbon remain little. The transparent thick film semiconductor layer 90 may be formed by bonding a substrate made of GaP, GaAsP or AlGaAs to the light emitting layer portion 24. In this case, if the coupling layer 7 made of AlInP, GaInP or AlGaAs is formed following the light emitting layer portion 24, and a substrate made of GaP, GaAsP or AlGaAs is bonded to the coupling layer 7, the Bonding can be performed more reliably. When the HVPE method is used, the bonding layer 7 is not particularly necessary.

そして、工程４に進み、成長用基板１０の厚さを減ずる処理を行なう。本実施形態では該処理を、成長用基板１０の第二主表面側部分１”を研削により除去し、残った基板部分を基板本体部１’としている。   Then, the process proceeds to step 4 where a process of reducing the thickness of the growth substrate 10 is performed. In the present embodiment, the second main surface side portion 1 ″ of the growth substrate 10 is removed by grinding, and the remaining substrate portion is used as the substrate body portion 1 ′.

次に、工程５に進み、基板本体部１’の残留基板部１として予定された領域以外の周縁部分をＧａＡｓバッファ層２とともに、周知のフォトリソグラフィー技術を用いてエッチングにより除去し、切欠き部１ｊを形成する。そして、工程６（工程５までと上下を反転して描いている）に示すように、該残留基板部１の第二主表面に、接合合金化層を形成するための金属材料層を蒸着等により形成し、３５０℃以上５００℃以下の温度域で合金化熱処理を行なうことにより、接合合金化層９ａとする。また、透明厚膜半導体層９０の第一主表面に接合合金化層２１を同様に分散形成する（接合合金化層９ａと合金化熱処理を兼用することができる）。接合合金化層９ａは図１に示すごとく、Ａｕ等を蒸着することにより光取出側電極９にて覆う。なお、基板本体部１’の第二主表面の、残留基板部１として予定された領域に接合合金化層９ａ（あるいは接合合金化層９ａ及び光取出側電極９）を先に形成し、これを切欠き部１ｊを形成するためのエッチングマスクに兼用することもできる。   Next, the process proceeds to step 5, and the peripheral portion other than the region planned as the remaining substrate portion 1 of the substrate main body portion 1 ′ is removed together with the GaAs buffer layer 2 by etching using a well-known photolithography technique. 1j is formed. Then, as shown in Step 6 (drawn upside down with respect to Step 5), a metal material layer for forming a bonding alloyed layer is deposited on the second main surface of the residual substrate portion 1 or the like. And the alloying heat treatment is performed in a temperature range of 350 ° C. or higher and 500 ° C. or lower to obtain the bonded alloyed layer 9a. Further, the bonding alloyed layer 21 is similarly dispersedly formed on the first main surface of the transparent thick film semiconductor layer 90 (the bonding alloying layer 9a can also be used as an alloying heat treatment). As shown in FIG. 1, the bonding alloyed layer 9a is covered with the light extraction side electrode 9 by vapor deposition of Au or the like. In addition, the bonding alloying layer 9a (or the bonding alloying layer 9a and the light extraction side electrode 9) is first formed on the region of the second main surface of the substrate main body 1 ′, which is planned as the residual substrate portion 1, Can also be used as an etching mask for forming the notch 1j.

図３に示すように、成長用基板１０上には、発光素子チップ３０ｃが複数個マトリックス状に配列した形で一括形成される。このとき、上記切欠き部１ｊは隣接した発光素子チップ３０ｃ同士のものが一体化されているので、その幅方向中央位置に設定された切断線ＣＬに沿って切断することにより、個々の発光素子チップ３０ｃに分離される。図１に示すごとく、分離後の発光素子チップ３０ｃの透明厚膜半導体層９０の第一主表面（接合合金化層２１が形成されている）を金属ペースト層１７により金属ステージ５２に接着し、さらに光取出側電極９と導体金具５１とを通電用ワイヤ９ｗにより接続すれば発光素子１００が完成する。なお、光取出側電極９に通電用ワイヤ９ｗをサーモソニックボンディング等により接合する際に、残留基板１は、その接合による損傷が発光層部や補助電流拡散層９１に及ぶことを抑制する働きをなす。   As shown in FIG. 3, a plurality of light emitting element chips 30c are collectively formed on the growth substrate 10 in a matrix arrangement. At this time, since the notched portion 1j is formed by integrating adjacent light emitting element chips 30c, each light emitting element is cut by cutting along the cutting line CL set at the center position in the width direction. Separated into chips 30c. As shown in FIG. 1, the first main surface of the transparent thick film semiconductor layer 90 of the light emitting element chip 30c after separation (bonded alloying layer 21 is formed) is adhered to the metal stage 52 by the metal paste layer 17, Further, the light emitting element 100 is completed by connecting the light extraction side electrode 9 and the conductor fitting 51 by the energizing wire 9w. When the energization wire 9w is bonded to the light extraction side electrode 9 by thermosonic bonding or the like, the residual substrate 1 has a function of suppressing damage due to the bonding to the light emitting layer portion and the auxiliary current diffusion layer 91. Eggplant.

上記発光素子１００の成長用基板１０は、光吸収性化合物半導体であるＧａＡｓにて要部が構成されるが、これを発光層部２４の成長後に全て除去するのではなく、厚さを減じて基板本体部１’とした後に、その一部切り欠く形で、主光取出面ＥＡとして機能する切欠き部１ｊを形成する。そして、切欠き部１ｊ形成に関与しない基板部分は残留基板部１となり、ウェーハの剛性向上機能も果たしうる。   The growth substrate 10 of the light-emitting element 100 is composed mainly of GaAs, which is a light-absorbing compound semiconductor, but is not completely removed after the light-emitting layer portion 24 is grown, but is reduced in thickness. After the substrate main body portion 1 ′ is formed, a cutout portion 1j that functions as the main light extraction surface EA is formed in a partially cutout shape. The substrate portion that is not involved in the formation of the notch portion 1j becomes the remaining substrate portion 1 and can also fulfill the function of improving the rigidity of the wafer.

以下、本発明の発光素子の種々の変形例について説明する。なお、図１の発光素子１００との共通部分も多いので、以下、その相違点につき説明する。従って、以下に説明する相違点以外の部分は、図１の発光素子１００と同一の構成を有しているので、ここでは詳細な説明を繰り返さない。また、共通の構成要素には共通の符号を付与する。   Hereinafter, various modifications of the light emitting device of the present invention will be described. In addition, since there are many common parts with the light emitting element 100 of FIG. 1, the difference will be described below. Therefore, since parts other than the differences described below have the same configuration as that of the light emitting element 100 of FIG. 1, detailed description thereof will not be repeated here. Also, common reference numerals are assigned to common components.

図４の発光素子３００は、発光層部２４と残留基板部１との間に、屈折率の相違する半導体膜を複数積層することにより、ブラッグ反射を利用して光を反射させるＤＢＲ層３０が設けられている。ＤＢＲ層３０は残留基板部１上にエピタキシャル成長可能である。ＤＢＲ層３０は、光吸収性の残留基板部１の直下に位置する領域であっても、発光光束ＥＢを下向きに反射することができるので、発光光束ＥＢが残留基板部１に吸収されて損失する不具合を解消することができる。反射された発光光束ＥＢは残留基板部等に吸収されない限り、直接あるいは素子の別部分（例えば金属ペースト層１７あるいは金属反射層３２）での反射を利用して素子外へ取り出すことが可能になる。   The light emitting element 300 of FIG. 4 includes a DBR layer 30 that reflects light using Bragg reflection by stacking a plurality of semiconductor films having different refractive indexes between the light emitting layer portion 24 and the residual substrate portion 1. Is provided. The DBR layer 30 can be epitaxially grown on the residual substrate portion 1. Since the DBR layer 30 can reflect the emitted light beam EB downward even in a region located directly below the light-absorbing residual substrate portion 1, the emitted light beam EB is absorbed by the residual substrate portion 1 and lost. Can be solved. As long as the reflected luminous flux EB is not absorbed by the residual substrate portion or the like, it can be taken out of the element directly or by utilizing reflection at another part of the element (for example, the metal paste layer 17 or the metal reflection layer 32). .

図５の発光素子４００では、補助電流拡散層９１の第二主表面（すなわち、切欠き部１ｊの底面）にて、残留基板部１の周囲に接合合金化層９ａを形成し、これを残留基板部１とともに光取出側電極９により一括して覆う構成とすることもできる。この場合、光取出側電極９は、残留基板部１の第二主表面及び周側面とを覆う主電極９ｍと、切欠き部１ｊの底面のうち残留基板部１の周側面に連なる一部領域を覆う副電極９ｂとを有したものとして形成される。接触抵抗低減用の接合合金化層９ａは、主電極９ｍと接する残留基板部１には形成されず、副電極９ｂと接する切欠き部１ｊの底面領域には形成されることとなる。従って、発光駆動電流は残留基板部１を迂回して主光取出面側に優先的に流れ、光取出し効率が向上する。   In the light emitting device 400 of FIG. 5, the bonding alloyed layer 9a is formed around the residual substrate portion 1 on the second main surface of the auxiliary current diffusion layer 91 (that is, the bottom surface of the notch portion 1j), and this remains. A configuration in which the substrate portion 1 and the light extraction side electrode 9 are collectively covered may be employed. In this case, the light extraction side electrode 9 includes a main electrode 9m that covers the second main surface and the peripheral side surface of the residual substrate portion 1, and a partial region that continues to the peripheral side surface of the residual substrate portion 1 among the bottom surfaces of the notch portion 1j. And the auxiliary electrode 9b covering the substrate. The bonding alloying layer 9a for reducing contact resistance is not formed on the remaining substrate portion 1 in contact with the main electrode 9m, but is formed in the bottom surface region of the notch portion 1j in contact with the sub electrode 9b. Therefore, the light emission drive current bypasses the residual substrate portion 1 and flows preferentially to the main light extraction surface side, and the light extraction efficiency is improved.

なお、透明厚膜半導体層９０あるいは副電極９ｂにより十分な電流拡散効果が得られる場合は、補助電流拡散層９１を省略することも可能である。この場合、切欠き部１ｊの底面は発光層部２４の第二主表面が形成する。また、副電極９ｂを設ける場合は、接合合金化層９ａとともに発光層部２４上に形成することとなる。   Note that the auxiliary current diffusion layer 91 can be omitted when a sufficient current diffusion effect is obtained by the transparent thick film semiconductor layer 90 or the sub-electrode 9b. In this case, the second main surface of the light emitting layer portion 24 is formed on the bottom surface of the notch portion 1j. Moreover, when providing the subelectrode 9b, it will form on the light emitting layer part 24 with the joining alloying layer 9a.

また、残留基板部１の第二主表面の面積が第一主表面の面積よりも小となるように、該残留基板部１の周側面１ｓが傾斜面として形成されている。光取出側電極９をなす主電極９ｍ（すなわち、残留基板部１の第二主表面及び周側面１ｓとを覆う部分）と副電極９ｂ（切欠き部１ｊの底面を覆う部分）とは、一体の金属膜として形成される。蒸着やスパッタ等の指向性の強い成膜法により金属膜を形成する場合、残留基板部１の周側面１ｓを上記のような傾斜面としておくことで、該周側面１ｓにも金属膜を十分な厚さにて形成することができ、ひいては、主電極９ｍと副電極９ｂとの電気的接続を確実に行なうことができる。なお、残留基板部１を覆う主電極は面積も大きく、通電用ワイヤ９ｗの接続も容易である。   Further, the peripheral side surface 1s of the residual substrate portion 1 is formed as an inclined surface so that the area of the second main surface of the residual substrate portion 1 is smaller than the area of the first main surface. The main electrode 9m forming the light extraction side electrode 9 (that is, the portion covering the second main surface and the peripheral side surface 1s of the residual substrate portion 1) and the sub electrode 9b (the portion covering the bottom surface of the notch portion 1j) are integrated. It is formed as a metal film. When a metal film is formed by a highly directional film forming method such as vapor deposition or sputtering, the peripheral side surface 1s of the residual substrate portion 1 is inclined as described above, so that a sufficient metal film is formed on the peripheral side surface 1s. Therefore, electrical connection between the main electrode 9m and the sub electrode 9b can be reliably performed. The main electrode covering the residual substrate portion 1 has a large area, and the connection of the energization wire 9w is easy.

周側面１ｓが傾斜面となった残留基板部１は、図２の工程５のエッチングを、次のように実施することで得られる。まず、図６の工程１に示すように、ＧａＡｓからなる基板本体部１’と発光層部２４との間には、ＡｌＩｎＰよりなるエッチストップ層１ｐを形成しておく。次に、工程２に示すように、基板本体部１’の第二主表面（面方位を＜１００＞とする）のうち、残留基板部１として残す領域をエッチングレジストＭＳＫにより覆い、残余の部分を、アンモニア−過酸化水素水溶液をエッチング液としてメサエッチングする。残留基板部１の周側面は、上記エッチング液の異方性エッチング効果により傾斜面となる。そして、工程３に示すように、塩酸をエッチング液としてエッチストップ層１ｐを除去し、さらにエッチングレジストＭＳＫを除去すればよい。   The remaining substrate portion 1 having the peripheral side surface 1s as an inclined surface can be obtained by performing the etching in step 5 of FIG. 2 as follows. First, as shown in Step 1 of FIG. 6, an etch stop layer 1 p made of AlInP is formed between the substrate body 1 ′ made of GaAs and the light emitting layer 24. Next, as shown in step 2, the region to be left as the remaining substrate portion 1 is covered with the etching resist MSK on the second main surface (the surface orientation is <100>) of the substrate body portion 1 ′, and the remaining portion Is mesa-etched using an ammonia-hydrogen peroxide aqueous solution as an etchant. The peripheral side surface of the residual substrate portion 1 becomes an inclined surface due to the anisotropic etching effect of the etching solution. Then, as shown in step 3, the etch stop layer 1p is removed using hydrochloric acid as an etchant, and the etching resist MSK is further removed.

図７の発光素子５００においては、図５の発光素子４００の残留基板部１を、発光層部２４にてｐ−ｎ接合を形成するｐ型層部とｎ型層部とのうち、該残留基板部１に近い側のもの（すなわち、ｎ型クラッド層４）と逆の導電型（つまり、ｐ型）を有する反転層部１ｒとして構成している。この場合、光吸収性化合物半導体基板としてｐ型のＧａＡｓ基板を用いればよい。また、図８の発光素子６００においては、図５の発光素子４００と同様に残留基板部１を、発光層部２４にてｐ−ｎ接合を形成するｐ型層部とｎ型層部とのうち、該残留基板部に近い側のもの（すなわち、ｎ型クラッド層４）、と同一の導電型（つまりｎ型）を有するものとしている。そして、発光層部２４と残留基板部１との間には、残留基板部１を選択被覆する形で、該残留基板部１と逆の導電型（つまりｐ型）を有する化合物半導体からなる反転層部９３を介挿している。いずれも、発光駆動時に逆バイアスとなる反転ｐ−ｎ接合部が、残留基板部１と発光層部２４との間に形成され、残留基板部１による電流遮断層としての機能を一層高めることができる。   In the light emitting device 500 of FIG. 7, the residual substrate portion 1 of the light emitting device 400 of FIG. 5 is selected from the p-type layer portion and the n-type layer portion that form a pn junction in the light emitting layer portion 24. This is configured as an inversion layer portion 1r having a conductivity type (that is, p-type) opposite to that on the side closer to the substrate portion 1 (that is, the n-type cladding layer 4). In this case, a p-type GaAs substrate may be used as the light absorbing compound semiconductor substrate. Further, in the light emitting device 600 of FIG. 8, the residual substrate portion 1 is formed of a p-type layer portion and an n-type layer portion that form a pn junction in the light emitting layer portion 24 as in the light emitting device 400 of FIG. Among them, the one close to the residual substrate portion (that is, the n-type cladding layer 4) has the same conductivity type (that is, n-type). An inversion made of a compound semiconductor having a conductivity type opposite to that of the residual substrate portion 1 (that is, p-type) is provided between the light emitting layer portion 24 and the residual substrate portion 1 so as to selectively cover the residual substrate portion 1. The layer part 93 is inserted. In either case, an inversion pn junction that is reverse biased during light emission driving is formed between the residual substrate portion 1 and the light emitting layer portion 24, and the function of the residual substrate portion 1 as a current blocking layer is further enhanced. it can.

図７及び図８の構成においては、図５と同様に、接合合金化層９ａを、副電極９ｂと接する切欠き部１ｊの底面領域にのみ形成してもよいが、接合合金化層９ａが残留基板部１をも覆う構成になっていても、反転ｐ−ｎ接合部の介在により電流遮断効果は問題なく達成できる。そこで、これを利用すれば、接合合金化層９ａは、副電極９ｂ及び主電極９ｍを有した光取出側電極９と形状一致させた形で、副電極９ｂと接する切欠き部１ｊの底面領域とともに残留基板部１も一括して覆うものとして形成することが可能となる（図では、残留基板部１を覆う部分を符号９ｋにより表している）。このように同一形状で重なり合う接合合金化層９ａ（９ｋ）と光取出側電極９とは、形状のパターンニングを１回のフォトリソグラフィーにて行なうことができ、工程の簡略化に寄与する。   7 and 8, the bonding alloyed layer 9a may be formed only in the bottom region of the notch 1j in contact with the sub electrode 9b, as in FIG. Even if it is the structure which covers the residual substrate part 1, the electric current interruption effect can be achieved without a problem by interposition of the inversion pn junction part. Therefore, if this is used, the bonding alloying layer 9a is formed in the shape of the light extraction side electrode 9 having the sub electrode 9b and the main electrode 9m, and the bottom region of the notch 1j in contact with the sub electrode 9b. At the same time, it is possible to form the remaining substrate portion 1 so as to cover it in a lump (in the figure, the portion covering the remaining substrate portion 1 is represented by reference numeral 9k). Thus, the joining alloying layer 9a (9k) and the light extraction side electrode 9 overlapping in the same shape can be patterned in one photolithography, which contributes to simplification of the process.

図９の発光素子７００では光取出側電極９を、残留基板部１の第二主表面及び周側面を覆う主電極９ｍと、切欠き部１ｊの底面をなす補助電流拡散層９１の第二主表面の一部領域を覆うとともに、主電極９ｍの外周縁から延出する線状の副電極９ｂとを有するものとして構成している。ここでは、線状の副電極９ｂが、主電極９ｍを中心として主光取出面上に放射状に形成されている。副電極９ｂを上記のように形成することで、駆動電圧を印加した際に、主光取出面内の電界分布の偏りを軽減することができ、主光取出面ＥＡ全体に、より一様に電圧印加することができ、ひいては電流拡散効果を高めることがでできる。   In the light emitting device 700 of FIG. 9, the light extraction side electrode 9 includes the main electrode 9m that covers the second main surface and the peripheral side surface of the residual substrate portion 1, and the second main portion of the auxiliary current diffusion layer 91 that forms the bottom surface of the notch portion 1j. A part of the surface is covered and a linear sub-electrode 9b extending from the outer peripheral edge of the main electrode 9m is provided. Here, the linear sub-electrode 9b is formed radially on the main light extraction surface with the main electrode 9m as the center. By forming the sub-electrode 9b as described above, the bias of the electric field distribution in the main light extraction surface can be reduced when the drive voltage is applied, and the entire main light extraction surface EA is more uniformly distributed. A voltage can be applied, and the current spreading effect can be enhanced.

本実施形態では接合合金化層９ａも副電極９ｂと重なる線状に形成しており、主電極９ｍの直下に位置する残留基板部１には接合合金化層を形成していない。従って、残留基板部１はここでも電流阻止層として機能し（図７あるいは図８の構成を採用してもよい）、主電極９ｍの直下に向かう電流を遮断できる。その結果、主光取出面ＥＡをなす主電極９ｍの背景領域（つまり、切欠き部１ｊ）への電流分配量を増加でき、光取出し効率を高めることができる。なお、残留基板部１の第二主表面の面積が第一主表面の面積よりも小となるように、該残留基板部１の周側面が傾斜面１ｓとして形成され、光取出側電極９をなす主電極９ｍと副電極９ｂとが一体の金属膜として形成されている。   In the present embodiment, the bonded alloyed layer 9a is also formed in a linear shape overlapping the sub electrode 9b, and no bonded alloyed layer is formed on the remaining substrate portion 1 located immediately below the main electrode 9m. Therefore, the residual substrate portion 1 also functions as a current blocking layer (the configuration shown in FIG. 7 or FIG. 8 may be adopted) and can block the current directed directly below the main electrode 9m. As a result, the amount of current distribution to the background region (that is, the notch 1j) of the main electrode 9m that forms the main light extraction surface EA can be increased, and the light extraction efficiency can be increased. In addition, the peripheral side surface of the residual substrate portion 1 is formed as an inclined surface 1s so that the area of the second main surface of the residual substrate portion 1 is smaller than the area of the first main surface. The main electrode 9m and the sub electrode 9b are formed as an integral metal film.

なお、上記の実施形態においては、光取出側電極９とは異極性となる側の電極部（接合合金化層２１あるいは金属反射膜）を、いずれも透明厚膜半導体層９０の第一主表面側に形成していたが、主化合物半導体層４０の第二主表面側から少なくとも活性層５の第一主表面までの区間を、前記第二主表面の一部領域において切り欠くことにより電極用切欠き部を形成し、その電極用切欠き部の底面に上記異極性となる側の電極を配置した、前述の同面側電極取出構造としてもよい。以下、その具体例について説明する。   In the above embodiment, the first main surface of the transparent thick film semiconductor layer 90 is used as the electrode portion (bonding alloyed layer 21 or metal reflective film) on the side having a different polarity from the light extraction side electrode 9. However, a section from the second main surface side of the main compound semiconductor layer 40 to at least the first main surface of the active layer 5 is notched in a partial region of the second main surface. The same-surface-side electrode extraction structure described above, in which a notch portion is formed and the electrode having the opposite polarity on the bottom surface of the electrode notch portion, may be provided. Specific examples thereof will be described below.

図１０の発光素子８００は、図１の発光素子１００を同面側電極取出構造とした例である（発光素子１００と同一の符号を有していて特に説明のない要素は、発光素子１００と同一の構成であり、発光素子１００の詳細説明にて代用する）。主化合物半導体層４０の補助電流拡散層９１から発光層部２４（及び結合層７）までが、第二主表面側で一部領域にて周知のフォトリソグラフィー工程により切り欠かれ、電極用切欠き部ＪＫが形成されている。そして、該電極用切欠き部ＪＫの底面をなす透明厚膜半導体層９０の第二主表面領域に、接合合金化層２１及び異極性電極３３２が形成されている。なお、透明厚膜半導体層９０の第二主表面を含む表層部が、電流拡散効果を高めるために、残余の領域よりも有効キャリア濃度が高められた高濃度ドーピング層９０ｈとされている。また、光取出側電極９及び異極性電極３３２には、通電用ワイヤ９ｗ及び３２ｗがぞれぞれ接合されている。なお、切欠き部ＪＫの底面は、クラッド層６により形成してもよい。   A light-emitting element 800 in FIG. 10 is an example in which the light-emitting element 100 in FIG. 1 has a same-side electrode extraction structure (elements having the same reference numerals as the light-emitting element 100 and not particularly described are the light-emitting element 100 and the light-emitting element 100). The same configuration is used in the detailed description of the light emitting element 100). The auxiliary current diffusion layer 91 to the light emitting layer portion 24 (and the coupling layer 7) of the main compound semiconductor layer 40 are cut out in a partial region on the second main surface side by a well-known photolithography process, and are cut out for electrodes. Part JK is formed. The bonding alloyed layer 21 and the heteropolar electrode 332 are formed in the second main surface region of the transparent thick film semiconductor layer 90 that forms the bottom surface of the electrode notch JK. The surface layer portion including the second main surface of the transparent thick film semiconductor layer 90 is a high-concentration doping layer 90h having an effective carrier concentration higher than that of the remaining region in order to enhance the current diffusion effect. In addition, current-carrying wires 9w and 32w are joined to the light extraction side electrode 9 and the different polarity electrode 332, respectively. Note that the bottom surface of the notch JK may be formed by the cladding layer 6.

図１１の発光素子９００は、図４の発光素子３００を同様に同面側電極取出構造とした例である。さらに、図１２の発光素子１０００は、図１１の発光素子９００から補助電流拡散層９１を省略した構成に相当する。   A light emitting element 900 in FIG. 11 is an example in which the light emitting element 300 in FIG. Further, the light emitting element 1000 in FIG. 12 corresponds to a configuration in which the auxiliary current diffusion layer 91 is omitted from the light emitting element 900 in FIG.

図１３は、赤色（Ｒ）発光素子チップ１６３、緑色（Ｇ）発光素子チップ１６１及び青色（Ｂ）発光素子チップ１６２を全て同面側電極取出構造とし、これらを組み合わせて構成したＲＧＢフルカラー発光素子モジュール１５０の一例を示すものである。各発光素子チップ１６１〜１６３の光取出側電極９はカソード側（接地側：負極性の電源が使える場合は、アノード側を接地側としてもよい）であり、電極電位は全て等しくなるため、これら電極９をワイヤ９ｗにより順次連結し、その末端に位置する電極のみ、素子チップを接着するステージ１５３側のカソード端子（光取出側電極９がアノードである場合はアノード端子）１５２に接続している。端子１６２にはワイヤを１本接続すればよいだけなので、面積が比較的小さくて済む（ただし、本発明は、各光取出側電極９から個別にワイヤ９ｗを端子１５２に接続する態様を排除するものではない）。他方、異極性電極３３２は全てアノード（光取出側電極９がアノードである場合はカソード）となり、発光光束の混合比調整のため、印加電圧（ないしデューティ比）が個別に調整される。従って、ワイヤ３３２ｗにより個別のアノード端子（異極性電極３３２がカソードである場合はカソード端子）１５１に接続されている。   FIG. 13 shows an RGB full-color light emitting device in which a red (R) light emitting device chip 163, a green (G) light emitting device chip 161, and a blue (B) light emitting device chip 162 all have the same-surface electrode extraction structure and are combined. An example of the module 150 is shown. The light extraction side electrodes 9 of the respective light emitting element chips 161 to 163 are the cathode side (ground side: the anode side may be the ground side when a negative power source can be used), and the electrode potentials are all equal. The electrodes 9 are sequentially connected by the wire 9w, and only the electrode located at the end is connected to the cathode terminal 152 on the stage 153 side to which the element chip is bonded (the anode terminal when the light extraction side electrode 9 is an anode) 152 . Since only one wire needs to be connected to the terminal 162, the area can be relatively small (however, the present invention eliminates a mode in which the wire 9w is individually connected to the terminal 152 from each light extraction side electrode 9). Not a thing). On the other hand, the different polarity electrodes 332 are all anodes (or cathodes when the light extraction side electrode 9 is an anode), and the applied voltage (or duty ratio) is individually adjusted for adjusting the mixing ratio of the luminous flux. Therefore, it is connected to an individual anode terminal 151 (a cathode terminal when the different polarity electrode 332 is a cathode) 151 by the wire 332w.

発光素子チップ１６１〜１６３のうち、赤色（Ｒ）発光素子チップ１６３と緑色（Ｇ）発光素子チップ１６１とはＡｌＧａＩｎＰを用いた本発明の構成（例えば、図１０の発光素子８００、図１１の発光素子９００及び図１２の発光素子１０００のいずれかである）を採用している。両素子チップの活性層５は、発光波長に応じて異なるＡｌＧａＩｎＰ組成を有する。他方、青色（Ｂ）発光素子チップ１６２は、ＩｎＡｌＧａＮなどのＩＩＩ族窒化物系の青色発光素子として構成されている。該素子チップ１６２には、ＩＩＩ族窒化物によるダブルへテロ構造の発光層部２２４（及び電極取出層２２５）をエピタキシャル成長するための絶縁性のサファイア基板１９０が残され、該サファイア基板１９０を介してステージ１５３上に金属ペースト等により接着されている。異極性電極３３２は、電極取出層２２５の表面に形成されている。他方、本発明に係る発光素子チップ１６１，１６３は、導電性の透明厚膜半導体層９０を介してステージ１５３上に金属ペースト等により接着されている。これにより、透明厚膜半導体層９０が静電気の放電路として機能し、発光層部２４の帯電が軽減される。   Among the light emitting element chips 161 to 163, the red (R) light emitting element chip 163 and the green (G) light emitting element chip 161 are configured according to the present invention using AlGaInP (for example, the light emitting element 800 in FIG. 10 and the light emitting element in FIG. 11). One of the element 900 and the light-emitting element 1000 in FIG. 12 is employed. The active layers 5 of both element chips have different AlGaInP compositions depending on the emission wavelength. On the other hand, the blue (B) light emitting element chip 162 is configured as a group III nitride blue light emitting element such as InAlGaN. The element chip 162 is left with an insulating sapphire substrate 190 for epitaxial growth of the light emitting layer portion 224 (and the electrode extraction layer 225) having a double hetero structure made of group III nitride. The stage 153 is bonded with a metal paste or the like. The different polarity electrode 332 is formed on the surface of the electrode extraction layer 225. On the other hand, the light emitting element chips 161 and 163 according to the present invention are bonded to the stage 153 with a metal paste or the like through the conductive transparent thick film semiconductor layer 90. Thereby, the transparent thick film semiconductor layer 90 functions as a static electricity discharge path, and charging of the light emitting layer portion 24 is reduced.

図１０の発光素子８００、図１１の発光素子９００及び図１２の発光素子１０００は、それぞれ素子の上下を反転し、透明厚膜半導体層９０の第一主表面側に電極を形成せず、該第一主表面を主光取出面とすることで、それぞれ図１４の発光素子１１００、図１５の発光素子１２００及び図１６の発光素子１３００とすることができる。これら発光素子１１００〜１３００はいずれも、本発明の発光素子の第二の構成の実施形態を構成する。各発光素子１１００〜１３００において図１０〜図１２の発光素子８００〜１０００と同一の符号を有していて特に説明のない要素は、同一の構成要素であり、詳細な説明は省略する）。ただし、いずれの図においても、光取出側電極は第一電極（第一電極部）９、異極性電極３３２は第二電極（第二電極部）３３２と読み替える。なお、Ａｕ電極等で構成された第一電極９及び異極性電極３３２は省略することもでき、この場合は接合合金化層９ａ及び２１が、それぞれ第一電極部及び第二電極部を構成する。   The light emitting element 800 in FIG. 10, the light emitting element 900 in FIG. 11, and the light emitting element 1000 in FIG. 12 are each turned upside down, and no electrode is formed on the first main surface side of the transparent thick film semiconductor layer 90. By using the first main surface as the main light extraction surface, the light emitting element 1100 in FIG. 14, the light emitting element 1200 in FIG. 15, and the light emitting element 1300 in FIG. 16 can be obtained, respectively. All of these light emitting elements 1100 to 1300 constitute an embodiment of the second configuration of the light emitting element of the present invention. In each of the light emitting elements 1100 to 1300, elements having the same reference numerals as those of the light emitting elements 800 to 1000 in FIGS. 10 to 12 and not particularly described are the same constituent elements, and detailed description thereof is omitted). However, in any figure, the light extraction side electrode is read as the first electrode (first electrode portion) 9, and the different polarity electrode 332 is read as the second electrode (second electrode portion) 332. In addition, the 1st electrode 9 comprised by Au electrode etc. and the different polarity electrode 332 can also be abbreviate | omitted, and in this case, the joining alloying layers 9a and 21 comprise a 1st electrode part and a 2nd electrode part, respectively. .

各構成においてＧａＡｓからなる残留基板部１の採用により、接合合金化層９ａとの接触抵抗をより低減することができる。また、透明厚膜半導体層９０の、電極形成されない第一主表面を主光取出面とすることで、光取出効率がより向上する。さらに、主化合物半導体層４０の第二主表面側に全ての電極９，３２が形成されるので、例えば素子チップを基板上に面実装する構成が容易となり、素子チップのアセンブリ工程の簡略化にも寄与する。   By adopting the residual substrate portion 1 made of GaAs in each configuration, the contact resistance with the bonding alloyed layer 9a can be further reduced. Moreover, the light extraction efficiency is further improved by using the first main surface of the transparent thick film semiconductor layer 90 where no electrode is formed as the main light extraction surface. Furthermore, since all the electrodes 9 and 32 are formed on the second main surface side of the main compound semiconductor layer 40, for example, the configuration in which the element chip is surface-mounted on the substrate is facilitated, and the assembly process of the element chip is simplified. Also contribute.

本発明の発光素子の、第一の構成の一例を示す断面模式図。The cross-sectional schematic diagram which shows an example of the 1st structure of the light emitting element of this invention. 図１の発光素子の製造方法の一例を示す工程説明図。Process explanatory drawing which shows an example of the manufacturing method of the light emitting element of FIG. 発光素子チップの切断線の設定例を示す模式図。The schematic diagram which shows the example of a setting of the cutting line of a light emitting element chip | tip. 図１の発光素子の第一変形例を示す断面模式図。The cross-sectional schematic diagram which shows the 1st modification of the light emitting element of FIG. 図１の発光素子の第二変形例を示す断面模式図。The cross-sectional schematic diagram which shows the 2nd modification of the light emitting element of FIG. 周側面が傾斜面となった残留基板部の形成方法を示す工程説明図。Process explanatory drawing which shows the formation method of the residual board | substrate part by which the surrounding side surface became the inclined surface. 図１の発光素子の第三変形例を示す断面模式図。FIG. 7 is a schematic cross-sectional view illustrating a third modification of the light-emitting element in FIG. 1. 図１の発光素子の第四変形例を示す断面模式図。FIG. 6 is a schematic cross-sectional view showing a fourth modification of the light emitting device in FIG. 1. 図１の発光素子の第五変形例の要部を示す断面模式図及び平面図。The cross-sectional schematic diagram and top view which show the principal part of the 5th modification of the light emitting element of FIG. 図１の発光素子の第六変形例を示す断面模式図。FIG. 10 is a schematic cross-sectional view illustrating a sixth modification of the light-emitting element in FIG. 1. 図１の発光素子の第七変形例を示す断面模式図。FIG. 10 is a schematic cross-sectional view illustrating a seventh modification of the light-emitting element in FIG. 1. 図１の発光素子の第八変形例を示す断面模式図。FIG. 10 is a schematic cross-sectional view illustrating an eighth modification of the light-emitting element in FIG. 1. 図１０〜図１２の発光素子の応用例を示す断面模式図。FIG. 13 is a schematic cross-sectional view illustrating an application example of the light-emitting element of FIGS. 本発明の発光素子に関連する発光素子の構成を示す第一例を示す断面模式図。The cross-sectional schematic diagram which shows the 1st example which shows the structure of the light emitting element relevant to the light emitting element of this invention. 本発明の発光素子に関連する発光素子の構成を示す第二例を示す断面模式図。The cross-sectional schematic diagram which shows the 2nd example which shows the structure of the light emitting element relevant to the light emitting element of this invention. 本発明の発光素子に関連する発光素子の構成を示す第三例を示す断面模式図。The cross-sectional schematic diagram which shows the 3rd example which shows the structure of the light emitting element relevant to the light emitting element of this invention.

符号の説明Explanation of symbols

１００，３００，４００，５００，６００，７００，８００，９００，１０００，１１００，１２００，１３００ 発光素子
１，１ｒ 残留基板部
１ｊ 切欠き部
１ｓ 周側面
４ ｎ型クラッド層（ｎ型層部）
５ 活性層
６ ｐ型クラッド層（ｐ型層部）
９ 光取出側電極
９ａ 接合合金化層
９ｍ 主電極
９ｂ 副電極
９３ 反転層部
１７ 金属ペースト層
２１ 接合合金化層
２４ 発光層部
３０ ＤＢＲ層
３２ 金属反射膜
４０ 主化合物半導体層
５２ 金属ステージ
９０ 透明厚膜半導体層
９１ 補助電流拡散層
ＪＫ 電極用切欠き部
３３２ 異極性電極 100, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300 Light-emitting element 1, 1r Residual substrate part 1j Notch part 1s Peripheral side surface 4 n-type cladding layer (n-type layer part)
5 active layer 6 p-type cladding layer (p-type layer part)
DESCRIPTION OF SYMBOLS 9 Light extraction side electrode 9a Joining alloying layer 9m Main electrode 9b Subelectrode 93 Inversion layer part 17 Metal paste layer 21 Joining alloying layer 24 Light emitting layer part 30 DBR layer 32 Metal reflecting film 40 Main compound semiconductor layer 52 Metal stage 90 Transparent Thick film semiconductor layer 91 Auxiliary current diffusion layer JK Notch for electrode 332 Different polarity electrode

Claims (13)

ＧａＡｓ基板の第一主表面上にＡｌＧａＩｎＰからなる発光層部を有した主化合物半導体層をエピタキシャル成長によって形成し、
前記ＧａＡｓ基板の一部が前記主化合物半導体層上の残留基板部となり、前記主化合物半導体層の前記ＧａＡｓ基板側の一部の面が露出するように、前記ＧａＡｓ基板の一部を切り欠いて切欠き部を形成し、
前記ＧａＡｓ基板の一部を切り欠いた結果として形成される前記残留基板部の表面であって、前記ＧａＡｓ基板の前記第一主表面の反対側に位置する第二主表面には、前記発光層部へ発光駆動電圧を印加するための光取出側電極を形成し、
前記主化合物半導体層の一部の面が露出する前記切欠き部の底面を、前記発光層部を有した前記主化合物半導体層からの主光取出面として利用することを特徴とする発光素子の製造方法。 Forming a main compound semiconductor layer having a light emitting layer portion made of AlGaInP on the first main surface of the GaAs substrate by epitaxial growth;
A part of the GaAs substrate is notched so that a part of the GaAs substrate becomes a residual substrate part on the main compound semiconductor layer and a part of the main compound semiconductor layer on the GaAs substrate side is exposed. Forming a notch,
Wherein a surface of the residual substrate portion formed as a result of cutting out a portion of the GaAs substrate, the second main surface located opposite the first main surface of the GaAs substrate, the light-emitting layer light extraction side electrode for applying emission drive voltage to the part formed,
A bottom surface of the notch part at which a part of the surface of the main compound semiconductor layer is exposed is used as a main light extraction surface from the main compound semiconductor layer having the light emitting layer part . Manufacturing method . 前記光取出側電極に通電用ワイヤが接合されてなることを特徴とする請求項１記載の発光素子の製造方法。 The method of manufacturing a light emitting element according to claim 1, wherein a current-carrying wire is joined to the light extraction side electrode. 前記主化合物半導体層には、前記残留基板部と前記発光層部との間に補助電流拡散層を有することを特徴とする請求項１又は請求項２に記載の発光素子の製造方法。 The said main compound semiconductor layer, the manufacturing method of a light emitting device according to claim 1 or claim 2 characterized by having a auxiliary current spreading layer between the residual substrate portion the light emitting layer portion. 前記発光層部が、前記残留基板部に近い側から第一導電型クラッド層、活性層及び第二導電型クラッド層がこの順序で積層されたダブルへテロ構造を有してなり、かつ、前記第一導電型クラッド層が前記第二導電型クラッド層よりも厚く形成されてなることを特徴とする請求項１又は請求項２に記載の発光素子の製造方法。 The light emitting layer portion has a double heterostructure in which a first conductivity type cladding layer, an active layer and a second conductivity type cladding layer are laminated in this order from the side close to the residual substrate portion, and The method for manufacturing a light emitting device according to claim 1, wherein the first conductivity type cladding layer is formed thicker than the second conductivity type cladding layer. 前記光取出側電極は、前記残留基板部を覆う主電極と、該主電極に導通するとともに前記切欠き部の底面のうち前記残留基板部の周囲に位置する一部領域を覆う副電極とを有し、接触抵抗低減用の接合合金化層が前記副電極と接する前記切欠き部の底面領域に形成され、前記残留基板部が、前記発光層部にてｐ−ｎ接合を形成するｐ型層部とｎ型層部とのうち、該残留基板部に近い側のものと逆の導電型を有することを特徴とする請求項１ないし請求項４のいずれか１項に記載の発光素子の製造方法。 The light extraction side electrode includes a main electrode that covers the residual substrate portion, and a sub-electrode that is connected to the main electrode and covers a partial region of the bottom surface of the notch portion that is located around the residual substrate portion. A junction alloying layer for reducing contact resistance is formed in a bottom region of the cutout portion in contact with the sub-electrode, and the residual substrate portion forms a p-n junction in the light emitting layer portion 5. The light emitting device according to claim 1, wherein the light emitting element has a conductivity type opposite to that of the layer portion and the n-type layer portion closer to the residual substrate portion . Manufacturing method . 前記光取出側電極は、前記残留基板部を覆う主電極と、該主電極に導通するとともに前記切欠き部の底面のうち前記残留基板部の周囲に位置する一部領域を覆う副電極とを有し、接触抵抗低減用の接合合金化層が前記副電極と接する前記切欠き部の底面領域に形成され、前記残留基板部が、前記発光層部にてｐ−ｎ接合を形成するｐ型層部とｎ型層部とのうち、該残留基板部に近い側のものと同一の導電型を有し、かつ、前記発光層部と前記残留基板部との間には、前記残留基板部を被覆する形で、該残留基板部と逆の導電型を有する化合物半導体からなる反転層部が介挿されてなることを特徴とする請求項１ないし請求項４のいずれか１項に記載の発光素子の製造方法。 The light extraction side electrode includes a main electrode that covers the residual substrate portion, and a sub-electrode that is connected to the main electrode and covers a partial region of the bottom surface of the notch portion that is located around the residual substrate portion. A junction alloying layer for reducing contact resistance is formed in a bottom region of the cutout portion in contact with the sub-electrode, and the residual substrate portion forms a p-n junction in the light emitting layer portion Of the layer portion and the n-type layer portion, the same conductivity type as that on the side close to the residual substrate portion is provided, and the residual substrate portion is disposed between the light emitting layer portion and the residual substrate portion. 5. The inversion layer portion made of a compound semiconductor having a conductivity type opposite to that of the residual substrate portion is interposed so as to cover the substrate. 5. Manufacturing method of light emitting element. 前記光取出側電極は、前記残留基板部を覆う主電極と、該主電極に導通するとともに前記切欠き部の底面のうち前記残留基板部の周囲に位置する一部領域を覆う副電極とを有し、接触抵抗低減用の接合合金化層が、前記主電極と接する前記残留基板部には形成されず、前記副電極と接する前記切欠き部の底面領域には形成されていることを特徴とする請求項１ないし請求項４のいずれか１項に記載の発光素子の製造方法。 The light extraction side electrode includes a main electrode that covers the residual substrate portion, and a sub-electrode that is connected to the main electrode and covers a partial region of the bottom surface of the notch portion that is located around the residual substrate portion. And a bonding alloying layer for reducing contact resistance is not formed on the residual substrate portion in contact with the main electrode, but is formed in a bottom surface region of the notch portion in contact with the sub electrode. The manufacturing method of the light emitting element of any one of Claim 1 thru | or 4. 前記残留基板部の第二主表面には、前記光取出側電極との接触抵抗を減ずるための接合合金化層が形成されてなることを特徴とする請求項１ないし請求項６のいずれか１項に記載の発光素子の製造方法。 The bonded main alloy layer for reducing contact resistance with the said light extraction side electrode is formed in the 2nd main surface of the said residual substrate part, The any one of Claim 1 thru | or 6 characterized by the above-mentioned. The manufacturing method of the light emitting element as described in a term. 前記光取出側電極は、前記残留基板部の第二主表面及び周側面とを覆う主電極と、前記切欠き部の底面のうち前記残留基板部の周側面に連なる一部領域を覆う副電極とを有し、前記残留基板部の第二主表面の面積が第一主表面の面積よりも小となるように、該残留基板部の周側面が傾斜面として形成され、前記光取出側電極をなす前記主電極と前記副電極とが一体の金属膜として形成されてなることを特徴とする請求項１ないし請求項８のいずれか１項に記載の発光素子の製造方法。 The light extraction side electrode includes a main electrode that covers the second main surface and the peripheral side surface of the residual substrate portion, and a sub-electrode that covers a partial region of the bottom surface of the notch portion that is continuous with the peripheral side surface of the residual substrate portion. has the door, such that the area of the second major surface of the residual substrate portion is smaller than the area of the first main surface, the peripheral side surface of the residual substrate portion is formed as an inclined surface, the light extraction side The method for manufacturing a light-emitting element according to claim 1, wherein the main electrode and the sub-electrode that form electrodes are formed as an integral metal film. 前記主化合物半導体層の第一主表面側には、前記光取出側電極とは異極性となる側の電極部を形成したことを特徴とする請求項１ないし請求項９のいずれか１項に記載の発光素子の製造方法。 10. The electrode portion according to claim 1 , wherein an electrode portion having a polarity different from that of the light extraction side electrode is formed on the first main surface side of the main compound semiconductor layer. 11. The manufacturing method of the light emitting element of description. 前記発光層部が、前記残留基板部に近い側から第一導電型クラッド層、活性層及び第二導電型クラッド層がこの順序で積層されたダブルへテロ構造を有してなり、前記主化合物半導体層の第二主表面側から少なくとも前記活性層の第一主表面までの区間を、前記第二主表面の一部領域において切り欠くことにより電極用切欠き部を形成し、その電極用切欠き部の底面に前記光取出側電極とは異極性となる側の電極を配置したことを特徴とする請求項１ないし請求項９のいずれか１項に記載の発光素子の製造方法。 The light emitting layer portion has a double heterostructure in which a first conductivity type cladding layer, an active layer, and a second conductivity type cladding layer are laminated in this order from the side close to the residual substrate portion, and the main compound An electrode notch is formed by notching a section from the second main surface side of the semiconductor layer to at least the first main surface of the active layer in a partial region of the second main surface. 10. The method of manufacturing a light emitting element according to claim 1, wherein an electrode having a polarity different from that of the light extraction side electrode is disposed on a bottom surface of the notch portion. 11. 前記発光層部の第一主表面側に形成され、前記発光層部からの発光光束のピーク波長に相当する光量子エネルギーよりも大きなバンドギャップエルギーを有するＩＩＩ−Ｖ族化合物半導体からなる厚さ１０μｍ以上の透明厚膜半導体層を有することを特徴とする請求項１ないし請求項１１のいずれか１項に記載の発光素子の製造方法。 10 μm or more in thickness formed of a III-V group compound semiconductor formed on the first main surface side of the light emitting layer portion and having a band gap energy larger than the photon energy corresponding to the peak wavelength of the luminous flux from the light emitting layer portion The method for manufacturing a light-emitting element according to claim 1, further comprising: a transparent thick film semiconductor layer. 前記発光層部と前記残留基板部との間に、屈折率の相違する半導体膜を複数積層することにより、ブラッグ反射を利用して光を反射させるＤＢＲ層を有することを特徴とする請求項１ないし請求項１２のいずれか１項に記載の発光素子の製造方法。 2. A DBR layer that reflects light using Bragg reflection by stacking a plurality of semiconductor films having different refractive indexes between the light emitting layer portion and the residual substrate portion. The manufacturing method of the light emitting element of any one of thru | or 12.
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