JP4459632B2 - Endoscope device - Google Patents

Description

  The present invention relates to an endoscope apparatus, and more particularly, to an electrical system caused by noise generated when a lamp is lit, and particularly to an endoscope apparatus that prevents a malfunction of a CPU.

  Conventionally, a light irradiation device such as a discharge lamp including a xenon lamp has been used in a light source device that requires high luminance.

  The discharge lamp is a type of lamp in which the anode and the cathode have a distance of several mm to several tens of mm in the arc tube portion, and the distance between the electrodes arranged facing each other is relatively short. When arc discharge occurs between the electrodes, strong light emission is generated from a discharge portion called an arc column.

  In order to cause this arc discharge, a high voltage from the lamp power supply is supplied to the igniter to generate a high voltage pulse for starting the discharge lamp. When a predetermined voltage is applied to the cathode and the anode by the high voltage pulse, a dielectric breakdown occurs between the cathode and the anode, thereby forming a route through which a current flows, and discharging along this route causes the lamp to light up. .

  This high voltage pulse, on the other hand, generates radiation noise. Radiation noise is in the vicinity of the light source device, and causes the image processing device that converts the image signal picked up by the scope to a video signal that can be observed on the monitor, and the electrical system that controls each part of the light source device, particularly the CPU. Have potential.

The device of Patent Document 1 discloses that radiation noise is reduced by arranging a ferrite core in a high-voltage cable.
Japanese Patent Laid-Open No. 9-253044

  However, since Patent Document 1 cannot remove all of the radiation noise, there is a possibility that the radiation noise affects the CPU of the image processing apparatus. The CPU operates and performs image processing regardless of whether or not the lamp is lit. However, until the lamp is lit, no light is irradiated on the observation surface, so only a dark image is displayed and power is wasted. Become.

  Accordingly, an object of the present invention is to provide an endoscope apparatus that is not affected by radiation noise while saving power when the lamp is turned on.

  The endoscope light source device according to the present invention outputs a first rectangular wave signal having one first pulse width to drive and turn on the light source device, and performs a first period necessary for starting the lighting of the light source device. The first clock signal having a rectangular waveform that repeats the ON state and the OFF state at a constant frequency is input before and after the first period in the OFF state, and before and after the second period including the first period. A CPU that outputs a clock to each circuit other than the light source device according to the waveform and only counts the clock during the second period and does not output the clock to each circuit is provided. As a result, in addition to the signal output necessary for lighting the light source device, the lighting operation is performed in the off state during the lighting operation period (first period) and the signal output is not performed during the second period including the lighting operation period. Thus, it is possible to avoid the malfunction of the CPU without being affected by the radiation noise caused by.

  Preferably, image processing for converting an image signal obtained by imaging the observation surface from the end point of the second period into a video signal that can be displayed on a color monitor is performed. Thereby, it is possible to save power consumption by the image processing operation until the light source device is turned on.

  Further, preferably, the setting of the second period is performed on software that is programmed in the CPU, and the setting of the first period is performed by setting the first rectangular wave signal output from the CPU to a second pulse width longer than the first pulse width. A one-shot circuit unit that converts and outputs a second rectangular wave signal, a delay circuit unit that outputs a third rectangular wave signal in which the rising start time of the second rectangular wave signal is delayed, and a third rectangular wave A trigger signal output circuit that outputs a fourth rectangular wave signal having a phase opposite to that of the signal to the lighting drive unit of the light source device as a trigger signal, and a second clock signal having a rectangular waveform that repeats an ON state and an OFF state at a constant frequency. A harmonic oscillator having a crystal oscillation circuit and an AND circuit unit that performs a logical OR operation with the second clock signal after converting the third rectangular wave signal into a fourth rectangular wave signal having an opposite phase and outputs the result to the CPU as the first clock signal. It is carried out in the above. As a result, it is possible to set the program so that the variation in the length of the first period caused by the variation in the component constants of the component circuits on the hardware does not deviate from the second period.

  More preferably, the one-shot circuit unit includes a transistor having a base connected to the port of the CPU, an emitter grounded, a collector connected to a power source via a first resistor, and a first capacitor connected to the emitter and the collector, a collector And a first inverter to which an input terminal is connected and a delay circuit portion and an output terminal are connected.

  Preferably, the delay circuit unit includes a second inverter connected to the one-shot circuit unit and the input terminal, a third inverter connected to the output terminal and the input terminal of the second inverter, and one terminal connected to the third inverter. A second resistor connected to the output terminal of the inverter, a fourth inverter to which the other terminal of the second resistor is connected to the input terminal and the trigger signal output circuit and AND circuit unit are connected to the output terminal, and one is the second resistor A resistor and a second capacitor connected to the input terminal of the fourth inverter and the other one grounded.

  Preferably, the trigger signal output circuit includes a fifth inverter connected to the delay circuit unit and the input terminal and connected to the lighting drive unit and the output terminal.

  Preferably, the AND circuit unit includes an AND terminal in which the delay circuit unit and the input terminal are connected, an input terminal is connected to the output terminal of the sixth inverter and the crystal oscillation circuit, and an output terminal is connected to the CPU. Circuit.

  As described above, according to the present invention, it is possible to provide an endoscope apparatus that is not affected by radiation noise while saving power when the lamp is lit.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of an endoscope apparatus according to the present embodiment. 2 and 3 are configuration diagrams of the CPU and the peripheral circuit 30 in the processor 20 of the endoscope apparatus. FIG. 4 shows an output waveform of each part in the lighting operation of the lamp 27c.

  The endoscope apparatus according to this embodiment includes a scope 10, a color processor 20, and a color monitor 40. The scope 10 images the subject (observation surface) under the control of the color processor 20. The image signal obtained by imaging is converted by the color processor 20 into a video signal that can be output by the color monitor 40. The converted video signal is transmitted to the color monitor 40 as an analog signal. The transmitted video signal is output (screen display) by the color monitor 40. The user can observe the subject image captured by the scope based on the output result from the color monitor 40.

  The scope 10 includes an imaging unit 11 and an illumination unit 12, and the imaging unit 11 captures an image of the subject while the illumination unit 12 gives an appropriate amount of light to the observation surface.

  The imaging unit 11 includes an objective lens 11a and an imaging element 11b such as a CCD. The image pickup element 11b is driven by the CCD drive circuit 22 in accordance with a clock pulse output from a CPU 31 described later. Charges accumulated in the image sensor 11b by imaging the subject are detected by a color monitor via a CDS (correlated double sampling circuit) / AGC (auto gain controller) 21, a DSP (digital signal processor) 23, and an image processing circuit 24. 40 is converted (image processing) into a video signal that can be output.

  The illumination unit 12 emits white light and supplies light from the light source device 27 that irradiates the observation surface via the light guiding member 12b and the light distribution lens 12a. The scope 10 and the color processor 20 are optically and electrically connected by a connector portion (not shown).

  The color processor 20 includes a CDS / AGC 21, a CCD drive circuit 22, a DSP 23, an image processing circuit 24, a light source device 27, a power source 28, a power switch 29, a CPU and a peripheral circuit 30, and the scope 10 is operated by a user operation. The image signal that has been picked up by being supplied with a light amount and transferred with electric charge is converted into a video signal that can be output by the color monitor 40. When the power switch 29 is turned on by a user operation, the power switch 29 supplies power from the commercial power source to the power source 28. The power supply 28 supplies power to each unit.

  The light source device 27 includes a lamp lighting switch 27a, a lighting driving unit 27b, a lamp 27c, and a condenser lens 27d. When the power supply 28 is in an on state and the lamp lighting switch 27a is in an on state, the CPU The voltage from the power supply 28 is applied to the lighting drive unit 27b under the control of the peripheral circuit 30. From the applied voltage, the igniter in the lighting drive unit 27b generates a high voltage pulse for a certain period. The high voltage pulse is applied to the lamp 27c. When a predetermined high voltage pulse is applied, dielectric breakdown occurs between the anode part and the cathode part of the lamp 27c, arc discharge is started, and the lamp 27c emits light.

  The CPU and the peripheral circuit 30 control each part of the endoscope apparatus and temporarily record signals. In particular, details of pulse signal generation related to the lighting operation of the lamp 27c will be described with reference to FIGS. The CPU and peripheral circuit 30 include a CPU 31, a one-shot circuit unit 32, a delay circuit unit 33, a lamp trigger circuit unit 34, an AND circuit unit 35, and a crystal oscillation circuit 36.

  The CPU 31 outputs a first rectangular wave (pulse) signal rs1 having one first pulse width τ1 (T1 to T2) to the one-shot circuit unit 32 (port). The one-shot circuit unit 32 converts the first rectangular wave signal rs1 into a second rectangular wave signal rs2 having one second pulse width τ2 (T1 to T4) longer than the first pulse width τ1, and sends it to the delay circuit unit 33. Output (OUT1). The rising times (T1) of the waveforms of the first and second rectangular wave signals rs1 and rs2 are substantially the same. The delay circuit unit 33 outputs the third rectangular wave signal rs3 obtained by delaying the rising point of the second rectangular wave signal rs2 from T1 to T3 to the ramp trigger circuit unit 34 and the AND circuit unit 35 (OUT2). The lamp trigger circuit unit 34 converts the third rectangular wave signal rs3 into a fourth rectangular wave signal rs4 having the opposite phase to the lighting rectangular driving signal 27b (OUT3). By receiving the output of the fourth rectangular wave signal rs4, the igniter in the lighting drive unit 27b generates a high voltage pulse from the voltage applied from the power supply 28. The crystal oscillation circuit 36 outputs the second clock signal cs2 having a rectangular waveform that repeats the on state and the off state at a constant frequency (clock frequency) to the AND circuit unit 35 (CL). The AND circuit unit 35 converts the third rectangular wave signal rs3 into a fourth rectangular wave signal rs4 having an opposite phase and outputs a first clock signal cs1 obtained by performing a logical sum operation with the second clock signal cs2 to the CPU 31 ( CLOUT). The CPU 31 outputs the first clock signal cs1 to each circuit excluding the light source device 27 via the one-shot circuit unit 32. Therefore, the CPU 31 has a signal control function.

  Since the first clock signal cs1 has an off signal for a certain period (T3 to T5), the CPU 31 is in a resting state during that period. Before and after the predetermined period (T3 to T5), a rectangular waveform that repeats an on state and an off state at the same constant frequency as the waveform of the second clock signal is shown. The fixed period (T3 to T5) in the off state is defined as a CPU clock pause period t11 (first period). The CPU clock pause period t11 has the same length as the second pulse width τ2 of the second to fourth rectangular wave signals rs2 to rs4, and the CPU clock pause period t11 starts simultaneously with the rise of the third rectangular wave signal rs3. The CPU clock pause period t11 ends at the same time when the third rectangular wave signal rs3 falls.

  During the period from T3 to T5, the waveform of the first clock signal cs1 output from the CPU 31 to each circuit is kept off. Therefore, during this time, the CPU 31 does not control each circuit. Therefore, the lamp 27c is lit by the high voltage pulse generated by the lighting drive unit 27b by the fourth rectangular wave signal rs4 from the lamp trigger circuit unit 34 during the period from T3 to T5, but the CPU 31 operates during that time. Since no potential difference is generated between each circuit and the radiation noise is generated, the circuit is not latched up and no malfunction occurs.

  In addition, the CPU 31 performs a clock count according to the waveform of the first clock signal cs1 during the CPU clock suspension period t11 and before and after (T2-T3, T5-T6), but sets a NOP timer that does not output a signal to each circuit. A period t22 (second period) is provided. The NOP timer setting period t22 starts simultaneously with the fall (T2) of the first rectangular wave signal rs1 output from the port of the CPU 31, and ends after the end T5 of the CPU clock pause period t11 (T6). During the CPU clock pause period t11 in the NOP timer setting period t22, the waveform of the first clock signal cs1 is in an off state, so that clock counting is not performed.

  The lighting operation of the lamp 27c is performed in the CPU clock pause period t11 between T3 and T5, but the clock (control signal) is sent to each circuit during the period before and after that (T2-T3, T5-T6). Depending on the timing, there is a risk of generating radiation noise. Therefore, in the present invention, during the NOP timer setting period t22 including the CPU clock pause period t11, only the clock count is overlapped and the signal output to each circuit is not performed, and the generation of radiation noise that may occur depending on the timing is suppressed. It was.

  The operation related to the image processing is started from the time (T6) when the lighting of the lamp 27c is started and the NOP timer of the CPU 31 is ended. Therefore, image processing is not performed until the lamp 27c is turned on. Until the lamp 27c is turned on, light is not supplied to the observation surface facing the distal end of the scope 10, so that it is not necessary to perform image processing and power saving can be achieved.

  The one-shot circuit unit 32 includes a first resistor 32a, a first inverter 32b, a first capacitor 32c, and a transistor 32d. The base of the transistor 32d is connected to the port of the CPU 31, the collector is connected to the first resistor 32a, the input terminal of the first inverter 32b, and the first capacitor 32c, and the emitter is connected to the first capacitor 32c and grounded. The first rectangular wave signal rs1 output from the port is input to the first inverter 32b as the first modified signal ds11 having a long fall time with the on state and the off state reversed (A1). As a result, the second rectangular wave signal rs2 is output from the first inverter 32b (OUT1).

  The delay circuit unit 33 includes a second inverter 33a, a third inverter 33b, a second resistor 33c, a fourth inverter 33d, and a second capacitor 33e. The input terminal of the second inverter 33a is connected to the output terminal of the first inverter 32b of the one-shot circuit section 32, the input terminal of the third inverter 33b is connected to the output terminal of the second inverter 33a, and one of the second resistors 33c. Is connected to the output terminal of the third inverter 33b, the input terminal of the fourth inverter 33d is connected to the other one of the second resistor 33c and one of the second capacitor 33e, and the other one of the second capacitor 33e is grounded. The The second rectangular wave signal rs2 output from the one-shot circuit unit 32 is input to the fourth inverter 33d as the second modified signal ds12 having a long rise and fall time with the on state and the off state being reversed (A2). As a result, the third rectangular wave signal rs3 is output from the fourth inverter 33d (OUT2).

  The lamp trigger circuit unit 34 includes a fifth inverter 34a. The input terminal of the fifth inverter 34 a is connected to the output terminal of the fourth inverter 33 d of the delay circuit unit 33. The third rectangular wave signal rs3 output from the delay circuit unit 33 is output from the fifth inverter 34a as a fourth rectangular wave signal rs4 having an opposite phase.

  The AND circuit unit 35 includes an AND circuit 35a and a sixth inverter 35b. The input terminal of the sixth inverter 35b is connected to the output terminal of the fourth inverter 33d of the delay circuit section 33, and the input terminal of the AND circuit 35a is connected to the output terminal of the crystal oscillation circuit 36 and the output terminal of the sixth inverter 35b. . The third rectangular wave signal rs3 output from the delay circuit unit 33 is output from the sixth inverter 35b as a fourth rectangular wave signal rs4 having an opposite phase (A3). As a result, the fourth rectangular wave signal rs4 and the second clock signal cs2 output from the crystal oscillation circuit 36 are ORed, and the first clock signal cs1 is output from the AND circuit 35a to the CPU 31.

  The color monitor 40 is a commercially available color monitor that can capture and display a video signal, and outputs (screen displays) the video signal captured by the scope 10 and converted by the color processor 20.

  Next, the procedure for turning on and off the lamp 27c will be described with reference to FIG. After the power is turned on in step S101, initial settings of the processor 20 and the like are made in step S102. At this time, the image processing circuit 24 and the like are not driven and image processing is not performed, so that the image on the observation surface is not displayed on the color monitor 40. In step S103, it is determined whether or not the lamp lighting switch 27a is turned on. If not, the process returns to step S102. If it is in the on state, the lamp 27c is turned on in step S104. Specifically, the first rectangular wave signal rs1 that is set to Lo is output after a fixed time (τ1) after the output of the CPU 31 port is set to Hi in step S104a, and the NOP timer of the CPU 31 is set in step S104b. The lighting operation is started later. In the present embodiment, description will be made on the assumption that the lamp 27c is turned on by performing one trigger, that is, steps S104a and 104b once. However, these steps S104a and S104b may be repeated until the lamp 27c is turned on. After the lamp 27c is turned on, the CCD 11b and the like are driven in step S105, image processing is performed, and an image on the observation surface is displayed on the color monitor 40. In step S106, it is determined whether or not the lamp lighting switch 27a has been turned off. If not turned off, the process returns to step S105. If it is in the off state, a light-off operation such as stopping the power supply to the lamp 27c is performed in step S107, and the process returns to step S102.

  When the lamp 27c is lit, the igniter in the lighting drive unit 27b generates a high voltage pulse, thereby generating radiation noise. Radiation noise affects the CPU 31 and causes a malfunction, for example, the potential of the signal line seen from GND cannot be recognized or reversed because the potential of the GND is greatly changed. However, in step S104 (between T3 and T5 in FIG. 4) of the lighting operation in which the igniter in the lighting drive unit 27b generates a high voltage pulse, the CPU 31 does not operate in the clock pause period t11. Therefore, the CPU 10 is not affected by the radiation noise generated by the high voltage pulse, and the CPU 10 does not malfunction. Further, in a certain period including before and after the clock pause period t11 (between T2 and T6 in FIG. 4), the clock according to the waveform of the first clock signal cs1 is counted in the NOP timer setting period t22. No clock (control signal) is output to each circuit. If a clock (control signal) is output to each circuit during this time, it may cause radiation noise depending on the timing, but since it is not output, it does not cause radiation noise.

  The setting of the NOP timer period t22 is performed on the software programmed in the CPU 31. The setting of the CPU clock suspension period t11 is performed on hardware such as the delay circuit unit 33. However, since the delay circuit unit 33 and the like do not involve large parts, it does not hinder downsizing and weight reduction of the system. Further, the CPU clock pause period t11 may vary somewhat due to variations in the component constants of the constituent circuits. However, since the setting of the NOP timer period t22 is performed on software, there is no deviation from this period. It is possible to set up a program. In addition, there is little possibility that the ease of manufacturing is hindered by adding the delay circuit unit 33 and the like.

  It is not preferable that the CPU 31 that controls each part of the endoscope apparatus is put into a sleep state for a long time because the operation of each part is rested during that time. However, it is not possible to put the CPU 31 in a pause state only before and after the subject is imaged and before the operation of the image processing apparatus, and before and after the igniter in the lighting drive unit 37b that turns on the lamp 27c generates a high voltage pulse. The operation of the endoscope apparatus is not adversely affected. Even during the CPU clock suspension period t11, the first rectangular wave signal rs1 output from the port of the CPU 31 immediately before that passes through the one-shot circuit unit 32, the delay circuit unit 33, and the ramp trigger circuit unit 34. Thus, since the fourth rectangular wave signal rs4 is output to the lighting drive unit 27b, the lamp lighting operation does not stop.

  Further, there may be a case where dielectric breakdown occurs due to generation of one high voltage pulse and the lamp 27c is turned on, but there may be a case where high voltage pulses need to be generated a plurality of times before dielectric breakdown occurs. However, also in this case, by repeating the lighting operation until the lamp 27c is lit, the CPU 31 can be put into a resting state during that time, so that the operation of the CPU 31 does not start while the high voltage pulse is being generated. . Therefore, no malfunction occurs in the CPU 31.

It is a lineblock diagram of the endoscope apparatus of this embodiment. It is a block diagram around CPU in the processor of the endoscope apparatus of this embodiment. The detailed circuit of each part is shown in the block diagram around the CPU. The waveform output by each part around CPU is shown. The flowchart of the lighting / extinguishing procedure of the lamp is shown.

Explanation of symbols

10 Scope 20 Color Processor 27 Light Source Device 30 CPU and Peripheral Circuit 31 CPU
32 One-shot circuit section 33 Delay circuit section 34 Lamp trigger circuit section 35 AND circuit section 36 Crystal oscillation circuit 40 Color monitor

Claims (6)

A first rectangular wave signal having one first pulse width is output to drive the light source device to turn on, and the state before and after the first period is constant in the OFF state for the first period necessary for starting the lighting of the light source device. A first clock signal having a rectangular waveform that repeats an on state and an off state at a frequency is input, and before and after the second period including the first period, each circuit other than the light source device according to the waveform of the first clock signal A CPU that outputs a clock and outputs clocks only during the second period and does not output a clock to each circuit ;
The setting of the second period is performed on software programmed in the CPU, and the setting of the first period is performed by using the first rectangular wave signal output from the CPU as a second pulse longer than the first pulse width. A one-shot circuit unit that converts and outputs a second rectangular wave signal having one width; a delay circuit unit that outputs a third rectangular wave signal obtained by delaying the rising start time of the second rectangular wave signal; A trigger signal output circuit that outputs a fourth rectangular wave signal having a phase opposite to that of the three rectangular wave signal to the lighting drive unit of the light source device as a trigger signal, and a second waveform having a rectangular waveform that repeats an ON state and an OFF state at the constant frequency A crystal oscillation circuit for outputting a clock signal; and the third rectangular wave signal is converted into the fourth rectangular wave signal having an opposite phase, and then logically ORed with the second clock signal to obtain the CPU as the first clock signal. The endoscope apparatus which comprises carrying out a hard on and an output to the AND circuit portion.   The endoscope apparatus according to claim 1, wherein image processing is performed to convert an image signal obtained by imaging the observation surface from the end point of the second period into a video signal that can be displayed on a color monitor. The one-shot circuit unit includes a transistor having a base connected to a port of the CPU, an emitter grounded, a collector connected to a power supply via a first resistor, and a first capacitor connected to the emitter and the collector, the collector and the input The endoscope apparatus according to claim 1 , further comprising a first inverter connected to a terminal and connected to the delay circuit unit and an output terminal. The delay circuit section includes a second inverter connected to the one-shot circuit section and an input terminal, a third inverter connected to an output terminal and an input terminal of the second inverter, and one terminal connected to the third inverter. A second resistor connected to the output terminal, a fourth inverter to which the other terminal of the second resistor is connected to the input terminal, the trigger signal output circuit and the AND circuit unit are connected to the output terminal, and The endoscope apparatus according to claim 1 , further comprising a second capacitor connected to the second resistor and an input terminal of the fourth inverter and having the other one grounded. 2. The endoscope apparatus according to claim 1 , wherein the trigger signal output circuit includes a fifth inverter connected to the delay circuit unit and an input terminal and connected to the lighting drive unit and the output terminal. The AND circuit unit includes a sixth inverter connected to the delay circuit unit and an input terminal, an AND terminal connected to the output terminal of the sixth inverter and the crystal oscillation circuit, and an output terminal connected to the CPU. The endoscope apparatus according to claim 1 , further comprising a circuit.

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