JP4454380B2 - 3D noise reduction circuit and video signal processing apparatus - Google Patents

Description

  The present invention relates to a three-dimensional noise reduction circuit and a video signal processing apparatus including the circuit, and can be applied to, for example, a video reproduction apparatus such as a television receiver, a projector, a DVD player, and a video player.

  In recent years, with an increase in the size of a screen of a television receiver or the like, a noise signal included in an input video signal has become conspicuous. Various three-dimensional noise reduction (hereinafter abbreviated as 3D-NR) circuits that reduce noise components in the time axis have been proposed in order to reduce noise signals and display high-quality images.

  The conventional 3D-NR circuit tries to remove a noise signal by adding a signal of one field or one frame before and a signal of the current field or current frame to perform a temporal LPF (low pass filter) operation. Yes. In such a 3D-NR circuit, the motion may be blurred, and the motion detection by the motion detection circuit is used in combination to weaken the effect of noise reduction (hereinafter abbreviated as NR) in a portion with motion. Is also adopted.

  FIG. 5 is a schematic diagram illustrating a configuration example of a 3D-NR circuit according to the related art. In the 3D-NR circuit illustrated in FIG. 5, a digital video signal is input to the frame memory 101, the NR processing circuit 102, and the motion detection circuit 103. The frame memory 101 outputs the video signal (delayed signal) of one field or one frame before to the NR processing circuit 102 and the motion detection circuit 103. The motion detection circuit 103 detects a motion from the input video signal and the video signal of one field or one frame before and outputs it to the NR processing circuit 102. Based on the motion detection by the motion detection circuit 103, the NR processing circuit 102 performs NR processing from the input video signal and the video signal of one field or one frame before, and outputs an output video signal. Here, the frame memory 101 can be installed in common with the motion detection circuit 103 and the NR processing circuit 102 as shown in the figure.

  However, in the 3D-NR circuit illustrated in FIG. 5, since the performance of the motion detection circuit is not good, the effect of NR is affected by the erroneous detection of motion and the detection sensitivity, and the video signal is blurred. turn into. For example, in a low SNR image that really wants to improve the signal-to-noise ratio (hereinafter abbreviated as SNR), motion detection is misjudged and all motion modes are entered, and NR does not work. On the other hand, in order to improve this effect, if the motion detection sensitivity is lowered and the motion adaptive operation is weakened, blurring occurs in the originally moving image. Thus, in the 3D-NR circuit illustrated in FIG. 5, a motion detection error is likely to occur, and the NR effect is weak.

  There has also been proposed a 3D-NR circuit for the purpose of eliminating the above-described image blur caused by the performance problem of the motion detection circuit (see, for example, Patent Document 1). In the 3D-NR circuit of Patent Document 1, not only the motion detection circuit in the NR processing circuit but also the highly accurate motion detection result from the motion detection circuit for the three-dimensional YC separation circuit is reflected in the motion detection result of the NR processing circuit. I am letting.

  FIG. 6 is a block configuration diagram of a 3D-NR circuit according to Patent Document 1. In FIG. A 3D-NR circuit described in Patent Document 1 includes an AD conversion circuit 111 for converting an analog video signal into a digital signal, and a three-dimensional YC for separating a signal from the AD conversion circuit 111 into a luminance signal and a chroma signal. A separation circuit 112; a first motion detection circuit 113 for the three-dimensional YC separation circuit 112 for detecting whether the video signal from the AD conversion circuit 111 is a moving image or a still image; the three-dimensional YC separation circuit 112; A first frame memory 114 that outputs a one-frame delayed signal of the signal from the AD conversion circuit 111 required by the motion detection circuit 113, and an NR processing circuit 120. The NR processing circuit 120 includes a first addition circuit 121 for subtracting a noise signal from the signal from the three-dimensional YC separation circuit 112, and a second addition for delaying the signal from the first addition circuit 121 by one frame. The amount of motion of the signal from the frame memory 122, the second addition circuit 123 for subtracting the signal from the second frame memory 122 from the signal from the three-dimensional YC separation circuit 112, and the signal from the three-dimensional YC separation circuit 112 is calculated. A second motion detection circuit 125 for detecting and selecting a cyclic coefficient, and a signal from the first motion detection circuit 113 for the first cyclic coefficient and the second cyclic coefficient from the second motion detection circuit 125. And a multiplier circuit 124 for multiplying the signal from the second adder circuit 123 by the signal from the switch circuit 126 so that the input video signal is static. If the image is large cyclic coefficient, in the case of video so that to reduce the cyclic coefficient.

FIG. 7 is a schematic diagram illustrating another configuration example of the 3D-NR circuit according to the related art. The 3D-NR circuit illustrated in FIG. 7 is a circuit that performs general frame cyclic NR processing including the configuration of the 3D-NR circuit described in FIG. 6 as one mode. In the 3D-NR circuit illustrated in FIG. 7, the digital video signal is input to the frame cyclic NR processing circuit 131 and the motion detection circuit 132 with a frame memory. The motion detection circuit 132 with a frame memory detects motion based on the input video signal and the video signal (delay signal) one field or one frame before delayed by the internal frame memory, and the frame cyclic NR processing circuit 131. Output to. The frame cyclic NR processing circuit 131 changes the cyclic coefficient based on the motion detection by the motion detection circuit 132, and the input video signal and the video signal of one field or one frame before delayed by the frame memory inside the circuit 131 ( NR processing is performed from the delay signal), and an output video signal is output. Here, the frame memory is provided in both the frame cyclic NR processing circuit 131 and the motion detection circuit 132.
JP 2003-319203 A

  However, in the frame cyclic NR process illustrated in FIG. 7, a strong NR effect can be obtained, but tailing may occur. As described above, in the 3D-NR circuit according to the prior art, the adjustment item is only the motion determination sensitivity. Therefore, when the motion detection sensitivity is lowered, the original motion image is blurred, and the motion detection sensitivity is increased. There is a problem that tailing occurs.

  In the frame cyclic 3D-NR circuit illustrated in FIG. 7, two frame memories are required for cyclic NR processing and motion detection. On the other hand, in the 3D-NR circuit illustrated in FIG. 5, the frame memory 101 can be shared by the NR processing circuit 102 and the motion detection circuit 103, but the frame memory 101 enters the signal trunk line, and the memory If compression is performed to reduce the capacity, errors due to compression may be output or accumulated and output as they are, and if there is a compression error, the image quality will be adversely affected. Thus, it becomes difficult to apply compression (and expansion) to the frame memory.

  The present invention has been made in view of the above circumstances, and when removing a noise signal from an input video signal, the present invention is accurate without causing tailing or blurring of either a moving image or a still image. There are provided a three-dimensional noise reduction circuit capable of removing noise and minimizing the number and capacity of necessary frame memories, and a video signal processing apparatus including the three-dimensional noise reduction circuit. That is the purpose.

The present invention is constituted by the following technical means in order to solve the above-described problems.
A first technical means is a three-dimensional noise reduction circuit for reducing a noise component in a time axis of a frame period with respect to a digital input video signal, and a frame for delaying the input video signal by one or several frame periods A threshold value for obtaining an interframe difference between the memory and the current video signal that is the input video signal subject to noise reduction processing and a delayed video signal in the frame memory , and thresholding the obtained difference signal with a predetermined threshold value Only for the current video signal that is determined to be smaller than the predetermined threshold by the processing means and the threshold processing means, the temporal time of the current video signal is calculated by the inter-frame average of the current video signal and the delayed video signal. A low frequency component calculating means for calculating a low frequency component, the current video signal, and a temporal low frequency component calculated by the low frequency component calculating means for the current video signal. A high-frequency component calculating means for calculating a temporal high-frequency component of the current video signal based on a difference from the signal of the current video signal, and a signal having an amplitude smaller than a predetermined amplitude among the calculated high-frequency component signals The coring processing means that considers the signal to be removed or suppressed, and outputs only the current video signal determined by the threshold processing means to be smaller than the predetermined threshold. Signal adding means for adding and outputting the output of the frequency component calculating means, and outputting the output of the signal adding means only for the current video signal determined to be smaller than the predetermined threshold by the threshold processing means Is the output video signal, and for the other current video signals, the current video signal is output as it is as the output video signal.

The second technical means is a three-dimensional noise reduction circuit for reducing a noise component in a time axis of a frame period with respect to a digital input video signal, wherein the input video signal is delayed by one or several frames. A threshold value for obtaining an interframe difference between the memory and the current video signal that is the input video signal subject to noise reduction processing and a delayed video signal in the frame memory , and thresholding the obtained difference signal with a predetermined threshold value Only for the current video signal that is determined to be smaller than the predetermined threshold by the processing means and the threshold processing means, the temporal time of the current video signal is calculated by the inter-frame average of the current video signal and the delayed video signal. A low frequency component calculating means for calculating a low frequency component, the current video signal, and a temporal low frequency component calculated by the low frequency component calculating means for the current video signal. The high-frequency component calculating means for calculating the temporal high-frequency component of the current video signal based on the difference from the signal of the current video signal, only the signal having an amplitude smaller than a predetermined amplitude among the calculated high-frequency component signals, Coring processing means that regards it as a noise signal and outputs it as it is or suppressed, and only for the current video signal determined by the threshold processing means to be smaller than the predetermined threshold, the coring processing from the current video signal Signal subtracting means for subtracting the output of the means, and outputting the output video signal of the signal subtracting means only for the current video signal determined by the threshold processing means to be smaller than the predetermined threshold value For other current video signals, the current video signal is output as it is as an output video signal.

A third technical means further comprises another frame memory in the first or second technical means for delaying the input video signal by one or several frame periods and holding it as the current video signal, wherein the frame memory is The current video signal output from the other frame memory is further delayed by one or several frames and held as the delayed video signal, and the threshold processing means includes a current frame that is a frame of the current video signal, The difference between the current frame and the previous frame that is the frame of the delayed video signal in time, and the current frame and the frame of the input video signal that is behind the current frame in time. difference there after frame, obtains a difference between frames of both, the threshold processing on the respective difference signal obtained said, the low-frequency component calculating unit, wherein If one of the frames and the subsequent frame is determined to have a small difference absolute value from the current frame, the frame is not determined to be a frame that has not been determined to have a small difference absolute value. The present video signal is used for the calculation of the inter-frame average instead of the video signal.

  A fourth technical means is the compression means for compressing the input video signal in any one of the first to third technical means, and an expansion means for expanding the video signal compressed by the compression means after delaying. And is further provided.

  According to a fifth technical means, in any one of the first to fourth technical means, a means for changing the predetermined amplitude is further provided.

  The sixth technical means is any one of the first to fifth technical means, further comprising means for changing the predetermined threshold value.

A seventh technical means is characterized in that, in any one of the first to sixth technical means, the predetermined amplitude is defined by a function that smoothly touches in the vicinity of two predetermined threshold values related to the amplitude. .

  An eighth technical means is a three-dimensional noise reduction circuit for reducing a noise component in a time axis of a frame period with respect to a digital input video signal, wherein the input video signal is delayed by one or several frames. A difference unit that calculates a difference between a memory, a previous video signal that is the previous input video signal delayed by the frame memory, and a current video signal that is the input video signal; A comparator that compares the difference absolute value with a predetermined threshold value, the current video signal as one input terminal, the previous video signal as the other input terminal, and the difference absolute value is determined by the comparison in the comparator. A switch for switching to output the previous video signal when it is determined that the current video signal is smaller than a threshold value, and outputting the current video signal at other times; A low-pass filter that averages the output video signal and outputs a temporal low-frequency component of the current video signal, and a difference between the current video signal and the low-frequency component signal output from the low-pass filter A high-pass filter that outputs a temporal high-frequency component of the current video signal, and a signal having an amplitude smaller than a predetermined amplitude out of the high-frequency component signal output from the high-pass filter is regarded as a noise signal and removed. Or a coring circuit that outputs the output with suppression, and an adder that adds the output from the coring circuit and the output from the low-pass filter and outputs the result as an output video signal. It is.

  A ninth technical means is a three-dimensional noise reduction circuit for reducing a noise component in the time axis of a frame period with respect to a digital input video signal, wherein the input video signal is delayed by one or several frame periods. 1 frame memory, a second frame memory that further delays the delayed video signal output from the first frame memory by one or several frame periods, and two previous frames delayed by the second frame memory A first subtractor that calculates an absolute difference between a previous video signal that is an input video signal and a current video signal that is a previous input video signal delayed by the first frame memory; and the input video signal A second subtractor that calculates a difference absolute value between the subsequent video signal and the current video signal output from the first frame memory, and a difference absolute value calculated by the first subtractor is predetermined. A first comparator for comparing with a threshold, a second comparator for comparing a difference absolute value calculated by the second differentiator with a predetermined threshold, and the current video signal as one input terminal, The previous video signal is used as the other input terminal, the previous video signal is output when the absolute value of the difference is determined to be smaller than the predetermined threshold by comparison in the first comparator, and the current video is output at other times. A first switch for switching to output a signal, the current video signal as one input terminal, the rear video signal as the other input terminal, and the absolute value of the difference is determined by the comparison in the second comparator A second switch for switching to output the subsequent video signal when it is determined that the current video signal is output at other times, and the current video signal and the first switch. A low-pass filter that averages the video signal and the video signal output from the second switch and outputs a temporal low-frequency component of the current video signal, and is output from the current video signal and the low-pass filter A high-pass filter that outputs a high-frequency component in time from the current video signal by subtracting a low-frequency component signal, and a high-frequency component signal output from the high-pass filter has an amplitude smaller than a predetermined amplitude. A coring circuit that removes or suppresses the signal as a noise signal and outputs it, an adder that adds the output from the coring circuit and the output from the low-pass filter, and outputs it as an output video signal; It is characterized by having.

  According to a tenth technical means, in the eighth or ninth technical means, a compressor for compressing the input video signal provided in the previous stage of the frame memory, and the compression provided in the subsequent stage of the frame memory. And a decompressor for decompressing the input video signal compressed by the device.

  The eleventh technical means is any one of the eighth to tenth technical means, further comprising means for changing the predetermined amplitude.

  According to a twelfth technical means, in any one of the eighth to eleventh technical means, a means for changing the predetermined threshold value is further provided.

A thirteenth technical means is characterized in that, in any one of the eighth to twelfth technical means, the predetermined amplitude is defined by a function that smoothly contacts in the vicinity of two predetermined threshold values related to the amplitude. .

  A fourteenth technical means is a video signal processing apparatus provided with the three-dimensional noise reduction circuit in any one of the first to thirteenth technical means.

A fifteenth technical means is provided with a three-dimensional noise reduction circuits in any technical means of the first to seventh, a video signal processing apparatus for use in a liquid crystal display device formed by a liquid crystal cell display area, wherein A means for detecting movement with respect to a video signal obtained by interframe difference, and a means for correcting the video signal for which movement has been detected so as to apply a voltage higher than normal to the liquid crystal cell. For the current video signal, instead of the current video signal, the corrected video signal is output as an output video signal.

Technical means 16 comprises a three-dimensional noise reduction circuits in any technical means of the eighth to 13, a video signal processing apparatus for use in a liquid crystal display device formed by a liquid crystal cell display area, wherein Means for detecting motion with respect to a video signal that has been interframe-differenced, and means for correcting the video signal with motion detected so as to apply a voltage higher than normal to the liquid crystal cell. The corrected video signal is input to the one input terminal instead of the current video signal, and the corrected video signal is input instead of the current video signal input to the low-pass filter. The corrected video signal is input instead of the current video signal input to the high-pass filter.

  According to the present invention, when removing a noise signal from an input video signal, it is possible to accurately remove noise without causing tailing or blurring of both a moving image and a still image, and a necessary frame. It is possible to minimize the number and capacity of memories. In addition, according to the present invention, when an overdrive circuit is used in combination with a liquid crystal display device, motion blur can be prevented even for a signal determined to be motion.

  FIG. 1 is a block diagram showing a configuration example of a three-dimensional noise reduction circuit according to an embodiment of the present invention. In the figure, 1 is a three-dimensional noise reduction circuit (3D-NR circuit), 11 is a compression circuit, Is a frame memory, 13 is a decompression circuit, 14 is a threshold processing circuit, 15 is a constant memory, 16 is a low pass filter (LPF), 17 is a subtractor, 18 is a coring circuit, 19 is an adder, 21 is a subtractor, 22 Is an absolute value calculator, 23 is a comparator, 24 is a switch, 25 is an adder, and 26 is a divider.

  A 3D-NR circuit according to an embodiment of the present invention is a circuit that reduces noise components in the time axis of a frame period. First, an input digital input video signal (also referred to as an input image signal) is used. Whether it corresponds to “motion” or “noise” is determined (predicted) by threshold processing for the difference between frames, and only for the input video signal that is expected to be noise, and its high frequency in time Only the components are subjected to coring processing to remove noise. On the other hand, the same signal is output by subtracting the input video signal of the frame determined as “motion”. Further, since the 3D-NR circuit according to the present invention handles digital signals, it can also be called a three-dimensional digital noise reduction circuit (3D-DNR circuit). Note that when an analog signal is handled, an A / D converter is inserted in front of the 3D-DNR circuit.

  Here, the term “between frames” means between the current frame (frame subject to 3D-NR processing) and one or several frames before it, or between the current frame and one or several frames after it. To do. Therefore, the difference between the frame of the current frame and the previous frame means the difference between the video signal of the current frame and a signal delayed by one or several frame periods from the video signal. The difference between frames means a difference between a video signal of the current frame and a signal input after one or several frame periods from the video signal. Of course, instead of the difference between frames, a difference between odd fields, a difference between even fields, or a difference between fields after performing intra-frame interpolation may be adopted. The other components of the 3D-NR circuit are also components that execute processing between the difference input video signals.

  The 3D-NR circuit 1 illustrated in FIG. 1 includes at least a frame memory 12, a threshold processing circuit 14, an LPF 16, a subtracter 17, a coring circuit 18, and an adder 19. Of course, the 3D-NR circuit 1 can be configured with a circuit that substitutes for these components, and preferably includes a constant memory 15.

  The frame memory 12 is a memory for delaying an input video signal which is a digital signal, and a general-purpose DRAM (Dynamic Random Access Memory) or the like may be adopted, but has a FIFO (First-In-First-Out function). It is preferable to adopt a memory) from the viewpoint of ease of memory control. The frame memory 12 is called field memory when processing between fields is executed. The 3D-NR circuit 1 illustrated in FIG. 1 includes a compression circuit 11 that compresses an input video signal in the previous stage in order to reduce the memory capacity of the frame memory 12, and the compressed video signal output from the compression circuit 11 is a frame. It is configured to be input to the memory 12. In addition, a decompression circuit 13 for decompressing the compressed video signal output from the frame memory 12 is provided in the subsequent stage of the frame memory 12.

  The threshold processing circuit 14 is a circuit as an example of threshold processing means. The threshold processing circuit 14 takes a difference between an input video signal (video signal of the current frame) and a delayed video signal (for example, a video signal of one frame before) and converts it to an absolute value. Threshold processing. If the difference absolute value is greater than the constant threshold (or greater than or equal to the constant threshold), the current signal is output as is, and if it is less than or equal to the constant threshold (or smaller than the constant threshold), the signal one frame before Is sent to the LPF 16. The threshold processing circuit 14 thus forms a basic configuration for performing a motion edge adaptive operation, and the threshold processing is based on whether the input video signal is “including motion” or “including noise”. It is assumed that there is noise when it is below a certain level (or below a certain level). With this process, only when the frame difference is smaller than a certain threshold value (or less than or equal to the threshold value), the coring process is performed in the subsequent stage.

  Now, it is assumed that a video signal of one frame is obtained from video signals (image signals) output from the n pixels P1 to Pn, and the operation when the video signal output from the pixel Px is input to the input terminal is as follows. The operation of the 3D-NR circuit 1 will be described as an example. At this time, in the video signals output from the pixels P1 to Pn, the video signals of the current frame are p1 to pn, and the video signals of the previous frame are pa1 to pan. A pixel in the previous frame at a position corresponding to the pixel Px is defined as a pixel Pax. Note that the processing unit in each process in the 3D-NR circuit according to the present invention is not limited to a pixel unit, and may be a signal unit of a shorter period or a longer period. It may be a pixel unit.

  The threshold processing circuit 14 illustrated in FIG. 1 includes a subtracter (difference unit) 21, an absolute value calculator 22, a comparator 23, and a switch 24. When the current frame video signal px from the pixel Px is input to the input terminal, the previous frame video signal pax of the pixel Px is output from the frame memory 12 to the subtractor 21. The subtractor 21 inputs the video signal px of the pixel Px as an input video signal and the video signal pax of the pixel Pax as a delayed video signal one frame before which is output from the frame memory 12, and subtracts them. The difference signal px−pax is calculated and output to the absolute value calculator 22. The absolute value calculator 22 calculates the absolute value | px−pax | for the difference signal input from the subtractor 21 and outputs the absolute value | px−pax | to the comparator 23. Here, the difference and the absolute value thereof may be the difference between the signal values of the video signals and the absolute value thereof, but when the signal processing unit is a pixel unit, the pixels indicated by the video signals It may be a difference value between values and an absolute value thereof.

  The comparator 23 compares the absolute difference value | px−pax | input from the absolute value calculator 22 with a constant (M) stored in the constant memory 15 and outputs the result to the switch 24. To do. Here, the constant memory 15 is a memory for storing the constant M, and is basically included in the threshold processing circuit 14 (or the comparator 23) as its component. However, it is particularly preferable that the predetermined threshold (constant M) stored in the constant memory 15 is rewritable, and it is preferable that the 3D-NR circuit further includes means for changing the predetermined threshold.

  The switch 24 is provided with two input terminals (terminals A and B). Whether the video signal output to the LPF 16 (adder 25) is a video signal input from one of the terminals A and B. Switch. The terminal A is a terminal for inputting an input video signal as it is, and the terminal B is a terminal for inputting a video signal input to the threshold processing circuit 14 (that is, a video signal output from the frame memory 12) as it is. In the example of FIG. 1, compression / expansion is executed, and the terminal B is configured to receive an output from the expansion circuit 13.

  Also, one signal input to the adder 25 in the LPF 16 is an input video signal, the other video signal is a delayed video signal or an input video signal, and the switch 24 switches the constant M by the comparator 23. This is executed based on the result of the threshold processing. That is, the switch 24 determines whether the two video signals to be added by the LPF 16 are the input video signal px and the delayed video signal pax based on the result of the threshold processing with the constant M by the comparator 23, or the input video signal. It controls whether to make px and the same input video signal px. In this way, the switch 24 switches the input to the adder 25 in the LPF 16 to the terminal A when the output of the difference absolute value | px−pax | is larger than the constant M (or more than the constant M), and adds the LPF 16 The other video signal added by the device 25 is used as an input video signal. Conversely, when the output of the absolute difference value | px−pax | is less than or equal to the constant M (when smaller than the constant M), the switch 24 switches the input to the adder 25 in the LPF 16 to the terminal B, and the adder 25 in the LPF 16 The other video signal added in step (a) is converted into a delayed video signal.

  The LPF 16 is a low-pass filter that averages the input video signal and the video signal output from the switch 24 and outputs a temporal low-frequency component of the input video signal, and is an example of the low-frequency component calculation unit described above. It has become. As a result, the low frequency component calculation means calculates the temporal low frequency component of the current video signal only for the input video signal (current video signal) determined to be smaller than the predetermined threshold by the threshold processing means. do it.

  The LPF 16 illustrated in FIG. 1 includes an adder 25 and a divider 26. As described above, the adder 25 adds the input video signal px and one of the input video signal px and the delayed video signal pax selected by the switch 24 and outputs the result to the divider 26. The divider 26 divides the addition result input from the adder 25 by 2 and outputs the result to the subtracter 17 and the adder 19. Therefore, the LPF 16 regards the above difference absolute value | px−pax | as greater than the constant M (or greater than the constant M) and regards it as “motion”, and outputs the input video signal px regarded as “motion” as it is. Will be. Conversely, when the output of the absolute difference | px−pax | is equal to or less than the constant M (less than the constant M), the LPF 16 regards “noise is present”, and “noise is present”. The video signal px is not output as it is, but an average signal (px + pax) / 2 with the video signal pax of the previous frame, that is, a temporal low frequency component is output. Of course, the divider 26 may be a multiplier that multiplies the addition result input from the adder 25 by 0.5, and the same function can be easily realized by a bit shift circuit that shifts 1 bit.

  The subtracter 17 inputs the input video signal px and the output (px or (px + pax) / 2) from the LPF 16 (divider 26), subtracts them, and outputs a high frequency signal (0 or (px-pax). ) / 2) is obtained and output to the coring circuit 18. Thus, the subtractor 17 is a circuit as an example of the above-described high frequency component calculation means, and functions as a high pass filter (HPF) that outputs a temporal high frequency component of the input video signal. The coring circuit 18 is a circuit as an example of the above-described coring processing means, and performs coring processing (described later) on the output from the subtracter 17 and outputs it to the adder 19. The adder 19 is a circuit as an example of the signal adding means described above, adds the output from the coring circuit 18 and the output from the LPF 16 (divider 26), and outputs the result as an output video signal.

  2 is a diagram for explaining an example of coring processing executed in the coring circuit in the three-dimensional noise reduction circuit of FIG. 1, and FIGS. 2A and 2B are examples of different coring processing. It is a figure for demonstrating. Hereinafter, the coring process in the coring circuit 18 will be described with reference to FIG.

  Coring is a process that prevents a signal having a small amplitude from passing through a signal of a calculated high frequency component, and a process that removes or suppresses a signal having an amplitude smaller than a predetermined amplitude as a noise signal and outputs the signal. It is.

For example, as shown in FIG. 2A, the difference signal d (= 0 or (px−pax) / 2) input to the coring circuit 18 is based on _two threshold values Th ₁ and Th _2. , Th ₁ <d <Th ₂ (when having an amplitude corresponding to Th ₁ <d <Th ₂ ), the output of that portion is defined as output G ₂ (= 0). The amplitude refers to a signal value. On the other hand, when the input signal d has amplitudes corresponding to d ≦ Th ₁ , d ≧ Th ₂ , the outputs of the portions are output G ₁ (d) = d and G ₃ (d) = d, respectively. . However, Th ₁ <0, Th ₂ > 0, and preferably | Th ₁ | = Th ₂ . Further, these threshold values Th ₁ and Th ₂ may be changed in a timely manner (changed left and right in FIG. 2A). For this reason, it is preferable that the 3D-NR circuit 1 further includes means for changing a predetermined amplitude. In the coring process here, an equal sign may be given.

  Of the signal d input to the coring circuit 18, the signal d = (px−pax) / 2 subjected to the coring process has an output of the absolute difference value | px−pax | Based on the input low-frequency component (px + pax) / 2, and the input video signal px determined to be “noise present”. The high frequency component (px−pax) / 2 subtracted by the subtractor 17 is obtained. This means that only the temporally high frequency component of the input video signal that is regarded as “having noise” is subjected to coring processing.

  As described above, the coring process in the coring circuit 18 is an input video signal that is regarded as “there is noise”, and only a signal having a high frequency component in time is processed. Suppresses the passage of amplitude signals. That is, in the coring circuit 18, a signal having a small amplitude among the signals to be processed is regarded as a pseudo noise signal, and the pseudo noise signal is dropped.

  On the other hand, when the signal d input to the coring circuit 18 is always d = 0, it is the same as the coring process in the coring circuit 18 is not performed. When the absolute value | px−pax | is larger than the constant M (or larger than the constant M), it is regarded as “being moved”, and the input video signal px regarded as being “moved” is not subjected to coring processing. Means that. Thus, when the absolute difference value exceeds the threshold value (or more than the threshold value), the current signal is added twice, halved, and subtracted from the current signal again, but this component does not come out, so the core Not affected by the ring. Accordingly, the edge portion such as the contour is not properly subjected to the coring process and is held correctly.

The signal that passes through the coring circuit 18 is a signal that has been cored only to the HPF component as described above. Finally, the adder 19 combines it with the LPF component to produce an output video signal. As a result, in the case where the coring process in FIG. 2A is performed as an example, when the absolute value of (I) difference is | px−pax | ≧ M with respect to the input video signal px, the output video signal is px. (II) When the difference absolute value is | px−pax | <M, d = (px−pax) / 2, and (i) the signal d has an amplitude corresponding to Th ₁ <d <Th _2. When the output video signal of the corresponding part becomes (px + pax) / 2, the output video signal is obtained from the previous frame and the current frame, and (ii) the signal d has an amplitude corresponding to d ≦ Th ₁ or d ≧ Th _2. When it has, the output video signal of the corresponding part becomes px. In this calculation, the processing target of the coring circuit 18 is the high frequency component of the video signal of the current frame, that is, the subtraction direction of the subtracter 17 is (video signal of the current frame) − (output of the LPF 16). This is the result. By reversing the subtracting direction of the subtractor 17, the signal at d = − (px−pax) / 2, (ii) becomes pax, which is the signal as it is in the previous frame, but (II) (ii In the case of), since the signal is expected to be noise by the threshold processing circuit 14 but is not determined to be noise by coring, the subtractor 17 outputs the former ((current frame The video signal)-(output of LPF 16)) is preferably employed. In addition, you may attach | subject the equal sign in each above-mentioned process here.

Next, another example of the coring process executed in the coring circuit 18 will be described with reference to FIG. In the coring process illustrated in FIG. 2B, the input signal d (= 0 or (px−pax) / 2) is based on _two threshold values ThS ₁ and ThS ₂ , ThS ₁ <d When having an amplitude corresponding to ≦ 0, 0 <d <ThS ₂ , the outputs of the corresponding portions are set as outputs GS ₂ and GS ₃ , respectively.

As shown in FIG. ₂ , GS ₂ and GS ₃ are, for example, GS ₃ and GS ₄ , and GS ₂ and GS ₁ defined by a function that smoothly contacts in the vicinity of ThS ₁ and ThS _2. Good. For example, when ThS1 <d <ThS2, the form of the output function GS with respect to the input d is GS (d) = sgn (d) × A × 0.5 (1-cos (α × | d |)), otherwise Then, GS (d) = d etc. are mentioned. Here, A and α are coefficients, which may be fixed values, but can be adjusted according to the image. As an example of the fixed value, A = 11.3 and α = 0.25. In this case, Th (ThS ₁ , ThS ₂ ) is approximately ± 8, and comes to touch smoothly at this point. In particular, when the functions GS ₂ and GS ₃ (the shapes thereof) are changed as shown in FIG. 2B, the adverse effect on the image quality due to abrupt switching when the threshold value is exceeded is reduced, resulting in a smooth change. There are advantages that can be made. Further, GS ₂ and GS ₃ may smoothly change with respect to the input d, such as GS ₂ (d), GS ₃ (d) = d ³ . On the other hand, when the input signal d has an amplitude corresponding to d ≦ ThS ₁ and d ≧ ThS ₂ , the output of the corresponding part is output GS ₁ (d) = d, GS ₄ (d) = d, respectively. To do. However, ThS ₁ <0, ThS ₂ > 0, and preferably | ThS ₁ | = ThS ₂ . Furthermore, it is preferable to enable soft coring by changing these functions GS ₂ , GS ₃ (shape thereof) and threshold values ThS ₁ , ThS ₂ (basically associated therewith) in a timely manner. For this reason, as described above, it is preferable that the 3D-NR circuit 1 further includes means for changing a predetermined amplitude. In the coring process here, an equal sign may be given.

The signal that passes through the coring circuit 18 is a signal that has been cored only to the HPF component as described above. Finally, the adder 19 combines it with the LPF component to produce an output video signal. As a result, when the coring process of FIG. 2B is performed as an example (example of GS ₂ (d), GS ₃ (d) = d ³ ), (I) difference with respect to the input video signal px When the absolute value is | px−pax | ≧ M, the output video signal is px, and (II) when the difference absolute value is | px−pax | <M, (i) the signal d is ThS ₁ <d <ThS _2. The output video signal of the corresponding portion is (px + pax) / 2 + ((px−pax) / 2) ³ , (ii) the signal d corresponds to d ≦ ThS ₁ or d ≧ ThS ₂ . When having an amplitude, the output video signal of the corresponding part is (px−pax) / 2 + (px + pax) / 2 = px. If the subtraction direction of the subtractor 17 is reversed, the signal at d = − (px−pax) / 2, (ii) becomes pax, which is the signal as it is in the previous frame. The former ((video signal of the current frame) − (output of LPF 16)) is more preferable. Of course, the equal sign in each process may be given here.

Although the coring process has been described with reference to FIGS. 2A and 2B, a circuit configuration equivalent to that of the 3D-NR circuit 1 described above is obtained from the coring circuit 18 instead of the adder 19. A subtractor for subtracting the output signal from the input video signal is provided, and a component (pseudo noise signal) regarded as a noise signal in the coring circuit 18 is, for example, ThS ₁ <d <ThS _{2 in FIG.} G ₂ = d of the corresponding part when having an amplitude corresponding to d, and G ₁ (d), G ₃ (d) = 0 of the corresponding part when having an amplitude corresponding to d ≦ ThS ₁ or d ≧ ThS ₂ The circuit is configured so that the noise signal is removed by subtracting the extracted signal from the input video signal by the above-described subtractor and the signal after the removal is used as the output video signal. May be. In the case of this form, the coring processing means outputs only the signal having an amplitude smaller than the predetermined amplitude as the noise signal, out of the calculated high frequency component signal, and outputs the signal as it is or while suppressing it. In the signal subtracting means, for example, a device, the output of the coring processing means may be subtracted from the current video signal only for the current video signal determined to be smaller than the predetermined threshold value by the threshold processing means.

  Further, as a circuit configuration equivalent to this circuit configuration, the coring circuit 18 extracts a component regarded as a noise signal (pseudo noise signal) by coring processing, and subtracts the extracted signal from the output of the subtractor 17. The circuit may be configured so as to obtain the output video signal by removing the noise signal and adding the signal after the removal to the output signal of the LPF 16 by the adder 19.

  As described above, in the 3D-NR circuit according to this embodiment, two adjustment items are provided: a threshold value (a constant M to be compared by the comparator 23) and a coring process. Among these, the threshold value (constant number M) is an adjustment item corresponding to the motion detection sensitivity according to the prior art. On the other hand, the coring process is an adjustment item for adjusting the degree of effectiveness of the NR, and by setting a coring threshold (and a coring function) so that the coring is conservative, any video signal is not broken. A sufficient NR effect can be obtained. Therefore, in the present invention, it is possible to adjust to the optimum point from the viewpoint of motion detection independently of the adjustment of the NR effectiveness. In other words, the present invention enables optimal adjustment by increasing the adjustment items.

  In the circuit according to the prior art, only the frequency characteristic was seen at the time of noise removal, but this method according to the present invention only changes the signal that can be extracted by the high-pass filter as a signal that may cause noise. Furthermore, when the amplitude is less than a certain value (only in the case of a small change), it is regarded as a noise signal and is not output or the output is suppressed. . Therefore, according to the present invention, there is no tail and the effect of NR is high. Furthermore, the 3D-NR circuit according to the present invention can be configured to minimize the number and capacity of the frame memories, and adopt a circuit example for performing compression / expansion to compress the frame memory. Even if there is an error, the original signal is replaced without permission by the operation of the threshold processing circuit 14, so that the compression error is not propagated and output. As described above, according to the 3D-NR circuit of the present invention, compression in the frame memory is possible without accumulating compression errors, a strong NR effect is obtained, and no tailing occurs.

  FIG. 3 is a block diagram showing a configuration example of a noise reduction circuit according to another embodiment of the present invention. In the figure, 31 is a compression circuit, 32a and 32b are frame memories, 33a, 33b and 33c are decompression circuits, 34a and 34c are threshold processing circuits, 35 is a constant memory, 36 is an LPF, 37 is a subtractor, and 38 is coring. A circuit, 39 is an adder, 41a and 41c are subtractors, 42a and 42c are absolute value calculators, 43a and 43c are comparators, 44a and 44c are switches, 45 is an adder, and 46 is a divider.

  A 3D-NR circuit 3 according to another embodiment of the present invention is a 3D-NR circuit 1 using the 3D-NR circuit 1 described with reference to FIG. A circuit that performs NR processing with higher accuracy. The 3D-NR circuit according to this embodiment is a circuit that reduces a noise component in the time axis. First, whether an input video signal (also referred to as an input image signal) corresponds to “movement”. It is determined (predicted) by threshold processing on the difference between the frames before and after the frame to determine whether it corresponds to “noise”, only for the input video signal expected to be noise, and only its temporal high frequency component, Perform a coring process to remove noise. On the other hand, the same signal is output by subtracting the input video signal of the frame determined as “motion”. Instead of the difference between frames, a difference between three odd fields, a difference between three even fields, or a difference between three fields after intra-frame interpolation may be adopted. In this case, the other components of the 3D-NR circuit are components that respectively execute processing between the input video signals that have been differentiated.

  The 3D-NR circuit 3 illustrated in FIG. 3 includes at least two frame memories 32a and 32b, two threshold processing circuits 34a and 34c for performing threshold processing based on the difference between the preceding and succeeding frames, an LPF 36, and a subtractor 37. , A coring circuit 38 and an adder 39 are provided. Of course, the 3D-NR circuit 3 can be configured with a circuit that replaces these components, and preferably includes a constant memory 35. In the description of the 3D-NR circuit 3 according to the present embodiment, portions overlapping with the description regarding the 3D-NR circuit 1 described above with reference to FIG.

  The compression circuit 31 corresponds to the compression circuit 11 of FIG. The frame memories 32a and 32b are frame memories for delaying the input video signal and outputting the video signal of the previous frame and the video signal of the current frame, respectively, and are the same as the frame memory 12 of FIG. In the present embodiment, an operation when a video signal of a subsequent frame is input will be described, and a video signal of a frame delayed by one frame by the frame memory 32b will be described as an input video signal of the current frame. The decompression circuit 33a, the decompression circuit 33b, and the decompression circuit 33c are the same decompression circuits as the decompression circuit 13 of FIG. 1 corresponding to the previous frame, the current frame, and the subsequent frame, respectively. An expansion circuit for the previous frame, an expansion circuit for the previous frame of the input video signal, and an expansion circuit for the current frame of the input video signal. The 3D-NR circuit 3 obtains the video signal of the current frame from the output from the frame memory 32b (expansion circuit 33b), and further receives the video signal of the previous frame (previous frame) as the output of the frame memory 32b. The video signal of the subsequent frame is obtained directly from the input video signal (via the decompression circuit 33b) by the output from the frame memory 32a (expansion circuit 33a).

  The threshold processing circuit 34a and the threshold processing circuit 34c are basically the same circuits as the threshold processing circuit 14, but are based on absolute differences between the previous frame and the current frame and between the subsequent frame and the current frame, respectively. It is a circuit that executes threshold processing. Accordingly, the threshold processing circuit 34a takes the difference between the input video signal (current frame video signal) and the delayed video signal (previous frame video signal), converts it to an absolute value, and performs threshold processing. Similarly, the threshold processing circuit 34c takes the difference between the input video signal (the video signal of the current frame) and the video signal input later (the video signal of the subsequent frame), converts it to an absolute value, and performs threshold processing.

  In the threshold processing circuits 34a and 34c, other components corresponding to the subtracter 21, the absolute value calculator 22, the comparator 23, and the switch 24 in FIG. 1 are subtracters 41a and 41c and an absolute value calculator 42a, respectively. 42c, comparators 43a and 43c, and switches 44a and 44c. The constant memory 35 is the same as the constant memory 15 of FIG. 1, and basically the same constant M may be used for the comparators 43a and 43c. The threshold processing in the threshold processing circuit 34a outputs the current signal (the current frame signal from the frame memory 32b) as it is when the absolute difference is larger than the constant threshold (or more than the constant threshold). Only when the value is equal to or smaller than the threshold value (or smaller than the constant threshold value), the signal of the previous frame (in this example, one frame before) from the frame memory 32a is sent to the LPF 36. The threshold processing in the threshold processing circuit 34c outputs the current signal (the current frame signal from the frame memory 32b) as it is when the difference absolute value is larger than the constant threshold (or more than the constant threshold). Only when the value is equal to or smaller than the threshold value (or smaller than the constant threshold value), a signal of a subsequent frame (here, illustrated after one frame) that does not pass through the frame memory is sent to the LPF 36. With these processes, only when the frame difference is smaller than a certain threshold (or smaller than the threshold), the coring process is performed in the subsequent stage.

  As in the embodiment described with reference to FIGS. 1 and 2, it is assumed that a video signal of one frame is obtained from the video signals (image signals) output from the n pixels P1 to Pn, and is output from the pixel Px. The operation of the 3D-NR circuit 3 will be described by taking the operation when the received video signal is input to the frame memory 32b as an example. At this time, in the video signals output from the pixels P1 to Pn, the video signals of the current frame are p1 to pn, the video signals of the previous frame are pa1 to pan, and the video signals of the subsequent frame (video signals input to the input terminal). Are designated as pc1 to pcn. Also, the pixels of the previous frame and the subsequent frame corresponding to the pixel Px are referred to as pixels Pax and Pcx, respectively.

  When the video signal pcx of the subsequent frame from the pixel Pcx is input to the input terminal, the video signal of the subsequent frame is output to the subtractor 41c, and the video signal px of the current frame that is the frame immediately before the pixel Pcx. Is output from the frame memory 32b to the subtracters 41a and 41b, and the previous frame video signal pax, which is the previous frame of the current frame video signal px, is output from the frame memory 32a to the subtractor 41a. The subtractors 41a and 41c calculate difference signals px-pax and px-pcx, respectively, and output them to the absolute value calculators 42a and 42c, respectively. The absolute value calculators 42a and 42c calculate the absolute values | px-pax | and | px-pcx | of the input values, respectively, and output them to the comparators 43a and 43c, respectively.

  The comparators 43a and 43c compare the difference absolute value | px−pax | input from the absolute value calculator 22 with a constant (referred to as M) stored in the constant memory 15, and compare the result with the switch 44a. , 44c. Each of the switches 44a and 44c has two input terminals, and the video signal output to the LPF 36 (adder 45) is converted into an input video signal of the current frame (that is, a video signal output from the frame memory 32b via the expansion circuit 33b). ) And the video signal input to the threshold processing circuits 34a and 34c (that is, the video signal output from the frame memory 32a via the expansion circuit 33a, the input terminal of the 3D-NR circuit 3 to the compression circuit 31. The video signal output via the expansion circuit 33c is input as it is.

  The signal input to the adder 45 in the LPF 36 is that the first signal is the video signal of the current frame or the video signal of the subsequent frame, the second video signal is the video signal of the current frame, and the third is the current signal. Threshold processing with the constant M by the comparators 43c and 43a, which is the video signal of the frame or the video signal of the previous frame, the switch 44c switching the first signal and the switch 44a switching the third signal. Running based on the results. When the output of the difference absolute value | px−pcx | is larger than the constant M (or larger than the constant M), the switch 44c converts the input to the adder 45 in the LPF 36 into the video signal of the subsequent frame, and otherwise. To the video signal of the current frame. Similarly, when the output of the difference absolute value | px−pax | is larger than the constant M (or larger than the constant M), the switch 44a converts the input to the adder 45 in the LPF 36 to the video signal of the previous frame. Otherwise, the video signal of the current frame is used.

  The LPF 36 is basically the same as the LPF 16, but has three signals added by the adder 45, and the division by the divider 46 is also multiplied by 1/3 accordingly. . Accordingly, the LPF 36 regards the difference absolute values | px−pax | and | px−pcx | as greater than the constant M (or greater than or equal to the constant M) as “motion”, and the input regarded as “motion”. The video signal px is output as it is. On the other hand, when the output of the absolute difference values | px-pax |, | px-pcx | is equal to or smaller than the constant M (when smaller than the constant M), the LPF 36 regards that “noise is present” and “noise is present”. The input video signal px regarded as "" is not output as it is, but the value obtained by adding the video signal pax of the previous frame to the three averages and the value adding the video signal pcx of the subsequent frame to the three averages, that is, temporal Thus, a low frequency component is output.

  The subtractor 37 inputs the input video signal px of the current frame and an output from the LPF 36 (divider 46), that is, any of px, (2 px + pax) / 3, (2 px + pcx) / 3, (px + pax + pcx) / 3. These are subtracted to obtain a signal in the high frequency range and output to the coring circuit 38. Therefore, the subtractor 37 functions as a high pass filter (HPF). The output signal d from the subtracter 37 is a high frequency component of 0, (px-pax) / 3, (px-pcx) / 3, or (2px-pax-pcx) / 3. Here, the sign is changed depending on the subtraction direction of the subtractor 37.

  The coring circuit 38 is basically the same circuit as the coring circuit 18 of FIG. 1, performs a coring process so that a signal having a small amplitude out of the output from the subtractor 37 is not passed, Output. The adder 39 adds the output from the coring circuit 38 and the output from the LPF 36 (divider 46), and outputs the result as an output video signal. The signal d input to the coring circuit 38 differs from the coring circuit 18 of FIG. 1 in that the output of the absolute difference value | px-pax | and / or | px-pcx | Less than the input video signal, i.e., for the input video signal px of the current frame considered "noise present" as a result of the difference from the previous frame and / or the subsequent frame, and As described above, the high frequency component subtracted by the subtractor 37 based on the temporal low frequency component.

  On the other hand, when the signal d input to the coring circuit 38 is d = 0, this is the same as the coring process in the coring circuit 38 is not performed. When | px-pax | and | px-pcx | are larger than the constant M (or larger than the constant M), it is regarded as “moving present”, and the input video signal px regarded as “moving present” is cored. This means that no processing is performed. Thus, when the absolute difference value exceeds the threshold value (or more than the threshold value), the current signal is added three times, is １ ／, and is subtracted from the current signal again, but this component does not come out, so the core Not affected by the ring. Accordingly, the edge portion such as the contour is not properly subjected to the coring process and is held correctly.

  The signal that passes through the coring circuit 38 is a signal that has been cored only to the HPF component as described above. Finally, the adder 39 combines it with the LPF component to produce an output video signal. As a result, when the coring process of FIG. 2A is performed as an example, for the input video signal px of the current frame, (I) the absolute difference value is | px−pax | ≧ M and | px−pcx. When | ≧ M, the output of the subtractor 37 is d = 0, and the final output video signal is px. When the difference absolute value is other than that, the following (II) to (IV) are obtained.

(II) When the absolute difference value is | px−pax | <M and | px−pcx | ≧ M, d = (px−pax) / 3, and (i) the signal d is Th ₁ <d <Th _2. The output video signal of the corresponding portion becomes (2 px + pax) / 3, and the output signal is obtained from the previous frame and the current frame weighted twice, and (ii) the signal d is d ≦ Th _1. Or when it has an amplitude corresponding to d ≧ Th ₂ , the output video signal of the corresponding portion is px, and it is a signal as it is in the current frame. The calculation here is a result of setting the subtraction direction of the subtractor 37 as (current frame video signal) − (output of the LPF 36), and d = − by reversing the subtraction direction of the subtractor 37. Signals at (px−pax) / 3, (ii) are (px + 2pax) / 3, and an output signal is obtained from the current frame and the previous frame weighted twice. In the case of (II) (ii), since the signal is expected to be noise in the threshold processing circuit 34a but is not determined as noise by coring, it is not a problem to output the signal as it is in the current frame. Therefore, the subtraction direction of the subtracter 37 is the former ((current frame video signal)-(LPF 36 output)) subtraction in view of the fact that in the latter case, the previous frame is weighted twice as much as the current frame. The direction is preferred.

(III) When the absolute difference value is | px−pax | ≧ M and | px−pcx | <M, d = (px−pcx) / 3, and (i) the signal d is Th ₁ <d <Th _2. The output video signal of the corresponding portion becomes (2 px + pcx) / 3, and the output signal is obtained from the subsequent frame and the current frame weighted twice, and (ii) the signal d is d ≦ Th _1. Or when it has an amplitude corresponding to d ≧ Th ₂ , the output video signal of the corresponding part becomes px, and a signal as it is in the current frame is obtained. By subtracting the subtraction direction of the subtractor 37, the signal at d = − (px−pcx) / 3, (ii) becomes (px + 2pcx) / 3, and the weighted frame is doubled with the current frame. The output signal is obtained from the above, but it is preferable that the signal is the signal as it is in the current frame. Therefore, as in the case of (II), the former ((current frame video signal)-(LPF 36 output)) subtraction direction is more preferable. It turns out that it is preferable.

(IV) When the absolute difference value is | px−pax | <M and | px−pax | <M, d = (2px−pax−pcx) / 3, and (i) the signal d is Th ₁ <d < When it has an amplitude corresponding to Th ₂ , the output video signal of the corresponding part is (px + pax + pcx) / 3, and the output signal is obtained from the current frame, the previous frame, and the subsequent frame, and (ii) the signal d is d ≦ Th _1. Or when it has an amplitude corresponding to d ≧ Th ₂ , the output video signal of the corresponding part becomes px, and a signal as it is in the current frame is obtained. By subtracting the subtraction direction of the subtractor 37, the signal at d = − (2px−pax−pcx) / 3 and (ii) becomes (2pax + 2pcx−px) / 3, which is twice that of the current frame. The output signal is obtained from the weighted previous frame and subsequent frame. However, it is preferable that the output signal is the current frame as it is, and therefore the former ((video signal of the current frame) − (the same as in the cases of (II) and (III)). It can be seen that the subtraction direction of the output of LPF 36)) is preferable.

  In addition, you may attach | subject the equal sign in each process in (I)-(IV) here. Further, it goes without saying that the coring process as described with reference to FIG. 2B may be adopted. Furthermore, a circuit configuration equivalent to that of the 3D-NR circuit 3 may be employed in the same manner as the 3D-NR circuit 1 described with reference to FIG.

  The 3D-NR circuit according to the present invention is provided in a video signal processing apparatus that processes a video signal, and functions as a pre-stage of the video signal processing, or as an intermediate process or a post-stage process. This video signal processing apparatus can be applied to a video reproduction apparatus such as a television receiver, a television signal processing circuit, a projector, a video player, a DVD player, and the like. By adopting the 3D-NR circuit according to the present invention, the image quality is remarkably improved particularly when playing a tape with noticeable noise such as an old videotape or rental video, but when playing other video. Also demonstrates the effect of noise removal. Further, in this video signal processing apparatus, together with the 3D-NR circuit according to the present invention, a circuit for reproducing a fast-moving scene clearly and clearly, a region adaptive NR circuit for applying an optimum filter according to video, Various circuits such as a mosquito NR circuit that removes mosquito noise, a block NR circuit that removes block noise, and a digital three-dimensional Y (luminance signal) / C (color signal) separation circuit can be mounted in combination. . When a Y / C separation circuit such as a digital three-dimensional Y (luminance signal) / C (color signal) separation circuit is used in combination, for example, dedicated threshold values and coring setting values for the luminance signal and the color signal are employed. May be.

  Among these, as a circuit for easily recognizing fast-moving scenes and displaying them clearly, Quick Shot technology that controls the responsiveness of the liquid crystal by grasping the characteristics of the liquid crystal panel, especially when displaying images on the liquid crystal panel, is used. There are QS drive circuits that have been utilized. Hereinafter, an example in which this QS drive circuit is incorporated in the 3D-NR circuit according to the present invention will be described. The video signal processing apparatus exemplified here is an apparatus in which a QS circuit is incorporated in the 3D-NR circuit 1 described in FIGS. 1 and 2, and an output video signal is output to a liquid crystal display area of the liquid crystal display device. To do. Of course, the present invention can also be applied to processing based on differences between a plurality of frames described in FIG.

  FIG. 4 is a block diagram showing a configuration example of a video signal processing apparatus according to an embodiment of the present invention, in which 5 is a 3D-NR circuit, 51 is a compression circuit, 52 is a frame memory, and 53 is a decompression circuit. , 54 is a threshold processing circuit, 55 is a constant memory, 56 is an LPF, 57 is a subtractor, 58 is a coring circuit, 59 is an adder, 61 is a subtractor, 62 is an absolute value calculator, 63 is a comparator, 64 Is a switch, 65 is an adder, 66 is a divider, 71 is a QS drive circuit (hereinafter referred to as a QS circuit), and 72 is a switch.

  In the description of the video signal processing apparatus according to the present embodiment including the 3D-NR circuit 5, the part overlapping with the description regarding the 3D-NR circuit 1 described above with reference to FIG. Shall be omitted. However, 3D-NR circuit 5, compression circuit 51, frame memory 52, expansion circuit 53, threshold processing circuit 54, constant number memory 55, LPF 56, subtractor 57, coring circuit 58, adder 59, subtractor 61, absolute value The calculator 62, the comparator 63, the switch 64, the adder 65, and the divider 66 are respectively the 3D-NR circuit 1, the compression circuit 11, the frame memory 12, the expansion circuit 13, the threshold processing circuit 14, and the constant memory in FIG. 15, LPF 16, subtractor 17, coring circuit 18, adder 19, subtractor 21, absolute value calculator 22, comparator 23, switch 24, adder 25, and divider 26.

  The threshold processing circuit 54 calculates an absolute difference between the input signal of the current frame and the video signal of the previous frame that has passed through the decompression circuit 53 from the frame memory 52, and controls the switch 64 in comparison with the constant M.

  As described above, the video signal processing apparatus according to the embodiment of the present invention includes the QS circuit 71 as a feature thereof. The QS technique in the QS circuit 71 is a technique for improving the physical properties of the liquid crystal such that the brightness displayed on the image display area of the liquid crystal monitor is increased to increase the response speed and the contour of the object is blurred even when a moving image is displayed. It is. This technique increases the luminance by applying a higher voltage to the moving image than usual, and is also called an overdrive technique. Therefore, the QS circuit 71 is also called an overdrive circuit.

  The QS circuit 71 detects a temporal change in the image based on the input video signal of the current frame in the 3D-NR circuit 5 and the video signal of the previous frame that has passed through the expansion circuit 53 from the frame memory 52, At the time of change, the controller is controlled to apply a higher voltage than usual to the liquid crystal cell forming the image display area, thereby increasing the response speed. The QS circuit 71 corrects and outputs an input video signal (current video signal) of the current frame so that a higher voltage than usual is applied to the liquid crystal cell. There are corrections using quantization and compression using image compression, but the latter is preferable because a false contour is not generated because an error is dispersed in a high frequency. Further, by adopting Block Truncation Coding (BTC) as an image compression method in the QS circuit 71, it can be realized with a relatively small circuit scale, and the amount of compressed data is always constant, so that it is like a QS circuit. It is suitable when image data must be processed in real time. In this way, the QS circuit 71 detects a motion and outputs a signal (hereinafter referred to as a video signal after QS correction) that is controlled to apply a higher voltage than usual to a fast-moving scene. Finally, it eliminates motion blur for fast-moving scenes and reproduces clearly and clearly.

  In the 3D-NR circuit 5, the video signal of the current frame corresponding to switching to the terminal D or the video signal after QS correction corrected based on the detected motion corresponding to switching to the terminal C is displayed. Either one is used. However, the input to the difference unit 61 of the threshold processing circuit 54 is the video signal of the current frame and the video signal of the previous frame. That is, an input to the terminal A of the switch 64 in the threshold processing circuit 54 (that is, an input to the adder 65 in the LPF 56 when the terminal A side is connected) and an input to the adder 65 in the LPF 56 (not via the switch 64). Side input) and the input to the subtractor 57 (input not through the LPF 56) are switched to the terminal D and the terminal C, the video signal from the current frame, the video signal after QS correction Switch between.

  Further, the switch 64 and the switch 72 are interlocked. When the difference absolute value | px−pax | is larger than the constant M (or greater than M) by the comparison result of the comparator 63, the switch 64 is connected to the terminal A. And the switch 72 is connected to the terminal C. On the other hand, when the difference absolute value | px−pax | is a constant M or less (less than M), the switch 64 is connected to the terminal B and the switch 72 Is connected to terminal D.

  That is, when the difference absolute value is expected to be “moving” and the absolute value of the difference is larger than the constant M (or more than M), by connecting to the terminal A and the terminal C, two inputs to the LPF 56 and The input to the subtractor 57 is the video signal after QS correction output from the QS circuit 71. As a result, the video signal after QS correction, that is, the moving image response of the liquid crystal is improved and can be reproduced clearly. The video signal is output as an output video signal. On the other hand, when the difference absolute value is a constant M or less (less than M), the two inputs to the LPF 56 are the input video signal px of the current frame and the video of the previous frame by being connected to the terminals B and D. The signal is pax, and the input to the subtractor 57 is the input video signal px of the current frame. Therefore, the result is the same as that of the 3D-NR circuit 1 of FIG.

In this way, the case where the coring process of FIG. 2A is performed is taken as an example. For example, when the video signal after the QS correction of the video signal px of the current frame by the QS circuit 71 is hx, for the input video signal px (I) When the difference absolute value is | px−pax | ≧ M, the output video signal becomes hx corrected by the QS circuit 71. (II) When the absolute difference value is | px−pax | <M, d = (px−pax) / 2, and (i) the signal d has an amplitude corresponding to Th ₁ <d <Th _2. When the output video signal of the corresponding part becomes (px + pax) / 2, the output signal is obtained from the previous frame and the current frame, and (ii) the signal d has an amplitude corresponding to d ≦ Th ₁ or d ≧ Th ₂ At this time, the output video signal of the corresponding part is px. The calculation here is a result of setting the subtraction direction of the subtractor 57 as (the video signal of the current frame) − (the output of the LPF 56), and d = − by reversing the subtraction direction of the subtractor 57. (Px−pax) / 2, and the signal in (ii) becomes pax, which is the signal as it is in the previous frame. In the case of (II) and (ii), since the signal that is expected to be noise by the threshold processing circuit 54 is not a signal that is judged to be noise by coring, it is not a problem to output the signal as it is in the current frame. Accordingly, the subtracting direction of the subtractor 57 is preferably the former ((current frame video signal)-(LPF 36 output)) in view of the fact that the previous frame is adopted in the latter case. In addition, you may attach | subject the equal sign in each above-mentioned process here.

  Here, the application to the process based on the difference between the plurality of frames described in FIG. 3 will be briefly described. When applied to the 3D-NR circuit 3 in FIG. 3, the QS circuit is installed so as to be QS driven by the interframe difference between the output from the expansion circuit 33b and the output from the expansion circuit 33a, or The QS drive is preferably performed by the inter-frame difference between the output from the expansion circuit 33b and the output from the expansion circuit 33c.

  In the configuration example in which the signal input to the QS circuit is connected to the output from the expansion circuit 33b and the output from the expansion circuit 33a, the switch 72 of FIG. 4 that operates in cooperation with the switch 44a. A signal changeover switch may be provided. In this case, motion detection and QS correction are performed from the previous video signal and the current video signal by the QS circuit and output to the subsequent stage. When the threshold value processing exceeds a predetermined threshold value, an input to the switch 44c (adder 45) ) And the input to the subtractor 37, the video signal after QS correction is used instead of the current video signal. The same applies to the case where the signal input to the QS circuit is the output from the expansion circuit 33b and the output from the expansion circuit 33c. Further, a switch for switching between the output of the QS circuit and the current video signal (a switch corresponding to the switch 72 in FIG. 4) is linked with only the switch 44a or only with the switch 44c, or both switches 44a, What is necessary is just to make it interlock | cooperate with 44c.

  In the video signal processing circuit of this embodiment, when the output of the absolute value of the difference between frames is greater than a constant (or greater than the constant), the difference between the frames is large, so it is determined that the motion is detected and the QS circuit operates. Prevent motion blur. At this time, NR does not operate. On the other hand, when the output of the absolute value of the difference between frames is less than or equal to a constant (or smaller than the constant), the NR in the 3D-NR circuit according to each embodiment described above is effective. As a result, according to the video signal processing circuit of the present embodiment, in addition to the effects of the 3D-NR circuit according to each of the embodiments described above, NR can be realized without losing the outline. Of course, in this embodiment as well, compression in the frame memory can be applied, and the frame memory can be used in combination with processing other than 3D-NR processing such as QS driving.

  As another embodiment according to the present invention, not only a video signal processing circuit as described above, but also a three-dimensional noise reduction circuit that reduces noise components in the time axis of the frame period with respect to a digital input video signal; It is also possible to employ a video signal processing device for use in a liquid crystal display device having a display region formed of a liquid crystal cell, which includes a circuit for speeding up the response of the liquid crystal cell. The video signal processing apparatus of this embodiment obtains an inter-frame difference of the current video signal for the current video signal that is an input video signal subject to noise reduction processing, and the absolute value of the inter-frame difference is greater than a predetermined threshold value. Sometimes a circuit that accelerates the response of the liquid crystal cell such as the above-described QS circuit is caused to function, and in other cases, a three-dimensional noise reduction circuit is caused to function. Since it is the contour of the moving region of the image that the absolute value of the difference between frames takes a value larger than a certain threshold value, a QS circuit (which can be a circuit that accelerates the responsiveness of the liquid crystal cell) operates at the contour. As described above, the 3D-NR circuit that improves the SN becomes effective in other places, and the QS circuit and the 3D-NR circuit are combined and controlled based on the magnitude of the absolute value between frames. In addition, it is possible to improve the image quality comprehensively without causing various disturbances that have been problematic in the prior art.

It is a block diagram which shows one structural example of the three-dimensional noise reduction circuit which concerns on one Embodiment of this invention. It is a figure for demonstrating the example of the coring process performed by the coring circuit in the three-dimensional noise reduction circuit of FIG. It is a block diagram which shows the example of 1 structure of the noise reduction circuit which concerns on other embodiment of this invention. It is a block diagram which shows one structural example of the video signal processing apparatus which concerns on one Embodiment of this invention. It is the schematic which shows the example of 1 structure of the three-dimensional noise reduction circuit by a prior art. It is a block block diagram of the three-dimensional noise reduction circuit by patent document 1. FIG. It is the schematic which shows the other structural example of the three-dimensional noise reduction circuit by a prior art.

Explanation of symbols

1, 3, 5 ... 3D-NR circuit, 11, 31, 51 ... compression circuit, 12, 32a, 32b, 52 ... frame memory, 13, 33a, 33b, 33c, 53 ... expansion circuit, 14, 34a, 34c, 54 ... Threshold processing circuit, 15, 35, 55 ... Constant memory, 16, 36, 56 ... Low pass filter (LPF), 17, 37, 57 ... Subtractor, 18, 38, 58 ... Coring circuit, 19, 39, 59 ... adder, 21, 41a, 41c, 61 ... subtractor, 22, 42a, 42c, 62 ... absolute value calculator, 23, 43a, 43c, 63 ... comparator, 24, 44a, 44c, 64, 72 ... Switch, 25, 45, 65 ... adder, 26, 46, 66 ... divider, 71 ... QS (Quick Shot) circuit.

Claims (16)

A three-dimensional noise reduction circuit that reduces a noise component in a time axis of a frame period with respect to a digital input video signal, a frame memory that delays the input video signal by one or several frames, and a noise reduction processing target A threshold processing means for obtaining an inter-frame difference between the current video signal as the input video signal and the delayed video signal in the frame memory, and performing threshold processing on the obtained differential signal with a predetermined threshold; A temporal low frequency component of the current video signal is calculated only for the current video signal determined by the means to be smaller than the predetermined threshold value by means of an inter-frame average of the current video signal with the delayed video signal. The difference between the low frequency component calculation means, the current video signal, and the temporal low frequency component signal calculated by the low frequency component calculation means for the current video signal. A high-frequency component calculating means for calculating a temporal high-frequency component of the current video signal, and removing a signal having an amplitude smaller than a predetermined amplitude from the calculated high-frequency component signal as a noise signal. Alternatively, the coring processing means for suppressing the output and the output of the coring processing means and the low frequency component calculation means only for the current video signal determined to be smaller than the predetermined threshold by the threshold processing means. Signal adding means for adding and outputting the output, and the output of the signal adding means is used as an output video signal only for the current video signal determined to be smaller than the predetermined threshold by the threshold processing means. A three-dimensional noise reduction circuit that outputs the current video signal as it is as an output video signal for other current video signals. A three-dimensional noise reduction circuit that reduces a noise component in a time axis of a frame period with respect to a digital input video signal, a frame memory that delays the input video signal by one or several frames, and a noise reduction processing target A threshold processing means for obtaining an inter-frame difference between the current video signal as the input video signal and the delayed video signal in the frame memory, and performing threshold processing on the obtained differential signal with a predetermined threshold; A temporal low frequency component of the current video signal is calculated only for the current video signal determined by the means to be smaller than the predetermined threshold value by means of an inter-frame average of the current video signal with the delayed video signal. The difference between the low frequency component calculation means, the current video signal, and the temporal low frequency component signal calculated by the low frequency component calculation means for the current video signal. A high-frequency component calculating means for calculating a temporal high-frequency component of the current video signal, and only a signal having an amplitude smaller than a predetermined amplitude among the calculated high-frequency component signals is regarded as a noise signal. The coring processing means for outputting the signal as it is or suppressed, and the output of the coring processing means is subtracted from the current video signal only for the current video signal determined to be smaller than the predetermined threshold by the threshold processing means. Signal subtracting means that outputs the output video signal as an output video signal only for the current video signal determined by the threshold processing means to be smaller than the predetermined threshold, A three-dimensional noise reduction circuit for outputting a current video signal as it is as an output video signal for the current video signal. Another frame memory for delaying the input video signal by one or several frame periods and holding it as the current video signal,
The frame memory further delays the current video signal output from the other frame memory by one or several frames and holds it as the delayed video signal,
The threshold processing means includes a difference between a current frame that is a frame of the current video signal and a previous frame that is temporally forward of the current frame and is a frame of the delayed video signal , and the current frame and the current frame. A difference between the frame and the difference between the input video signal and the subsequent frame that is temporally backward from the frame, and performing a threshold process on each of the obtained difference signals, and the low frequency The component calculating means does not determine that the difference absolute value is small when one of the previous frame and the subsequent frame is determined to have a small difference absolute value from the current frame. 3. The three-dimensional noise according to claim 1, wherein, for a frame, the current video signal is used for calculation of the average between frames instead of the video signal of the frame. Reduction circuit.   4. The apparatus according to claim 1, further comprising: a compression unit that compresses the input video signal; and an expansion unit that expands the video signal compressed by the compression unit after delaying. The three-dimensional noise reduction circuit described in 1.   The three-dimensional noise reduction circuit according to any one of claims 1 to 4, further comprising means for changing the predetermined amplitude.   6. The three-dimensional noise reduction circuit according to claim 1, further comprising means for changing the predetermined threshold value. The three-dimensional noise reduction circuit according to claim 1, wherein the predetermined amplitude is defined by a function that smoothly touches in the vicinity of two predetermined threshold values related to amplitude .   A three-dimensional noise reduction circuit for reducing a noise component in a time axis of a frame period with respect to a digital input video signal, a frame memory for delaying the input video signal by one or several frames, and the frame memory A subtractor that calculates a difference absolute value between the previous video signal that is the previous input video signal delayed and the current video signal that is the input video signal, and a difference absolute value calculated by the subtractor A comparator for comparing with a threshold value, the current video signal as one input terminal, the previous video signal as the other input terminal, and the absolute value of the difference is determined to be smaller than the predetermined threshold value by comparison in the comparator. A switch for outputting the previous video signal at a later time and outputting the current video signal at other times, and the current video signal and the video signal output from the switch. And a difference between the current video signal and the signal of the low frequency component output from the low pass filter, and the current video signal A high-pass filter that outputs a temporal high-frequency component and a signal having an amplitude smaller than a predetermined amplitude out of the high-frequency component signal output from the high-pass filter is regarded as a noise signal and is output after being removed or suppressed. A three-dimensional noise reduction circuit comprising: a coring circuit that performs the above operation; and an adder that adds the output from the coring circuit and the output from the low-pass filter and outputs the result as an output video signal.   A three-dimensional noise reduction circuit for reducing a noise component in a time axis of a frame period with respect to a digital input video signal, the first frame memory delaying the input video signal by one or several frame periods; A second frame memory that further delays the delayed video signal output from the first frame memory by one or several frame periods, and a previous video that is the previous input video signal delayed by the second frame memory A first differencer that calculates a difference absolute value between a signal and a current video signal that is a previous input video signal delayed by the first frame memory; a rear video signal that is the input video signal; A second subtractor that calculates a difference absolute value from the current video signal output from the first frame memory, and a first subtractor that compares the difference absolute value calculated by the first subtractor with a predetermined threshold value. The second comparator for comparing the absolute difference value calculated by the second differentiator with a predetermined threshold, the current video signal as one input terminal, and the previous video signal as the other The input video signal is switched to output the previous video signal when the absolute difference is determined to be smaller than the predetermined threshold by comparison in the first comparator, and output the current video signal at other times. Using the first switch and the current video signal as one input terminal and the rear video signal as the other input terminal, the absolute value of the difference is determined to be smaller than the predetermined threshold by comparison in the second comparator. A second switch that switches to output the subsequent video signal when output, and to output the current video signal at other times, the current video signal, the video signal output from the first switch, and the first switch A low-pass filter that averages the video signal output from the switch and outputs a temporal low-frequency component of the current video signal, and the low-frequency component signal output from the current video signal and the low-pass filter; And a high-pass filter that outputs a temporal high-frequency component of the current video signal, and a signal having an amplitude smaller than a predetermined amplitude among the high-frequency component signals output from the high-pass filter is a noise signal. A coring circuit for removing and suppressing the output, and an adder for adding the output from the coring circuit and the output from the low-pass filter and outputting the resultant as an output video signal. A three-dimensional noise reduction circuit.   A compressor provided at a preceding stage of the frame memory for compressing the input video signal; and a decompressor provided at a subsequent stage of the frame memory for expanding the input video signal compressed by the compressor. The three-dimensional noise reduction circuit according to claim 8, wherein the three-dimensional noise reduction circuit is provided.   The three-dimensional noise reduction circuit according to claim 8, further comprising means for changing the predetermined amplitude.   The three-dimensional noise reduction circuit according to any one of claims 8 to 11, further comprising means for changing the predetermined threshold value. The three-dimensional noise reduction circuit according to any one of claims 8 to 12, wherein the predetermined amplitude is defined by a function that smoothly touches in the vicinity of two predetermined threshold values related to amplitude .   A video signal processing apparatus comprising the three-dimensional noise reduction circuit according to claim 1. Comprising a three-dimensional noise reduction circuits as claimed in any one of claims 1 to 7, a video signal processing apparatus for use in a liquid crystal display device formed by a liquid crystal cell display area, which is the difference between the frame image Means for detecting movement of the signal, and means for correcting the liquid crystal cell to apply a voltage higher than normal to the video signal of which movement has been detected. Then, instead of the current video signal, the corrected video signal is output as an output video signal. Comprising a 3-dimensional Noise reduction circuits as claimed in any one of claims 8 to 13, a video signal processing apparatus for use in a liquid crystal display device formed by a liquid crystal cell display area, which is the difference between the frame image Means for detecting movement of the signal, and means for correcting the liquid crystal cell to apply a voltage higher than normal to the video signal of which movement has been detected, and the one input terminal of the switch has The corrected video signal is input instead of the current video signal, and the corrected video signal is input instead of the current video signal input to the low-pass filter, and input to the high-pass filter. A video signal processing apparatus, wherein the corrected video signal is input instead of the current video signal.

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