JP4415254B2 - Reception circuit and communication device - Google Patents

Description

  The present invention relates to a receiving circuit and a communication device, and is suitable for application to, for example, a reader / writer device that performs data communication with a non-contact IC (Integrated Circuit) card.

  In recent years, contactless IC card systems using contactless IC cards have begun to spread in fields such as station ticket gates, security systems, and electronic money systems.

  As an example, as shown in FIG. 16, such a non-contact IC card system has a non-contact IC card and a reader / writer device that reads / writes data from / to the non-contact IC card.

  In a circuit (hereinafter referred to as a reader / writer device side circuit) CT1 provided in the reader / writer device, an AC signal of 13.56 [MHz], for example, is generated by the carrier signal source 50, and this is generated as a resistor R1. The voltage is boosted through a resonance circuit including a capacitor C1 and a coil L1. Thereby, the alternating magnetic field H according to the alternating current signal which flows into the coil L1 of this resonance circuit is radiated | emitted from the said coil L1 to space.

  On the other hand, in a circuit (hereinafter referred to as a non-contact IC card side circuit) CT2 provided inside the non-contact IC card, a voltage induced in the coil L2 in response to the alternating magnetic field H is converted into an internal rectifier circuit. By rectifying by using (not shown) and using this as driving power for the non-contact IC card, the batteryless operation is performed.

  Here, data communication from the non-contact IC card to the reader / writer device is performed by a load modulation method. In this case, the reader / writer device side circuit CT1 and the non-contact IC card side circuit CT2 are electrically connected by a coupling coefficient k determined based on the physical shape and positional relationship of the coils L1 and L2 provided respectively. Think of it as being connected.

  The load modulation method will be described based on such a premise. In the non-contact IC card, the switch SW1 is turned on or off according to the transmission data transmitted to the reader / writer device, thereby the non-contact IC card side circuit. The resistance of CT2 is appropriately switched between the state of only the resistor R3 and the state of the parallel resistor composed of the resistors R3 and R4, thus changing the current iL of the reader / writer device side circuit CT1 that is electrically connected.

  The reader / writer device detects an amplitude change of the current iL of the reader / writer device side circuit CT1, and demodulates transmission data based on the detection result of the amplitude change.

  Incidentally, as a detection method, for example, as shown in FIG. 17, it is conceivable to insert a resistor R5 between the coil L1 and the ground and detect a voltage change in this portion. In this case, an AC voltage corresponding to the current iL is converted into a DC voltage through a detection circuit including a diode D1, a capacitor C3, and a resistor R6, and then this is processed by the bandpass filter 51 to extract a necessary band component. To do. Thereafter, as the demodulation process, the output from the band pass filter 51 is processed by the A / D converter 52 to be binarized (or multi-valued), and thus the transmission data can be obtained in the digital processing unit 53.

  Here, processing of a general demodulation circuit will be described with reference to an example shown in FIG. In general, a signal detected from a wireless transmission path has a problem in which data is taken in when the start and end times of the signal are unknown or when the waveform is distorted in the wireless transmission path. In addition, the data itself may be wrong due to the influence of noise or the like. For this reason, in the demodulation circuit, the data detection timing is determined, and data is taken in according to the determined timing. Depending on the communication method, error correction may be performed.

  In the demodulation circuit shown in FIG. 18, the synchronization detection / data recovery circuit 55 determines the data detection timing and takes in the data. The error detection circuit 56 uses the error detection code and the structure of the transmission packet. Based on the above, the obtained data is checked for errors. Incidentally, the A / D converter 54 becomes unnecessary when the detection circuit in the previous stage is constituted by a digital circuit.

  As an example, FIG. 19 shows a transmission packet structure of FeliCa (R), and FIG. 20 shows a Manchester code of a transmission line code (bit coding) adopted in FeliCa (R). For example, in FeliCa (R), the detection timing of data can be determined by using the characteristics of the preamble and the sync code encoded by Manchester. Subsequently, in FeliCa (R), the start time of data is recognized by the sync code of the reproduced data, the end time of data is recognized by the data length, and data error detection is performed by CRC (Cyclic Redundancy Check). be able to. Only when there is no error in the data, the demodulator circuit generates demodulated data based on the reproduced data, and sends it to the control circuit in the subsequent stage. The demodulated data may be the reproduced data itself or only the data in the transmission packet. It is also possible to send the data and the capture signal separately.

  Here, only the FeliCa (R) method has been described, but the structure of the transmission packet, the transmission path code, and the error detection (or error correction) method differ depending on the communication method. As another example, in the case of ISO14443 Type-B, a transmission packet structure as shown in FIG. 21 is adopted for data communication from a non-contact IC card to a reader / writer device.

Recently, in such a non-contact IC card system, a non-contact IC card that supports anti-collision may be used in order to cope with a situation where a plurality of non-contact IC cards are used in a stacked manner. In the non-contact IC card compatible with anti-collision, the resonance frequency on the non-contact IC card side is different from the carrier frequency (13.56 [MHz]) used for data communication with the reader / writer device (for example, 19 [MHz]). ) (See Patent Document 1).
JP 2001-307039 A (second page)

  By the way, in the conventional non-contact IC card system using the non-contact IC card corresponding to the anti-collision, as shown in FIG. 22, the reader / writer device and the non-contact IC are separated by separating the non-contact IC card from the reader / writer device, for example. When the distance between the cards is gradually changed, the reader / writer device transmits from the non-contact IC card before reaching the point (distance d2) where the drive power of the non-contact IC card is insufficient due to being too far from the reader / writer device. There may be a defect point (distance d1) at which data cannot be obtained. In this case, there is a problem that data communication between the reader / writer device and the non-contact IC card is interrupted.

  The present invention has been made in view of the above points, and an object of the present invention is to propose a receiving circuit and a communication device that can perform data communication with great reliability.

In order to solve such a problem, in the present invention, in the receiving circuit, in order to demodulate data from the received load modulation signal, a detecting means for detecting the amplitude change and the phase change of the load modulation signal by the Costas loop circuit is provided. I made it.

In the present invention, the communication device is provided with a receiving circuit for receiving an external load modulation signal, and the receiving circuit uses a Costas loop circuit to demodulate the data from the received load modulation signal. Detection means for detecting amplitude change and phase change is provided.

  In this way, the receiving circuit and the communication device detect not only the amplitude change but also the phase change of the load modulation signal in order to demodulate the data from the received load modulation signal, so that the load modulation result is obtained. Even when the load modulation signal does not appear in the amplitude but appears in the phase, the data can be reliably demodulated.

  According to the present invention, in order to demodulate data from the received load modulation signal, not only the amplitude change of the load modulation signal but also the phase change is detected, so that the result of the load modulation is the amplitude of the load modulation signal. Even if it appears in the phase instead of appearing in the data, it is possible to realize the receiving circuit and the communication device that can demodulate the data reliably and thus perform the data communication much more reliably.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

(1) Non-contact IC card system In FIG. 1, reference numeral 1 denotes a non-contact IC card system as a whole, a non-contact IC card 2 that supports anti-collision, and a reader that reads / writes data to / from the non-contact IC card 2 The writer device 3 and a server device 4 connected to the reader / writer device 3 are configured. For example, the reader / writer device 3 acquires data to be written to the non-contact IC card 2 from the server device 4 and transmits data read from the non-contact IC card 2 to the server device 4.

  Incidentally, in the case of the present embodiment, data communication from the non-contact IC card 2 to the reader / writer device 3 is performed by a load modulation method using a carrier frequency of 13.56 [MHz]. The resonance frequency on the non-contact IC card 2 side is set to a frequency (for example, 19 [MHz]) different from the carrier frequency 13.56 [MHz].

  In practice, the reader / writer device 3 provides a communication interface unit 11 for communicating with the server device 4 and a non-contact IC card 2 via the antenna unit 12 for the control unit 10 for overall control. And a receiver 14 for receiving data from the non-contact IC card 2 via the antenna unit 12 are connected to each other.

  On the other hand, the non-contact IC card 2 has a non-contact IC card side circuit CT2 shown in FIG. 16 therein, thereby load-modulating transmission data to be transmitted to the reader / writer device 3 and obtaining the result. The load modulation signal S1 is transmitted to the reader / writer device 3.

  In the reader / writer device 3, the antenna unit 12 corresponding to the resonance circuit of the reader / writer device side circuit CT1 shown in FIG. 16 receives the load modulation signal S1 (corresponding to the current iL) from the non-contact IC card 2. This is sent to the receiving unit 14. The receiving unit 14 demodulates the load modulation signal S1 from the antenna unit 12, and supplies transmission data D1 obtained as a result to the control unit 10.

(2) Receiving Unit of Reader / Writer Device In the case of this embodiment, the receiving unit 14 of the reader / writer device 3 is configured as shown in FIG. 5 in response to the analysis results shown in FIGS.

  First, the analysis result will be described. In FIG. 2, in which parts corresponding to those in FIG. 16 are assigned the same reference numerals, the reader / writer device side circuit CT1 and the non-contact IC card side circuit CT2 used for the analysis are shown.

  A non-contact IC card side circuit CT2 shown in FIG. 2A represents a case where the switch SW1 in FIG. 16 is in an OFF state. On the other hand, the non-contact IC card side circuit CT2 shown in FIG. 2B represents the case where the switch SW1 in FIG. 16 is in the ON state (that is, the value of the resistor R3 ′ shown in FIG. And is set assuming a parallel resistance of the resistors R3 and R4).

  Further, in this case, the value of the coupling coefficient k determined based on the physical shapes and positional relationships of the coils L1 and L2 is set assuming a defect point (distance d1) shown in FIG.

  When analysis is performed under the above conditions, analysis results as shown in FIGS. 3 and 4 are obtained.

  That is, in the state where the carrier frequency is 13.56 [MHz], as shown in FIG. 3, the amplitude of the current iL flowing in the reader / writer device side circuit CT1 when the switch SW1 is in the OFF state (the state shown in FIG. 2A). And the amplitude of the current iL flowing through the reader / writer device side circuit CT1 when the switch SW1 is in the ON state (the state shown in FIG. 2B), there is no difference.

  As a result, even if the contactless IC card 2 at the defect point performs load modulation by turning the switch SW1 on or off according to the transmission data D1 transmitted to the reader / writer device 3, the result of this load modulation However, it does not appear in the amplitude of the current iL (load modulation signal S1) flowing through the reader / writer device side circuit CT1.

  Therefore, since the conventional reader / writer device detects only the amplitude change of the load modulation signal S1 in order to demodulate the transmission data D1 from the load modulation signal S1, if the contactless IC card 2 is at a failure point, the transmission data D1 cannot be obtained.

  However, in the state where the carrier frequency is 13.56 [MHz], as shown in FIG. 4, the phase of the current iL flowing in the reader / writer device side circuit CT1 when the switch SW1 is in the OFF state (the state shown in FIG. 2A). And the phase of the current iL flowing through the reader / writer device side circuit CT1 when the switch SW1 is in the ON state (the state shown in FIG. 2B).

  As a result, when the contactless IC card 2 at the defect point performs load modulation by turning the switch SW1 ON or OFF according to the transmission data D1 transmitted to the reader / writer device 3, the result of this load modulation is obtained. It can be seen that the current iL (load modulation signal S1) flowing in the reader / writer device side circuit CT1 appears in the phase.

  In the present embodiment, the receiving unit 14 of the reader / writer device 3 is configured as shown in FIG. That is, when the amplitude / phase detection circuit 15 in the receiving unit 14 receives the load modulation signal S1 from the non-contact IC card 2 via the antenna unit 12, the amplitude / phase detection circuit 15 detects the amplitude change and phase change of the load modulation signal S1. The amplitude change detection result signal S2 representing the detection result of the amplitude change and the phase change detection result signal S3 representing the detection result of the phase change are supplied to the selective demodulation circuit 16 in the receiving unit 14.

  When the result of the load modulation by the non-contact IC card 2 appears in the amplitude of the load modulation signal S1, the selective demodulation circuit 16 uses the non-contact IC card to demodulate the data demodulated based on the amplitude change detection result signal S2. 2 is output to the control unit 10 as transmission data D1, and when the result of load modulation by the non-contact IC card 2 appears in phase instead of appearing in the amplitude of the load modulation signal S1, the phase change detection result Data demodulated based on the signal S3 is output to the control unit 10 as transmission data D1 from the non-contact IC card 2.

  As described above, the receiving unit 14 of the reader / writer device 3 detects not only the amplitude change of the load modulation signal S1 but also the phase change, and the result of the load modulation appears in the phase without appearing in the amplitude of the load modulation signal S1. In this case, the data demodulated based on the detection result of the phase change is output to the control unit 10 as the transmission data D1 from the non-contact IC card 2, so that the non-contact IC card 2 is at a defect point. Even if it exists, the transmission data D1 from the non-contact IC card 2 can be obtained reliably.

(3) Amplitude / Phase Detection Circuit Next, the configuration of the amplitude / phase detection circuit 15 will be described with reference to FIG. The amplitude / phase detection circuit 15 can output a first output signal So1 corresponding to the amplitude change of the load modulation signal S1 and a second output signal So2 corresponding to the phase change of the load modulation signal S1 ( Costas Loop).

  That is, when the load modulation signal S1 from the antenna unit 12 is input as the input signal Sin, the amplitude / phase detection circuit 15 supplies the signal to the first multiplier 21 and the second multiplier 22.

  The first multiplier 21 multiplies the supplied input signal Sin with the signal supplied from the VCO 23, passes the obtained multiplication result through the low-pass filter 24, and then outputs it as the first output signal So 1. This is supplied to the third multiplier 26.

  The second multiplier 22 multiplies the supplied input signal Sin by a signal supplied from the VCO 23 via the 90 ° phase shifter 28, passes the obtained multiplication result through the low-pass filter 25, and then Output signal So2 and supplied to the third multiplier 26.

  The third multiplier 26 multiplies the signal supplied from the first multiplier 21 via the low-pass filter 24 and the signal supplied from the second multiplier 22 via the low-pass filter 25, and obtains the result. The multiplied result is supplied to the VCO 23 through the loop filter 27 as a control signal Sc.

  Here, an input signal Sin to the amplitude / phase detection circuit 15 is expressed by the following equation (1),

When the initial state of the VCO is cos (ωt), the first output signal So1, the second output signal So2 and the control signal Sc obtained at this time are expressed by the following equations (2) to (2) 4),

It is represented by Then, when this control signal Sc is supplied to the VCO 23 through the loop filter 27 and thereby the VCO 23 is controlled, the VCO 23 is sin (ωt + θ (t) + a · π) [a = 0 or 1]. Will be pulled into this state, and as a result will lock in this state. Incidentally, the characteristics of the VCO 23 and the loop filter 27 in this case are expressed as shown in FIG. 7, for example.

  Next, FIG. 8 shows the phase relationship between the first output signal So1, the second output signal So2, and the control signal Sc. In FIG. 8, Δθ represents the phase of the input signal Sin when the phase of the VCO 23 is used as a reference.

  For example, when the phase of the load modulation signal S1 (input signal Sin) received from the non-contact IC card 2 has not changed, the amplitude / phase detection circuit 15 continues to be locked, and at this time, the first output signal The values of So1, the second output signal So2, and the control signal Sc are expressed by the following equations (5) to (7).

It is represented by That is, in the first output signal So1, a change in the amplitude of the input signal Sin appears as expressed by equation (5).

  Thereby, when the result of the load modulation by the non-contact IC card 2 appears in the amplitude change of the load modulation signal S1 (input signal Sin), the non-contact IC card 2 outputs the signal based on the first output signal So1. It can be seen that the transmission data D1 can be demodulated.

  Accordingly, the amplitude / phase detection circuit 15 sends the first output signal So1 to the selective demodulation circuit 16 at the subsequent stage as the amplitude change detection result signal S2. For example, in the selective demodulating circuit 16, the first output signal So1 input as the amplitude change detection result signal S2 is passed through a high-pass filter (not shown) to cut the DC component, and then input to the zero-cross comparator to transmit it. Demodulate the data D1.

  By the way, when the non-contact IC card 2 at the trouble point performs load modulation by turning the switch SW1 to the ON state or the OFF state, it is input to the amplitude / phase detection circuit 15 on the reader / writer device 3 side accordingly. The phase of the load modulation signal S1 (input signal Sin) changes.

  In the amplitude / phase detection circuit 15 that has been in the locked state because the phase of the input signal Sin has not changed so far, when the phase of the input signal Sin changes in this way, adjustment to return to the locked state is started. .

  At this time, as shown in FIG. 9A, the second output signal So2 changes to Hi or Low from when the phase change of the input signal Sin occurs until it returns to the locked state.

  Thereby, when the result of the load modulation by the non-contact IC card 2 appears in the phase of the load modulation signal S1 (input signal Sin), the transmission from the non-contact IC card 2 based on the second output signal So2. It can be seen that the data D1 can be demodulated.

  Accordingly, the amplitude / phase detection circuit 15 sends the second output signal So2 as the above-described phase change detection result signal S3 to the selective demodulation circuit 16 at the subsequent stage. For example, in the selective demodulating circuit 16, the second output signal So2 input as the phase change detection result signal S3 is passed through an integrating circuit 31 having a resistor R31 and a capacitor C31 as shown in FIG. ), An output signal (hereinafter referred to as a post-integration output signal) So2 ′ is obtained, and this is passed through a high-pass filter (not shown) to cut the DC component, and subsequently input to the zero cross comparator. Thus, the transmission data D1 is demodulated.

  In the case of this embodiment, instead of the integration circuit 31 shown in FIG. 10, a charge pump circuit 34 having first and second constant current source units 32 and 33 and a capacitor C32 as shown in FIG. May be applied. In this case, in the charge pump circuit 34, when the input second output signal So2 is Hi, the first constant current source unit 32 is turned on, whereas the second output signal So2 is Low. In this case, the second constant current source unit 33 is turned on, so that the voltage of the integrated output signal So2 ′ output thereby can be held, and as a result, the transmission data D1 in the subsequent stage. Can be easily demodulated.

  Further, in the case of the present embodiment, depending on whether the amplitude / phase detection circuit 15 is locked in a state of Δθ = 0 ° or in a state of Δθ = 180 ° before the phase of the input signal Sin is changed, As shown in FIG. 9, the second output signal So2 may be out of phase. In this case, the transmission data D1 demodulated based on the second output signal So2 is inverted. However, when the reader / writer device 3 demodulates the second output signal So2, the reader / writer device 3 determines whether or not the second output signal So2 is out of phase based on the sync code or the like of the obtained transmission data D1. The correct transmission data D1 can always be obtained by correcting the transmission data D1 according to the determination result.

(4) Selective Demodulator Circuit Next, the configuration of the selective demodulator circuit 16 will be described with reference to FIG. An amplitude change detection result signal S2 and a phase change detection result signal S3 are input to the selective demodulation circuit 16 from the previous amplitude / phase detection circuit 15.

  The A / D converter 16a and the A / D converter 16b in the selective demodulation circuit 16 perform analog-digital conversion processing on the amplitude change detection result signal S2 and the phase change detection result signal S3 from the amplitude / phase detection circuit 15, respectively. The data D2 and data D3 obtained as a result are supplied to the transmission line code detector 16c and the transmission line code detector 16d, respectively.

  The transmission line code detection unit 16c performs a transmission line code (for example, Manchester code) detection process on the data D2, notifies the selector 16e of the result, and supplies the data D2 to the selector 16e. Similarly, the transmission line code detector 16d performs transmission line code detection processing on the data D3, notifies the selector 16e of the result, and supplies the data D3 to the selector 16e.

  The selector 16e receives data supplied from the transmission path code detection unit 16c and the transmission path code detection unit 16d based on the detection result of the transmission path code notified from the transmission path code detection unit 16c and the transmission path code detection unit 16d. Of D2 and data D3, data D2 or data D3 from which a transmission line code is detected is selected.

  The selector 16e supplies the selected data D2 or data D3 to the synchronization detection unit 16f. The synchronization detection unit 16f performs synchronization detection / data reproduction processing on the supplied data D2 or data D3, and supplies the obtained reproduction data to the error detection unit 16g. When no error is detected in the supplied reproduction data, the error detection unit 16g outputs this to the control unit 10 as transmission data D1 from the non-contact IC card 2.

  In this embodiment, the selector 16e may receive a notification that a transmission line code has been detected for both the data D2 and the data D3. In this case, for example, a preset priority is set. One of them is selected based on the above.

  In the present embodiment, a selective demodulation circuit 16X as shown in FIG. 13 may be applied instead of the selective demodulation circuit 16 shown in FIG.

  That is, the A / D converter 16Xa and the A / D converter 16Xb in the selective demodulation circuit 16X perform analog-to-digital conversion on the amplitude change detection result signal S2 and the phase change detection result signal S3 from the amplitude / phase detection circuit 15, respectively. Processing is performed, and the data D2 and data D3 obtained as a result are supplied to the synchronization detection unit 16Xc and the synchronization detection unit 16Xd, respectively.

  The synchronization detector 16Xc executes synchronization detection / data reproduction processing on the data D2, notifies the selector 16Xe of the result of the synchronization detection processing, and supplies the obtained reproduction data D2X to the selector 16Xe. Similarly, the synchronization detection unit 16Xd performs synchronization detection / data reproduction processing on the data D3, notifies the selector 16Xe of the result of the synchronization detection processing, and supplies the obtained reproduction data D3X to the selector 16Xe. To do.

  Based on the result of the synchronization detection process notified from the synchronization detection unit 16Xc and the synchronization detection unit 16Xd, the selector 16Xe includes the reproduction data D2X and the reproduction data D3X supplied from the synchronization detection unit 16Xc and the synchronization detection unit 16Xd. The reproduction data D2X or the reproduction data D3X reproduced by detecting the synchronization is selected.

  The selector 16Xe supplies the selected reproduction data D2X or reproduction data D3X to the error detection unit 16Xf, and when no error is detected by the error detection unit 16Xf, this is used as transmission data D1 from the non-contact IC card 2 , Output to the control unit 10.

  In this embodiment, the selector 16Xe may receive a notification that synchronization has been detected for both the reproduction data D2X and the reproduction data D3X. In this case, for example, a priority set in advance is used. One of them is selected based on the above.

  In the case of the present embodiment, a selective demodulation circuit 16Y as shown in FIG. 14 may be applied instead of the selective demodulation circuits 16 and 16X shown in FIGS.

  That is, the A / D converter 16Ya and A / D converter 16Yb in the selective demodulation circuit 16Y perform analog-to-digital conversion on the amplitude change detection result signal S2 and the phase change detection result signal S3 from the amplitude / phase detection circuit 15, respectively. The data D2 and the data D3 obtained as a result are supplied to the error detection unit 16Ye and the error detection unit 16Yf as the reproduction data D2X and the reproduction data D3X through the synchronization detection unit 16Yc and the synchronization detection unit 16Yd, respectively. To do.

  The error detection unit 16Ye executes processing for detecting the transmission packet structure for the reproduction data D2X, notifies the selector 16Yg of the result, and supplies the reproduction data D2X to the selector 16Yg. Similarly, the error detection unit 16Yf executes a process for detecting the transmission packet structure for the reproduction data D3X, notifies the selector 16Yg of the result, and supplies the reproduction data D3X to the selector 16Yg.

  Based on the detection result of the transmission packet structure notified from the error detection unit 16Ye and the error detection unit 16Yf, the selector 16Yg includes the reproduction data D2X and the reproduction data D3X supplied from the error detection unit 16Ye and the error detection unit 16Yf. For example, the reproduction data D2X or the reproduction data D3X in which the transmission packet having the structure shown in FIG. 15 is normally detected is selected.

  The selector 16Yg outputs the selected reproduction data D2X or reproduction data D3X to the control unit 10 as transmission data D1 from the non-contact IC card 2.

  In this embodiment, the selector 16Yg may receive a notification that the transmission packet has been normally detected for both the reproduction data D2X and the reproduction data D3X. Any one is selected based on the priority.

(5) Operation and Effect In the above configuration, the receiving unit 14 of the reader / writer device 3 detects not only the amplitude change but also the phase change of the load modulation signal S1, and the result of the load modulation by the non-contact IC card 2 is the load modulation signal. When it appears in the phase instead of appearing in the amplitude of S1, the data demodulated based on the detection result of the phase change is transmitted to the control unit 10 as the transmission data D1 from the non-contact IC card 2.

  Thereby, since the non-contact IC card 2 is at a defect point, even if the result of the load modulation by the non-contact IC card 2 appears in the phase instead of appearing in the amplitude of the load modulation signal S1, the non-contact IC card 2 The transmission data D1 from can be reliably obtained.

  According to the above configuration, the reader / writer device 3 detects not only the amplitude change of the load modulation signal S1 but also the phase change in order to demodulate the transmission data D1 from the load modulation signal S1. Even when the result of load modulation by the contact IC card 2 does not appear in the amplitude of the load modulation signal S1 but appears in phase, the transmission data D1 can be obtained, and thus data communication with the non-contact IC card 2 can be reliably performed. it can.

  In particular, in a ticket vending machine provided at a station, a non-contact IC card 2 inserted by a user is mechanically fixed inside the ticket vending machine, and then a non-contact IC card by a reader / writer device inside the ticket vending machine. 2 is read / written. Therefore, in this case, there is a possibility that the position of the non-contact IC card 2 is fixed at a defect point separated from the reader / writer device by the distance d1. The reader / writer device 3 of the present embodiment can reliably perform data communication with the non-contact IC card 2 even in such a situation.

(6) Other Embodiments In the above-described embodiment, the amplitude / phase detection circuit 15 formed of the Costas loop uses the second output signal So2 as the phase change detection result signal S3 to the subsequent selection demodulation circuit 16. The case where the second output signal So2 is demodulated by the selective demodulating circuit 16 is described above. However, the present invention is not limited to this, and the amplitude / phase detecting circuit 15 detects the phase change of the control signal Sc. The result signal S3 may be sent to the subsequent selective demodulation circuit 16. In this case, since the phase change of the load modulation signal S1 (input signal Sin) also appears in the control signal Sc, the same effect as described above can be obtained.

  In the above-described embodiment, the case where the amplitude / phase detection circuit 15 formed of the Costas loop is locked at Δθ = 0 ° or 180 ° has been described, but the present invention is not limited to this, and Δθ = 90 °. Alternatively, it may be locked at 270 °. In addition, the method for realizing the amplitude / phase detection circuit 15 formed of the Costas loop can be implemented by either an analog circuit or a digital circuit.

  Furthermore, in the above-described embodiment, the case where the selective demodulation circuit 16 shown in FIG. 12 is applied, the selective demodulation circuit 16X shown in FIG. 13 is applied, or the selective demodulation circuit 16Y shown in FIG. 14 is applied. As described above, the present invention is not limited to this, and the selective demodulation circuit 16, the selective demodulation circuit 16X, and the selective demodulation circuit 16Y may be applied in appropriate combination.

Further, in the above-described embodiment, the case where the error detection unit 16g and the like perform error detection processing based on CRC has been described, but the present invention is not limited to this, and error detection processing is performed based on a preamble and sync code. May be.
good.

  Further, in the above-described embodiment, the case where the synchronization detection units 16Xc and 16Xd shown in FIG. 13 execute only the synchronization detection has been described. However, the present invention is not limited to this, and the synchronization detection units 16Xc and 16Xd A process for detecting a path code may also be executed. In this case, the selector 16Xe at the subsequent stage may select the data D2 or the data D3 based on the result of the synchronization detection notified from the synchronization detection units 16Xc and 16Xd and the result of the transmission path code detection.

  Further, in the above-described embodiment, the case where the A / D converters 16a, 16b, 16Xa, 16Xb, 16Ya, and 16Yb are provided in the selective demodulation circuits 16, 16X, and 16Y shown in FIGS. However, when the amplitude / phase detection circuit 15 in the previous stage is constituted by a digital circuit, these need not be provided.

  Furthermore, in the above-described embodiment, the case where the reader / writer device 3 is applied as a communication device that performs data communication with the non-contact IC card 2 has been described. However, the present invention is not limited to this, and the load-modulated load modulation signal S1 is used. In addition, various other devices such as a mobile phone and a PDA (Personal Digital Assistance) that are configured to perform data communication with the non-contact IC card 2 may be applied as long as they perform demodulation processing. .

  Furthermore, in the above-described embodiment, detection means (amplitude / phase detection circuit 15) detects the amplitude change and phase change of the load modulation signal in order to demodulate the data (transmission data D1) from the received load modulation signal (S1). Although the case where the receiving unit 14 as shown in FIG. 5 is applied has been described as the receiving circuit having (), the present invention is not limited to this, and various other configurations can be applied.

  Furthermore, in the above-described embodiment, the phase change detection result signal (S3) representing the phase change is converted into an integrated voltage change via the charge pump circuit (34), and data ( Although the case where the selective demodulation circuit 16 (16X, 16Y) is applied as the demodulation means for demodulating the transmission data) has been described, the present invention is not limited to this, and various other configurations can be applied.

  Furthermore, in the above-described embodiment, the transmission path code detection units 16c and 16d are applied as transmission path code detection means for detecting transmission path codes for the first generation data (D2) and the second generation data (D3). In the above description, the synchronization detectors 16Xc and 16Xd are applied as the synchronization detection means for performing synchronization detection, and the error detection sections 16Ye and 16Yf are applied as the packet structure detection means for detecting the transmission packet structure. Not limited to this, various other configurations can be applied.

  The present invention can be used for a reader / writer device that performs data communication with a non-contact IC card.

It is a basic diagram which shows the structure of the non-contact IC card system in this Embodiment. It is a basic diagram which shows an analysis object. It is a basic diagram which shows the analysis result about an amplitude change. It is a basic diagram which shows the analysis result about a phase change. It is a basic diagram which shows the structure of a receiving part. It is a basic diagram which shows the structure of the amplitude and phase detection circuit which consists of a Costas loop. It is a basic diagram which shows the general | schematic characteristic of VCO and a loop filter. It is a basic diagram which shows the phase relationship of each output. It is a basic diagram which shows the phase change of a 2nd output signal. It is a basic diagram which shows a passive integration circuit. It is a basic diagram which shows a charge pump circuit. It is a basic diagram which shows the selective demodulation circuit (1). It is a basic diagram which shows the selective demodulation circuit (2). It is a basic diagram which shows the selective demodulation circuit (3). It is a basic diagram which shows a packet structure. It is a basic diagram which shows the conventional non-contact IC card system. It is a basic diagram which shows the conventional detection circuit and demodulation circuit. It is a basic diagram which shows the conventional demodulation circuit. It is a basic diagram which shows the conventional transmission packet (1). It is a basic diagram which shows Manchester code | symbol. It is a basic diagram which shows the conventional transmission packet (2). It is a basic diagram which shows the communication characteristic at the time of moving a non-contact IC card vertically upwards with respect to a reader / writer apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Non-contact IC card system, 2 ... Non-contact IC card, 3 ... Reader / writer apparatus, 4 ... Server apparatus, 10 ... Control part, 12 ... Antenna part, 14 ... Reception part, CT1 ... ... reader / writer device side circuit, CT2 ... non-contact IC card side circuit, 15 ... amplitude / phase detection circuit, 16, 16X, 16Y ... selective demodulation circuit.

Claims (10)

A receiving circuit comprising detecting means for detecting an amplitude change and a phase change of the load modulation signal by a Costas loop circuit in order to demodulate data from the received load modulation signal. A charge comprising a capacitor, a first constant current source unit, and a second constant current source unit, wherein the first constant current source unit and the second constant current source unit are controlled to supply current to the capacitor A pump circuit;
The phase change detection result signal indicating the phase change detection result is used to control the first constant current source unit and the second constant current source unit of the charge pump circuit, and the phase change detection result signal is integrated. The receiving circuit according to claim 1, further comprising : a demodulating unit that converts the data into a voltage change and demodulates the data based on the converted voltage change. Transmission path code detection means for detecting transmission path codes for the first generation data generated based on the detected amplitude change and the second generation data generated based on the detected phase change;
2. The reception according to claim 1, further comprising : selection means for selecting the first generation data or the second generation data whose transmission line code is detected by the transmission line code detection means in order to demodulate the data. circuit. Synchronization detection means for performing synchronization detection on the first generation data generated based on the detected amplitude change and the second generation data generated based on the detected phase change;
The receiving circuit according to claim 1, further comprising selection means for selecting the first generation data or the second generation data for which synchronization is detected by the synchronization detection means, in order to demodulate the data. Packet structure detection means for detecting a transmission packet structure for the first generation data generated based on the detected amplitude change and the second generation data generated based on the detected phase change;
2. The reception according to claim 1, further comprising : selection means for selecting, in order to demodulate the data, the first generation data or the second generation data in which the transmission packet structure is detected by the packet structure detection means. circuit. A receiving circuit for receiving an external load modulation signal;
The receiving circuit is
A communication apparatus comprising detection means for detecting a change in amplitude and a phase of the load modulation signal by a Costas loop circuit in order to demodulate data from the received load modulation signal. A charge comprising a capacitor, a first constant current source unit, and a second constant current source unit, wherein the first constant current source unit and the second constant current source unit are controlled to supply current to the capacitor A pump circuit;
The phase change detection result signal indicating the phase change detection result is used to control the first constant current source unit and the second constant current source unit of the charge pump circuit, and the phase change detection result signal is integrated. The communication apparatus according to claim 6, further comprising : a demodulating unit that converts the data into a voltage change and demodulates the data based on the converted voltage change. Transmission path code detection means for detecting transmission path codes for the first generation data generated based on the detected amplitude change and the second generation data generated based on the detected phase change;
The communication according to claim 6, further comprising selection means for selecting the first generation data or the second generation data whose transmission line code is detected by the transmission line code detection means in order to demodulate the data. apparatus. Synchronization detection means for performing synchronization detection on the first generation data generated based on the detected amplitude change and the second generation data generated based on the detected phase change;
The communication apparatus according to claim 6, further comprising selection means for selecting the first generation data or the second generation data for which synchronization is detected by the synchronization detection means, in order to demodulate the data. Packet structure detection means for detecting a transmission packet structure for the first generation data generated based on the detected amplitude change and the second generation data generated based on the detected phase change;
The communication according to claim 6, further comprising selection means for selecting the first generation data or the second generation data in which the transmission packet structure is detected by the packet structure detection means in order to demodulate the data. apparatus.

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