JP4412398B2 - Electro-optical device, driving method of electro-optical device, and electronic apparatus - Google Patents

Description

  The present invention relates to an electro-optical device using an electro-optical element whose emission luminance is controlled by an electric current, a driving method of the electro-optical device, and an electronic apparatus, and more particularly to a technique for blocking a current path of a driving current.

  In recent years, flat panel displays (FPD) using organic EL (Electronic Luminescence) elements have attracted attention. The organic EL element is a typical current-driven element that is driven by a current flowing through the organic EL element, and self-lumines with a luminance corresponding to the current level. The driving method of an active matrix display using an organic EL element is roughly classified into a voltage program method and a current program method.

  For example, Patent Document 1 relating to a voltage programming method discloses a pixel circuit in which a transistor (TFT 3 shown in FIG. 5 of the same document) is provided in a current path for supplying a drive current to an organic EL element. ing. This transistor is controlled to be in an on state in the first half of one frame period, and is controlled to be in an off state in the latter half. Therefore, in the first half of the period when the transistor is turned on and the drive current flows, the organic EL element emits light with the luminance corresponding to the current level. In the latter half of the period when the transistor is turned off and the drive current is cut off, the organic EL element is forcibly turned off, and black is displayed. Such a method is called “Blinking”. By this method, afterimages felt by human eyes can be cut off and the display quality of moving images can be improved.

  For example, Patent Document 2 and Patent Document 3 disclose the configuration of a pixel circuit using a current programming method. Patent Document 2 relates to a pixel circuit using a current mirror circuit constituted by a pair of transistors. Patent Document 3 relates to a pixel circuit that reduces current non-uniformity and threshold voltage change in a drive transistor that is a setting source of a drive current supplied to an organic EL element.

Japanese Patent Laid-Open No. 2001-60076 JP 2001-147659 A Japanese translation of PCT publication No. 2002-514320.

  An object of the present invention is to improve display quality in an electro-optical device using an electro-optical element that emits light with luminance corresponding to a driving current.

In order to solve such a problem, the electro-optical device according to the present invention is configured to program a plurality of pixels arranged corresponding to each intersection of a plurality of scanning lines and a plurality of data lines, and each of the plurality of scanning lines A scanning line driving circuit that sequentially selects each period; and a data line driving circuit that supplies a data signal to each of the plurality of data lines in each programming period, and each of the plurality of pixels includes A switching transistor that is turned on when the scanning line corresponding to a pixel is selected, and a charge corresponding to a data signal supplied from the data line to the pixel through the switching transistor that is turned on is accumulated. A capacitor, a driving transistor that sets a driving current according to the electric charge accumulated in the capacitor, and an electro-optic element that emits light with a luminance according to the driving current In a period from when the scanning line corresponding to the pixel is selected to when the scanning line is selected next, conduction and interruption of the current path of the drive current with a period shorter than the programming period as a cycle. And a control transistor that repeats the above.

In a preferred aspect of the present invention, the timing for starting to repeat conduction and interruption of the current path of the drive current is earlier in time than the end point of the programming period.

The electronic apparatus of the present invention includes the electro-optical device according to the present invention.

The driving method of the electro-optical device according to the invention includes a plurality of pixels arranged corresponding to the intersections of the plurality of scanning lines and the plurality of data lines, and each of the plurality of pixels includes the pixel. A switching transistor that is turned on when the corresponding scanning line is selected, and a capacitor that accumulates electric charge according to a data signal supplied from the data line to the pixel via the switching transistor that is turned on. , A drive transistor that sets a drive current according to the charge accumulated in the capacitor, an electro-optic element that emits light with a luminance according to the drive current, and a control that controls conduction and blocking of the current path of the drive current A method of driving an electro-optical device including a transistor, wherein each of the plurality of scanning lines is sequentially selected for each programming period, and By controlling each control transistor, the driving is performed with a period shorter than the programming period as a period in a period from when the scanning line corresponding to the pixel is selected until the scanning line is selected next. The current path is repeatedly turned on and off.

In a preferred aspect of the driving method according to the present invention, the timing for starting to repeat conduction and interruption of the current path of the driving current is earlier than the end point of the programming period.

(First embodiment)
The present embodiment relates to an electro-optical device using a current programming method, and more particularly to display control of an active matrix display in which each pixel includes a current mirror circuit. Here, the “current programming method” refers to a method of supplying data to the data line on a current basis.

  FIG. 1 is a block diagram of the electro-optical device. In the display unit 1, pixels 2 for m dots × n lines are arranged in a matrix (in a two-dimensional plane), and the horizontal line groups Y 1 to Y n extending in the horizontal direction are extended in the vertical direction. Existing data line groups X1 to Xm are arranged. One horizontal line Y (Y indicates any one of Y1 to Yn) is composed of two scanning lines and one signal line, and the first scanning signal SEL1, A second scanning signal SEL2 and a pulse signal PLS are output. These scanning signals SEL1 and SEL2 basically have mutually exclusive logic levels, but one change timing may be slightly shifted. Each pixel 2 is arranged corresponding to each intersection of the horizontal line group Y1 to Yn and the data line group X1 to Xm. The pulse signal PLS impulse-drives the electro-optical element constituting the pixel 2 in a period from selection of a certain pixel 2 to selection of the pixel 2 next (in this embodiment, one vertical scanning period). This is a control signal. In the present embodiment, one pixel 2 is used as a minimum image display unit, but one pixel 2 may be composed of a plurality of sub-pixels. Further, in FIG. 1, power supply lines for supplying predetermined fixed potentials Vdd and Vss to each pixel 2 are omitted.

  The control circuit 5 connects the scanning line driving circuit 3 and the data line driving circuit 4 based on a vertical synchronizing signal Vs, a horizontal synchronizing signal Hs, a dot clock signal DCLK, gradation data D and the like input from a host device (not shown). Synchronous control. Under this synchronization control, the scanning line driving circuit 3 and the data line driving circuit 4 cooperate with each other to perform display control of the display unit 1.

  The scanning line driving circuit 3 is mainly composed of a shift register, an output circuit and the like, and selects scanning lines in order by outputting scanning signals SEL1 and SEL2 to the scanning lines. By such line sequential scanning, pixel rows corresponding to pixel groups for one horizontal line are sequentially selected in a predetermined scanning direction (generally from the top to the bottom) in one vertical scanning period. To go.

  On the other hand, the data line driving circuit 4 is mainly composed of a shift register, a line latch circuit, an output circuit, and the like. In the present embodiment, the data line driving circuit 4 includes a variable current source that converts data corresponding to the display gradation of the pixel 2 (data voltage Vdata) into the data current Idata because of using the current programming method. In one horizontal scanning period, the data line driving circuit 4 simultaneously performs simultaneous output of the data current Idata for the pixel row to which data is written this time and dot-sequential latching of data relating to the pixel row to be written in the next horizontal scanning period. Do. In a certain horizontal scanning period, m pieces of data corresponding to the number of data lines X are sequentially latched. Then, in the next horizontal scanning period, the latched m pieces of data are converted into the data current Idata and then output to the respective data lines X1 to Xm all at once. The present invention can also be applied to a configuration in which data is directly line-sequentially input from a frame memory or the like (not shown) to the data line driving circuit 4, but even in this case, the operation of the main part of the present invention Are the same and will not be described. In this case, it is not necessary to include a shift register in the data line driving circuit 4.

  FIG. 2 is a circuit diagram of the pixel 2 according to the present embodiment. One pixel 2 includes an organic EL element OLED, five transistors T1 to T5 that are active elements, and a capacitor C that holds data. The organic EL element OLED represented as a diode is a current-driven element whose emission luminance is controlled by the drive current Ioled supplied to itself. In this pixel circuit, n-channel transistors T1 and T5 and p-channel transistors T2 to T4 are used. However, this is an example, and the present invention is not limited to this. Absent.

  The gate of the first switching transistor T1 is connected to the scanning line to which the first scanning signal SEL1 is supplied, and the source thereof is the data line X to which the data current Idata is supplied (X is any one of X1 to Xm). Connected to a book). The drain of the first switching transistor T1 is commonly connected to the drain of the second switching transistor T2 and the drain of the programming transistor T3. The source of the second switching transistor T2 to which the second scanning signal SEL2 is supplied to the gate is commonly connected to the gates of the pair of transistors T3 and T4 constituting the current mirror circuit and one electrode of the capacitor C. Yes. A power supply potential Vdd is applied to the source of the programming transistor T3, the source of the driving transistor T4 which is one form of the driving element, and the other electrode of the capacitor C. The control transistor T5 to which the pulse signal PLS is supplied to the gate, which is one form of the control element, specifically in the current path of the drive current Ioled, specifically, the drain of the drive transistor T4 and the anode (anode) of the organic EL element OLED. ). A potential Vss lower than the power supply potential Vdd is applied to the cathode (cathode) of the organic EL element OLED. The programming transistor T3 and the driving transistor T4 constitute a current mirror circuit in which both gates are connected to each other. Therefore, the current level of the data current Idata flowing through the channel of the programming transistor T3 and the current level of the driving current Ioled flowing through the channel of the driving transistor T4 are in a proportional relationship.

  FIG. 3 is a drive timing chart of the pixel 2 according to the present embodiment. The timing when the selection of a certain pixel 2 is started by line sequential scanning of the scanning line driving circuit 3 is t0, and the timing when the selection of the pixel 2 is started next is t2. The one vertical scanning period t0 to t2 is divided into a first programming period t0 to t1 and a second driving period t1 to t2.

  First, in the programming period t0 to t1, data is written to the capacitor C by selecting the pixel 2. At timing t0, the first scanning signal SEL1 rises to a high level (hereinafter referred to as “H level”), and the first switching transistor T1 is turned on. Thereby, the data line X and the drain of the programming transistor T3 are electrically connected. In synchronization with the rise of the first scanning signal SEL1, the second scanning signal SEL2 falls to a low level (hereinafter referred to as “L level”), and the second switching transistor T2 is also turned on. Thus, the programming transistor T3 becomes a diode connection in which its gate is connected to its drain, and functions as a non-linear resistance element. Therefore, the programming transistor T3 causes the data current Idata supplied from the data line X to flow through its own channel, and generates a gate voltage Vg corresponding to the data current Idata at its own gate. In the capacitor C connected to the gate of the programming transistor T3, charges corresponding to the generated gate voltage Vg are accumulated, and data is written.

  In the programming period t0 to t1, since the pulse signal PLS is maintained at the L level, the control transistor T5 remains off. Therefore, the current path to the organic EL element OLED is continuously cut off regardless of the threshold relationship between the pair of transistors T3 and T4 constituting the current mirror circuit. Therefore, during this period t0 to t1, the organic EL element OLED does not emit light.

  Next, in the driving period t1 to t2, the driving current Ioled corresponding to the accumulated charge of the capacitor C flows through the organic EL element OLED, and the organic EL element OLED emits light. First, at timing t1, the first scanning signal SEL1 falls to the L level, and the first switching transistor T1 is turned off. As a result, the data line X and the drain of the programming transistor T3 are electrically separated, and the supply of the data current Idata to the programming transistor T3 is stopped. In synchronization with the fall of the first scanning signal SEL1, the second scanning signal SEL2 rises to the H level, and the second switching transistor T2 is also turned off. Thereby, the gate and the drain of the programming transistor T3 are electrically separated. A gate voltage Vg equivalent is applied to the gate of the drive transistor T4 by the electric charge accumulated in the capacitor C.

  In synchronization with the fall of the first scanning signal SEL1 at the timing t1, the pulse signal PLS, which was previously at the L level, changes to a pulsed waveform in which the H level and the L level are alternately repeated. This pulse waveform is continued until the timing t2 when the next selection of the pixel 2 is started. As a result, the control transistor T5 whose conduction is controlled by the pulse signal PLS is alternately turned on and off. When the control transistor T5 is on, a current path is formed from the power supply potential Vdd to the potential Vss through the drive transistor T4, the control transistor T5, and the organic EL element OLED. The drive current Ioled flowing through the organic EL element OLED corresponds to the channel current of the drive transistor T4 that sets the current value, and is controlled by the gate voltage Vg caused by the accumulated charge in the capacitor C. The organic EL element OLED emits light with a luminance corresponding to the drive current Ioled. With the current mirror configuration described above, the drive current Ioled (channel current of the drive transistor T4) that defines the light emission luminance of the organic EL element OLED is proportional to the data current Idata (channel current of the programming transistor T3) supplied from the data line X. To do. On the other hand, when the control transistor T5 is off, the current path of the drive current Ioled is forcibly cut off by the control transistor T5. Therefore, in the off period of the control transistor T5, the light emission of the organic EL element OLED is temporarily stopped and black display is performed. Thus, in the driving period t1 to t2, the control transistor T5 provided in the current path of the driving current Ioled is turned on and off a plurality of times, and thus the organic EL element OLED emits and does not emit light a plurality of times. Repeated.

  As described above, in the present embodiment, the current path of the drive current Ioled is repeatedly interrupted in the period t0 to t2 from the selection of the pixel 2 to the next selection by the conduction control of the control transistor T5. For this reason, light emission and non-light emission of the organic EL element OLED are performed a plurality of times during the driving period t1 to t2. As a result, the optical response of the pixel 2 can be made closer to an impulse type. In addition, during this period t1 to t2, since the period during which the organic EL element OLED does not emit light (black display period) is dispersed, the flicker of the display image can be reduced. As a result, display quality can be further improved. At the same time, by improving the optical response of the pixel 2, it is possible to effectively suppress the occurrence of a pseudo contour in moving image display or the like.

  In addition, according to the present embodiment, by providing the control transistor T5 in the current path of the drive current Ioled, it is possible to eliminate the threshold restriction of the pair of transistors T3 and T4 constituting the current mirror circuit. In the pixel circuit having the current mirror circuit disclosed in Patent Document 1 described above, the control transistor T5 is not provided in the current path of the drive current Ioled. Therefore, the threshold value of the driving transistor T4 needs to be set so as not to be lower than the threshold value of the programming transistor T3. This is because if this relationship is not satisfied, the drive transistor T4 is turned on before the data writing to the capacitor C is sufficiently completed, and the organic EL element OLED emits light due to the leakage current resulting from this. It is. Furthermore, there may be a problem that the drive transistor T4 cannot be completely turned off and the organic EL element OLED cannot be completely turned off, that is, “black” cannot be displayed. On the other hand, if the control transistor T5 is added in the current path of the drive current Ioled and is turned off during the programming period t0 to t1, as in this embodiment, the relationship between the threshold values of the transistors T3 and T4. The current path of the drive current Ioled can be forcibly interrupted without depending on. As a result, the light emission of the organic EL element OLED due to the leakage current of the drive transistor T4 can be surely prevented during the programming period t0 to t1, and the display quality can be further improved.

  In the above-described embodiment, the example in which the waveform of the pulse signal PLS is pulsed during the driving period t1 to t2 has been described. However, if attention is paid only to the prevention of light emission of the organic EL element OLED caused by the leakage current described above, it is sufficient that the control transistor T5 is turned off at least during the programming period t0 to t1. Therefore, for example, as shown in FIG. 4, the pulse signal PLS may be maintained at the L level during the programming period t0 to t1, and the pulse signal PLS may be maintained at the H level during the subsequent driving period t1 to t2. The same effect can be obtained by changing the second switching transistor T2 to the n-channel type and connecting the scanning signal SEL1 to the gate of T2. In this case, since the scanning line SEL1 is not necessary, the circuit scale constituting the pixel is reduced, which can contribute to improvement in yield and aperture ratio.

(Second Embodiment)
The present embodiment relates to a configuration of a pixel circuit in a current programming method in which a driving transistor also functions as a programming transistor. The overall configuration of the electro-optical device, including the embodiments described later, is basically the same as that of FIG. 1 except for the configuration of one horizontal line Y. In the present embodiment, one horizontal line Y is composed of one scanning line to which the scanning signal SEL is supplied and one signal line to which the pulse signal PLS is supplied.

  FIG. 5 is a circuit diagram of the pixel 2 according to the present embodiment. One pixel 2 includes an organic EL element OLED, four transistors T1, T2, T4, T5 and a capacitor C. In the pixel circuit according to this embodiment, the transistors T1, T2, T4, and T5 are all p-channel types, but this is an example, and the present invention is not limited to this.

  The gate of the first switching transistor T1 is connected to the scanning line to which the scanning signal SEL is supplied, and the source thereof is connected to the data line X to which the data current Idata is supplied. The drain of the first switching transistor T1 is commonly connected to the drain of the control transistor T5, the source of the driving transistor T4, and one electrode of the capacitor C. The other electrode of the capacitor C is commonly connected to the gate of the driving transistor T4 and the source of the second switching transistor T2. Similarly to the first switching transistor T1, the gate of the second switching transistor T2 is connected to a scanning line to which the scanning signal SEL is supplied. The drain of the second switching transistor T2 is commonly connected to the drain of the driving transistor T4 and the anode of the organic EL element OLED. A potential Vss is applied to the cathode of the organic EL element OLED. The gate of the control transistor T5 is connected to a signal line to which the pulse signal PLS is supplied, and the power supply potential Vdd is applied to its source.

  FIG. 6 is a drive timing chart of the pixel 2 according to this embodiment. In the pixel circuit of FIG. 5, since the current flows through the organic EL element OLED over almost the entire one vertical scanning period t0 to t2, the organic EL element OLED emits light. Similar to the above-described embodiment, one vertical scanning period t0 to t2 is divided into a programming period t0 to t1 and a driving period t1 to t2.

  First, in the programming period t0 to t1, data is written to the capacitor C by selecting the pixel 2. At timing t0, the scanning signal SEL falls to the L level, and both the switching transistors T1 and T2 are turned on. As a result, the data line X and the source of the drive transistor T4 are electrically connected, and the drive transistor T4 has a diode connection in which its gate and its drain are electrically connected. As a result, the drive transistor T4 causes the data current Idata supplied from the data line X to flow through its own channel, and generates a gate voltage Vg corresponding to this data current Idata at its own gate. In the capacitor C connected between the gate and source of the driving transistor T4, charges corresponding to the generated gate voltage Vg are accumulated and data is written. Thus, in the programming period t0 to t1, the drive transistor T4 functions as a programming transistor that writes data to the capacitor C.

  In the programming period t0 to t1, since the pulse signal PLS is maintained at the H level, the control transistor T5 remains off. Therefore, the current path itself of the drive current Ioled from the power supply potential Vdd to the potential Vss continues to be cut off. However, a current path of the data current Idata is formed between the data line X and the potential Vss via the first switching transistor T1, the drive transistor T4, and the organic EL element OLED. Therefore, also in the programming period t0 to t1, the organic EL element OLED emits light with a luminance corresponding to the data current Idata.

  Next, in the driving period t1 to t2, the driving current Ioled corresponding to the electric charge accumulated in the capacitor C flows through the organic EL element OLED, and the organic EL element OLED emits light. First, at the drive start timing t1, the scanning signal SEL rises to the H level, and both the switching transistors T1 and T2 are turned off. As a result, the data line X supplied with the data current Idata and the source of the driving transistor T4 are electrically isolated, and the gate and drain of the driving transistor T4 are also electrically isolated. A gate voltage Vg equivalent is applied to the gate of the driving transistor T4 in accordance with the charge stored in the capacitor C.

  In synchronization with the rise of the scanning signal SEL at the timing t1, the pulse signal PLS, which was at the H level before that, changes to a pulse waveform. As a result, the control transistor T5 whose conduction is controlled by the pulse signal PLS is alternately turned on and off. When the control transistor T5 is on, a current path for the drive current Ioled is formed. The drive current Ioled flowing through the organic EL element OLED is controlled by the gate voltage Vg caused by the accumulated charge in the capacitor C, and the organic EL element OLED emits light with a luminance corresponding to the current level. On the other hand, when the control transistor T5 is off, the current path of the drive current Ioled is forcibly cut off by the control transistor T5. Through such conduction control of the control transistor T5, light emission of the organic EL element OLED is intermittently repeated during the driving period t1 to t2.

  According to the present embodiment, the current path of the drive current Ioled is interrupted a plurality of times during the period t0 to t2 from the selection of the pixel 2 to the next selection by the conduction control of the control transistor T5. For this reason, light emission and non-light emission of the organic EL element OLED are repeated in the drive period t1 to t2. As a result, similar to the first embodiment, the optical response of the pixel 2 can be made close to an impulse type, and the display image flicker can be reduced by dispersing the black display. As a result, the display quality can be further improved.

  In the present embodiment, intermittent light emission of the organic EL element OLED is performed by the conduction control of the control transistor T5 existing in the current path of the drive current Ioled. However, for example, as shown in FIG. 7 or FIG. 8, even when a second control transistor T6 is added separately from the control transistor T5 in the current path of the drive current Ioled, the same thing can be realized. In the pixel circuit of FIG. 7, the second control transistor T6 is provided between the drain of the first control transistor T5 and the source of the drive transistor T4. In the pixel circuit of FIG. 8, the second control transistor T6 is provided between the drain of the drive transistor T4 and the anode of the organic EL element OLED. As an example, the second control transistor T6 is an n-channel transistor, and a pulse signal PLS is supplied to the gate thereof. On the other hand, the control signal GP is supplied to the gate of the first control transistor T5.

  FIG. 9 is a timing chart of driving of the pixel 2 in FIG. 7 or FIG. The control signal GP is maintained at the H level during the programming period t0 to t1. Therefore, the current path of the drive current Ioled is interrupted a plurality of times by the control transistor T5 whose conduction is controlled by the control signal GP. In the programming period t0 to t1, since the pulse signal PLS is at the H level, the second control transistor T6 is turned on. Therefore, similarly to the pixel circuit of FIG. 5, a current path of the data current Idata is formed, data is written to the capacitor C, and the organic EL element OLED emits light. In the subsequent driving period t1 to t2, the control signal GP becomes H level and the pulse signal PLS has a pulse waveform. Accordingly, the light emission of the organic EL element OLED is intermittently repeated through the conduction control of the second control transistor T6 by the pulse signal PLS.

(Third embodiment)
The present embodiment relates to a configuration of a pixel circuit in a current programming method in which a driving transistor also functions as a programming transistor. In the present embodiment, one horizontal line Y is composed of one scanning line to which the scanning signal SEL is supplied and one signal line to which the pulse signal PLS is supplied.

  FIG. 10 is a circuit diagram of the pixel 2 according to the present embodiment. One pixel 2 includes an organic EL element OLED, four transistors T1, T2, T4, T5 and a capacitor C. In the pixel circuit according to the present embodiment, n-channel transistors T1, T2, and T5 and a p-channel transistor T4 are used. However, this is an example, and the present invention is not limited to this. It is not something.

  The gate of the first switching transistor T1 is connected to the scanning line to which the scanning signal SEL is supplied, and the source thereof is connected to the data line X to which the data current Idata is supplied. The drain of the first switching transistor T1 is commonly connected to the source of the second switching transistor T2, the drain of the driving transistor T4, and the drain of the control transistor T5. Similarly to the first switching transistor T1, the gate of the second switching transistor T2 is connected to a scanning line to which the scanning signal SEL is supplied. The drain of the second switching transistor T2 is commonly connected to one electrode of the capacitor C and the gate of the driving transistor T4. A power supply potential Vdd is applied to the other electrode of the capacitor C and the source of the driving transistor T4. The control transistor T5 to which the pulse signal PLS is supplied to the gate is provided between the drain of the driving transistor T4 and the anode of the organic EL element OLED. A potential Vss is applied to the cathode of the organic EL element OLED.

  FIG. 11 is a drive timing chart of the pixel 2 according to this embodiment. As in the embodiment described above, one vertical scanning period t0 to t2 is divided into a programming period t0 to t1 and a driving period t1 to t2.

  First, in the programming period t0 to t1, data is written to the capacitor C by selecting the pixel 2. At timing t0, the scanning signal SEL rises to H level, and both the switching transistors T1 and T2 are turned on. As a result, the data line X and the drain of the driving transistor T4 are electrically connected, and the driving transistor T4 has a diode connection in which its own gate and its own drain are electrically connected. As a result, the drive transistor T4 causes the data current Idata supplied from the data line X to flow through its own channel, and generates a gate voltage Vg corresponding to this data current Idata at its own gate. In the capacitor C connected to the gate of the driving transistor T4, charges corresponding to the generated gate voltage Vg are accumulated, and data is written. Thus, in the programming period t0 to t1, the drive transistor T4 functions as a programming transistor that writes data to the capacitor C.

  In the programming period t0 to t1, since the pulse signal PLS is maintained at the L level, the control transistor T5 remains off. Accordingly, since the current path of the drive current Ioled to the organic EL element OLED is continuously cut off, the organic EL element OLED does not emit light during this period t0 to t1.

  Next, in the driving period t1 to t2, the driving current Ioled corresponding to the electric charge accumulated in the capacitor C flows through the organic EL element OLED, and the organic EL element OLED emits light. First, at the drive start timing t1, the scanning signal SEL falls to the L level, and both the switching transistors T1 and T2 are turned off. As a result, the data line X supplied with the data current Idata and the drain of the driving transistor T4 are electrically isolated, and the gate and drain of the driving transistor T4 are also electrically isolated. A gate voltage Vg equivalent is applied to the gate of the driving transistor T4 in accordance with the charge stored in the capacitor C.

  In synchronization with the fall of the scanning signal SEL at the timing t1, the pulse signal PLS, which was at the L level before, changes to a pulse waveform. This pulse waveform is continued until the timing t2 when the next selection of the pixel 2 is started. As a result, the control transistor T5 whose conduction is controlled by the pulse signal PLS is alternately turned on and off. When the control transistor T5 is on, a current path of the drive current Ioled is formed, so that the organic EL element OLED emits light with a luminance corresponding to the drive current Ioled. On the other hand, when the control transistor T5 is off, the current path of the drive current Ioled is forcibly cut off by the control transistor T5. Through such conduction control of the control transistor T5, the current path of the drive current Ioled is repeatedly interrupted, so that the organic EL element OLED emits light and does not emit light a plurality of times.

  Thus, according to the present embodiment, the optical response of the pixel 2 can be brought close to an impulse type as in the above-described embodiment, and the display image flicker can be reduced by dispersing the black display. Can be planned. As a result, display quality can be further improved.

(Fourth embodiment)
The present embodiment relates to a configuration of a pixel circuit in a voltage program system, and particularly relates to what is called a CC (Conductance Control) method. Here, the “voltage programming method” refers to a method of supplying data to the data line X on a voltage basis. In the present embodiment, one horizontal line Y is composed of one scanning line to which the scanning signal SEL is supplied and one signal line to which the pulse signal PLS is supplied. In the voltage programming method, it is not necessary to provide a variable current source in the data line driving circuit 4 because the data voltage Vdata is output to the data line X as it is.

  FIG. 12 is a circuit diagram of the pixel 2 according to the present embodiment. One pixel 2 includes an organic EL element OLED, three transistors T1, T4, T5 and a capacitor C. In the pixel circuit according to this embodiment, the transistors T1, T4, and T5 are all n-channel types, but this is an example, and the present invention is not limited to this.

  The gate of the switching transistor T1 is connected to the scanning line to which the scanning signal SEL is supplied, and the drain is connected to the data line X to which the data voltage Vdata is supplied. The source of the switching transistor T1 is commonly connected to one electrode of the capacitor C and the gate of the driving transistor T4. A potential Vss is applied to the other electrode of the capacitor C, and a power supply potential Vdd is applied to the drain of the driving transistor T4. The conduction of the control transistor T5 is controlled by the pulse signal PLS, and its source is connected to the anode of the organic EL element OLED. A potential Vss is applied to the cathode of the organic EL element OLED.

  FIG. 13 is a drive timing chart of the pixel 2 according to this embodiment. First, at timing t0, the scanning line SEL rises to H level, and the switching transistor T1 is turned on. As a result, the data voltage Vdata supplied to the data line X is applied to one electrode of the capacitor C via the switching transistor T1, and charges corresponding to the data voltage Vdata are accumulated in the capacitor C (data writing). . Note that, during the period from the timing t0 to the timing t1, the pulse signal PLS is maintained at the L level, so that the control transistor T5 remains off. Accordingly, since the current path of the drive current Ioled to the organic EL element OLED is interrupted, the organic EL element OLED does not emit light in the first half period t0 to t1.

  In the second half period t1 to t2 following the first half period t0 to t1, the drive current Ioled corresponding to the charge accumulated in the capacitor C flows through the organic EL element OLED, and the organic EL element OLED emits light. At timing t1, the scanning signal SEL falls to the L level, and the switching transistor T1 is turned off. As a result, the application of the data voltage Vdata to one electrode of the capacitor C is stopped, but the gate voltage Vg equivalent is applied to the gate of the drive transistor T4 by the accumulated charge of the capacitor C.

  In synchronization with the fall of the scanning signal SEL at the timing t1, the pulse signal PLS, which was at the L level before, changes to a pulse waveform. This pulse waveform is continued until the timing t2 when the next selection of the pixel 2 is started. Since the current path of the drive current Ioled is interrupted a plurality of times through such conduction control of the control transistor T5, light emission and non-light emission of the organic EL element OLED are repeated.

Thus, according to the present embodiment, the optical response of the pixel 2 can be brought close to an impulse type as in the above-described embodiment, and the display image flicker can be reduced by dispersing the black display. Can be planned. As a result, display quality can be further improved. In the present embodiment, the start timing of the waveform of the pulse signal PLS to pulse form, the scanning signal SEL may be the same as the falling timing t1 of, which may be set earlier by a predetermined time than.

(Fifth embodiment)
The present embodiment relates to a configuration of a pixel circuit that drives a voltage-programmed pixel circuit. In the present embodiment, one horizontal line Y is constituted by two scanning lines to which the first scanning signal and the second scanning signal are respectively supplied, and one signal line to which the pulse signal PLS is supplied. Has been.

  FIG. 14 is a circuit diagram of the pixel 2 according to the present embodiment. One pixel 2 includes an organic EL element OLED, four transistors T1, T2, T4, and T5 and two capacitors C1 and C2. In the pixel circuit according to this embodiment, the transistors T1, T2, T4, and T5 are all p-channel types, but this is an example, and the present invention is not limited to this.

  The gate of the first switching transistor T1 is connected to the scanning line to which the scanning signal SEL is supplied, and the source is connected to the data line X to which the data voltage Vdata is supplied. The drain of the first switching transistor T1 is connected to one electrode of the first capacitor C1. The other electrode of the first capacitor C1 is commonly connected to one electrode of the second capacitor C2, the source of the second switching transistor T2, and the gate of the driving transistor T4. A power supply potential Vdd is applied to the other electrode of the second capacitor C2 and the source of the driving transistor T4. A second scanning signal SEL2 is supplied to the gate of the second switching transistor T2, and its drain is commonly connected to the drain of the driving transistor T4 and the source of the control transistor T5. The control transistor T5 to which the pulse signal PLS is supplied to the gate is provided between the drain of the driving transistor T4 and the anode of the organic EL element OLED. A potential Vss is applied to the cathode of the organic EL element OLED.

  FIG. 15 is a drive timing chart of the pixel 2 according to this embodiment. One vertical scanning period t0 to t4 is divided into a period t0 to t1, an auto zero period t1 to t2, a load data period t2 to t3, and a driving period t3 to t4.

  First, in the period t0 to t1, the drain potential of the drive transistor T4 is set to the potential Vss. Specifically, at timing t0, the first and second scanning signals SEL1, SEL2 both fall to L level, and both the first and second switching transistors T1, T2 are turned on. During this period t0 to t1, since the power supply potential Vdd is fixedly applied to the data line X, the power supply potential Vdd is applied to one electrode of the first capacitor C1. Further, during this period t0 to t1, since the pulse signal PLS is maintained at the L level, the control transistor T5 is turned on. As a result, a current path is formed through the control transistor T5 and the organic EL element OLED, and the drain potential of the drive transistor T4 becomes the potential Vss. Therefore, the gate voltage Vgs with reference to the source of the drive transistor T4 becomes negative, and the drive transistor T4 is turned on.

  Next, in the auto-zero period t1 to t2, the gate voltage Vgs of the drive transistor T4 becomes the threshold voltage Vth. During this period t1 to t2, since the scanning signals SEL1 and SEL2 are both at the L level, the switching transistors T1 and T2 are kept on. At timing t1, the pulse signal PLS rises to H level and the control transistor T5 is turned off, but the application of the power supply potential Vdd from the data line is continued to one electrode of the first capacitor C1. The power supply potential Vdd applied to the source of the drive transistor T4 is applied to the gate of the drive transistor T4 through the channel of the drive transistor T4 and the second switching transistor T2. As a result, the gate voltage Vgs of the drive transistor T4 is pushed up to its own threshold voltage Vth, and the drive transistor T4 is turned off when the gate voltage Vgs reaches the threshold voltage Vth. As a result, the threshold voltage Vth is applied to the electrodes of the two capacitors C1 and C2 connected to the gate of the driving transistor T4. On the other hand, since the power supply potential Vdd from the data line X is applied to the opposing electrodes of the capacitors C1 and C2, the potential difference between the capacitors C1 and C2 is the difference between the power supply potential Vdd and the threshold voltage Vth (Vdd). -Vth) (auto zero).

  In the subsequent load data period t2 to t3, data is written to the capacitors C1 and C2 set to auto zero. During this period t2 to t3, the first scanning signal SEL1 is maintained at the L level as before, and the pulse signal PLS is also maintained at the H level as before. Therefore, the first switching transistor T1 remains on and the control transistor T5 remains off. However, since the second scanning signal SEL2 rises to the H level at the timing t2, the second switching transistor T2 changes from on to off. In addition, a voltage level that is reduced by ΔVdata from the previous power supply potential Vdd is applied to the data line X as the data voltage Vdata. The change amount ΔVdata is a variable value corresponding to the data written to the pixel 2, and thereby the potential difference of the first capacitor C 1 is lowered. When the potential difference of the first capacitor C1 is changed in this way, the potential difference of the second capacitor C2 also changes in accordance with the capacitance division relationship between the capacitors C1 and C2. The potential difference between the capacitors C1 and C2 after the change is determined by a value obtained by subtracting the change amount ΔVdata equivalent from the potential difference (Vdd−Vth) in the auto-zero period t1 to t2. Data is written to each of the capacitors C1 and C2 by the change in the potential difference between the capacitors C1 and C2 due to the change amount ΔVdata.

  Finally, in the driving period t3 to t4, the driving current Ioled corresponding to the electric charge accumulated in the second capacitor C2 flows through the organic EL element OLED, and the organic EL element OLED emits light. At timing t3, the first scanning signal SEL1 rises to the H level, and the first switching transistor T1 changes from on to off (the second switching transistor T2 remains off). In addition, the voltage of the data line X returns to the power supply potential Vdd. As a result, the data line X to which the data power supply potential Vdd is applied is separated from one electrode of the first capacitor C1, and the gate and drain of the driving transistor T4 are also separated. Therefore, a voltage (gate voltage Vgs with reference to the source) corresponding to the charge stored in the second capacitor C2 is applied to the gate of the driving transistor T4. The calculation formula for the current Ids flowing through the drive transistor T4 (corresponding to the drive current Ioled) includes the threshold voltage Vth and the gate voltage Vgs of the drive transistor T4 as variables. However, when the potential difference (corresponding to Vgs) of the second capacitor C2 is substituted as the gate voltage Vgs, the threshold voltage Vth is canceled out in the calculation formula of the drive current Ioled. As a result, the drive current Ioled is not affected by the threshold voltage Vth of the drive transistor T4 and depends only on the data voltage change amount ΔVdata.

  The current path of the drive current Ioled is a path through the drive transistor T4, the control transistor T5, and the organic EL element OLED from the power supply potential Vdd to the potential Vss. This drive current Ioled corresponds to the channel current of the drive transistor T4 and is controlled by the gate voltage Vgs caused by the accumulated charge in the second capacitor C2. In the drive periods t3 to t4, the pulse signal PLS is pulsed as in the above-described embodiments. Therefore, the control transistor T5 that is conduction-controlled by this signal PLS repeats ON and OFF alternately. As a result, since the current path of the drive current Ioled is repeatedly interrupted, the organic EL element OLED emits light and does not emit light alternately.

As described above, in the present embodiment, the control transistor T5 repeatedly cuts off the current path of the drive current Ioled in the drive period t3 to t4, and the drive current Ioled in the period t0 to t3 excluding the drive period t3 to t4. Continue to interrupt the current path. As a result, as in the above-described embodiment, the optical response of the pixel 2 can be brought close to an impulse type, and the display image flicker can be reduced by dispersing the black display. As a result, display quality can be further improved. In the present embodiment, the pulse waveform of the pulse signal PLS is ended at the timing t4, but may be ended earlier by a predetermined time than the timing t4.

  In each of the above-described embodiments, the example in which the organic EL element OLED is used as the electro-optical element has been described. However, the present invention is not limited to this, and can be applied to other electro-optical elements that emit light at a luminance corresponding to the drive current.

  In addition, the electro-optical device according to each of the embodiments described above can be mounted on various electronic devices including, for example, a projector, a mobile phone, a mobile terminal, a mobile computer, a personal computer, and the like. When the above-described electro-optical device is mounted on these electronic devices, the commercial value of the electronic devices can be further increased, and the product appeal of electronic devices in the market can be improved.

1 is a block configuration diagram of an electro-optical device according to a first embodiment. FIG. FIG. 3 is a circuit diagram of a pixel according to the first embodiment. 2 is a pixel drive timing chart according to the first embodiment. 10 is another driving timing chart of the pixel according to the first embodiment. The circuit diagram of the pixel concerning a 2nd embodiment. The pixel drive timing chart which concerns on 2nd Embodiment. The modification of the circuit diagram of the pixel concerning a 2nd embodiment. The other modification of the circuit diagram of the pixel concerning a 2nd embodiment. The pixel drive timing chart which concerns on 2nd Embodiment. The circuit diagram of the pixel concerning a 3rd embodiment. The pixel drive timing chart which concerns on 3rd Embodiment. The circuit diagram of the pixel concerning a 4th embodiment. 10 is a pixel drive timing chart according to the fourth embodiment. The circuit diagram of the pixel concerning a 5th embodiment. 10 is a pixel drive timing chart according to the fifth embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Display part 2 ... Pixel 3 ... Scan line drive circuit 4 ... Data line drive circuit 5 ... Control circuit T1 ... 1st switching transistor T2 ... 2nd switching transistor T3 ... Programming transistor T4 ... Drive transistor T5 ... Control transistor T6 ··· Second control transistor C · Capacitor C1 · First capacitor C2 · · · Second capacitor OLED · Organic EL element

Claims (5)

A plurality of pixels arranged corresponding to each intersection of the plurality of scanning lines and the plurality of data lines;
A scanning line driving circuit for sequentially selecting each of the plurality of scanning lines for each programming period ;
; And a data line driving circuit for supplying data signals to each of the plurality of data lines in each of the programming period,
Each of the plurality of pixels is
A switching transistor that is turned on when the scanning line corresponding to the pixel is selected ;
A capacitor that accumulates electric charge according to a data signal supplied from the data line to the pixel via the switching transistor that is turned on ;
A drive transistor for setting a drive current according to the charge accumulated in the capacitor;
An electro-optic element that emits light at a luminance corresponding to the driving current;
In the period from when the scanning line corresponding to the pixel is selected until the scanning line is next selected, repeating the blocking and conducting the current path of the driving current time length shorter than the programming period as the period An electro-optical device including a control transistor. The timing for starting to repeat conduction and interruption of the current path of the drive current is earlier in time than the end point of the programming period.
The electro-optical device according to claim 1. An electronic apparatus comprising the electro-optical device according to claim 1. Comprising a plurality of pixels arranged corresponding to each intersection of a plurality of scanning lines and a plurality of data lines;
Each of the plurality of pixels is
A switching transistor that is turned on when the scanning line corresponding to the pixel is selected;
A capacitor that accumulates electric charge according to a data signal supplied from the data line to the pixel via the switching transistor that is turned on;
A drive transistor for setting a drive current according to the charge accumulated in the capacitor;
An electro-optical element that emits light at a luminance corresponding to the drive current;
A control transistor for controlling conduction and interruption of a current path of the drive current;
A method of driving an electro-optical device including:
Selecting each of the plurality of scan lines sequentially for each programming period;
By controlling the control transistor of each of the plurality of pixels, the time period from when the scan line corresponding to the pixel is selected to when the scan line is next selected is shorter than the programming period. Repeatedly turning on and off the current path of the drive current with a period of
Driving method of electro-optical device. The timing for starting to repeat conduction and interruption of the current path of the drive current is earlier in time than the end point of the programming period.
The driving method of the electro-optical device according to claim 4.

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