JP4411111B2 - Non-instantaneous switching device - Google Patents

Description

  The present invention relates to an uninterruptible switching device, in particular, an uninterruptible switching for switching an active transmission line and a standby transmission line in an uninterrupted system in a backbone large capacity transmission system such as a SONET / SDH (Synchronous Digital Hierarchy) optical transmission system Relates to the device.

  In recent years, the spread of the Internet and various types of data communication have been rapidly expanding, and the data of lines used in transmission apparatuses has also been diversified. Under such circumstances, there are a wide variety of requirements regarding the quality of the line, from those that are sufficient even if the quality is low to those that require high quality in order to handle data that does not allow bit errors.

  When high quality is required, a method is generally adopted in which an active system and a standby system are provided, and when a failure is detected in the line in the active system, the system is automatically switched to the standby system. As a switching method, APS (Automatic Protection Switching) switching using the overhead K1, K2 bytes of the SONET / SDH layer is standardized in ITU-T. In this method, K1 and K2 are exchanged in both directions, and switching is performed with bidirectional synchronization. This method has been standardized with a switching time within several tens of ms. In other words, the error falls downstream during that time.

  In addition, as a method of switching in units of paths, there is SNC / P (Subnetwork Conection Protection) or the like standardized by ITU-T, which performs switching in units of paths. In this case, switching is performed only at one end, and it takes time to detect the switching factor, and an error is lost downstream.

  Among these switching methods, a method for improving the line quality by introducing the B3 error detection immediate switching method, which is employed in the non-instantaneous switching method, has been studied and put into practical use.

  A method of switching data without interruption without interruption when switching the transmission path from the active system to the standby system is known. In this method, when transmitting from a transmission unit, a multi-frame pattern is inserted into a path overhead unit (POH) unit and transmitted to the active system and the standby system at the same timing. At the receiving end, the transmission path delay difference between the active system and the standby system is calculated from this multi-frame synchronization pattern, and is stacked in a delay memory provided at the receiving end to absorb the transmission path delay difference. Thereby, it is possible to switch without instantaneous interruption without interruption of data that is instantaneously interrupted during switching (see, for example, Patent Document 1). In this method, as a switching factor, B3 error detection of a path, path AIS, and the like are generally included.

  FIG. 6 shows the transmission side of this type of transmission apparatus, FIG. 7 shows the reception side, and FIG. 8 shows how the active system and the standby system are switched.

  In the transmission side of FIG. 6, the distribution unit 40 distributes the frame in which the multi-frame pattern is inserted to the active multiplexing unit 50 and the standby multiplexing unit 60, and the active optical conversion unit 51 and the standby optical unit, respectively. The conversion unit 61 converts the optical signal into a main signal and transmits it.

  On the receiving side in FIG. 7, the working electrical converter 52 and the standby electrical converter 62 convert the optical signal into an electrical signal. The active main signal passes through the separation unit 53, the B3 error detection unit 54 and the delay memory 55, and the standby main signal passes through the separation unit 63, the B3 error detection unit 64 and the delay memory 65, and the switching unit. 80. Further, the B3 error detection units 54 and 64 supply the detected B3 error information to the switching determination unit 70. The switching determination unit 70 outputs a switching signal to the switching unit 80 based on the B3 error information, and the switching unit 80 switches and outputs the main signal from one of the delay memories 55 and 65 based on the switching signal.

  The B3 error mentioned above is an error detected by a parity check, but in recent years, there have been devices that use the FEC (Forward Error Correction) function, which precedes wireless technology, in SONET / SDH optical transmission technology. (For example, see Patent Document 2). The FEC (Forward Error Correction) function is assumed to be applied to optical transmission equipment. Unless otherwise specified, Reed Solomon RS (256.239) in ITU-T G.709. Point to.

  This uninterruptible line switching apparatus shortens the line quality determination time by using a syndrome error pulse instead of using a parity error pulse to determine the line quality.

Japanese Patent Laid-Open No. 11-225095 (first page-second page, FIG. 1) Japanese Patent Laid-Open No. 5-145531 (page 1 to page 4, FIG. 1)

  However, in the technique described in Patent Document 1 described above, the cause of switching is a B3 error. Naturally, the path AIS is also a switching factor, but the detection protection of the path AIS standardized by ITU-T or the like is 3 frames as shown in FIG. 8, and after 3 frames (125 us × 3 = 375us) only.

  The B3 error is detected by comparing the parity operation result using the B3 byte of the path overhead part of the SDH / SONET frame and the result of performing the path parity operation. When the SDH / SONET frame is expressed in a byte unit frame format, it has a 1-byte B3 area in the path unit. However, because of the parity calculation result, the error detection probability becomes 1/2 in bit units. Even if the bytes are combined, an error cannot be detected with a probability of 1/256.

  Here, when an error is automatically detected and a function of switching is provided, the error is naturally switched to a factor, and therefore the accuracy with which the factor (error) can be detected serves as a measure for improving quality. From the value 1/256, it is considered that error detection is possible with a considerable probability, but this is because the bit error is independent of each bit, such as transmission on an optical fiber, which is independent of each bit. This is the probability in the state of being transferred, and if an error occurs at a place where 8 bits are processed in parallel in the apparatus, the probability is halved. This means that the probability that a B3 error cannot be detected is quite high depending on the location of the error.

  Therefore, although the technique described in Patent Document 1 intends the B3 error uninterruptible method in which no B3 error occurs, there is a problem that a state in which it cannot be remedied occurs.

  Currently, in order to solve this problem, it is possible to reduce the frequency of occurrence probabilistically by increasing the capacity of the delay memory from error detection to switching, and increasing the number of frames to be detected and switched. However, this causes an increase in the capacity of the delay memory and increases the delay in units of frames, which causes an increase in transmission delay in the apparatus and is not practical.

  In addition, due to the rapid increase in traffic in recent years, the line on the relevant trunk transmission line has changed greatly. That is, in the past, the high-speed side called B and C modules have a 50 M / 150 Mbps interface as a low-speed interface, and are multiplexed to 2.4 G / 10 Gbps on the high-speed backbone optical transmission line, so the path is used. The size is at most about STM-1 (STS-3C), and even when an ATM is connected, the size of the path used at 600 Mbps was about STM-4 (STS-12C), but due to downsizing in recent years Devices that directly map Ethernet (registered trademark) to paths have been developed, and devices with path sizes of STM-16 (STS-48C) and STM-64 (STS-192C) are also emerging. As the path size is increased in this way, the system that performs error detection using the B3 byte of 1 byte has reached the limit.

  In the technique described in Patent Document 2 described above, the FEC function is used. However, since an error occurs at the time of switching, it is impossible to improve the line quality beyond that of the conventional technique.

  Further, the error correction bit depends on the number of bytes of the FEC frame in the frame and is defined by ITU-T. As a result, the number of bits that can be corrected in one frame is 512 bits in the case of A-FEC. Up to this number of bits, there is no error, but if there is an error exceeding the correction capability, the error correction function does not operate and the number of error corrections is indefinite.

  Usually, caution is required when this state is used as a switching factor. When the FEC function is used in an optical transmission apparatus, it is currently used in a place where the characteristics of optical transmission are severe, such as optical wavelength multiplexing such as WDM. Therefore, in order to ensure normal quality, the error correction function operates even in a normal state, and the quality is guaranteed together with the error correction function. For this reason, the error correction bits are counted even in the normal state, and when the number of bits is directly used as a switching factor, it cannot be used as it is because it is detected in a steady state.

  Therefore, an object of the present invention is to improve the error detection accuracy and suppress the increase in the capacity of the delay memory in the device, so that high-quality uninterrupted switching can be performed without increasing the delay amount and device scale in the device. To provide an apparatus.

  The uninterruptible switching device of the present invention is a B3 that uses the B3 byte of the path to switch between the active and standby transmission paths in a backbone high-capacity transmission system such as a SONET / SDH optical transmission system without interruption. Error detection and error correction information using the FEC function are used in combination.

  On the transmitting side, in the multiplexing unit (11 and 21 in FIG. 2), a multiframe pattern for detecting a transmission delay difference between the active system and the standby system is inserted into the path on the receiving side. For this, a well-known 64 multiframe insertion function to the J1 byte or a multiframe insertion function using the H4 byte is used. The path after the multi-frame insertion is multiplexed with the high-speed SONET / SDH frame by the multiplexing unit to generate a SONET / SDH frame. The FEC function frame generation unit (12, 22 in FIG. 2) multiplexes a frame for FEC with a SONET / SDH frame and transmits it as an FEC frame.

  On the other hand, on the receiving side, the FEC function frame reproduction unit (15, 25 in FIG. 2) extracts the SONET / SDH frame from the FEC frame, performs error correction processing by the FEC function at that time, and then returns error correction information. Transfer to the switching control unit (30 in FIG. 2). Specifically, the FEC function frame reproduction unit performs pointer transfer of the SONET / SDH frame extracted from the FEC frame, and generates the SONET / SDH frame in a form synchronized with the clock in the apparatus.

  The separation unit (16, 26 in FIG. 2) terminates the path from the generated SONET / SDH frame. At this time, synchronization of the multiframe added on the transmission side is established. The resulting data is written to the delay memory (33 and 34 in FIG. 2) in order to match the transmission path delay difference between the active system and the standby system. By reading data from the delay memory at the timing extracted from the multi-frame synchronization, the delay difference between the active system and the standby system is absorbed, and switching in the steady state is not performed by the switching control unit (30 in FIG. 2). It becomes possible to carry out with instantaneous interruption.

  Next, the B3 error detection unit (31 and 32 in FIG. 2) detects the presence or absence of an error by comparing the parity calculation result of the path unit with the B3 byte of the next path for the frame from the separation unit. Since the B3 byte is assigned to the head of the second line of the path frame, it is detected at a point delayed by one frame + 1 line from the frame including the actual error.

  Therefore, when the switching control unit switches between the active system and the standby system due to the detection of the B3 error, it is necessary to store at least two frames of data in the delay memory (33 and 34 in FIG. 2). . By delaying the two-frame data, even if a B3 error is detected and switched, the actual data can be switched in the frame before the error, thereby realizing uninterrupted switching.

  The switching control unit uses the FEC error correction information transferred from the FEC function frame reproducing unit as a factor for switching between the active system and the standby system. The FEC error correction information is, for example, the number of FEC error corrections. Since FEC error correction functions even in a normal state, high quality line quality can be realized by using a switching factor under a reasonable standard.

  The non-instantaneous switching according to the present invention is based on the establishment of the conventional non-instantaneous switching function. If no measures are taken, a difference in transmission path delay occurs between the active system and the standby system, so that the phase jumps at the time of switching, data becomes abnormal, and an instantaneous error at the time of switching occurs. In this way, the phase difference due to the transmission delay between the active system and the standby system is absorbed by the delay memory, and the jumping of data at the time of switching is prevented, so that there is no instantaneous interruption at the time of switching.

  By passing the error correction information from the FEC to the switching control unit as the switching factor between the active system and the standby system, the FEC error correction function corrects the error of the actual signal, and the line quality is error-free. It is possible to switch the working line to a high-quality system while maintaining it.

  Also, even when the limit that can be corrected by the FEC error correction function is exceeded, B3 error detection enables automatic uninterruptible switching and high-quality line quality can be obtained.

  Further, regarding the error correction function of FEC, as shown in FIG. 3, when the path is multiplexed up to the SONET / SDH layer on the transmission side and then FEC decoding is performed on the reception side in order to generate an FEC frame, The range that can be corrected by the error correction function of the FEC can be corrected only for errors that occur after the encoding of the FEC frame, through the transmission path, and until the decoding of the FEC frame.

  In general, path overhead generation has a function before the transmission side device, so the B3 error monitoring section is sufficiently longer than the FEC error monitoring section, so the performance of the entire transmission side is improved. It becomes possible to monitor, and a high-quality line quality can be realized systematically.

  The first effect of the present invention is that, in the prior art, since an error was detected and then switching was performed based on the detection, an extra delay memory was required, but switching was performed in an error-correctable area. Therefore, the internal circuit can be miniaturized by switching at the quality degradation level before detection.

  The second effect is that switching is performed in an error-correctable area using the error correction function of FEC, so that switching can be performed even when the quality of a line that cannot detect a B3 error has deteriorated. Can improve quality.

  Furthermore, the third effect is that the insertion point of the B3 error of the path is generated by the path generation unit outside the apparatus, and therefore the monitoring range is from the path generation unit, and the monitoring section becomes longer. The switching function was limited to switching within a limited range from the FEC encoding part of the transmission unit to the FEC decoding part of the reception unit, but it is monitored by monitoring path B3 errors. This means that the range has become wider.

  The uninterruptible switching device according to the present invention switches between an active system and a standby system in an optical SONET / SDH transmission system without instantaneous disconnection.

The sender inserts a multiframe pattern to detect at the receiving side the transmission delay difference of the active and standby systems to pass, and a multiplexing unit for generating a multiplexed SONET / SDH frame, the SONET / SDH frame Each of the active system and the standby system includes an FEC function frame generation unit that multiplexes FEC frames and transmits them as FEC frames.

The receiving side extracts the SONET / SDH frame from the received FEC frame, performs error correction processing by the FEC function at that time, and then transfers the error correction information, and the generated SONET / SDH frame B3 error by comparing the path unit parity calculation result with the B3 byte of the next path for the demultiplexer that terminates the path from the frame and establishes the synchronization of the multiframe added on the transmission side, and the frame from the demultiplexer and B3 error detection unit for detecting the presence or absence of, delay data from B3 error detector is written to is intended to adjust the transmission path delay difference between the active and standby systems, are read at the timing extracted from the multi-frame synchronization For each of the active system and the standby system. In addition, a switching control unit that switches data from the delay memory between the active system and the standby system based on the B3 error and the error correction information is provided.

  Next, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows the positioning of the uninterruptible switching device 1 of the present invention in an optical SONET / SDH transmission system. The uninterruptible switching device 1 of the present invention is connected to an active WDM device 2 and a standby WDM device 3 via an optical fiber 4, and switches between one of the WDM devices and a transmission device (not shown). Connecting. Each of the WDM apparatuses 2 and 3 is connected to a plurality of uninterruptible switching apparatuses 1. Each of the WDM devices 2 and 3 is connected to the WDM devices 2 and 3 on the other side via the optical fiber 4, and the same connection as described above is also made on the other side. That is, this system has a symmetrical configuration on the left and right.

  FIG. 2 shows details of the uninterruptible switching device 1. This uninterruptible switching device 1 is formed of a transmission side configuration and a reception side configuration for each of the active system and the standby system.

  The transmission side multiplexes the data including the data from the distribution unit 10 that distributes the data from the transmission device 5 to the active system and the standby system, and the data from the distribution unit 10 of the other uninterruptible switching device 1, and the SONET / SDH frame FEC function frame generation unit 12, standby system 22, and FEC frame for multiplexing FEC frames into SONET / SDH frames to generate FEC frames. The system includes an active optical converter 13 that converts a frame into an optical signal and transmits the optical signal via an optical fiber 4 and a standby system 23.

  Note that the multiplexing units 11 and 21 insert a multi-frame pattern for detecting a transmission delay difference of uninterruptible switching on the receiving side into the path. For this, a known multiframe insertion function using the J4 byte or a multiframe insertion function using the H4 byte is used.

  On the other hand, the receiving side converts the optical signal received through the optical fiber 4 into an electrical signal and reproduces the FEC frame, the working electrical converter 14, the standby electrical converter 24, and the working FEC function frame. The reproduction unit 15 includes a standby FEC function frame reproduction unit 25, an active separation unit 16, a standby separation unit 26, and a switching control unit 30.

  The FEC function frame reproduction units 15 and 25 extract the SONET / SDH frame from the FEC frame, and at that time, perform error correction processing by the FEC function and then transfer the error correction information to the switching control unit 30. Separators 16 and 26 separate the SONET / SDH frame including the switching controller 30 of the other uninterruptible switching device 1 into data for the transmission device.

  Specifically, the FEC function frame reproduction units 15 and 25 perform pointer transfer of the SONET / SDH frame extracted from the FEC frame, and generate the SONET / SDH frame in synchronization with the clock in the apparatus. Separators 16 and 26 terminate the path from the generated SONET / SDH frame. At this time, synchronization of the multiframe added on the transmission side is established.

  The switching control unit 30 receives the data from the active B3 error detection unit 31, the standby B3 error detection unit 32, and the B3 error detection units 31 and 32 that detect B3 errors in the data from the separation units 16 and 26. An active delay memory 33, a standby delay memory 34, a switching determination unit 35, and a switching unit 36, which are stored for delaying, are provided.

  The switching determination unit 35 outputs a switching signal to the switching unit 36 based on the error correction information from the FEC function frame reproduction units 15 and 25 and the B3 error information from the B3 error detection units 31 and 32. In response to the switching signal, the switching unit 36 selects any one of the data from the working delay memory 33 and the data from the standby delay memory 34 and transmits the selected data to the transmission device 5.

  The delay memories 33 and 34 write data in order to adjust the transmission line delay between the active system and the standby system. Further, by reading data from the delay memories 33 and 34 at the timing extracted from the multi-frame synchronization, the delay difference between the active system and the standby system is absorbed, and switching in the steady state can be performed without interruption. It becomes possible.

  Non-instantaneous switching in automatic switching caused by a B3 error in the switching unit 21 is performed by comparing the parity calculation result of each frame path with the B3 byte of the next path and detecting the presence or absence of an error. Since the B3 byte is assigned to the head of the second line of the path frame, it is detected at a point delayed by (1 frame + 1 line) from the frame including the actual error. Therefore, when switching the detection of B3 error as a factor, it is necessary to store at least two frames of data in the frame memory.

  By delaying the two-frame data, even if a B3 error is detected and switched, the actual data can be switched in the frame before the error, thereby realizing uninterrupted switching. In addition, high-quality line quality is realized by using error correction information from the FEC function block as a switching factor.

  Even when the FEC error correction information is input as information that expects a transition different from the B3 error information, the switching determination unit 35 basically gives priority to switching based on the B3 error information. This is because the FEC error correction information can determine that the error that has occurred in the actual line has been corrected, so it is determined that there is no problem even if the B3 error is actually detected. is there.

  Further, since the FEC function has a function that covers the conventional optical transmission characteristics, there is a high possibility that a certain amount of error correction is performed even in a normal state. For this reason, if the number of error corrections is simply used as a switching factor, it may be impossible to use. Therefore, as an actual operation mode, in the FEC function frame reproduction units 15 and 25, a threshold is set for the number of error correction bits, and when the threshold is exceeded, FEC error correction information is sent to the switching determination unit 35 as a switching factor. It seems desirable to transfer.

  In addition to the threshold, it is more than necessary by providing detection protection such as when multiple frames exceeding the threshold continuously occur, or when the number of frames exceeding the threshold exceeds n in the number of multiple m units. It seems to be desirable to deter switching.

  Basically, FEC error correction detection timing and path B3 error detection timing are usually not synchronized. This is because if the error can be corrected with the error correction function using the FEC function, the B3 error will occur only if the error occurs in the device from the FEC end part to the B3 detection block of the path. appear. In addition, when the error correction capability of the FEC function is exceeded, a B3 error is detected.

  Therefore, when switching using FEC error correction information, the meaning of preventive switching is strong in a certain sense, and B3 error is absolute switching. Therefore, as a condition for switching by detecting the number of FEC error correction bits, it should be included in the switching condition that no B3 error occurs within a certain time.

  FIG. 3 shows error recovery ranges for the FEC function and the B3 error detection function. The relationship between each part 10-1 to 16-1, 20-1 to 26-1, 30-1 in FIG. 3 and each part 10-16, 21 to 26, 30 in FIG. 2 is as follows. The low-speed side optical receiving unit 10-1 is the distributing unit 10, the high-speed MUX units 11-1 and 21-1 are the multiplexing units 11 and 21, the SDH inserting units 12-1 and 22-1, and the FEC inserting units 12-2 and 22-. 2 is included in the FEC function generation units 12 and 22, and the high-speed side optical transmission units 13-1 and 23-1 are included in the optical conversion units 13 and 23, respectively.

  The high-speed side optical receivers 14-1 and 24-1 are the electrical converters 14 and 24, the FEC termination units 15-1 and 25-1, and the SDH termination units 15-2 and 25-2 are the FEC function regeneration unit 15, 25, the path termination units 16-1, 26-1 are included in the separation units 16, 26, the selection unit 30-1, and the low-speed side optical transmission unit 30-2 are included in the switching control unit 30, respectively.

  FEC insertion sections 12-2 and 22-2 to FEC termination sections 15-1 and 25-1 are in a range where errors can be relieved by the FEC function, and high-speed MUX sections 11-1, 21-1 to selection section 30-1 However, the error can be remedied by the B3 error monitoring function.

  FIG. 4 is a time chart for explaining the switching operation between the active system and the standby system using only FEC error correction information. In FIG. 4, in a state where there is no error in the standby system, an error occurs in the active system at timing t1, and the FEC function frame reproduction unit 15 outputs FEC error correction information at timing t2. Between timings t1 and t2, all errors that have occurred in the active system are corrected, and at time t2, FEC error correction information is output because the number of error corrections exceeds the threshold. In response to the FEC error correction information, the switching determination unit 35 outputs a switching signal to the switching unit 36, and the switching unit 36 switches the working system to the standby system for operation at timing t3.

  Between the timings t2 and t3 is a delay time due to storing the data from the b3 error detection unit 32 in the delay memory 34, which is required for switching without interruption. In the receiving unit, data transfer to the internal clock is usually performed, but since the process of reassigning the pointer value is not performed, only the in-device delay is first considered. In addition, by adding a delay amount calculated from the active system and the standby system to the switching factor in the delay memory for non-instantaneous interruption, it becomes possible to perform switching in almost the same frame.

  FIG. 5 is a time chart for explaining the switching operation between the active system and the standby system when a B3 error in the standby system and an error due to FEC error correction information in the active system occur. Initially, the standby system is selected, and when the standby system B3 error occurs at timing t1, the system is switched to the active system. If both systems have a B3 error, the previous value is retained.

  When a B3 error, which is an absolute switching factor, occurs, the delay amount calculated from the delay difference between the active system and the standby system is added to the delay memory for non-instantaneous interruption. It is possible to switch from the standby system to the active system at the timing t1 synchronized with. This is in contrast to the fact that there is a delay when the above FEC error correction information is used as a switching factor.

The standby B3 error recovered at timing t2, but an error due to FEC error correction information in the active system occurred at timing t3. In this case, at the timing t4 when the in-system apparatus delay is added and the B3 error detection frame position is matched, it is handled as an error based on the FEC error correction information in the active system. In this switching protection, the following methods can be considered.
(1) A threshold value is provided for the detected number of corrections, and is used as a switching factor when the threshold value is exceeded.
(2) Monitor the frequency of occurrence of frames exceeding the threshold and use it as a switching factor.

  If a sufficiently long time x seconds has elapsed since the recovery of the B3 error, such as from timing t2 to timing t4, switching from the active system to the standby system based on the error from the FEC error correction information I do.

  At timing t5, the standby B3 error has occurred again. The B3 error is recovered at timing t7, but an error due to FEC error correction information in the active system has occurred at timing t6. In this case, unlike the timing t3, the timing t8, which adds the delay in the active system and matches the B3 error detection frame position after the recovery of the B3 error, from the timing t7 to the timing t8. A sufficiently long time x seconds has not elapsed. At this time, switching from the active system to the standby system is not performed based on the error based on the FEC error correction information. That is, only when the B3 error has not been detected for a sufficiently long time, the system is switched based on the error based on the FEC error correction information.

  This means that the B3 error is prioritized over the error due to the FEC error correction information and used as a switching factor. That is, an error due to FEC error correction information when a B3 error occurs is ignored as a switching factor. Even when only the stretched signal for B3 error detection is active, an error caused by FEC error correction information is also ignored. When both systems receive an error due to FEC error correction information for the first time without B3 error information and all of the stretched signals, all paths are switched simultaneously.

  Next, using the fact that the FEC error correction function is divided into 16 pieces on the frame, 16 FEC error correction factors are output for each of the active system and the standby system, and the frame timing information and path of the SONET / SDH layer are output. Based on this timing information, it is also possible to suppress block switching of transmission lines by specifying a block in which error correction has occurred in FEC or exceeds a threshold.

  Specifically, when the SDH frame is encoded by FEC, it is assigned to the FEC payload including the SDH overhead. In the FEC function, an SDH frame is first divided into four rows, and an error correction function of FEC is realized in units obtained by further dividing the SDH frame into 16 rows. As a result, when the FEC transmission speed is 10G or 2.4G, it can be divided into 600M units for 10G and 150M units for 2.4G.

  In other words, it is possible to identify the path where the FEC error occurred in units of VC4-4C (STS-12C) in the case of 10G and in units of VC-4 (STS-3C) in the case of 2.4G. Sometimes the range of switching can be minimized by switching in units of the above path instead of switching 10G or 2.4G at once.

  However, the position of the SDH frame in the FEC frame is arbitrary. From this, after the FEC decoding, by feeding back the head information of the SDH frame from the block that detects the establishment of SDH synchronization, the positional relationship with the SDH frame is determined, and the corresponding path is determined from this. As a result, not only the lines when switching from the error correction information of the FEC layer are switched all at once, but also switching is possible in units of paths corresponding to the 1/16 rate of the line transmission rate, although there is a limit. It becomes.

  As an application example of the present invention, it is useful in the case of transmitting data with the highest priority on quality in the transmission system of the optical transmission apparatus targeted this time. On the other hand, it can be applied to the wireless transmission that has adopted the FEC function before the optical transmission device. Thereby, it is possible to improve the line quality in wireless transmission.

The figure which shows the position of the uninterruptible switching device of this invention in the optical transmission system using a WDM apparatus The figure which shows the detailed example of the uninterruptible switching apparatus of this invention The figure which shows the error relief range with the FEC function and B3 error detection function in this invention Time chart for explaining the switching operation between the active system and the standby system using only FEC error correction information in the present invention Time chart for explaining the switching operation between the active system and the standby system when a B3 error in the standby system and an error due to FEC error correction information in the active system occur in the present invention The figure which shows the transmission side of the conventional transmission apparatus The figure which shows the receiving side of the conventional transmission apparatus The figure which shows the state of the uninterruptible switching of the working system and the backup system in the conventional transmission equipment

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Uninterruptible switching apparatus 2,3 WDM apparatus 4 Optical fiber 10 Distribution part 11,21 Multiplexing part 12,22 FEC function frame generation part 13,23 Optical conversion part 14,24 Electric conversion part 15,25 FEC function frame regeneration part 16, 26 Separation unit 30 Switching control unit 31, 32 FEC error detection unit 33, 34 Delay memory 35 Switching determination unit 36 Switching unit
10-1 Low-speed optical receiver
11-1,21-1 High-speed MUX section
12-1,22-1 SDH insertion part
12-2,22-2 FEC insertion part
13-1, 23-1 High-speed side optical transmitter
14-1, 24-1 High-speed optical receiver
15-1,25-1 FEC termination
15-2,25-2 SDH termination
16-1,26-1 Path termination
30-1 Select section
30-2 Low-speed side optical transmitter

Claims (6)

In the non-instantaneous switching device for the active and standby systems in the optical SONET / SDH transmission system,
Means to terminate the multiframe of the path at the time of path unit switching, determine the transmission path delay of the active system and the protection system from the multiframe, and temporarily hold the data in the provided memory to absorb the difference of the transmission path delay When,
A means of monitoring B3 errors in the path and temporarily storing data in memory for the time required to detect B3 errors;
Means for transferring error correction information of the received frame by FEC from the FEC decoding unit;
An uninterruptible switching device, wherein data read from the memory is switched between an active system and a standby system based on the B3 error and error correction information by the FEC. In the non-instantaneous switching device for the active and standby systems in the optical SONET / SDH transmission system,
The sender is
Insert the multiframe pattern for detecting at the receiving side the transmission delay difference of the active and standby systems to pass, and a multiplexing unit for generating a multiplexed SONET / SDH frame,
A FEC function frame generation unit that multiplexes a frame for FEC on a SONET / SDH frame and transmits it as an FEC frame is provided for each of the active system and the standby system.
The receiving side
Extract the SONET / SDH frame from the received FEC frame, perform error correction processing by the FEC function at that time, and then transfer the error correction information to the FEC function frame playback unit,
A separation unit that terminates the path from the generated SONET / SDH frame and establishes synchronization of the multiframe added on the transmission side;
For the frame from the separation unit, a B3 error detection unit that detects the presence or absence of a B3 error by comparing the parity calculation result of the path unit with the B3 byte of the next path;
Data from the B3 error detector is written to match the transmission path delay difference between the active system and the standby system, and the delay memory that is read at the timing extracted from the multiframe synchronization is used for each of the active system and the standby system. Prepared,
An uninterruptible switching device comprising a switching control unit that switches data from the delay memory between the active system and the standby system based on the B3 error and the error correction information. The switchover to the opposite system is performed only when the B3 error has not occurred for a predetermined time for the opposite system even when a switch factor due to the error correction information occurs in the operational system. 2. The uninterruptible switching device according to 2. 4. The error correction information is used as an error correction bit number, and when the error correction bit number exceeds a predetermined threshold value, the error correction information is used as a switching factor between the active system and the standby system. Non-instantaneous switching device described in 1. 5. The non-instantaneous switching device according to claim 4, wherein when a predetermined number of frames exceeding the threshold value continue, a switching factor between the active system and the standby system is used. 6. The non-instantaneous interruption according to any one of claims 2 to 5, which enables switching between the active system and the standby system in units of 1/16 of a transmission rate based on frame information extracted from the SONTE / SDH frame. Switching device.

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