JP4409517B2 - Optical disc recording method, optical disc, optical disc reproducing method, and optical disc reproducing apparatus - Google Patents

Description

The present invention relates to a digital video signal recording / reproducing apparatus, a recording / reproducing method thereof, a digital video signal reproducing apparatus, and a reproducing method thereof. The present invention also relates to an optical disc recording method, an optical disc, an optical disc playback method, and an optical disc playback device.

  FIG. 27 is a block circuit diagram of a conventional optical disc recording / reproducing apparatus disclosed in Japanese Patent Laid-Open No. 4-114369 (Patent Document 1). Reference numeral 701 denotes an A / A for converting a video signal, an audio signal, etc. into digital information. D converter, 702 is an information compression circuit, 703 is a frame sector conversion circuit that converts the compressed information into sector information equal to an integral multiple of the frame period, 704 is an error correction code circuit that adds an error correction signal to the sector information, Reference numeral 705 denotes a modulator for converting to a predetermined modulation code in order to reduce intersymbol interference in the recording medium, reference numeral 706 denotes a laser driving circuit for modulating laser light in accordance with the modulation code, and reference numeral 707 denotes a laser output switch.

  708 is an optical head for emitting the laser beam, 709 is an actuator for tracking a light beam emitted from the optical head 708, 710 is a traverse motor for sending the optical head 708, and 711 is an optical disk 712. A disk motor for rotation, 719 is a motor drive circuit, 720 is a first motor control circuit, and 721 is a second motor control circuit. Reference numeral 713 denotes a reproduction amplifier for amplifying the reproduction signal from the optical head 708, 714 denotes a demodulator for obtaining data from the recorded modulation signal, 715 denotes an error correction decoding circuit, and 716 denotes frame sector inverse conversion means. 717 is an information decompression circuit for decompressing the compressed information, and 718 is a D / A converter for transforming the decompressed information into, for example, an analog video signal or an audio signal.

  Next, the operation will be described. As one of high-efficiency encoding methods for encoding video signals, there is an encoding algorithm based on the MPEG method. This is a hybrid coding scheme that combines inter-picture prediction coding using motion compensation prediction and intra-picture transform coding. Here, the information compression circuit 702 of this conventional example has a configuration as shown in FIG. 30, and employs the above-described MPEG encoding method.

  FIG. 28 shows a simplified data arrangement structure (layer structure) of the MPEG system. In the figure, 821 is a sequence layer composed of a group of pictures (hereinafter referred to as “GOP”) composed of a plurality of frame information, 822 is a GOP layer composed of several pictures (screens), and 823 is a number of one screen. 824 is a slice layer composed of several macroblocks, 825 is a macroblock layer, and 826 is a block layer composed of 8 pixels × 8 pixels.

  For example, in the MPEG system, the macroblock layer 825 is a block consisting of 8 × 8 pixels, and the block is a unit for performing discrete cosine transform (hereinafter referred to as “DCT”). At this time, a total of six blocks including four adjacent Y signal blocks, one Cb block corresponding to these positions, and one Cr block are called macro blocks. A plurality of macroblocks are combined to form a slice. A macroblock is a minimum unit of motion compensated prediction, and a motion vector for motion compensated prediction is performed in units of macroblocks.

  Next, the inter-picture prediction encoding process will be described. FIG. 29 shows an outline of the inter-picture prediction encoding. Each picture is divided into three types: intra-picture coded pictures (hereinafter referred to as I pictures), unidirectional predictive coded pictures (hereinafter referred to as P pictures), and bidirectional predictive coded pictures (hereinafter referred to as B pictures). .

  For example, when one picture per N is an I picture and one picture per M is a P picture or I picture, n and m are integers, and 1 ≦ m ≦ N / M, (N × n + M ) Th picture is an I picture, (N * n + M * m) th picture (m ≠ 1) is a P picture, (N * n + M * m + 1) th to (N * n + M * m + M-1) th picture is B picture Let it be a picture. At this time, the (N × n + 1) -th image to the (N × n + N) -th image are collectively referred to as GOP (Group of Pictures).

  FIG. 29 shows a case where N = 15 and M = 3. In the figure, an I picture is not subjected to inter-picture prediction, and is only subjected to intra-picture transform coding. The P picture is predicted from the immediately preceding I picture or P picture. For example, the sixth picture in the figure is a P picture, but this is predicted from the third I picture. In the figure, the 9th P picture is predicted from the 6th P picture. The B picture is predicted from the immediately preceding and immediately following I picture or P picture. For example, in the figure, the 4th and 5th B pictures are predicted from both the 3rd I picture and the 6th P picture. Therefore, the fourth and fifth images are encoded after the sixth image is encoded.

  Next, the operation of the information compression circuit 702 will be described with reference to FIG. The memory circuit 901 rearranges the input digital video signals in the encoding order and outputs them. That is, as described above, in FIG. 29, for example, the first B picture is encoded after the third I picture, so that the images are rearranged here. FIG. 31 shows this rearrangement operation. The image sequence input as shown in FIG. 31A is output in the order shown in FIG.

  In addition, the video signal 921 output from the memory circuit 901 has a difference between the image and the predicted image 923 output from the motion compensation prediction circuit 910 by the subtractor 902 in order to reduce the redundancy in the time axis direction. After that, DCT is performed in the spatial axis direction. The converted coefficient is quantized and subjected to variable length coding, and then output through the transmission buffer 906. On the other hand, the quantized transform coefficient is inversely quantized and subjected to IDCT, and then added to the predicted image 923 by an adder 909 to obtain a decoded image 922. The decoded image 922 is input to the motion compensation prediction circuit 910 for encoding the next image.

  Next, the operation of the motion compensation prediction circuit 910 will be described with reference to FIG. The motion compensation prediction circuit 910 performs motion compensation prediction on the video signal 921 output from the memory circuit 901 using the two reference images stored in the frame memory 1204a and the frame memory 1204b, and outputs a predicted image 923.

  First, when the image 922 encoded and decoded as described above is an I picture or a P picture, this image 922 is stored in the frame memory 1204a or the frame memory 1204b for encoding the next image. . At this time, the switcher 1203 is switched so as to select one of the frame memory 1204a and the frame memory 1204b that has been updated earlier in time. However, when the decoded image 922 is a B picture, writing into the frame memory 1204a and the frame memory 1204b is not performed.

  With such switching, for example, when the first and second B pictures in FIG. 31 are encoded, the 0th P picture and the 3rd I picture are stored in the frame memory 1204a and the frame memory 1204b, respectively. Thereafter, when the 6th P picture is encoded and decoded, the frame memory 1204a is rewritten with the decoded image of the 6th P picture.

  Therefore, when the next 4th and 5th B pictures are encoded, the 6th P picture and the 3rd I picture are stored in the frame memory, respectively. Further, when the 9th P picture is encoded and decoded, the frame memory 1204b is rewritten with the decoded image of the 9th P picture. Thus, when the 7th and 8th B pictures are encoded, the 6th P picture and the 9th P picture are stored in the frame memory, respectively.

  When the video signal 921 output from the memory circuit 901 is input to the motion compensation prediction circuit 910, the two motion vector detection circuits 1205a and 1205b also store the reference images stored in the frame memories 1204a and 1204b, respectively. In addition, a motion vector is detected and a motion compensated prediction image is output. That is, the video signal 921 is divided into a plurality of blocks, and for each block, a block having the smallest predicted distortion in the reference image is selected, and the relative position of the block is output as a motion vector. Is output as a motion compensated prediction image.

  On the other hand, the prediction mode selector 1206 selects the two motion compensated prediction images output from the motion vector detection circuits 1205a and 1205b, and the average image thereof, and selects the one with the smallest prediction distortion and outputs it as a prediction image. . At this time, if the video signal 921 is not a B picture, a motion compensated prediction image corresponding to a reference image input earlier in time is always selected and output. Moreover, the prediction mode selector 1206 selects the one with the better coding efficiency among intra-picture coding that does not perform prediction and inter-picture prediction coding using the selected predicted picture.

  At this time, if the video signal 921 is an I picture, intra-picture encoding is always selected. When intra-picture coding is selected, a signal indicating the intra-picture coding mode is output as a prediction mode. When inter-picture prediction coding is selected, a signal indicating the selected predicted picture is used as the prediction mode. Is output. The switcher 1207 outputs a 0 signal if the prediction mode output from the prediction mode selector 1206 is an intra-picture coding mode, and outputs a prediction image output from the prediction mode selector 1206 otherwise. To do.

  From the above, when the video signal 921 output from the memory circuit 901 is an I picture, the motion compensated prediction circuit 910 always outputs a 0 signal as the predicted image 923, so that the I picture does not perform inter-picture prediction. Intra-image transform coding is performed. For example, when the video signal 921 output from the memory circuit 901 is the sixth P picture in FIG. 29, the motion compensation prediction circuit 910 performs motion compensation prediction from the third I picture in FIG. An image 923 is output. In addition, when the video signal 921 output from the memory circuit 901 is, for example, the 4th B picture in FIG. 29, the motion compensation prediction circuit 910 moves from the 3rd I picture and the 6th P picture in FIG. Compensated prediction is performed, and a predicted image 923 is output.

  Next, the operation of the transmission buffer 906 will be described. The transmission buffer 906 converts the video data variable-length encoded by the variable-length encoding circuit 905 into a bit stream of an MPEG video signal. Here, the MPEG stream has a six-layer structure as shown in FIG. 28. For each sequence layer 821, GOP layer 822, picture layer 823, slice layer 824, macroblock layer 825, and block layer 826, the MPEG stream has a layer structure. Header information that is an identification code is added.

  The transmission buffer 906 decomposes the bit stream of the video signal and the bit stream of the audio signal into a plurality of packets, and multiplexes the packets including the synchronization signal to form an MPEG2-PS (program stream) system stream. is doing. Here, MPEG2-PS includes a pack layer and a packet layer as shown in FIG. 33, and header information is added to the packet layer and the pack layer, respectively. In this conventional example, the system stream is configured so that each pack shown in FIG. 33 includes video data of 1 GOP.

  Here, the pack layer has a configuration in which the packet layers are bundled in an upper layer of the packet layer, and each packet layer constituting the pack layer is referred to as a PES packet. Also, the pack layer header information shown in FIG. 33 includes a pack identification signal, a synchronization signal that is the basis of the video and audio signals, and the like.

  On the other hand, there are three types of PES packets as shown in FIG. Here, the second-stage packet in FIG. 34 is a video / audio / private packet, and a time stamp information (when decoding each packet as a code and header information for identifying the head of the packet before the packet data) PTS and DTS) are added. However, the time stamp information PTS is time management information for reproduction output, and is information for managing the decoding order of the data stream of each packet during reproduction. The DTS is time management information for starting decoding, and is information for managing the sending order of decoded data.

  The packet in the third row in FIG. 34 is a packet for writing user data with two private packets. Further, the lowermost packet in FIG. 34 is a padding packet that masks all packet data with “1”. The header information of the private 2 packet and the padding packet is composed of a packet start code and a packet length.

  As described above, the transmission buffer 906 converts the video and audio data into an MPEG2-PS system stream and converts it for each frame sector. This information is subjected to error correction processing, and at the same time, modulated to reduce the influence of intersymbol interference of the disc, and recorded on the optical disc 712. At this time, for example, it is clear that the data amount in each GOP unit becomes almost the same amount, and it is possible to perform editing or the like in GOP unit by allocating to sectors equal to an integral multiple of the frame period.

  Next, the operation during reproduction will be described. At the time of reproduction, video information recorded on the optical disk 712 is amplified by a reproduction amplifier 713, restored to digital data by a demodulator 714 and a decoder 715, and then data such as address and parity is converted by a frame sector inverse conversion circuit 716. The removed original video data is restored and input to the information decompression circuit 717. Here, FIG. 35 is a diagram showing a configuration of the information decompression circuit 717. In FIG. 35, a system stream composed of MPEG2-PS is input to the reception buffer 1001.

  The reception buffer 1001 decomposes the input system stream into packs. Subsequently, each PES packet is disassembled according to the header information, and a bit stream of video and audio data divided in units of PES packets is reconstructed. Further, with regard to video data, the stream is broken down to the block layer shown in FIG. 28, and the block data and motion vector data are separated and output.

  The block data output from the reception buffer 1001 is input to the variable length decoding circuit 1002, and the variable length data is dequantized as fixed length data, subjected to IDCT, and output to the adder 1006. . On the other hand, the prediction data decoding circuit 1005 decodes the prediction image according to the motion vector output from the reception buffer 1001 and outputs it to the adder 1006.

  In this case, like the motion compensation prediction circuit 910, the prediction data decoding circuit 1005 includes a frame memory for storing I picture and P picture data decoded by the adder 1006, and is input during P picture and B picture. In accordance with the motion vector, a predicted image is reproduced from the target I picture and P picture and output to the adder 1006. Note that the method for updating the reference image data at the time of I picture and P picture is the same as that at the time of encoding, and thus the description thereof is omitted.

The adder 1006 adds the output of the prediction data decoding circuit 1005 and the output of the IDCT circuit 1004 and outputs the result to the memory circuit 1007. Here, at the time of encoding, the frames are rearranged according to the encoding order of temporally continuous video signals as shown in FIG. Therefore, in the memory circuit 1007, and outputs the data inputted in the order shown in FIG. 31 (b), the output terminal rearranges as image data is continuous in time to the order of FIG. 31 (a).

  Next, image search and high-speed reproduction when data having such an encoding structure is recorded on a disc will be described. In the case of the encoding structure as shown in FIG. 29, high-speed playback is possible if playback is performed in units of I pictures. In this case, a track jump is performed immediately after the reproduction of the I picture, the next or previous GOP is accessed, and the I picture is reproduced there. By repeating such operations, in the case of FIG. 29, high-speed feed playback and reverse playback can be realized.

  However, since this GOP rate is a variable bit rate, it is impossible to recognize where the head of the next GOP actually is. Therefore, the optical head is appropriately jumped so as to find the head of the GOP, so it is impossible to determine which track should be accessed.

  In addition, I pictures have a very large amount of data, and if only I pictures are played back continuously as in special playback, the reading speed from the disk is limited, so playback is performed at a frequency of 30 Hz as in a normal movie. It is not possible. Even if the reproduction of the I picture is completed and the optical head is jumped, after the reproduction of the I picture is completed, the interval for updating to the next I picture becomes large and the smoothness of the movement is lacking.

JP-A-4-114369

  Since the conventional digital video signal recording / reproducing apparatus and reproducing apparatus are encoded as described above, only I pictures having a large amount of data are decoded at the time of skip search (look at fast forward) like a video tape recorder. Therefore, if the optical head is jumped without reproducing enough data for decoding, or if enough data is reproduced, it takes a long time to reproduce the data. There is a problem in that the number of frames to be output to the screen is reduced because it has to be set far away.

  Further, since the sector address of the next GOP cannot be recognized because of the variable rate, there is no guarantee that the jumped track has the head of the GOP. For this reason, there is a problem that the number of frames to be output to the screen is further reduced during special reproduction after waiting for a plurality of disk rotations at the jump destination. Even if the sector address is recognizable, there is no means in the system layer to know how much data can be reproduced to make the optical head jump, so it cannot be judged without passing through the video decoder. There was also a problem that the efficiency of jumping the head was reduced.

  The present invention has been made in view of the above problems, and obtains a good skip search in a digital video signal recording / reproducing apparatus or a digital video signal reproducing apparatus encoded using motion compensation prediction and orthogonal transformation. Another object is to obtain a digital video signal recording / reproducing apparatus or a digital video signal reproducing apparatus capable of improving the accessibility of GOP on the premise of adopting variable bit rate encoding.

  The digital video signal reproduction apparatus of the present invention is a digital video signal reproduction apparatus that reads out and reproduces data recorded on a medium such as an optical disk by performing high-efficiency encoding of the digital video signal using motion compensation prediction and DCT. In addition, at least an I picture to be subjected to intra-frame coding is divided by a frequency domain, a quantization level, or a spatial resolution, and at least the data divided for the I picture is a low frequency domain data or a quantization level. The bit stream of video data is arranged at the head side of coarse data or data with reduced spatial resolution, and the address information of the divided data is placed at the head of the bit stream of the video data as header information Packet, and the data recorded on the recording medium Data reordering means for rearranging and outputting data in the order of the data before division according to the header information in the packet during normal reproduction from the recording medium, and decoding and outputting the data arranged at the head during special reproduction Thus, it is characterized by comprising special reproduction data output means for performing special reproduction.

  According to the digital video signal reproducing apparatus of the present invention, the special reproduction data output means outputs only the area to be accessed by the header of the data divided by frequency, quantization or spatial resolution, and the data to be decoded. Acts to reduce. Further, during normal reproduction, the data rearranging means operates to rearrange the rearranged data divided by frequency, quantization, or spatial resolution.

  Further, according to the digital video signal reproduction method according to the present invention, the data to be accessed at the time of special reproduction is reduced by dividing the data by frequency, quantization or spatial resolution, and the address of the divided data is the system stream. Since it is recorded as a header, it is possible to know the number of bytes to be instantaneously reproduced during reproduction, so that the optical head jump can be efficiently performed during special reproduction. Further, during normal playback, data can be rearranged on the basis of the address, so that playback can be performed without causing problems due to division.

  Further, according to the digital video signal recording / reproducing apparatus of the present invention, the recording means acts to divide the image data by frequency domain, quantization or spatial resolution. Due to the header of the divided data, the special reproduction data output means outputs only the area to be accessed and acts to reduce the data to be decoded. Further, during normal reproduction, the data rearranging means operates to rearrange the rearranged data divided by frequency, quantization, or spatial resolution.

  Further, according to the digital video signal recording / reproducing method of the present invention, data is divided by frequency, quantization or spatial resolution at the time of recording, thereby reducing data to be accessed at the time of special reproduction, and further, Since the address is recorded as the header of the system stream, the number of bytes to be reproduced instantaneously at the time of reproduction can be known, so that the optical head jump can be efficiently performed during special reproduction. Further, during normal reproduction, data can be rearranged on the basis of the address, so that recording and reproduction can be performed without causing problems due to division.

  Further, according to the digital video signal recording / reproducing apparatus of the present invention, the recording means divides the image data by the screen area, and acts so that the central portion of the screen is given priority. Due to the header of the divided data, the special reproduction data output means operates so as to preferentially output the central portion of the screen. Further, during normal reproduction, the data rearranging means operates so as to rearrange the rearranged data divided in area units on the screen.

  According to the digital video signal recording / reproducing method of the present invention, data to be accessed during special reproduction is reduced by dividing the data in the screen area during recording, and the address of the divided data is the header of the system stream. Since the number of bytes to be reproduced instantaneously is known at the time of reproduction, the optical head jump can be performed efficiently during special reproduction, and the address jump can be performed in a fixed time unit. Further, during normal reproduction, data can be rearranged on the basis of the address, so that recording and reproduction can be performed without causing problems due to division.

  Further, according to the digital video signal reproducing apparatus according to the present invention, the special reproduction data output means preferentially outputs the central area of the screen by the header of the data divided in the screen area, and the special reproduction at a constant speed. Acts as possible. Further, during normal reproduction, the data rearranging means operates so as to rearrange the rearranged data divided in area units on the screen.

  Further, according to the digital video signal reproduction method according to the present invention, by dividing the data in the area on the screen, the address jump can be performed in a fixed time unit during the special reproduction, and the address of the divided data is the header of the system stream. Since the number of bytes to be reproduced instantaneously is known at the time of reproduction, the optical head jump can be efficiently performed during special reproduction. Further, during normal playback, data can be rearranged on the basis of the address, so that playback can be performed without causing problems due to division.

  Further, according to the digital video signal recording / reproducing apparatus of the present invention, the recording means acts to divide the image data by frequency domain, quantization or spatial resolution, and further divide the image data by area. . Due to the header of the divided data, the special reproduction data output means outputs only the area to be accessed and acts to reduce the data to be decoded. Further, the data divided by the plurality of dividing means can be read out in accordance with the special reproduction speed, and the data amount can be adjusted, so that a wide range of special reproduction speeds can be handled. Further, during normal reproduction, the data rearranging means operates so as to rearrange the rearranged data divided by frequency, quantization, spatial resolution, and screen area unit.

  Further, according to the digital video signal recording / reproducing method of the present invention, data is divided by frequency, quantization or spatial resolution at the time of recording, and further divided by area on a screen. As a result, the data to be accessed during special playback is reduced, and the address of the divided data is recorded as the header of the system stream, so that the number of bytes to be played back instantaneously during playback can be known. The head can be jumped efficiently. Further, the data divided by the plurality of dividing means can be read out in accordance with the special reproduction speed, and the data amount can be adjusted, so that a wide range of special reproduction speeds can be handled. Further, during normal reproduction, data can be rearranged on the basis of the address, so that recording and reproduction can be performed without causing problems due to division.

  Further, according to the digital video signal reproducing apparatus of the present invention, the special reproduction data output means should be accessed by the header of the data divided by frequency, quantization or spatial resolution and further divided by area unit on the screen. Only the area is output, and the data to be decoded is reduced according to the special reproduction speed. Further, the data divided by the plurality of dividing means can be read out in accordance with the special reproduction speed, and the data amount can be adjusted, so that a wide range of special reproduction speeds can be handled. Further, during normal reproduction, the data rearranging means operates so as to rearrange the rearranged data divided by frequency, quantization, spatial resolution, and screen area unit.

  Further, according to the digital video signal reproduction method according to the present invention, the data is divided by frequency, quantization or spatial resolution, and further divided by area unit on the screen, the data to be accessed during special reproduction is reduced. Since the address of the divided data is recorded as the system stream header, the number of bytes to be reproduced instantaneously at the time of reproduction can be known, so that the jump of the optical head at the time of special reproduction can be performed efficiently. Further, the data divided by the plurality of dividing means can be read out in accordance with the special reproduction speed, and the data amount can be adjusted, so that a wide range of special reproduction speeds can be handled. Further, during normal playback, data can be rearranged on the basis of the address, so that playback can be performed without causing problems due to division.

  In the digital video signal recording / reproducing apparatus according to the present invention, at the time of special reproduction, only the area at the center of the screen of the I picture is read, and the data of the area that has not been read is masked to a certain value. Compared with the case where all the I pictures with a large amount of data are reproduced, the special reproduction can be realized at a higher speed because the reproduction images are synthesized.

  In the digital video signal recording / reproducing apparatus according to the present invention, at the time of special reproduction, only the area at the center of the I picture screen is read, and the reproduced area is expanded to the entire screen to synthesize the reproduced image. Compared with the case where all I pictures having a large amount of data are reproduced, higher-speed special reproduction can be realized, and the area where the data could not be read becomes difficult to see.

  In the digital video signal reproducing apparatus according to the present invention, at the time of special reproduction, only the area in the center of the I picture screen is read, and the data of the area that has not been read is reproduced by masking the data to a certain value. Since the images are combined, it is possible to realize special playback at a higher speed than when all I pictures having a large amount of data are played back.

  Further, in the digital video signal reproducing apparatus according to the present invention, at the time of special reproduction, only the area in the center of the I picture screen is read, and the reproduced image is synthesized by extending the read area to the entire screen. Compared with the case where all I pictures having a large amount of data are reproduced, higher-speed special reproduction can be realized, and the area where the data could not be read is less noticeable.

  According to the present invention, it is possible to obtain a good skip search and improve the accessibility of GOP.

  Further, according to the digital video signal reproducing apparatus of the present invention, only the area to be accessed by the special reproduction data output means should be decoded by the data header divided by frequency, quantization or spatial resolution. There is an effect that data can be reduced and a smooth special reproduction image can be obtained. Further, during normal reproduction, there is an effect that the data before the rearrangement division can be reproduced from the data rearranged by the data rearrangement means divided by frequency, quantization or spatial resolution.

  In addition, according to the digital video signal reproduction method of the present invention, it is possible to obtain a smooth special reproduction image by reducing data to be accessed at the time of special reproduction by dividing the data by frequency, quantization or spatial resolution. There is. Furthermore, since the address of the divided data is recorded as the system stream header, the number of bytes to be reproduced can be found instantaneously, so that the optical head can be efficiently jumped during special reproduction. . Further, during normal playback, data can be rearranged on the basis of the address, so that playback can be performed without causing problems due to division.

  Further, according to the digital video signal recording / reproducing apparatus of the present invention, the recording means divides the image data by frequency domain, quantization or spatial resolution, so that the amount of access data at the time of special reproduction is reduced and smooth special data is obtained. There is an effect that recording can be performed so that a reproduced image can be obtained. Also, the special reproduction data output means outputs only the area to be accessed by using the header of the divided data, so that a smooth special reproduction image can be obtained by reducing the data to be decoded. Further, at the time of normal reproduction, there is an effect that the data rearrangement means rearranges the data rearranged by dividing by frequency, quantization or spatial resolution, and the image before division can be reproduced.

  Further, according to the digital video signal recording / reproducing method of the present invention, data is divided by frequency, quantization or spatial resolution at the time of recording, thereby reducing data to be accessed at the time of special reproduction, and a smooth special reproduction image can be obtained. There is an effect that recording can be performed. Furthermore, since the address of the divided data is recorded as the header of the system stream, the number of bytes to be reproduced and instantly reproduced can be known, so that the optical head jump can be efficiently performed during special reproduction. Further, during normal reproduction, data can be rearranged on the basis of the address, so that recording and reproduction can be performed without causing problems due to division.

  Further, according to the digital video signal recording / reproducing apparatus of the present invention, the recording means divides the image data by the screen area, so that the amount of access data at the time of special reproduction is reduced and a smooth special reproduction image can be obtained. There is an effect that it can be recorded. Due to the header of the divided data, only the area to be accessed by the special reproduction data output means is output, so that the data to be decoded can be reduced and a smooth special reproduction image can be obtained. Further, during normal reproduction, the data rearranging means rearranges the data rearranged by the area unit of the screen and rearranges the data so that the data can be reproduced without causing a problem due to the division.

  Further, according to the digital video signal recording / reproducing method of the present invention, the data is divided in the screen area at the time of recording, thereby reducing the data to be accessed at the time of special reproduction, and further, the address of the divided data is the system stream. Since the number of bytes to be played back can be known instantaneously, the optical head jump can be efficiently performed during special playback. Further, during normal reproduction, data can be rearranged on the basis of the address, so that recording and reproduction can be performed without causing problems due to division.

  According to the digital video signal reproducing apparatus of the present invention, the special reproduction data output means outputs only the area to be accessed by the header of the data divided in the screen area so as to reduce the data to be decoded. Works. In normal reproduction, the data rearranging means rearranges the data rearranged by dividing by frequency, quantization, or spatial resolution, so that the data can be reproduced without causing a problem due to the division.

  Further, according to the digital video signal reproduction method according to the present invention, the data to be accessed during special reproduction is reduced by dividing the data in the area on the screen, and the address of the divided data is recorded as the header of the system stream. Since the number of bytes to be reproduced can be known instantaneously by reproducing, the jump of the optical head at the time of special reproduction can be performed efficiently. Further, during normal playback, data can be rearranged on the basis of the address, so that playback can be performed without causing problems due to division.

  Further, according to the digital video signal recording / reproducing apparatus of the present invention, the recording means divides the image data by frequency domain, quantization or spatial resolution, and further divides the image data by area unit for special reproduction. By reducing the amount of data to be accessed step by step, a smooth specially reproduced image can be obtained. Due to the header of the divided data, only the area to be accessed by the special reproduction data output means is output, and a smooth special reproduction image can be obtained to reduce the data to be decoded. Further, the data divided by the plurality of dividing means can be read out in accordance with the special reproduction speed, and the data amount can be adjusted, so that a wide range of special reproduction speeds can be handled. In normal reproduction, the data rearranging means rearranges the data rearranged by dividing by frequency, quantization, or spatial resolution, so that the data can be reproduced without causing a problem due to the division.

  Further, according to the digital video signal recording / reproducing method of the present invention, data is divided by frequency, quantization or spatial resolution at the time of recording, and further divided by area on a screen. As a result, data to be accessed during special reproduction is reduced, and a smooth special reproduction image can be obtained by gradually reducing the amount of data to be accessed during special reproduction. Furthermore, since the address of the divided data is recorded as the header of the system stream, the number of bytes to be reproduced and instantly reproduced can be known, so that the optical head jump can be efficiently performed during special reproduction. Further, the data divided by the plurality of dividing means can be read out in accordance with the special reproduction speed, and the data amount can be adjusted, so that a wide range of special reproduction speeds can be handled. Further, during normal reproduction, data can be rearranged on the basis of the address, so that recording and reproduction can be performed without causing problems due to division.

  Further, according to the digital video signal reproducing apparatus of the present invention, the special reproduction data output means should be accessed by the header of the data divided by frequency, quantization or spatial resolution and further divided by area unit on the screen. Only the area is output, and the data to be decoded is reduced according to the special reproduction speed. Further, the data divided by the plurality of dividing means can be read out in accordance with the special reproduction speed, and the data amount can be adjusted, so that a wide range of special reproduction speeds can be handled. In normal reproduction, the data rearranging means rearranges the data rearranged by dividing by frequency, quantization, or spatial resolution, so that the data can be reproduced without causing a problem due to the division.

  Further, according to the digital video signal reproduction method according to the present invention, the data is divided by frequency, quantization or spatial resolution, and further divided by area unit on the screen, the data to be accessed during special reproduction is reduced. Since the address of the divided data is recorded as the header of the system stream, the number of bytes to be reproduced and instantly reproduced can be known, so that the optical head jump can be efficiently performed during special reproduction. Further, the data divided by the plurality of dividing means can be read out in accordance with the special reproduction speed, and the data amount can be adjusted, so that a wide range of special reproduction speeds can be handled. Further, during normal playback, data can be rearranged on the basis of the address, so that playback can be performed without causing problems due to division.

  In the digital video signal recording / reproducing apparatus according to the present invention, at the time of special reproduction, only the area at the center of the screen of the I picture is read, and the data of the area that has not been read is masked to a certain value. Compared with the case where all the I pictures with a large amount of data are reproduced, the special reproduction can be realized at a higher speed because the reproduction images are synthesized.

  In the digital video signal recording / reproducing apparatus according to the present invention, at the time of special reproduction, only the area at the center of the I picture screen is read, and the reproduced area is expanded to the entire screen to synthesize the reproduced image. Compared with the case where all I pictures having a large amount of data are reproduced, higher-speed special reproduction can be realized, and the area where the data could not be read becomes difficult to see.

  In the digital video signal reproducing apparatus according to the present invention, at the time of special reproduction, only the area in the center of the I picture screen is read, and the data of the area that has not been read is reproduced by masking the data to a certain value. Since the images are combined, it is possible to realize special playback at a higher speed than when all I pictures having a large amount of data are played back.

  Further, in the digital video signal reproducing apparatus according to the present invention, at the time of special reproduction, only the area in the center of the I picture screen is read, and the reproduced image is synthesized by extending the read area to the entire screen. Compared with the case where all I pictures having a large amount of data are reproduced, higher-speed special reproduction can be realized, and the area where the data could not be read becomes less conspicuous.

Example 1.
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a digital video signal encoding processing unit in a digital video recording / reproducing apparatus. The DCT block is divided into a hierarchy of a low frequency region and a high frequency region, and only the low frequency region is arranged at the head of the GOP. It is a block diagram. In the figure, 1 is a buffer memory, 2 is a subtractor, 3 is a DCT calculator, 4 is a quantizer (Q), 5 is a variable length encoder (VLC), 6 is an inverse quantizer (IQ), 7 is An inverse DCT calculator (IDCT), 8 is an adder, 9 is a motion compensation prediction circuit, 10 is an event number and code amount counter, 11 is a format encoder, and 15 is an input terminal.

  Next, the operation will be described. The input video data is, for example, an interlaced image having an effective screen size of horizontal 704 pixels and vertical 480 pixels. Here, the operations of the subtracter 2, the DCT calculator 3, the quantizer 4, the variable length encoder 5, the inverse quantizer 6, the inverse DCT calculator 7, the adder 8, and the motion compensation prediction circuit 9 are conventional examples. Since it is the same as that shown in FIG.

  The operation of the variable length encoder 5 will be described with reference to FIG. FIG. 2 shows the data arrangement of DCT coefficients in the DCT block. In FIG. 2, DCT coefficient data of the low frequency component is arranged in the upper left part and the high frequency component is arranged in the lower right part. Of the DCT coefficient data arranged in this DCT block, the DCT coefficient data (for example, the hatched portion in FIG. 5) up to a specific position (event break) is variable length as the low frequency area. It is encoded and output to the format encoder 11. Variable length coding is performed on the DCT coefficient data after the DCT coefficient data at the specific position. That is, data is partitioned and encoded in the spatial frequency domain.

  This break between the low frequency region and the high frequency region is called a braking point. The braking point is set by the number of events and code amount counter 10 so that the code amount in the low frequency region becomes a predetermined code amount that the optical head can access during special reproduction. The variable length encoder 5 divides the DCT coefficient into a low frequency and a high frequency according to the braking point, and outputs the result to the format encoder.

  Although the coding area is determined at the event break, it goes without saying that other methods may be used. For example, the interval may be a fixed number of events, or the data may be divided by the quantized data coarsely quantized by the quantizer 4 and the difference value between the fine quantization and the coarse quantization. Further, the image may be divided by encoding an image obtained by thinning the spatial resolution by half in the buffer memory, and an image obtained by restoring the half-resolution image to the original image and a difference image. That is, it goes without saying that the high-efficiency encoded data of an image may be divided not only by division in the frequency domain but also by quantization or division of spatial resolution.

  At this time, more important data as an image is data in a low frequency region if it is frequency division, and data that is encoded by coarse quantization if it is division by quantization, and is divided by spatial resolution. If it is data, it is data obtained by coding a thinned image. By decoding only these important data, a decoded image that is more easily perceivable by humans can be obtained. In this way, one high-efficiency encoded data is divided into more basic and important data and other data (referred to as hierarchization), attached with an error correction code, and modulated and recorded on the disk. .

  In this way, since the low frequency components of the I picture and the P picture are divided, if only these low frequency components are read and reproduced during special reproduction, the amount of data read during special reproduction is greatly reduced. As a result, the time for reading data from the header medium is shortened, and smooth playback at high speed during skip search can be realized. If only the I picture and the P picture are continuously arranged, only the low frequency component data of the I picture and the P picture can be easily read from the disk and decoded during special reproduction. In this case, it is possible to efficiently configure the data by extracting and arranging only the low frequency components rather than arranging the entire area of the I picture and P picture at the head of the GOP.

  Next, the operation of the format encoder 11 will be described. FIG. 3 is a flowchart showing the operation of the format encoder. First, when encoding is started, it is determined whether or not the encoding mode is the hierarchization mode. If the encoding mode is not the hierarchization mode, information indicating non-hierarchization is inserted into the system stream, and the conventional stream configuration is followed. . In the hierarchical mode, check the sequence header setting. Specifically, the data of the sequence scalable extension is confirmed. If this is correctly described, the head of the picture is recognized by the picture header, the I picture and the four P pictures are separated into low-frequency component data and high-frequency component data, and the respective data lengths are detected. To do.

  On the other hand, the data length of B picture data is detected for each picture. Further, a packet is created in which only the address information when the low frequency component data of the I picture and P picture is continued at the head of the GOP is recorded. This packet includes the I picture, the low frequency component of the P picture, the I picture, the high frequency component of the four P pictures, and the address information of the ten B pictures, and the data length of each data is recorded. Has been.

  Therefore, the head position of each data stream is obtained as a relative address from the head of the GOP header by this data length. The packet including the address information, the low frequency components of the I picture and the four P pictures, and the remaining data are sequentially arranged and formatted.

  Among these, the confirmation of the scalable mode on the scalable extension of the sequence header is confirmation of the setting of the scalable mode determined by the MPEG2 syntax of FIG. 4 and confirmation of the description of the priority breakpoint on the slice header. The priority break point is a predetermined number of events in the figure (corresponding to the above-mentioned braking point), and is data representing the positions of the divided low-frequency components and high-frequency components.

  When the scalable mode is 00, it indicates that the following bit stream is a data partitioning bit stream, and that a bit stream decomposed into a low frequency component and a high frequency component continues. The B picture can be undivided by setting all the B pictures to low frequency components and not generating high frequency components.

  An example of the bitstream generated in this way is shown in FIG. (A) of FIG. 5 is a bit stream when not hierarchized. When this is hierarchized by the circuit block shown in FIG. 1, it is divided into hierarchies as shown in (a). When this data is arranged in consideration of special reproduction, the low range of the I picture and P picture is arranged at the head of the GOP as shown in (c).

  (D) shows the arrangement of data when these are packetized and the address information is put in the private packet as shown in the flowchart of FIG. In this case, as described above, the address information may be expressed as a relative address from the head of the GOP header, but may be expressed as how many bytes of what number packet is the head of each picture, Needless to say, it may be expressed by a sector address on the disk.

  An example of putting address information in a private packet is shown in FIG. When a packetized elementary stream (hereinafter referred to as PES) packet is a private packet, the stream ID is set to BF (hexadecimal notation), the packet length is written, and all start codes (packet start code and bit stream) The MSB of the byte is set to 1 and the next bit is set to 0 so that it does not become the same code as the start code, etc.), and the remaining 6 bits set the hierarchization mode, hierarchization type, type of image used for special playback, start Write the number of addresses.

  Then, 21-bit address information is written so that the GOP data amount can be expressed up to the maximum length of 2 Mbytes. However, as described above, 100 (binary display) is inserted into the first 3 bits of the 21 bits so as not to be the same data as the first 24 bits 000001 (hexadecimal display) of the start code. Here, the start address is the start address of the low frequency component of the I picture, the start address of the low frequency component of the four P pictures, the high frequency component of the I picture, the high frequency component of the four P pictures, and the 10 B frequencies. This is the start address of the picture. Further, in order to make the optical head jump in the special reproduction, the sector address on the disk where the preceding and following GOP data is recorded is added.

  Note that if a 1-bit parity is added to a 21-bit address, the reliability of data is increased. In this case, 10 (binary display) may be added to the head of 21 bits + 1 bits. In addition to the preceding and following GOP addresses in consideration of the special reproduction double speed number, if the sector addresses of the preceding and following GOPs are added, variations in the special reproduction double speed can be expanded. In addition, the address information is described in the private 2 packet of the PES packet, but it goes without saying that it may be described in another user area such as a private descriptor of the program stream map.

  The reproduction side of the first embodiment will be described with reference to FIGS. 7 is a block diagram of a digital video signal decoding processing unit. In FIG. 7, 21 is a program stream header detector, 22 is a PES packet header detector, 23 is a video bitstream generator, 24 is a data rearranger, and 25 is Address memory, 26 is a mode changer, 27 is a variable length decoder (VLD), 28 is a switch, 29 is an inverse quantizer, 30 is an inverse DCT calculator, 31 is an adder, 32 is a prediction data decoding circuit 33 is a frame memory, and 34 is a decodable determinator. FIG. 8 is a diagram illustrating the operation concept of FIG.

  Next, the operation of FIG. 7 will be described with reference to FIG. FIG. 9 is a flowchart showing the operation of the format decoder during reproduction. The bit stream output from the ECC detects the header of the program stream and is separated for each PES packet. Further, the header of the PES packet is detected, and the private packet and the video packet including the address information are discriminated.

  In the case of a private packet, the address information included in the packet is extracted and stored. On the other hand, in the case of a video packet, a bit stream of video data is extracted. Here, in the case of normal reproduction, in the case of an I picture and a P picture, low-frequency component data and high-frequency component data are extracted from the bit stream of video data, the data are rearranged, and a reproduced image is output. On the other hand, at the time of special reproduction, only the low frequency component of the video data is extracted and reproduced. Here, after reproducing the low frequency component, the optical head is jumped to the head of the next GOP.

  In this case, if these addresses are described in the video stream, the address information is extracted and stored after being converted to a video stream. If it is described in the private descriptor of the program stream map, the program stream header is detected. At this level, address information is extracted and stored. Needless to say, the address information may be a relative address or an absolute address of the program.

  Actually, mode signals such as skip search and normal continuous reproduction are input to the mode switch 26 from a microcomputer or the like in FIG. On the other hand, a reproduction signal from a disk or the like is amplified by an amplifier, and signal reproduction is performed by a phase-synchronized clock output from a PLL or the like. Next, after performing a discrimination operation to perform digital demodulation and error correction processing, the program stream header detector 21 that detects each header of the program stream obtains information of data following the header.

  Further, the PES packet header detector 22 detects the address information of each picture and the address information of the special reproduction data described in the private two packets of the PES packet, for example, and stores them in the address memory 25. Here, PES packets for audio, PES packets such as characters, and PES packets for video are distinguished, and only video packets are output to the video bitstream generator 23.

  Here, the video bit stream generator deletes the information added from the PES packet and converts it into a video stream. Specifically, data such as various control codes and time stamps are excluded. Thereafter, in accordance with the address information obtained from the address memory 25, when the output of the mode switching unit 26 is normally reproduced, the data rearrangement unit 24 rearranges the bit streams.

  The output (control signal) of the mode switch 26 is supplied to the data rearranger 24 and the decodable determiner 34. The data rearranging unit 24 obtains a control signal and reconstructs the data before division from the low-frequency component and the high-frequency component which are divided into hierarchies, or only the low-frequency component is a variable length decoder (VLD) 27. Output to. That is, during normal playback, each low-frequency component is combined with the high-frequency component and rearranged in the original picture order, and during special playback, the low-frequency component of only the I picture or the low of the I picture and P picture is selected depending on the speed. Outputs the band component.

  Note that the time stamp is not used during special playback through which only low-frequency components are passed. On the other hand, the variable length decoder (VLD) 27 extracts the break of the event in the low frequency component region indicated by the priority breakpoint of the slice header together with the decodable determiner 34, and decodes up to the break and switches it. To 28. The switch 28 is connected so as not to insert 0 during normal reproduction, but is controlled by the decodable determiner 34 so that 0 is inserted into a high frequency component after the priority break point during special reproduction.

  The above operation will be described with reference to FIG. In FIG. 8, when the partitioning braking point is E1 to E3, E3 is stored in the low frequency component stream, and E4 to EOB is stored in the high frequency component stream. The low-frequency component stream stores low-frequency component data of the next DCT block following E3.

  Here, during normal reproduction, the data rearranger 24 extracts E1 to E3 data from the low frequency component stream, E4 to EOB data from the high frequency component stream, and further extracts the next block data. Then, the DCT block is sequentially reconstructed. On the other hand, at the time of special reproduction, the data rearranger 24 extracts data from E1 to E3, performs variable length decoding by the VLD 27, detects a priority breakpoint by the decodable determiner 34, and uses the switch 28 to Zeros are inserted in the hatched portion of 8 and a DCT block is constructed using only the low frequency components.

  The data converted into the DCT block is decoded according to the motion vector. Here, since the decoding by the motion vector is the same as the conventional example, the description thereof is omitted. However, the reference used when decoding the P picture at the time of special reproduction is decoded using the I or P picture decoded only with the low frequency component.

  Data decoded in units of blocks is input to the frame memory 33. Here, the frame memory 33 restores the image in the original configuration order of the GOP, converts the block scan into the raster scan, and outputs it. The frame memory can be shared with the memory built in the prediction data decoding circuit 32.

  In addition, although the encoding area | region was performed at the break of an event, it cannot be overemphasized that other methods may be sufficient. That is, it goes without saying that the high-efficiency encoded data of an image may be divided not only by division in the frequency domain but also by quantization or division of spatial resolution.

  At this time, more important data as an image is data in a low frequency region if it is frequency division, and data that is encoded by coarse quantization if it is division by quantization, and is divided by spatial resolution. If it is data, it is data obtained by coding the thinned image. In this case, an area where a reproduced image decoded using only these data is more easily perceived by humans is regarded as important data. That is, one high-efficiency encoded data is divided into more basic and important data and data that is not so (this is called hierarchization). You may make it reproduce | regenerate.

  In the first embodiment, the recording side and the reproducing side are described in association with each other. However, the recording and reproduction are performed in a pair like a hard disk, or the recording is performed according to the assumption such as a current compact disk. It can be considered that only the playback side is premised on the above.

Example 2
Next, a second embodiment of the present invention will be described. FIG. 10 is a block circuit diagram showing a recording system of the digital video signal recording / reproducing apparatus of the second embodiment. In the figure, the same reference numerals as those in FIG. 1 denote the same or corresponding parts, 15 is an input terminal, 1 is a buffer memory, 2 is a subtractor, 3 is a DCT circuit, 4 is a quantization circuit, and 6 is inverse quantization. Circuit, 7 is an IDCT circuit, 8 is an adder, 9 is a motion compensation prediction circuit, 5 is a variable length coding circuit, 12 is an area rearranger, and 11 is a format encoder.

  FIG. 11 is a block circuit diagram showing a digital video signal recording / reproducing apparatus reproducing system of the second embodiment. In the figure, the same reference numerals as those in FIG. 7 denote the same or corresponding parts, 21 is a program stream header detector, 22 is a PES packet detector, 23 is a video stream generator, 35 is an area rearranger, and 25 is An address memory, 26 is a mode switch, 27 is a variable length decoding circuit, 29 is an inverse quantization circuit, 30 is an IDCT circuit, 31 is an adder, 32 is a prediction data decoding circuit, and 33 is a frame memory.

  Next, the operation will be described. The digital video signal is input line by line from the input terminal 1 and supplied to the buffer memory 1. Here, the operation from the buffer memory 1 to the variable-length code circuit 5 is the same as that in the conventional example, and the description thereof is omitted.

  In the area rearrangement circuit 12, for the I picture in the bit stream of video data in GOP units output from the variable length coding circuit 5, an area located at the center of the screen is arranged at the head of the bit stream. Rearrange. Here, the I picture is divided into three areas as shown in FIG. 12, and the data of the I picture for the areas 1 to 3 are I (1), I (2), and I (3), respectively. However, each area shown in FIG. 12 is a collection of a plurality of MPEG slice layers shown in FIG. 28. In FIG. 12, areas 1 and 3 are composed of 6 slices, and area 2 is composed of 18 slices.

  Actually, the area rearranger 12 detects the slice header of the I picture on the bit stream, classifies each slice into the three areas shown in FIG. 12, creates a bit stream for each area, and collects each area. Rearrange the received bitstream. That is, as shown in FIG. 13, rearrangement is performed in units of areas so that bit streams are arranged in the order of I (2), I (3), and I (1) at the top of the GOP. Further, the rearranged bit stream is output to the format encoder 11 in GOP units.

  Next, the operation of the format encoder 11 will be described with reference to FIG. FIG. 14 is a flowchart showing an algorithm for formatting video data into PES packets in units of GOPs. In the screen center priority mode, the picture header of the input bit stream is detected to detect picture information. Here, in the case of an I picture, the areas of the screen center portions I (2) and I (3), I (1) shown in FIG. 13 are extracted, the respective data lengths are detected, and each detected area is detected. Address information is created by converting the data length into a binary number having a width of 24 bits. On the other hand, in the case of P and B pictures, the data length is detected on a picture-by-picture basis, and converted into a binary number having a 24-bit width (3 bytes) to create address information.

  Further, the formatting unit collects the input address information and the bit stream of the video data into two types of PES packets. That is, a PES packet having only address information and a PES packet having only video or audio are configured.

  Therefore, as shown in FIG. 29, when 1 GOP is 15 pictures, there are 17 types of address information, 3 types of I pictures, 4 types of P pictures, and 10 types of B pictures. In addition, there are two types of address information (absolute addresses on the disc) of the previous and subsequent GOPs as address information during special playback. These pieces of address information are combined into one packet and formatted as a PES packet. Actually, it is formatted as a private 2 packet of the PES packet shown in FIG. In FIG. 15, the absolute addresses on the front and rear GOP disks are arranged at the head of the packet data, and the address information of each picture is arranged in order. However, since an information amount of 3 bytes (24 bits) is assigned to each address information, the packet length is 57 bytes.

  On the other hand, the bit stream for 1 GOP of data other than the address data is divided into a plurality of packets and formatted into PES packets (video packets) by adding header information such as synchronization signals.

  Further, the format encoder 11 decomposes the input audio bit stream into PES packets, and forms an MPEG2-PS system stream together with the PES packets of video data. Actually, as shown in FIG. 16, a bit stream of video data for 1 GOP and a bit stream of audio data corresponding to one GOP period are divided into a plurality of packets in one pack. In this case, as shown in FIG. 16, a packet indicating the address information is arranged in the first packet of the system stream, and a packet including the bit stream at the center of the screen of the I picture is arranged subsequently. It is said.

  Next, the operation during reproduction will be described with reference to FIG. In FIG. 11, the operations of the program stream header detector 21, the PES packet header detector 22, the video bit stream generator 23, and the mode switch 26 are the same as those in the first embodiment, and the description thereof is omitted.

  In the decoded video bit stream, as shown in FIG. 13, the data at the center of the screen of the I picture is arranged at the head of the stream. For this reason, the area rearranger 35 converts the I picture data into I (1) for each area according to the data length of the bit stream of I (2), I (3), I (1) output from the address memory 25. , I (2), I (3). The rearranged bit stream is input to the variable length decoding circuit 27 and decoded into block data and motion vectors. Here, the operation following the variable-length decoding during normal reproduction is the same as that in the conventional example, and thus the description thereof is omitted.

  For high-speed playback, since data for 1 GOP is allocated to one pack of the system stream as described above, when data is read from the disk, it jumps to the head address of each GOP and is placed at the head of the system stream. A method of reading only the data of the current I picture and jumping to the head of the next GOP can be considered. In this case, the disk drive is controlled by detecting the PES packet in which the address information arranged at the head of the system stream is recorded and decoding the address on the disk of the next GOP and the address information of the I picture.

  In the case of FIG. 29, if all the I pictures of each GOP can be read out within one frame time, high-speed reproduction at 15 times speed can be realized. If the I picture of each GOP is read within the time of 2 frames, high-speed playback at 7.5 times speed is achieved. Thus, as the speed of high-speed playback increases, the time to read data from the disk decreases.

  In addition, when reading data from a medium such as an optical disk during high-speed playback, even if the start address of the system stream recorded on the disk is known, the disk is used when jumping to the location actually recorded on the disk. Rotation waiting time occurs. Further, when the video signal is encoded at a variable rate, the amount of information of the I picture is not constant, and the time required for reading the I picture also changes. For this reason, when the high-speed playback speed is increased, the time for reading data on the disk is shortened, and the rotation waiting time of the disk is not constant, so that all I picture data cannot be read stably.

  For this reason, in this embodiment, for data recorded on a medium such as an optical disc in high-speed playback in units of 1 GOP, the data portion of I picture is read from the disc by jumping to the head of the GOP in a fixed time unit. . In this case, even if all the I picture data cannot be read out within a predetermined time, the process jumps to the head of the next GOP. That is, jump to the head address of each GOP at a fixed time unit, read data from the recorded system stream as much as possible from the head, and jump to the head of the next GOP.

  In this case, as shown in FIG. 16, the PES packet including the address on the disk of the next GOP and the PES packet including the data at the center of the I picture are arranged on the top of the system stream on the disk. . Therefore, even when all I picture data cannot be read out during special playback, at least the address on the disk of the next GOP necessary for controlling the disk drive and the data in the center of the I picture screen can be decoded. .

  If only the center part of the screen can be decoded during special playback, the area rearranger 35 outputs only the data that can be decoded to the variable length decoding circuit 27, and the variable length decoded video data is inversely quantized. And IDCT are applied to the frame memory 33. On the other hand, the area rearranger 35 outputs the area information to be decoded to the frame memory 33. Thereby, the frame memory 33 reproduces only the area that could be decoded at the time of special reproduction, and the area that could not be decoded retains and outputs the data output in the previous frame as it is.

  FIG. 17 shows an example of a reproduced image when high-speed reproduction is performed by reproducing only I pictures from the nth GOP to the n + 4th GOP. FIG. 17A shows a case where all I pictures can be decoded. FIG. 17B shows a case where areas 2 and 3 can be decoded. Area 1 which cannot be decoded holds the value of the previous frame as it is. Output. FIG. 17C shows a case where only area 2 can be decoded. Areas 1 and 3 hold the value of the previous frame as it is.

  Here, in a general video signal recording / reproducing apparatus, an I picture is recorded in units of frames as a data format at the time of recording. On the other hand, in FIG. 16, since the area located in the center of the screen among the three divided I picture data is preferentially arranged at the head of 1 GOP, the I picture data can be stored within a certain time during special playback. Even when only a part of the area can be read from the disc, it is possible to output a reproduced image of at least the central part of the screen.

  As described above, in this embodiment, as shown in FIG. 7, the I picture used for special playback is arranged at the head of 1 GOP so that the area located at the center on one screen is preferentially recorded on the medium. Therefore, even when the high-speed playback speed is high, the playback is performed with priority given to the area 2 located at the center of the screen. In addition, since special playback is performed in which a jump is made to the top of the GOP at a constant time unit, the output screen can be constantly updated at a constant double speed.

  In the above embodiment, all the areas that could be decoded at the time of special playback were output, and the data of the previous frame was held as it was for the areas that could not be decoded, but at the time of special playback, only the center part of the screen was played back You may comprise.

  In this case, the area rearranger 35 decodes only the data of area 2 of the I picture read from the disk, and the areas 1 and 3 not decoded are masked in the frame memory 33 by, for example, gray data. Output high-speed playback images.

  FIG. 18 shows a reproduced image when high-speed reproduction is performed by reproducing only the area 2 of the I picture from the nth GOP of the 1GOP to the n + 4th GOP. In the figure, areas 1 and 3 at both ends of the screen are masked with gray data. Even if the information amount of the I picture is small, the disk rotation waiting time is small, and there is time to read the data of the areas 1 and 3, the data of the areas 1 and 3 are not decoded.

  This is because if the data in the areas 1 and 3 can be read out and output to the screen only, these areas are not updated at regular intervals, so that the high-speed playback image becomes unnatural. For this reason, when only the central part of the I picture screen (area 2) is played back during special playback, the updated area is always constant and the playback image is not unnatural.

  Also, in the above embodiment, only the area at the center of the screen of the I picture that could be decoded during special playback was displayed and both ends of the screen were masked, but the center of the screen was expanded to one screen and output. May be.

  In this case, the frame memory 33 expands the decoded data of area 2 to the size of one screen as shown in FIG. However, in the case of FIG. 19, the central portion of the area 2 surrounded by the dotted line is expanded to double the size by linear interpolation in the vertical and horizontal directions, respectively. That is, in the case of FIG. 19, the portion surrounded by the dotted line has a size of 360 horizontal pixels × 240 vertical lines, and this dotted line portion is expanded by linear interpolation, for example, to expand to one screen size of 720 horizontal pixels × vertical 480 lines. ing.

  In this way, if only the area at the center of the screen is decoded and expanded to one screen size during special playback, the area of the output data will be small, but the mask portions at the edges of the screen that will be noticeable when only the center of the screen is output Can be eliminated.

  In the above embodiment, only the central part of the I picture screen is preferentially arranged on the bitstream. However, not only the I picture but also the central part of the P picture screen may be preferentially arranged. . In this case, the data at the center of the screen of the P picture follows the bit stream of the I picture.

  In the above embodiment, the rearrangement of the image data in area units is performed after the conversion to the bit stream. However, the rearrangement is not necessarily performed after the conversion to the bit stream, and may be performed before the conversion.

  FIG. 20 shows a flowchart on the reproduction side of this embodiment. Since the flow has been described above, the description is omitted.

  In the second embodiment, the recording side and the reproduction side are described in association with each other. However, there may be a case where recording / reproduction is paired like a hard disk, and the recording is performed according to the assumption like a current compact disk. It is also conceivable that only the playback side is assumed to have Further, it is needless to say that rearrangement in units of screen areas can be realized by the prediction data decoding circuit 32 and the frame memory 33 by using the data of the slice vertical code of the lower 8 bits of the slice start code in the slice header. .

Example 3 FIG.
Next, a third embodiment of the present invention will be described. FIG. 21 shows a digital video signal encoding processing unit in the digital video recording / reproducing apparatus. The DCT block is hierarchized into a low frequency region and a high frequency region. Furthermore, it is a block diagram on the recording side in which the screen is divided into a plurality of areas and the central portion of the screen in the low frequency area is preferentially arranged at the head of the GOP. In FIG. 21, 12 is an area rearrangement circuit. In addition, the same code | symbol is attached | subjected to the same or equivalent part in a figure, and description is abbreviate | omitted.

  Next, the operation will be described. The input video data is, for example, data having an effective screen size of horizontal 704 pixels and vertical 480 pixels. This image data is subjected to high-efficiency encoding using motion compensation and DCT. Here, since the operation until the data is divided into hierarchies is the same as that of the first embodiment, the description thereof is omitted.

  As in the first embodiment, the division hierarchization may be divided not only in the frequency domain but also in quantization or spatial resolution. In the third embodiment, the area rearranger 12 divides important data further divided into hierarchies into areas of the screen as shown in the second embodiment, and preferentially places the center of the screen at the top of the GOP. Is to be placed. That is, the data is divided into important data and unimportant data, and further recorded on the disc for each priority order determined in advance on the screen area.

  In this way, the low frequency components of the I picture and the P picture are divided and the central portion of the screen is preferentially arranged. Therefore, only the central portion of the screen of these low frequency components is read and played during special playback. For example, the amount of data to be read during special playback is greatly reduced. As a result, there is a margin in the reading speed from the medium of the head, and it becomes possible to realize a very high-speed skip search from ten times to several tens of times.

  Here, by placing the center of the I-picture low-frequency screen at the top of the GOP and the data of the P-picture subsequent to the data of the I-picture low-frequency screen periphery, the tens of times to several tens of times. Double-speed high-speed reproduction can be realized by reproducing only the central portion of the I picture low-frequency region. Furthermore, since the data in the center portion of the low-frequency component of the I-picture and P-picture for special playback has a small amount of information, it can be easily read and decoded from the disk during high-speed playback. Playback is possible. That is, the amount of data in the central portion of the low-frequency component of the I picture and P picture is smaller than the data amount of the entire low-frequency component, so that special playback can be realized at a higher speed than in the first embodiment.

  Next, operations of the area rearranger 12 and the format encoder 11 will be described. FIG. 22 is a flowchart thereof. First, when encoding is started, the slice header of the I picture of the low-frequency component partition is detected to classify the low-frequency component areas, and each slice is classified into the three areas shown in FIG. This bit stream is created and the bit streams rearranged for each area are rearranged. That is, as in FIG. 13, the bit stream is arranged in the order of the low band I (2), the low band I (3), and the low band I (1) at the head of the GOP for the low band I picture. Sort by area.

  Next, in the case of the screen center priority mode, the picture header of the input bit stream is detected to detect picture information. Here, in the case of a low-frequency I picture, the low-frequency screen center portion I (2) and the low-frequency I (3) and low-frequency I (1) areas shown in FIG. And address information is created from the data length of each area detected as described above. On the other hand, in the case of P and B pictures, the data length is detected in units of pictures, and address information is created. When not in the screen center priority mode, the first embodiment is followed.

  Next, the hierarchized mode is determined, and when it is not the hierarchized mode, information indicating non-hierarchized is inserted into the system stream, and the conventional stream configuration is followed. In the hierarchical mode, check the sequence header setting. Specifically, the data of the sequence scalable extension is confirmed. If this is correctly described, the head of the picture is recognized by the picture header, the low frequency data of the I picture and P picture rearranged on the screen area is extracted, and the data length is detected. On the other hand, the data length of the B picture is detected for each picture.

  Furthermore, a packet is created in which only the address information when the lower screen center portion of the I picture and P picture is consolidated at the head of the GOP is recorded. This packet includes the screen center of the low frequency part of the I and P pictures, the screen peripheral part, the high frequency part of the I and P pictures, and the address information of the B picture, and the data length of each data is recorded. Has been. Therefore, the head position of each data stream is obtained as a relative address from the head of the GOP header by this data length.

  FIG. 23 shows the bit stream created in this way. As shown in (c) of FIG. 23, the low range of the I picture and the P picture rearranged in the area unit is arranged at the head of the GOP. Therefore, this is packetized and shown in the flowchart of FIG. (D) shows a stream when address information is arranged in two private packets. In this case, the address information may be expressed as a relative address from the top of the GOP header as described above, but it may be expressed as how many bytes of what number packet are at the top of each picture, etc. Needless to say, it may be expressed by a sector address on the disk.

  FIG. 24 shows an example in which address information is entered in a private 2 packet. When the PES packet is a private 2 packet, the stream ID is set, and the hierarchization mode, the hierarchization type, the type of image used during special playback, the number of start addresses, and the like are described. Here, the start address includes the start address at the center of the low frequency region of the I picture, the start address at the peripheral region of the low frequency region of the I picture, the start address of the low frequency region of the four P pictures, and the remaining This is the start address of the B picture.

  In addition, sector addresses on the front and rear GOP disks for jumping the optical head in special reproduction are added. In this case, in consideration of the special reproduction double speed number, if the sector addresses of the preceding and following GOPs are added in addition to the preceding and succeeding GOP addresses, variations of the special reproduction double speed can be expanded. In addition, although it has been shown that the address information is written in the private 2 packet of the PES packet, it is needless to say that the address information may be written in a private descriptor of the program stream map, another user area, or the like.

  The playback side of the third embodiment will be described with reference to FIG. FIG. 25 is a block diagram of the digital video signal decoding processing unit. In addition, the same code | symbol is attached | subjected to the same or equivalent part in a figure, and description is abbreviate | omitted.

  Next, the operation of FIG. 25 will be described with reference to FIG. FIG. 26 is a flowchart showing the operation of the format decoder during reproduction. The bit stream output from the ECC detects the header of the program stream and is separated for each PES packet. Further, the header of the PES packet is detected, and the private packet and the video packet including the address information are discriminated.

  In the case of a private packet, the address information included in the packet is extracted and stored. On the other hand, in the case of a video packet, a bit stream of video data is extracted. Furthermore, in the case of a private packet and normal playback or video packet, the data of the low frequency component and the high frequency component are extracted from the bit stream of the video data of the I picture and the P picture, and the data is rearranged. And output a playback image.

  On the other hand, in the case of a private packet and special playback, first, it is determined whether or not there is time to play back all the low frequency I pictures. Determine if there is time to play. The above two or one determination is performed, and when there is time to reproduce the low frequency I picture and P picture, the low frequency I picture and P picture are reproduced. If there is time to reproduce all the low-frequency I pictures, but there is no time to reproduce the low-frequency P pictures, only the low-frequency I pictures are reproduced. Further, when there is not enough time to reproduce all the low-frequency I pictures, the central portion of the I-picture low frequency area is reproduced. In any of the above three cases, after reproduction, the optical head is caused to jump to the head of the next GOP.

  If these addresses are described in the video stream, the address information is extracted and stored after being converted into a video stream. If it is described in the private descriptor of the program stream map, the program stream header is detected. At this level, address information is extracted and stored. Needless to say, the address information may be a relative address or an absolute address of the program.

  In practice, as shown in FIG. 25, mode signals such as skip search and normal continuous reproduction are input to the mode switch 26 from the microcomputer. On the other hand, the reproduction signal from the disk is amplified by an amplifier, and the signal is reproduced by a phase-synchronized clock output by the PLL, digitally demodulated, error correction processing is performed, and the program stream is restored. Furthermore, information of data following the header is obtained by a program stream header detector 21 that detects each header of the program stream.

  Further, the PES packet header detector 22 detects, for example, address information of each picture and special reproduction data (low-frequency data and data arranged for each area of the screen) written in the private two packets of the PES packet, This information is stored in the address memory 25. Here, it is determined whether it is a PES packet for audio, a PES packet such as a character, and a PES packet for video, and only the video packet is output to the video bitstream generator 23. The video bitstream generator deletes the header division of the PES packet and outputs a video bitstream. Thereafter, according to the address information obtained from the address memory 25, in the case of normal reproduction, the data rearranger 24 rearranges and outputs the bit stream output from the mode switch 26.

  The output (control signal) of the mode switch 26 is supplied to the data rearranger 24 and the decodable determiner 34. Here, the data rearranger 24 synthesizes and outputs a low-frequency component and a high-frequency component which are hierarchized and rearranged for each area in the case of normal reproduction, according to the control signal. On the other hand, at the time of special reproduction, only the low frequency component or only the low frequency component at the center of the screen is output to the variable length decoder (VLD) 27. In other words, during normal playback, the low frequency components of the I and P pictures are rearranged in the order of the screen area and combined with the high frequency components so that they are rearranged in the original picture order. The area at the center of the screen or the area at the center of the screen of the low-frequency component of the I picture and P picture is switched and output. Note that the time stamp of PTS or DTS is not used during special reproduction using only the low frequency component.

  On the other hand, the variable length decoder (VLD) 27 extracts the break of the event in the low frequency component region indicated by the priority breakpoint of the slice header together with the decodable determiner 34, and decodes up to the break and switches it. To 28. The switch 34 is connected so as not to insert 0 during normal reproduction, but is controlled by the decodable determiner 34 so that 0 is inserted into a high frequency component after the priority break point during special reproduction.

  The operation concept relating to the low-frequency decoding is the same as in FIG. Further, the rearrangement on the screen area at this time is the same as that described in the second embodiment, and thus the description thereof is omitted.

  In the above embodiment, the coding region is performed at the break of the event, but it goes without saying that other methods may be used. For example, the data may be divided at intervals of a fixed number of events, or data may be divided by data obtained by coarse quantization by the quantizer 4 and a difference value between fine quantization and coarse quantization. Further, the image may be divided by encoding an image obtained by thinning the spatial resolution by half in the buffer memory, and an image obtained by restoring the half-resolution image to the original image and a difference image. That is, it goes without saying that the high-efficiency encoded data of an image may be divided not only by division in the frequency domain but also by quantization or division of spatial resolution.

  At this time, more important data as an image is data in a low frequency region if it is frequency division, and data that is encoded by coarse quantization if it is division by quantization, and is divided by spatial resolution. If it is data, it is data obtained by coding the thinned image. In this case, an area in which a reproduced image decoded using only these data is easily perceived by humans is regarded as important data. That is, one high-efficiency encoded data may be divided into more basic and important data and less important data, and only basic and important data may be reproduced during special reproduction during reproduction from the disc.

  In the third embodiment, the recording side and the reproducing side are associated with each other. However, there may be a case where recording / reproduction is paired like a hard disk. In addition, there may be a case where only the playback side assumes that the recording is performed according to the assumption as in the case of the current compact disc. Furthermore, it goes without saying that there are screen output methods as shown in FIGS. 18 and 19 of the second embodiment for the components rearranged for each screen area unit. Needless to say, rearrangement in units of screen areas can also be realized by the prediction data decoding circuit 25 and the frame memory 33 by using slice vertical position data in the slice header. In this embodiment, only the basic data of the I picture is divided by the screen area, but it goes without saying that it may be divided by, for example, the low frequency region of the P picture or other areas.

FIG. 3 is a block diagram of a digital video signal encoding processing unit according to the first embodiment. The figure showing the concept of the frequency division | segmentation of Example 1, 3. FIG. 2 is a block diagram of digital video signal encoding processing according to Embodiment 1. FIG. FIG. 3 is an explanatory diagram of a video stream header according to the first embodiment. The figure which showed the rearrangement of the bit stream of Example 1. FIG. 4 is an example of system stream address information according to the first embodiment. FIG. 3 is a block diagram of a digital video signal decoding processing unit according to the first embodiment. FIG. 3 is a diagram illustrating a concept of decoding processing according to the first embodiment. 3 is a flowchart of decoding processing according to the first embodiment. FIG. 6 is a block diagram of a digital video signal encoding processing unit according to the second embodiment. FIG. 6 is a block diagram of a digital video signal decoding processing unit according to the second embodiment. An example of the area of the screen of Example 2. FIG. An example of the bit stream at the time of rearranging per screen area of Example 2. FIG. 10 is a flowchart of digital video signal encoding processing according to the second embodiment. FIG. 10 illustrates an example of system stream address information according to the second embodiment. FIG. An example of the system stream of Example 2. FIG. The example which output the screen to the place which can be reproduced at the time of reproduction | regeneration in an example of the reproduction | regeneration screen of Example 2. FIG. The example which output only the center part of the screen at the time of reproduction | regeneration in an example of the reproduction | regeneration screen of Example 2. FIG. The example which expanded and displayed the area | region of the screen center part at the time of reproduction | regeneration in an example of the reproduction | regeneration screen of Example 2. FIG. 9 is a flowchart of digital video signal decoding processing according to the second embodiment. FIG. 10 is a block diagram of digital video signal encoding processing according to the third embodiment. 10 is a flowchart of digital video signal encoding processing according to the third embodiment. An example of the system stream of Example 3. FIG. FIG. 10 is an example of system stream address information according to the third embodiment. FIG. FIG. 10 is a processing block diagram of digital video signal decoding processing according to the third embodiment. 10 is a flowchart of digital video signal decoding processing according to the third embodiment. The block diagram of the conventional optical disk recording / reproducing apparatus. A data arrangement structure of a conventional MPEG video encoding algorithm. An example of the GOP structure of a conventional MPEG video encoding algorithm. The block diagram of the conventional MPEG video signal encoding process part. An example of a conventional MPEG video bitstream. The block diagram of the conventional motion compensation prediction circuit. An example of a conventional MPEG PS system stream. An example of the stream of the conventional MPEG PES packet. The block diagram of the conventional MPEG video signal decoding process part.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Buffer memory, 2 Subtractor, 3 DCT calculator, 4 Quantizer, 5 VLC, 6 Inverse quantizer, 7 Inverse DCT calculator, 8 Adder, 9 Motion compensation prediction circuit, 10 Event and code amount counter 11 format encoder, 12 area rearranger, 15 input terminal, 21 program stream header detection, 22 PES packet header detection, 23 video bitstream generator, 24 data rearranger, 25 address memory, 26 mode switcher, 27 VLD, 28 switch, 29 inverse quantizer, 30 inverse DCT arithmetic unit, 31 adder, 32 prediction data decoding circuit, 33 frame memory, 34 decodable determiner, 35 area rearranger.

Claims (4)

The video information written on the optical disc by performing high-efficiency encoding of a digital video signal using motion compensated prediction and DCT includes an I picture that is an intra-screen encoded image, a P picture that is a unidirectional predictive encoded image, and bidirectional A B picture that is a predictively encoded image, including these pictures as one video information block, a video packet configured based on the video information block, and a private packet having a stream ID of the private stream 2 An optical disc recording method for arranging and recording a system stream including: address information corresponding to a sector for at least an I picture and a P picture of the video information block , wherein the I picture and the P picture the end of the address information, on the Symbol private packet And recording the private packet in which the address information is recorded before the video information block. The video information written on the optical disc by performing high-efficiency encoding of a digital video signal using motion compensated prediction and DCT includes an I picture that is an intra-screen encoded image, a P picture that is a unidirectional predictive encoded image, and bidirectional A B picture that is a predictively encoded image, including these pictures as one video information block, a video packet configured based on the video information block, and a private packet having a stream ID of the private stream 2 An optical disc on which a system stream including
Address information corresponding to sectors for at least an I picture and a P picture of the video information block, the address information at the end of the I picture and the P picture is recorded in the private packet, and the address information is recorded. An optical disk, wherein the private packet is arranged before the video information block. A method for reproducing an optical disc according to claim 2,
Address information corresponding to a sector of at least an I picture of the video information block recorded in the private packet is reproduced, and the video information block is read from a position on the optical disk based on the reproduced address information. Optical disc playback method. An apparatus for reproducing the optical disk according to claim 2,
Means for outputting a system stream recorded on the optical disc;
Means for reproducing address information corresponding to a sector of at least an I picture of a video information block recorded in a private packet included in the system stream; and the video information from a position on the optical disk based on the reproduced address information. An optical disk reproducing apparatus comprising: means for reading out blocks;

Images