JP3370468B2 - Optical disk recording method, optical disk reproducing method and reproducing apparatus, and optical disk - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an optical disc recording method,
The present invention relates to an optical disc reproducing method, a reproducing device, and an optical disc .

[0002]

2. Description of the Related Art FIG. 27 is a block circuit diagram of a conventional optical disk recording / reproducing apparatus disclosed in Japanese Patent Application Laid-Open No. 4-114369. 701 is an A / A for converting a video signal, an audio signal, etc. into digital information. D converter, 702
Is an information compression circuit, 703 is a frame sector conversion circuit for converting the compression information into sector information equal to an integral multiple of the frame period, 704 is an error correction coding circuit for adding an error correction signal to the sector information, and 705 is a recording medium. A modulator for converting into a predetermined modulation code in order to reduce the inter-code interference of the above, a laser drive circuit 706 for modulating the laser light according to the above modulation code, and a laser output switch 707.

Reference numeral 708 denotes an optical head for emitting the laser light, 709 denotes an actuator for tracking the light beam emitted from the optical head 708, and 7
10 is a traverse motor for sending the optical head 708,
711 is a disk motor for rotating the optical disk 712, 719 is a motor drive circuit, 720 is a first motor control circuit, and 721 is a second motor control circuit. Further, 713 is a reproduction amplifier for amplifying the reproduction signal from the optical head 708, 714 is a demodulator for obtaining data from the recorded modulation signal, 715 is an error correction decoding circuit,
Reference numeral 716 is a frame sector inverse conversion means, 717 is an information expansion circuit for expanding the compressed information, and 718 is a D / A converter for converting the expanded information into, for example, an analog video signal or an audio signal.

Next, the operation will be described. MPEG is one of the high-efficiency encoding methods for encoding video signals.
There is a coding algorithm according to the method. This is a hybrid coding method that combines inter-picture predictive coding using motion-compensated prediction and intra-picture transform coding. here,
The information compression circuit 702 of this conventional example has a configuration as shown in FIG. 30 and employs the MPEG encoding system.

FIG. 28 is a simplified representation of the MPEG data array structure (layer structure). In the figure, 821 is a group composed of a plurality of frame information.
A sequence layer composed of of Pictures (hereinafter referred to as “GOP”), 822 a GOP layer composed of several pictures (screens), 823 a slice obtained by dividing one screen into several blocks, and 824 several macros. A slice layer composed of blocks, 825 is a macroblock layer, and 826 is a block layer composed of 8 pixels × 8 pixels.

The macroblock layer 825 is, for example, M
In the PEG method, the minimum unit of encoding is a block composed of 8 × 8 pixels, and this block is a unit for performing discrete cosine transform (hereinafter referred to as “DCT”). At this time, four adjacent Y signal blocks, one Cb block positionally corresponding to these Y signal blocks, and one Cr block, totaling six blocks, are called macroblocks. A slice is formed by collecting a plurality of these macroblocks.
A macroblock is the minimum unit of motion compensation prediction, and a motion vector for motion compensation prediction is performed in macroblock units.

Next, the process of inter-picture predictive coding will be described. FIG. 29 shows an outline of the inter-picture predictive coding. Each image is classified into three types: an intra-coded image (hereinafter referred to as I picture), a unidirectional predictive coded image (hereinafter referred to as P picture), and a bidirectional predictive coded image (hereinafter referred to as B picture). .

For example, when one image per N sheets is an I picture and one image among M sheets is a P picture or an I picture, n and m are integers and 1≤m≤N / M, and ( N
The (× n + M) th image is an I picture, and (N × n + M ×)
The (m) -th image (m ≠ 1) is a P picture, (N × n + M)
The (m × n + 1) th to (N × n + M × m + M−1) th images are B pictures. At this time, the (N × n + 1) th image to the (N × n + N) th image are collectively referred to as a GOP (Group of Pictures).

FIG. 29 shows the case where N = 15 and M = 3. In the figure, the I picture does not perform inter-picture prediction, but only intra-picture transform coding. The P picture is predicted from the immediately preceding I picture or P picture. For example,
In the figure, the 6th image is a P picture, but this is the 3rd I
Predict from a picture. The 9th P picture in the figure is predicted from the 6th P picture. The B picture is predicted from the immediately preceding and immediately following I or P pictures. For example, in the figure, the 4th and 5th B pictures are predicted from both the 3rd I picture and the 6th P picture. Therefore, the fourth and fifth images are encoded after the sixth image is encoded.

Next, the operation of the information compression circuit 702 will be described with reference to FIG. In the memory circuit 901,
The input digital video signal is rearranged in the encoding order and output. That is, as described above, in FIG. 29, for example, the 1st B picture is encoded after the 3rd I picture, so that the images are rearranged here. FIG. 31 shows this rearrangement operation. Figure 31
The image sequence input as shown in FIG.
It is output in the order of (b).

The video signal 921 output from the memory circuit 901 has a difference between the image and the predicted image 923 output from the motion compensation prediction circuit 910 in the subtractor 902 in order to reduce redundancy in the time axis direction. After being taken, DCT is performed in the spatial axis direction. The converted coefficient is quantized, variable-length coded, and then output via the transmission buffer 906. On the other hand, the quantized transform coefficient is dequantized, subjected to IDCT, and then added to the predicted image 923 by the adder 909 to obtain a decoded image 922. The decoded image 922 is input to the motion compensation prediction circuit 910 for encoding the next image.

Next, the operation of the motion compensation prediction circuit 910 will be described.
It will be described with reference to FIG. The motion compensation prediction circuit 910
Frame memory 1204a and frame memory 1204b
The two reference images stored in the memory circuit 90 are used.
1 performs motion-compensated prediction of the video signal 921 output from No. 1 and outputs a predicted image 923.

First, when the image 922 encoded and decoded as described above is an I picture or a P picture,
This image 922 is stored in the frame memory 1204a or 1204b for encoding the next image. At this time, the switch 1203 is switched so as to select one of the frame memory 1204a and the frame memory 1204b that has been updated earlier in time. However, if the decoded image 922 is a B picture, writing to the frame memories 1204a and 1204b is not performed.

By such switching, for example, FIG.
When the 1st and 2nd B pictures of 1 are encoded,
Frame memory 1204a and frame memory 1204b
The P-picture No. 0 and the I-picture No. 3 are stored in each of the frames, and when the P-picture No. 6 is encoded and decoded after that, the frame memory 1204a rewrites the decoded picture of the No. 6 P-picture. To be

Therefore, when the next 4th and 5th B pictures are coded, the 6th P picture and the 3rd I picture are stored in the frame memory, respectively. Further, when the 9th P picture is encoded and decoded, the frame memory 1204b is rewritten with the decoded image of the 9th P picture. Thus, when the 7th and 8th B pictures are encoded, the 6th P picture and the 9th P picture are stored in the frame memory, respectively.

When the video signal 921 output from the memory circuit 901 is input to the motion compensation prediction circuit 910, 2
Two motion vector detection circuits 1205a and 1205b,
Based on the reference images stored in the frame memories 1204a and 1204b, respectively, a motion vector is detected and a motion compensation predicted image is output. That is, the video signal 921 is divided into a plurality of blocks, a block having the smallest prediction distortion in the reference image is selected for each block, the relative position of the block is output as a motion vector, and Is output as a motion compensation prediction image.

On the other hand, the prediction mode selector 1206 selects the one having the smallest prediction distortion from the two motion-compensated prediction images output from the motion vector detection circuits 1205a and 1205b and the average image thereof, and the prediction image is selected. Output as. At this time, if the video signal 921 is not a B picture, the motion compensation prediction image corresponding to the reference image input earlier in terms of time is always selected and output. In addition, the prediction mode selector 1206 selects one of the intra-picture coding that does not perform prediction and the inter-picture predictive coding that uses the selected predicted image, whichever has better coding efficiency.

At this time, if the video signal 921 is an I picture, the intra-picture coding is always selected. When intra-picture coding is selected, a signal indicating the intra-picture coding mode is output as the prediction mode, and when inter-picture predictive coding is selected, the signal indicating the selected prediction picture is selected as the prediction mode. Is output. The switch 1207 outputs a 0 signal if the prediction mode output from the prediction mode selector 1206 is an intra-picture coding mode, and otherwise outputs a prediction image output from the prediction mode selector 1206. To do.

From the above, when the video signal 921 output from the memory circuit 901 is an I picture, the motion compensation prediction circuit 910 always outputs a 0 signal as the predicted image 923, so that the I picture performs inter-picture prediction. Instead, the image is intra-coded and encoded. When the video signal 921 output from the memory circuit 901 is, for example, the sixth P picture in FIG. 29, the motion compensation prediction circuit 910 performs the motion compensation prediction from the third I picture in FIG. Image 923
Is output. Further, when the video signal 921 output from the memory circuit 901 is, for example, the 4th B picture in FIG. 29, the motion compensation prediction circuit 910 moves from the 3rd I picture and the 6th P picture in FIG. Compensation prediction is performed and a prediction image 923 is output.

Next, the operation of the transmission buffer 906 will be described. In the transmission buffer 906, the variable length coding circuit 9
Video data that has been variable-length coded according to 05
Convert to a video signal bitstream. here,
The MPEG stream has a layered structure of 6 layers as shown in FIG. 28. The sequence layer 821, the GOP layer 822, the picture layer 823, the slice layer 824, the macroblock layer 825, and the block layer 826 are each identified by an identification code. It is configured by adding certain header information.

Further, the transmission buffer 906 decomposes the bit stream of the video signal and the bit stream of the audio signal into a plurality of packets, respectively, and multiplexes the packets including a synchronization signal to multiplex the MPEG2-PS (program stream) system. It composes a stream.
Here, the MPEG2-PS is composed of a pack layer and a packet layer as shown in FIG. 33, and header information is added to the packet layer and the pack layer, respectively.
In this conventional example, video data 1G is stored in each pack shown in FIG.
The system stream is configured to include OP data.

Here, the pack layer is constructed by bundling the packet layers above the packet layer, and each packet layer forming the pack layer is called a PES packet. Also, FIG.
The pack layer header information shown in 3 includes a pack identification signal,
It includes sync signals, which are the basis of video and audio signals.

On the other hand, there are three types of PES packets in the packet forming the packet layer, as shown in FIG.
Here, the packet at the second stage in FIG. 34 is a video / audio private 1 packet, and the time stamp information (decoded before each packet is used as a code and header information for identifying the beginning of the packet, which is necessary when decoding each packet ( PTS and DTS) are added. However, the time stamp information PTS is time management information for reproduction output, and is information for managing the decoding order of the data stream of each packet during reproduction. DTS is time management information for starting decoding, which is information for managing the order of sending decoded data.

The third packet in FIG. 34 is a private 2 packet for writing user data. The padding packet in the lowermost packet in FIG. 34 is a packet in which all packet data is masked by "1". The header information of the private 2 packet and the padding packet is composed of the packet start code and the packet length.

As described above, the transmission buffer 906 converts the video and audio data into an MPEG2-PS system stream, and converts each frame sector. This information is recorded on the optical disc 712 after being subjected to error correction processing and at the same time being subjected to modulation for reducing the influence of intersymbol interference of the disc. At this time, for example, the amount of data in each GOP unit is set to be almost the same,
Further, it is apparent that editing or the like can be performed in GOP units by allocating to sectors equal to an integral multiple of the frame period.

Next, the operation during reproduction will be described. At the time of reproduction, the video information recorded on the optical disk 712 is amplified by the reproduction amplifier 713, restored to digital data by the demodulator 714 and the decoder 715, and then data such as address and parity is converted by the frame sector inverse conversion circuit 716. It is restored as pure video original data that has been removed,
It is input to the information expansion circuit 717. Here, FIG. 35 is a diagram showing the configuration of the information expansion circuit 717. In FIG. 35, a system stream composed of MPEG2-PS is input to the reception buffer 1001.

The receiving buffer 1001 decomposes the input system stream into packs. Subsequently, each PES packet is decomposed according to the header information, and P
Reconstruct a bitstream of video and audio data that is divided in ES packet units. further,
Regarding video data, the stream is decomposed up to the block layer shown in FIG. 28, and the block data and the motion vector data are separated and output.

The block data output from the reception buffer 1001 is input to the variable length decoding circuit 1002, and the variable length data is dequantized into fixed length data, subjected to IDCT, and then added to the adder 1006. Is output.
On the other hand, the prediction data decoding circuit 1005 decodes the prediction image according to the motion vector output from the reception buffer 1001 and outputs it to the adder 1006.

In this case, the prediction data decoding circuit 1005 is provided with a frame memory for storing the I picture and P picture data decoded by the adder 1006, like the motion compensation prediction circuit 910. At the time of P picture and B picture, , The predicted image is reproduced from the target I picture and P picture according to the input motion vector, and is output to the adder 1006. Note that the method of updating the reference image data at the time of the I picture and P picture is the same as that at the time of encoding, and therefore description thereof will be omitted.

In the adder 1006, the prediction data decoding circuit 1
The output of 005 and the output of the IDCT circuit 1004 are added,
It is output to the memory circuit 1007. Here, at the time of encoding, the time-sequential video signals are rearranged according to the encoding order as shown in FIG. Therefore, in the memory circuit 1007, FIG.
The data input in the order shown in FIG. 31 are rearranged in the order shown in FIG.
Output to 0.

Next, image retrieval and high-speed reproduction when data having such an encoding structure is recorded on a disc will be shown. With the encoding structure as shown in FIG. 29, high-speed reproduction is possible by reproducing in I picture units. In this case, a track jump is performed immediately after playing the I picture to access the next or previous GOP, where
Play the picture. By repeating such operations, in the case of FIG. 29, high speed feed reproduction and return reproduction can be realized.

However, since the rate of this GOP is a variable bit rate, it cannot be recognized at all where the beginning of the next GOP is actually located. Therefore, the optical head is appropriately jumped to find the head of the GOP, and it is not possible to determine which track should be accessed.

The I picture has a very large amount of data, and when only the I picture is continuously reproduced as in special reproduction, the reading speed from the disk is limited. Can not be played with. Even if the reproduction of the I picture is completed and the optical head is jumped, the interval for updating to the next I picture becomes large after the reproduction of the I picture and the smoothness of the movement is lacking.

[0034]

Since the conventional digital video signal recording / reproducing apparatus and reproducing apparatus are encoded as described above, data is skipped during skip search (seeing in fast forward) like a video tape recorder. In order to decode only a large amount of I-pictures, the optical head is jumped without reproducing enough data for decoding, or if sufficient data is reproduced, the same double speed number is used because the data reproducing time is long. If you want to get it, you have to set the GOP's destination far away, which is why
There is a problem that the number of frames output to the screen is reduced.

Further, since the sector address of the next GOP cannot be recognized due to the variable rate, there is no guarantee that the jumped track has the head of the GOP. For this reason, there is also a problem that the number of frames output to the screen is further reduced during special reproduction by waiting for a plurality of disk rotations at the jump destination. Even if the sector address is recognizable, the system layer has no means for knowing how much data can be played to jump the optical head. There was also the problem of reducing the efficiency of jumping the head.

The present invention has been made in view of the above problems, and it is a good skip in a digital video signal recording / reproducing apparatus or a digital video signal reproducing apparatus coded by using motion compensation prediction and orthogonal transformation. It is an object of the present invention to obtain a digital video signal recording / reproducing apparatus or a digital video signal reproducing apparatus capable of realizing the search and obtaining the improvement of the accessibility of the GOP on the assumption that the variable bit rate encoding is adopted.

[0037]

DISCLOSURE OF THE INVENTION Optical disk recording of the present invention
The method uses motion compensated prediction and DCT to digitally image.
An image that is highly efficiently encoded and written on an optical disc.
Image information is an I-picture that is an intra-coded image and one of
P-picture, which is a directional prediction coded image, and bidirectional prediction code
And a B picture that is a digitized image.
One video information block including the video
Video packets constructed based on
Private with stream ID of private stream 2
Place a system stream containing
An optical disc recording method for recording, comprising:
Corresponds to at least I-picture sector of lock
Address information to be recorded in the private packet above
The private password on which the address information is recorded is
The packet is placed before the video information block.

Further , the optical disc of the present invention is a motion compensation predictor.
Sampling and DCT for high-efficiency coding of digital video signals
The video information written on the optical disc after being converted into
I-pictures, which are encoded images, and unidirectional predictive-encoded images.
A P-picture and a B-picture that is a bidirectional prediction coded image
It contains a picture and a picture.
Video information block, and based on that video information block
Configured video packets and private stream
Private packet with stream 2 stream ID
Is an optical disc on which the system stream containing
At least I pictures in the video information block.
Address information corresponding to the
The above address information was recorded in the packet
The private packet is the video information block.
It will be placed in front of.

Further , the optical disc reproducing method of the present invention is
A method for reproducing the optical disc described above,
At least the video information block recorded in the
Address information corresponding to the sector for the I picture
Is reproduced, and the optical disc based on the reproduced address information is reproduced.
The video information block is read from the position on the disk.

The optical disc reproducing method of the present invention is
A device for reproducing the optical disc described above,
Means for outputting the system stream recorded in
Private packet included in the above system stream
At least I pictures of the video information blocks recorded in the
The address information corresponding to the sector of the
Means and the optical data based on the reproduced address information.
Hand to read the above video information block from the position on the disk
With steps .

[0041]

EXAMPLES Example 1. Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a digital video signal encoding processing unit in a digital video recording / reproducing apparatus. The DCT block is divided into a hierarchy of a low frequency region and a high frequency region, and only the low frequency region is arranged at the head of the GOP on the recording side. It is a block diagram. In the figure, 1 is a buffer memory, 2 is a subtractor,
3 is a DCT calculator, 4 is a quantizer (Q), 5 is a variable length coder (VLC), 6 is an inverse quantizer (IQ), and 7 is an inverse D.
A CT calculator (IDCT), 8 is an adder, 9 is a motion compensation prediction circuit, 10 is an event number and code amount counter, 11 is a format encoder, and 15 is an input terminal.

Next, the operation will be described. The input video data is, for example, an interlaced image having an effective screen size of 704 horizontal pixels and 480 vertical pixels. Here, the operations of the subtractor 2, the DCT calculator 3, the quantizer 4, the variable length encoder 5, the inverse quantizer 6, the inverse DCT calculator 7, the adder 8 and the motion compensation prediction circuit 9 are the conventional examples. The description is omitted because it is the same as that shown in.

The operation of the variable length encoder 5 will be described with reference to FIG. Figure 2 shows the DCT inside the DCT block.
The data arrangement of coefficients is shown. Figure 2
The low frequency component is in the upper left part, and the high frequency component is D in the lower right part.
Data of CT coefficient is arranged. Of the DCT coefficient data arranged in this DCT block, the DC in the low-frequency region up to a specific position (event break)
The data of the T coefficient (for example, the shaded area in FIG. 5) is variable length coded as the low frequency region and output to the format encoder 11. Variable length coding is applied to the DCT coefficient data after the DCT coefficient data at the specific position. That is, the data is partitioned and encoded in the spatial frequency domain.

The break between the low frequency region and the high frequency region is called a braking point. The braking point is
The event number and code amount counter 10 sets the code amount in the low frequency region to a predetermined code amount that can be accessed by the optical head during special reproduction. The variable-length encoder 5 determines the DCT according to the braking point.
The coefficient is divided into the low frequency band and the high frequency band and output to the format encoder.

Although the coding area is determined at the event break, it goes without saying that another method may be used. For example, a fixed number of event breaks may be used,
The data may be divided by the quantized data coarsely quantized by the quantizer 4 and the difference value between the fine quantized and the coarse quantized. Alternatively, the image may be divided by encoding an image of which the spatial resolution is thinned by half in the buffer memory, and an image of a half of that resolution is restored and an image of the difference between the image of the original resolution. That is, it goes without saying that the high-efficiency coded data of an image may be divided not only by dividing the frequency domain but also by dividing quantization or spatial resolution.

At this time, the more important data as an image is the data in the low frequency region in the case of frequency division, and the data which has been subjected to the rough quantization in the case of division by quantization and has the spatial resolution. If the data is divided by, it is the data obtained by encoding the thinned image, and by decoding only these important data, a decoded image that is easily perceived by humans can be obtained. In this way, one piece of high-efficiency coded data is divided into more basic and important data and other data (this is called layering), an error correction code is added, modulation is performed, and the data is recorded on the disk. .

Since the low-frequency components of the I picture and P picture are divided in this way, if only these low-frequency components are read and reproduced during special reproduction, the amount of data read during special reproduction is greatly reduced. As a result, the data read time from the medium of the header is shortened, and high-speed reproduction of smooth motion can be realized during skip search. Also, I
By arranging only the picture and the P picture in succession, it becomes possible to easily read and decode only the data of the low frequency components of the I picture and the P picture from the disc during the special reproduction. In this case, it is possible to efficiently configure the data by extracting and arranging only the low frequency component rather than arranging the entire areas of the I picture and P picture at the head of the GOP.

Next, the operation of the format encoder 11 will be described. FIG. 3 is a flowchart showing the operation of the format encoder. First, when encoding is started, it is determined whether the encoding mode is the layered mode, and if it is not the layered mode, the information indicating non-layered is inserted in the system stream,
The conventional stream structure is followed. In case of hierarchical mode, confirm the setting of the sequence header. Specifically, the data of the sequence scalable extension is confirmed. If this is correctly described, the beginning of the picture is recognized by the picture header and the I picture and 4
The P picture of one sheet is separated into the data of the low frequency component and the data of the high frequency component, and the respective data lengths are detected.

On the other hand, the data length of the B picture data is detected for each picture. Furthermore, a packet is created in which only the address information when the low-frequency component data of the I picture and P picture is continued at the beginning of the GOP is recorded. In this packet, I picture, low frequency component of P picture, I picture
Picture, high frequency component of 4 P pictures and 10 B
The picture address information is included, and the data length of each data is recorded.

Therefore, the head position of each data stream is obtained as a relative address from the head of the GOP header by this data length. The packet including the address information, the low frequency components of the I picture and the four P pictures, and the remaining data are arranged in order and formatted.

Among these, the confirmation of the scalable mode on the scalable extension of the sequence header includes the confirmation of the scalable mode setting determined by the syntax of MPEG2 in FIG. 4 and the confirmation of the description of the priority break point on the slice header. Is. The priority break point is at a predetermined number of events in the figure (corresponding to the above-mentioned braking point), and is data representing the position of a break between the divided low frequency component and high frequency component.

When the scalable mode is 00, it indicates that the following bit stream is a data partitioning bit stream, and that a bit stream decomposed into low frequency components and high frequency components continues. If all B pictures are made to have low frequency components and high frequency components are not generated, the B pictures can be non-segmented.

FIG. 5 shows an example of the bit stream generated in this way. FIG. 5A shows a bitstream in the case where no hierarchization is performed. When this is hierarchized by the circuit block shown in FIG. 1, it is divided into hierarchies as shown in (a). When this data is arranged in consideration of special reproduction, the low frequencies of the I picture and the P picture are arranged at the head of the GOP as shown in (c).

The data arrangement when these are packetized and the address information is put in the private packet as shown in the flowchart of FIG. 3 is shown in (d). In this case, the address information may be expressed as a relative address from the beginning of the GOP header as described above, but may also be expressed as what byte of which packet is at the beginning of each picture, Needless to say, it may be expressed by a sector address on the disk.

FIG. 6 shows an example of including address information in a private packet. When making a packetized elementary stream (hereinafter referred to as PES) packet a private packet, set the stream ID to BF (hexadecimal notation), mark the packet length, and then write all start codes (packet start code and bit stream). (Start code, etc.), set 1 in the MSB of the byte and 0 in the next bit so that the remaining 6
Describe the layering mode, layering type, image type used during special playback, number of start addresses, etc. in bits.

After that, 21-bit address information is described so that the GOP data amount can be expressed up to the maximum length of 2 M bytes. However, as mentioned above, the beginning 24 of the start code
Insert 100 (binary display) into the first 3 bits of 21 bits so that the same data as bit 000001 (hexadecimal display) is not obtained. Here, the start address is the low-frequency component start address of the I picture, the low-frequency component start address of the four P pictures, and the high-frequency component of the I picture.
It is a high frequency component of four P pictures and a start address of ten B pictures. Further, the sector addresses on the disk on which the preceding and following GOP data are recorded for jumping the optical head in special reproduction are added.

If a 1-bit parity is added to a 21-bit address, the reliability of data will be improved. In this case, 10 (binary display) may be added to the head of 21 bits + 1 bit. In addition to the addresses of the front and rear GOPs in consideration of the double speed number of special reproduction, by additionally adding the sector addresses of several GOPs before and after, the variation of the double speed number of special reproduction is widened. Although the address information is described in the private 2 packet of the PES packet, it goes without saying that it may be recorded in another user area such as a private descriptor of the program stream map.

The reproducing side of the first embodiment will be described with reference to FIGS. 7 and 8. 7 is a block diagram of a digital video signal decoding processing unit. In FIG. 7, 21 is a program stream header detector, 22 is a PES packet header detector, 23 is a video bit stream generator, 24 is a data rearranger, and 25 is Address memory, 26 is a mode switcher, 27 is a variable length decoder (VLD), 28 is a switch, 29 is an inverse quantizer, 30 is an inverse DCT calculator, 31 is an adder, and 32 is a prediction data decoding circuit. , 33 are frame memories, and 34 is a decodable discriminator. FIG. 8 is a diagram showing the operation concept of FIG.

Next, the operation of FIG. 7 will be described with reference to FIG. FIG. 9 is a flowchart showing the operation of the format decoder during reproduction. The bit stream output from the ECC detects the header of the program stream and is separated for each PES packet. Furthermore, P
The header of the ES packet is detected, and the private packet including the address information and the video packet are discriminated.

In the case of a private packet, the address information contained in the packet is extracted and stored. On the other hand, in the case of a video packet, a bit stream of video data is extracted. Here, in the case of normal reproduction, in the case of I pictures and P pictures, data of low frequency components and high frequency components are extracted from the bit stream of video data, the data are rearranged, and reproduced images are output. On the other hand, during special reproduction, only the low frequency component of the video data is extracted and reproduced. Here, after reproducing the low frequency component, the optical head is made to jump to the head of the next GOP.

In this case, when these addresses are described in the video stream, the address information is extracted and stored after being converted into the video stream, and when described in the private descriptor of the program stream map, Address information is extracted and stored at the level of stream header detection. In addition,
It goes without saying that the address information may be a relative address or an absolute address of the program.

Actually, in FIG. 7, a mode signal for skip search, normal continuous reproduction, etc. is inputted to the mode switch 26 from a microcomputer or the like. On the other hand, a reproduction signal from a disk or the like is amplified by an amplifier, and signal reproduction is performed by a phase-locked clock output from a PLL or the like. Next, a program stream header detector 21 for detecting each header of the program stream after performing a discrimination operation to perform digital demodulation and error correction processing is performed.
To obtain the information of the data following the header.

Further, the PES packet header detector 22
Thus, for example, the address information of each picture and the address information of the special reproduction data written in the private 2 packet of the PES packet are detected and stored in the address memory 25. Here, the PES packet for audio, the PES packet such as characters, and the PES packet for video are distinguished, and only the packet for video is output to the video bitstream generator 23.

Here, the video bitstream generator deletes the added information from the PES packet and converts it into a video stream. Specifically, data such as various control codes and time stamps are excluded. After that, according to the address information obtained from the address memory 25,
When the output of the mode switch 26 is normal reproduction, the data rearranger 24 rearranges the bit stream.

Output of mode switch 26 (control signal)
Is a data rearranger 24 and a decodable discriminator 3
4 is supplied. The data rearranger 24 reconstructs the data before division from the low-frequency component and the high-frequency component which are divided into hierarchical layers by obtaining a control signal, or only the low-frequency component is variable length decoder (VLD) 27. Output to. That is, at the time of normal reproduction, each low-frequency component is combined with the high-frequency component and rearranged in the original picture order, and at the time of special reproduction, the low-frequency component of only I picture or the low-frequency component of I picture and P picture is changed depending on the double speed. Output the range component.

Note that the time stamp is not used during special reproduction in which only the low frequency component is passed. On the contrary,
The variable length decoder (VLD) 27 is a decodable decision unit 34.
At the same time, the break of the event in the low-frequency component area indicated by the priority break point of the slice header is extracted, and the break is decoded and output to the switch 28. The switch 28 is connected so that 0 is not inserted during normal reproduction, but is controlled by the decodable decision unit 34 so that 0 is inserted into the high frequency component after the priority break point during special reproduction.

The above operation will be described with reference to FIG. In FIG. 8, when the partitioning braking points are E1 to E3, the low-frequency component stream is from E3, and the high-frequency component stream is from E4 to EOB.
Are stored. E3 for the low-frequency component stream
Subsequent to, the low frequency component data of the next DCT block is stored.

Here, at the time of normal reproduction, the data rearranger 24 extracts the data of E1 to E3 from the stream of the low frequency component and the data of E4 to EOB from the stream of the high frequency component, respectively, and the data of the next block. Are extracted and DCT blocks are sequentially reconstructed. On the other hand, during special reproduction, the data rearranger 24 moves from E1 to E.
After extracting data up to 3 and performing variable length decoding by the VLD 27, the decodable decision unit 34 detects a priority break point, and the switch 28 inserts zero in the shaded portion of FIG. Construct a DCT block using only the components.

The data converted into the DCT block is decoded according to the motion vector. Here, since the decoding by the motion vector is the same as the conventional example, the description is omitted. However, the reference used when decoding the P picture during special reproduction is decoded using the I or P picture decoded only with the low frequency component.

The data decoded in block units is input to the frame memory 33. Here, the frame memory 3
Reference numeral 3 restores the image in the original configuration of the GOP, converts the block scan into the raster scan, and outputs the converted image. The frame memory is used for the prediction data decoding circuit 3
2 can be shared with the memory built in.

It should be noted that although the coding area is performed at the event breaks, it goes without saying that other methods may be used.
That is, it goes without saying that the high-efficiency coded data of an image may be divided not only by dividing the frequency domain but also by dividing quantization or spatial resolution.

At this time, the data which is more important as an image is the data in the low frequency region in the case of frequency division, and the data which has been subjected to the rough quantization in the case of division by the quantization and has the spatial resolution. If the data is divided by, the thinned image is encoded data. In this case, a reproduced image decoded using only these data sets a region more easily perceived by humans as important data. That is, one piece of high-efficiency coded data is divided into more basic and important data and data that is not so (this is called layering), and only basic and important data is reproduced during special reproduction during reproduction from a disc. You may make it reproduce.

In the first embodiment, the recording side and the reproducing side are associated with each other. However, when recording and reproducing are combined as in a hard disk, or when recording is performed according to the assumption as in the present compact disk. It is also possible that only the playback side is premised on that.

Example 2. Next, a second embodiment of the present invention will be described. FIG. 10 is a block circuit diagram showing the recording system of the digital video signal recording / reproducing apparatus of the second embodiment. In the figure, the same reference numerals as those in FIG. 1 denote the same or corresponding parts, 15 is an input terminal, 1 is a buffer memory, 2 is a subtracter, and 3 is a DC.
T circuit, 4 is a quantization circuit, 6 is an inverse quantization circuit, 7 is an ID
A CT circuit, 8 is an adder, 9 is a motion compensation prediction circuit, 5 is a variable length coding circuit, 12 is an area rearranger, and 11 is a format encoder.

FIG. 11 is a block circuit diagram showing the reproducing system of the digital video signal recording / reproducing apparatus of the second embodiment. In the figure, the same reference numerals as those in FIG. 7 denote the same or corresponding portions, 21 is a program stream header detector, 22 is a PES packet detector, 23 is a video stream generator, 35 is an area rearranger, and 25 is Address memory, 26 mode switcher, 27 variable length decoding circuit, 29 inverse quantization circuit, 30 IDCT circuit, 31
Is an adder, 32 is a prediction data decoding circuit, and 33 is a frame memory.

Next, the operation will be described. The digital video signal is input from the input terminal 1 line by line and supplied to the buffer memory 1. Where buffer memory 1
Since the operations from to the variable length coding circuit 5 are the same as those in the above-mentioned conventional example, the description thereof will be omitted.

In the area rearrangement circuit 12, the area located in the center of the screen for the I picture in the bit stream of the GOP-unit video data output from the variable length encoding circuit 5 is arranged at the beginning of the bit stream. Rearrange as follows. Here, the I picture is divided into three areas as shown in FIG. 12, and the data of the I picture for the areas 1 to 3 is respectively divided into I areas.
(1), I (2), and I (3). However, each area shown in FIG. 12 is a collection of a plurality of MPEG slice layers shown in FIG. 28. In FIG. 12, areas 1 and 3 are composed of 6 slices, and area 2 is composed of 18 slices.

Actually, the area rearranger 12 detects the slice header of the I picture on the bit stream, classifies each slice into the three areas shown in FIG.
A bitstream for each area is created, and the bitstreams grouped for each area are rearranged. That is, as shown in FIG. 13, I (2), I
(3), rearrangement is performed in area units so that the bitstream is arranged in the order of I (1). Further, the rearranged bit stream is output to the format encoder 11 in GOP units.

Next, the operation of the format encoder 11 will be described with reference to FIG. FIG. 14 is a flowchart showing an algorithm for formatting video data into PES packets in GOP units. In the case of the screen center portion priority mode, the picture information is detected by detecting the picture header of the input bitstream. Here, in the case of an I picture, the screen center portion I shown in FIG.
Areas (2), I (3), and I (1) are extracted, the data length of each area is detected, and the detected data length of each area is converted into a 24-bit binary number to obtain address information. create. On the other hand, in the case of P and B pictures, the data length is detected in picture units and converted into a binary number of 24 bit width (3 bytes) to create address information.

Further, the formatting section collects the input address information and the bit stream of the video data into two types of PES packets. That is, a PES packet containing only address information and a PES packet containing only video or audio are configured.

Therefore, as shown in FIG. 29, 1 GOP
If there are 15 pictures, there are 17 kinds of address information, 3 kinds of I pictures, 4 kinds of P pictures, and 10 kinds of B pictures. Further, as the address information at the time of special reproduction, there are two types of address information on the disc of the preceding and following GOPs (absolute address on the disc). These pieces of address information are put together in one packet and formatted as a PES packet. actually,
It is formatted as a private 2 packet of the PES packet shown in FIG. In FIG. 15, the absolute address on the disk of the preceding and following GOPs is arranged at the head of the packet data, and the address information of each picture is arranged in order below. However, since the information amount of 3 bytes (24 bits) is assigned to each address information, the packet length is 57 bytes.

On the other hand, a bit stream of 1 GOP of data other than address data is divided into a plurality of packets, and header information such as a sync signal is added to the PES packet (video packet). .

Further, in the format encoder 11, the input audio bit stream is also PES.
It is disassembled into packets and combined with the PES packets of video data to form an MPEG2-PS system stream. Actually, as shown in FIG. 16, a bit stream of 1 GOP worth of video data and a bit stream of audio data corresponding to 1 GOP period are divided into a plurality of packets and arranged in one pack. In this case, as shown in FIG. 16, the packet indicating the address information is arranged in the head packet of the system stream, and then the packet including the bit stream in the center portion of the screen of the I picture is arranged. I am trying.

Next, the operation during reproduction will be described with reference to FIG. In FIG. 11, the operations of the program stream header detector 21, the PES packet header detector 22, the video bit stream generator 23, and the mode switch 26 are the same as those in the above-described first embodiment, and therefore their explanations are omitted.

The bitstream of the decoded video is
As shown in FIG. 13, the data in the center of the screen of the I picture is arranged at the beginning of the stream. Therefore, in the area rearranger 35, according to the data length of the bit stream of I (2), I (3), I (1) output from the address memory 25, the I picture data is I
(1), I (2), and I (3) are rearranged in this order. The rearranged bit stream is input to the variable length decoding circuit 27 and decoded into block data, motion vectors and the like. Here, the operation subsequent to the variable length decoding at the time of normal reproduction is the same as that of the conventional embodiment, and therefore its explanation is omitted.

For high-speed reproduction, 1 GOP as described above
Minute data is assigned to one pack of the system stream, so when reading data from the disk, each G
A method of jumping to the head address of the OP, reading only the data of the I picture located at the head of the system stream, and jumping to the head of the next GOP can be considered. In this case, the PES packet in which the address information arranged at the head of the system stream is recorded, and the disc drive is controlled by decoding the address on the disc of the next GOP and the address information of the I picture.

In the case of FIG. 29, each G within one frame time
15 if all I pictures in OP can be read
Double speed high speed playback can be realized. Further, if the I picture of each GOP is read within the time of 2 frames, the high speed reproduction of 7.5 times speed is achieved. Thus, as the speed of high-speed reproduction increases, the time for reading data from the disc becomes shorter.

Furthermore, when reading data from a medium such as an optical disc during high-speed reproduction, even if the start address of the system stream recorded on the disc is known, the jump is made to the position actually recorded on the disc. At that time, a waiting time for the rotation of the disk occurs. Further, when the video signal is encoded at a variable rate, the information amount of the I picture is not constant, and the time required to read the I picture changes. Therefore, when the high-speed reproduction speed is increased, the time for reading the data on the disc is shortened, and the rotation waiting time of the disc is not constant, so that all the I picture data cannot be stably read.

For this reason, in this embodiment, the data recorded on the medium such as an optical disk at the time of high-speed reproduction is jumped to the head of the GOP in a fixed time unit with respect to the data recorded in the unit of 1 GOP, and the data portion of the I picture is transferred to the disk. Read from. In this case, even if all the I picture data cannot be read within the fixed time, the program jumps to the beginning of the next GOP. That is, it jumps to the head address of each GOP in a fixed time unit, reads data from the head of the recorded system stream, and reads the next GOP.
Jump to the beginning of.

In this case, on the disk, as shown in FIG. 16, the PE including the address of the next GOP on the disk, etc.
PE including data in the central part of S packet and I picture
The S packet is placed at the beginning of the system stream. Therefore, even if all the I picture data cannot be read out during special reproduction, at least the address on the disk of the next GOP and the data in the center of the screen of the I picture necessary for controlling the disk drive can be decoded. .

When only the central portion of the screen can be decoded during special reproduction, only the data that can be decoded by the area rearranger 35 is output to the variable length decoding circuit 27, and the variable length decoded video data is output. Is subjected to inverse quantization and IDCT and is input to the frame memory 33. On the other hand, the area rearranger 35 outputs the information of the area to be decoded to the frame memory 33. As a result, in the frame memory 33, only the areas that could be decoded at the time of special reproduction are reproduced, and for the areas that could not be decoded, the data output in the previous frame is retained and output.

FIG. 17 shows an example of a reproduced image when only I pictures from the nth GOP to the (n + 4) th GOP are reproduced to perform high speed reproduction. FIG. 17A shows a case where all I pictures can be decoded, and FIG. 17B shows a case where areas 2 and 3 can be decoded. In area 1 that cannot be decoded, the value of the previous frame is held as it is. It is outputting. Further, FIG. 17C shows a case where only area 2 can be decoded, and areas 1 and 3 hold the value of the previous frame as it is.

Here, in a general video signal recording / reproducing apparatus, the I picture is recorded in frame units as the data format at the time of recording. On the other hand, in FIG.
Of the three divided I picture data, the area located in the center of the screen is preferentially arranged at the head of 1 GOP, so only a partial area of the I picture is read from the disc within a certain time during special playback. Even if it is not possible, it is possible to output the reproduced image of at least the central portion of the screen.

As described above, in the present embodiment, as shown in FIG. 7, the I picture used for special reproduction is set to 1 at the beginning of 1 GOP.
Since the area located in the center of the screen is preferentially recorded on the medium, the area 2 located in the center of the screen is prioritized for playback even when the high-speed playback speed is high. , Easy to understand the contents of high-speed playback image. In addition, since the special reproduction in which the jump to the head of the GOP is performed in a unit of a fixed time, the output screen can be constantly updated at a constant speed.

In the above embodiment, all the areas that could be decoded at the time of special reproduction were output and the data of the previous frame was retained as it is for the areas that could not be decoded. It may be configured to play back only.

In this case, the area rearranger 35 decodes the data of only the area 2 of the I picture read from the disc, and the areas 1 and 3 which are not decoded are:
In the frame memory 33, for example, the gray data is masked and a high-speed reproduced image is output.

In FIG. 18, n from the nth GOP of 1 GOP
The reproduced image when high-speed reproduction is performed by reproducing only the area 2 of the I picture up to the + 4th GOP is shown. Areas 1 and 3 at both ends of the screen in the figure are masked with gray data. Further, even if the information amount of the I picture is small, the disk rotation waiting time is short, and there is a time margin to read the data in areas 1 and 3, the data in areas 1 and 3 are not decoded.

This is because if the data in areas 1 and 3 can be read out on the screen only when the data can be read, these areas are not updated at regular intervals, and the high-speed reproduced image becomes unnatural. Therefore, during special playback, I
When only the central portion (area 2) of the screen of the picture is reproduced, the area to be updated is always constant, and the reproduced image has no unnaturalness.

Further, in the above embodiment, only the central area of the screen of the I picture that could be decoded at the time of special reproduction is displayed and both edges of the screen are masked. However, the central part of the screen is expanded to one screen. And output it.

In this case, in the frame memory 33, the decoded data in area 2 is expanded to the size of one screen as shown in FIG. However, in the case of FIG. 19, the central portion of the area 2 surrounded by the dotted line is expanded to the double size in the vertical and horizontal directions by linear interpolation. That is,
In the case of FIG. 19, the portion surrounded by the dotted line is 360 horizontal pixels ×
With a size of 240 lines in the vertical direction, this dotted line portion is expanded by linear interpolation, for example, to be expanded to one screen size of horizontal 720 pixels × vertical 480 lines.

As described above, when only the central area of the screen is decoded and expanded to one screen size during special reproduction, the area of the data to be output becomes small, but when only the central area of the screen is output, both edges of the screen are conspicuous. The mask part of can be eliminated.

In the above embodiment, only the central portion of the I picture screen is preferentially arranged on the bit stream.
Not only the I picture but also the P picture central portion may be preferentially arranged. In this case, the data in the central portion of the screen of the P picture will follow the bit stream of the I picture.

Further, in the above embodiment, the rearrangement of the image data in area units is performed after the conversion into the bit stream, but it is not always necessary after the conversion into the bit stream and may be performed before the conversion.

FIG. 20 shows a flow chart on the reproducing side in this embodiment. Since the flow has been described above, it will be omitted.

In the second embodiment, the recording side and the reproducing side are associated with each other, but a case where the recording and reproducing are combined as in a hard disk is conceivable, and the present compact disk is assumed. It is also possible that only the playback side is assumed to be recorded according to the above. Further, the rearrangement in screen area units is performed by using the data of the slice vertical position of the lower 8 bits of the slice start code in the slice header if the prediction data decoding circuit 3 is used.
It is needless to say that it can be realized by using 2 or the frame memory 33.

Example 3. Next, a third embodiment of the present invention will be described. FIG. 21 shows a digital video signal encoding processing unit in a digital video recording / reproducing apparatus, in which a DCT block is hierarchized into a low frequency region and a high frequency region. Further, it is a block diagram on the recording side in which the screen is divided into a plurality of areas and the central part of the screen in the low frequency region is preferentially arranged at the head of the GOP. In FIG. 21, reference numeral 12 is an area rearrangement circuit. It should be noted that the same or corresponding parts in the drawings are designated by the same reference numerals and the description thereof will be omitted.

Next, the operation will be described. This input video data has an effective screen size of horizontal 704, for example.
It is data of pixels and vertical 480 pixels. This image data is subjected to high efficiency coding using motion compensation and DCT. Here, the operation until the data is divided into hierarchies is the same as that in the first embodiment, and thus the description thereof is omitted.

As for the division hierarchy, not only the frequency domain but also division by quantization or spatial resolution may be performed as in the first embodiment. In the third embodiment, the area rearranger 12 divides the important data that is further divided into hierarchies into the areas of the screen as shown in the second embodiment, and the central part of the screen is preferentially placed at the head of the GOP. It is to be placed. That is, the data is divided into important data and non-important data, and is further recorded on the disc in a predetermined priority order in the area of the screen.

As described above, since the low frequency components of the I picture and the P picture are divided and the central portion of the screen is preferentially arranged, only the central portion of the screen of these low frequency components is read during special reproduction. By reproducing, the amount of data read during special reproduction is greatly reduced. As a result, there is a margin in the reading speed of the head from the medium, and it becomes possible to realize a very high-speed skip search of ten-fold speed to tens-fold speed.

Here, by arranging the low-frequency screen central portion of the I picture at the head of the GOP and arranging the P-picture data following the data of the low-frequency screen peripheral portion of the I picture, a speed of more than ten times is achieved. Therefore, high-speed reproduction of several tens of times can be realized by reproducing only the central portion of the screen in the low range of the I picture. Furthermore, since the amount of information in the central portion of the screen of the low-frequency components of the I-picture and P-picture for special reproduction is small,
Since the data can be easily read from the disk and decoded at the time of high speed reproduction, high speed reproduction of several times faster becomes possible. That is, since the data amount of the low frequency components of the I picture and P picture at the central portion of the screen is smaller than the data amount of the entire low frequency components, special reproduction faster than that of the first embodiment can be realized.

Next, the operations of the area rearranger 12 and the format encoder 11 will be described. FIG. 22 is a flowchart thereof. First, when encoding is started, the slice header of the I picture of the low frequency component partition is detected in order to rearrange the low frequency component areas, and each slice is classified into three areas shown in FIG.
A bitstream for each area is created, and the bitstreams grouped for each area are rearranged. That is, as in FIG. 13, GO is applied to the low-frequency I picture.
Low band I (2), low band I (3), low band I (1) at the beginning of P
The rearrangement is performed in area units so that the bitstreams are arranged in this order.

Next, in the screen center portion priority mode, the picture header of the input bit stream is detected to detect the picture information. Here, in the case of a low-pass I picture, the low-pass screen central portion I (2) and the low-pass I (3) and low-pass I (1) areas shown in FIG. 13 are extracted, and the respective data lengths are extracted. Is detected, and address information is created from the data length of each area detected as described above. On the other hand, P
In the case of a B picture and a B picture, the data length is detected for each picture and address information is created. When the screen center portion priority mode is not set, the first embodiment is followed.

Next, the layering mode is determined. If the layering mode is not set, information indicating non-layering is inserted into the system stream, and the conventional stream structure is followed. In case of hierarchical mode, confirm the setting of the sequence header. Specifically, the data of the sequence scalable extension is confirmed. If this is correctly described, the beginning of the picture is recognized by the picture header, the low-pass data of the I picture and P picture rearranged on the screen area is extracted, and the data length is detected. On the other hand, the B picture detects the data length of each picture.

Furthermore, a packet is created in which only the address information when the central portion of the low-picture area of the I picture and P picture is fixed at the head of the GOP is recorded. This packet includes address information of the screen center part of the low band part of the I and P pictures, the screen peripheral part, the high band part of the I and P pictures, and the B picture, and the data length of each data is recorded. Has been done. Therefore, the head position of each data stream is obtained as a relative address from the head of the GOP header by this data length.

FIG. 23 shows the bit stream created in this way. As shown in (c) of FIG. 23, the low frequencies of the I picture and the P picture rearranged in area units are arranged at the head of the GOP, and are packetized as shown in the flowchart of FIG. The stream when address information is arranged in 2 private packets is shown in (d). In this case, the address information may be expressed as a relative address from the beginning of the GOP header as described above, but may also be expressed as what byte of which packet is at the beginning of each picture, Needless to say, it may be expressed by a sector address on the disk or the like.

FIG. 24 shows an example of the case where address information is included in a private 2 packet. When the PES packet is a private 2 packet, a stream ID is set, and a layering mode, a layering type, an image type used during special reproduction, the number of start addresses, and the like are described. Here, the start address is the start address of the center of the screen in the low range of the I picture, the start address of the peripheral part of the screen in the low range of the I picture, the start address of the low range of the four P pictures, and the remaining This is the start address of the B picture.

Further, the sector addresses on the disk of the front and rear GOPs for jumping the optical head in special reproduction will be added. In this case, considering the double speed of special playback,
In addition to the addresses of the front and rear GOPs, the number of front and rear GOPs
By adding the sector address of, the variation of the double speed number of special playback is expanded. Also, although it has been shown that the address information is written in the private 2 packet of the PES packet,
It goes without saying that it may be written in the private descriptor of the program stream map or another user area.

The reproducing side of the third embodiment will be described with reference to FIG. FIG. 25 is a block diagram of a digital video signal decoding processing unit. It should be noted that the same or corresponding parts in the drawings are designated by the same reference numerals and the description thereof will be omitted.

Next, the operation of FIG. 25 will be described with reference to FIG. FIG. 26 is a flowchart showing the operation of the format decoder during reproduction. The bit stream output from the ECC detects the header of the program stream and is separated for each PES packet. Further, the header of the PES packet is detected, and the private packet including the address information and the video packet are discriminated.

In the case of a private packet, the address information contained in the packet is extracted and stored. On the other hand, in the case of a video packet, a bit stream of video data is extracted. Furthermore, in the case of a private packet and normal reproduction, or in the case of a video packet, the data of the low frequency component and the high frequency component are extracted from the bit stream of the video data of the I picture and P picture, and the data is rearranged. Output the reproduced image.

On the other hand, in the case of private packet and special reproduction, first, it is judged whether or not there is time to reproduce all the I pictures in the low frequency band. If there is time to reproduce, further low frequency band reproduction is performed. It is determined whether or not there is time to reproduce the P picture. When the above two or one determination is performed and there is time to reproduce the low-frequency I picture and P picture, the low-frequency I picture and P picture are reproduced. If there is time to play all the I pictures in the low band, but not to play P pictures in the low band,
Only low-frequency I pictures are reproduced. Further, if there is not enough time to reproduce all the low-frequency I pictures, the central portion of the screen of the low I-pictures is reproduced. In all of the above three cases, after reproduction, the optical head is made to jump to the head of the next GOP.

When these addresses are described in the video stream, the address information is extracted and stored after being converted into the video stream. When the addresses are described in the private descriptor of the program stream map, the program Address information is extracted and stored at the level of stream header detection. Needless to say, the address information may be a relative address or an absolute address of the program.

In practice, as shown in FIG. 25, a mode signal for skip search, normal continuous reproduction, etc. is input to the mode switch 26 from the microcomputer. On the other hand, the reproduced signal from the disk is amplified by an amplifier, and the signal is reproduced by the phase-locked clock output from the PLL, digital demodulation is performed, error correction processing is performed, and the program stream is restored. Further, the program stream header detector 21 for detecting each header of the program stream obtains information on the data following the header.

Further, the PES packet header detector 22
By this, for example, the address information of each picture and special reproduction data (low-frequency data and data arranged according to the area of the screen) written in the private 2 packet of the PES packet is detected, and this information is detected.
Stored in. Here, PES packets for audio, PES packets such as characters, and PES for video
It is determined whether the packet is a packet, and only the video packet is output to the video bitstream generator 23. The video bitstream generator deletes the header division method of the PES packet and outputs the video bitstream.
After that, according to the address information obtained from the address memory 25, in the case of normal reproduction, the data rearranger 24
Then, the bit stream output from the mode switch 26 is rearranged and output.

Output of mode switch 26 (control signal)
Is a data rearranger 24 and a decodable determiner 34
Is supplied to. Here, the data rearranger 24 synthesizes the low-frequency component and the high-frequency component, which are hierarchized and rearranged for each area in the case of normal reproduction, according to the control signal, and outputs the synthesized signal. On the other hand, at the time of special reproduction, only the low-frequency component or the data of the low-frequency component at the center of the screen is used for the variable length decoder (VL
D) Output to 27. That is, during normal reproduction, the low-frequency components of the I and P pictures are rearranged in the area order of the screen, combined with the high-frequency components, and rearranged in the original picture order.
During special reproduction, the central area of the screen of the low frequency component of the I picture or the central area of the screen of the low frequency component of the I picture and the P picture is switched and output depending on the double speed. Note that PTS and DTS are used during special playback that uses only low-frequency components.
The time stamp of is not used.

On the other hand, the variable length decoder (VLD) 2
Along with the decodable discriminator 34, 7 extracts the break of the event in the low-frequency component area indicated by the priority break point of the slice header, decodes the break and outputs it to the switch 28. The switch 34 is connected so that 0 is not inserted during normal reproduction, but is controlled by the decodable decision unit 34 so that 0 is inserted into the high frequency component after the priority break point during special reproduction.

The operation concept relating to low-frequency decoding is the same as that shown in FIG. The rearrangement on the screen area at this time is the same as that described in the second embodiment, and thus the description thereof is omitted.

In the above embodiment, the coding area is set at the event break, but it goes without saying that another method may be used. For example, the data may be divided at fixed breaks in the number of events, or the data may be divided based on the difference between coarsely quantized data by the quantizer 4 and fine and coarse quantization. Further, the image may be divided by encoding an image of which the spatial resolution is thinned by half in the buffer memory, and an image of the image obtained by restoring the image of half the resolution and the image of the original resolution. That is, it goes without saying that the high-efficiency coded data of an image may be divided not only by dividing the frequency domain but also by dividing quantization or spatial resolution.

At this time, the data which is more important as an image is the data in the low frequency region in the case of frequency division, and the data which has been coarsely quantized and coded in the case of division by quantization, and has a spatial resolution. If the data is divided by, the thinned image is encoded data. In this case, a region in which a reproduced image decoded using only these data is more easily perceived by humans is important data. That is, one high-efficiency coded data may be divided into more basic and important data and other less important data, and only basic and important data may be reproduced during special reproduction during reproduction from the disc.

In the third embodiment, the recording side and the reproducing side are associated with each other, but a case in which recording and reproducing are combined as in a hard disk may be considered. In addition, it is also possible to consider the case of only the reproducing side, which is premised on that recording is performed according to the assumption, such as the present compact disc. Further, it goes without saying that there is a screen output method as shown in FIGS. 18 and 19 of the second embodiment for the components rearranged for each area unit of the screen. Further, it goes without saying that the rearrangement in screen area units can be realized by the prediction data decoding circuit 25 and the frame memory 33 by using the data of the slice vertical position in the slice header. Further, in the present embodiment, only the basic data of the I picture is divided by the area of the screen, but it goes without saying that it may be divided in the low range of the P picture or other areas.

[0131]

According to the present invention, good skip search
And employ variable bit rate encoding
Under the assumption, it is possible to improve the accessibility of GOP.
It

[Brief description of drawings]

FIG. 1 is a block diagram of a digital video signal encoding processing unit according to a first embodiment.

FIG. 2 is a diagram showing the concept of frequency division according to the first and third embodiments.

FIG. 3 is a block diagram of digital video signal encoding processing according to the first embodiment.

FIG. 4 is an explanatory diagram of a header of a video stream according to the first exemplary embodiment.

FIG. 5 is a diagram showing rearrangement of bitstreams according to the first embodiment.

FIG. 6 is an example of address information of a system stream according to the first embodiment.

FIG. 7 is a block diagram of a digital video signal decoding processing unit according to the first embodiment.

FIG. 8 is a diagram illustrating a concept of a decoding process according to the first embodiment.

FIG. 9 is a flowchart of a decoding process according to the first embodiment.

FIG. 10 is a block diagram of a digital video signal encoding processing unit according to a second embodiment.

FIG. 11 is a block diagram of a digital video signal decoding processing unit according to the second embodiment.

FIG. 12 is an example of the screen area of the second embodiment.

FIG. 13 is an example of a bitstream when rearranged in area units of a screen according to the second embodiment.

FIG. 14 is a flowchart of digital video signal encoding processing according to the second embodiment.

FIG. 15 is an example of address information of a system stream according to the second embodiment.

FIG. 16 is an example of a system stream according to the second embodiment.

FIG. 17 is an example of outputting a screen to a reproducible portion during reproduction with an example of the reproduction screen according to the second embodiment.

FIG. 18 shows an example in which only the central portion of the screen is output during reproduction on the example of the reproduction screen of the second embodiment.

FIG. 19 is an example of enlarging and displaying a central area of the screen during reproduction on an example of the reproduction screen of the second embodiment.

FIG. 20 is a flowchart of digital video signal decoding processing according to the second embodiment.

FIG. 21 is a block diagram of digital video signal encoding processing according to the third embodiment.

FIG. 22 is a flowchart of digital video signal encoding processing according to the third embodiment.

FIG. 23 is an example of a system stream according to the third embodiment.

FIG. 24 is an example of address information of a system stream according to the third embodiment.

FIG. 25 is a processing block diagram of digital video signal decoding processing according to the third embodiment.

FIG. 26 is a flowchart of digital video signal decoding processing according to the third embodiment.

FIG. 27 is a block diagram of a conventional optical disc recording / reproducing apparatus.

FIG. 28 is a data array structure of a conventional MPEG video encoding algorithm.

FIG. 29 is an example of a GOP structure of a conventional MPEG video encoding algorithm.

FIG. 30 is a block diagram of a conventional MPEG video signal encoding processing unit.

FIG. 31 shows an example of a conventional MPEG video bitstream.

FIG. 32 is a block diagram of a conventional motion compensation prediction circuit.

FIG. 33 shows an example of a conventional MPEG PS system stream.

FIG. 34 is an example of a stream of a conventional MPEG PES packet.

FIG. 35 is a block diagram of a conventional MPEG video signal decoding processing unit.

[Explanation of symbols]

1 buffer memory, 2 subtractor, 3 DCT calculator,
4 quantizer, 5 VLC, 6 inverse quantizer, 7 inverse D
CT calculator, 8 adder, 9 motion compensation prediction circuit, 10
Event and code amount counter, 11 format encoder, 12 area rearranger, 15 input terminals, 21
Program stream header detection, 22 PES packet header detection, 23 video bitstream generator, 24 data rearranger, 25 address memory, 2
6 mode selector, 27VLD, 28 switch,
29 inverse quantizer, 30 inverse DCT calculator, 31 adder, 32 prediction data decoding circuit, 33 frame memory, 34 decodable decision device, 35 area rearranger.

Front page continuation (72) Inventor Shuji Toda No. 1 Baba Institute, Nagaokakyo City, Kyoto Prefecture Mitsubishi Electric Corporation Video System Development Laboratory (72) Satoshi Kurahashi No. 1 Baba Institute, Nagaoka Kyoto Prefecture Mitsubishi Electric Corporation Video System Development Laboratory Co., Ltd. (72) Inventor Takahiro Nakai 1 Baba Institute, Nagaokakyo, Kyoto Prefecture Mitsubishi Electric Corporation Video System Development Laboratory (72) Inventor Tadashi Kasezawa 1 Baba Institute, Nagaokakyo Kyoto Prefecture Mitsubishi Electric Corporation Video System Development Laboratory (72) Inventor Masato Nagasawa No. 1 Baba Institute, Nagaokakyo City, Kyoto Prefecture Mitsubishi Electric Corporation Video System Development Laboratory (72) Inventor Hiroyuki Ohata Nagaokakyo Baba Institute, Kyoto Prefecture No. 1 Mitsubishi Electric Corporation Video System Development Laboratory (72) Inventor Sadanobu Ishida No. 1 Baba Institute, Nagaokakyo City, Kyoto Prefecture Mitsubishi Electric Corporation Video System Development Laboratory (56) Reference JP-A-5-1288 10 (JP, A) JP 4-79681 (JP, A) JP 3-74982 (JP, A) JP 7-123359 (JP, A) JP 6-261303 (JP, A) JP-A-8-51591 (JP, A) JP-A-10-74380 (JP, A) JP-A-6-164522 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H04N 5/76-5/956 G11B 20/10

Claims (4)

(57) [Claims] 1. Digitization using motion compensated prediction and DCT
High-efficiency encoding of digital video signals and writing on optical discs
The video information to be displayed is an I-picture that is an intra-coded image.
And a P picture that is a unidirectional predictive coded image, and a bidirectional
It is composed of a B picture that is a predictively encoded image.
These pictures are included in one video information block.
A video packet constructed based on the video information block of
And the stream ID of private stream 2
System stream containing two private packets
An optical disk recording method for arranging and recording, wherein at least an I picture of the video information block is
The address information corresponding to the sector of
Recorded on a packet and recorded with the above address information.
Put the private packet before the video information block.
An optical disk recording method characterized by arranging. 2. Digitization using motion compensated prediction and DCT
High-efficiency encoding of digital video signals and writing on optical discs
The video information to be displayed is an I-picture that is an intra-coded image.
And a P picture that is a unidirectional predictive coded image, and a bidirectional
It is composed of a B picture that is a predictively encoded image.
These pictures are included in one video information block.
A video packet constructed based on the video information block of
And the stream ID of private stream 2
System stream containing two private packets
An arranged optical disc, wherein at least the I picture of the video information block is
The address information corresponding to the sector
The above address information recorded on the
Private packet is before the video information block
An optical disc, which is characterized in that it is arranged in. 3. Playing back the optical disk according to claim 2.
Method recorded in the private packet above
The video information block for at least the I picture
The address information corresponding to the
The above video from the position on the optical disc based on the address information
An optical disc replay characterized by reading information blocks
Raw method. 4. The optical disc according to claim 2 is reproduced.
Device, which outputs the system stream recorded on the optical disc
And the private packet included in the above system stream.
At least I pictures of the video information blocks recorded in the
The address information corresponding to the sector of the
Means and on the optical disc based on the reproduced address information
Means for reading the video information block from the position
An optical disk reproducing apparatus characterized by: