JP4402621B2 - Optical clock extraction circuit - Google Patents

Description

  The present invention relates to an ultra-high-speed optical signal processing circuit, and more particularly to an optical clock extraction circuit that extracts and reproduces an optical clock from an ultra-high-speed optical signal that exceeds a frequency band where electrical processing is possible.

  In ultra-high-speed optical communication using optical time division multiplexing, for example, when performing optical signal separation, it is essential to extract a clock signal. A conventional optical clock extraction circuit will be described with reference to the drawings. FIG. 6 is a block diagram showing a configuration of a phase-locked loop (PLL) type optical clock extraction circuit. This optical clock extraction circuit includes a photodiode (hereinafter referred to as PD) 100 that converts an optical signal into a current and outputs it, a transimpedance circuit 101 that converts a current output from the PD 100 into a voltage, and a transimpedance circuit 101. A band-pass filter (hereinafter referred to as BPF) 102 that passes only a predetermined frequency band, an RF amplifier 103 that amplifies the output of the BPF 102, and a voltage-controlled oscillator that generates a clock having a frequency corresponding to the control voltage (Hereinafter, referred to as a VCO) 104, a phase comparator, and a voltage comparator 107 that compares the output voltage of the phase comparator with an initial reference voltage to generate a control voltage for the VCO 104.

  Here, the phase comparator includes a mixer 105 that multiplies the output of the RF amplifier 103 and the output of the VCO 104, and a low-pass filter (hereinafter referred to as LPF) 106 that extracts only a low frequency band from the output of the mixer 105. This is a signal processing circuit configured to output the frequency component of the difference between the signal output of the RF amplifier 103 and the signal output of the VCO 104 including the DC component.

The clock signal V ₁ output from the VCO 104 and the output signal V ₂ of the RF amplifier 103 obtained by detecting the optical signal are expressed as follows.
V ₁ = Asin [(ω + δω) t + φ] (1)
V ₂ = Bcos (ωt + ψ) (2)

As a result of multiplication by the mixer 105, V ₁ V ₂ is as follows.
V ₁ V ₂ = ABcos (ωt + ψ) sin [(ω + δω) t + φ]
= (AB / 2) {sin [(2ω + δω) t + ψ + φ]
+ Sin (δωt + φ−ψ)} (3)

Since only the low frequency component is filtered by the LPF 106, the output signal V _{if of the} LPF 106 is as follows.
V _if = (AB / 2) sin (δωt + φ−ψ) (4)
Here, when the clock signal V ₁ and the output signal V ₂ of the RF amplifier 103 are very close to the synchronized state, the phase of the equation (4) approaches 0, and the following equation is established.
V _if = (AB / 2) δωt + (AB / 2) (φ−ψ) (5)

Therefore, when the negative feedback signal V _{an if} so an output signal V _{an if} is 0 LPF106 to the voltage comparator 107 through VCO104, δω = 0, φ = ψ and the output signal of the clock signal V ₁ and the RF amplifier 103 V ₂ can be fully synchronized. Such a synchronous circuit is called a phase locked loop (PLL).

  An optical signal obtained by encoding CW (continuous wave) light normally has a carrier frequency component of about one third, and has a signal component shown in Equation (2) by direct detection using a PD. Yes. By generating a signal completely synchronized with this by the VCO 104, the clock extraction of the optical signal is achieved.

  In the case of an ultrahigh-speed optical signal having a high carrier frequency component of the optical signal, direct detection by the PD may be difficult. This is because the carrier frequency component exceeds the response band of PD. In the existing PD, at most 50 GHz is the upper limit of the frequency that can be responded, while the carrier frequency necessary for speeding up the ultra-high speed optical signal has reached 160 GHz.

  In order to achieve clock extraction for such an ultrahigh-speed optical signal, a technique called photonic down-conversion is used (for example, see Non-Patent Document 1). As shown in FIG. 7, the optical clock extraction circuit by photonic down-conversion includes an optical modulator 200, a PD 201, a transimpedance circuit 202, a BPF 203, an RF amplifier 204, a VCO 205, an RF oscillator 206, and a mixer. 207, LPF 208, voltage comparator 209, and RF amplifier 210.

  This optical clock extraction circuit modulates the intensity of the optical signal by the optical modulator 200 according to the clock signal output from the VCO 205, and pays attention to one of the low frequency regions among the modulation sidebands generated by this intensity modulation. Thus, by comparing the phase of this modulated sideband signal with the clock signal output from the VCO 205, the VCO 205 is synchronized with the optical signal to achieve optical clock extraction.

  Here, paying attention to the n-th order down-conversion, the oscillation frequency of the VCO 205 is Ω + δΩ and Ω = (ω−Ω ′) / n. Ω ′ is the frequency of the signal output from the fixed frequency RF oscillator 206 synchronized with the VCO 205. The signal output of the RF oscillator 206 may be as low as several GHz, but preferably has low phase noise characteristics. The reason for providing this RF oscillator 206 is to prevent the signal from being directly down-converted to DC by down-conversion.

  That is, since the PD 201 detects only the signal strength of the optical signal, it cannot generate a push-pull error signal including + and one sign depending on the direction of the difference frequency (the PD 201 cannot generate a signal of one sign). ). Therefore, an offset (Ω ′) is given to the frequency, and a push-pull error signal is generated electrically by the phase comparator composed of the mixer 207 and the LPF 208. FIG. 8 shows the frequency spectrum of the output signal of the PD 201. The vertical axis in FIG. 8 is the signal intensity.

The reference signal V ₂ ⁽ⁿ⁾ output from the RF amplifier 204 is as follows.
V ₂ ⁽ⁿ⁾ = B _n cos [n {(Ω + δΩ) t + φ} + Ω ′] (6)
In equation (6), B _n is the amplitude when the nth-order modulation sideband is used. From Expression (6), a signal (phase error signal) V _if ⁽ⁿ⁾ obtained from the LPF 208 is expressed as the following expression.
V _if ⁽ⁿ⁾ = (AB / 2) nδΩt + (AB / 2) (nφ−ψ) (7)

By negatively fed back to VCO205 through the voltage comparator 209 a signal V _{an if} ⁽ⁿ⁾ as the phase error signal V _{an if} ⁽ⁿ⁾ is zero, the output signal V of the clock signal and the RF amplifier 204 output from VCO205 ₂ ⁽ⁿ⁾ can be synchronized, and a clock signal synchronized with the optical signal can be reproduced. In order to make the regenerated clock signal the same as the carrier frequency of the optical signal, it is necessary to perform frequency synthesis such as adding the frequency component of the RF oscillator 206 in addition to the up-conversion.

0.Kamatani, et al., “100-Gbit / s optical TDM add / drop multiplexer based on photonic downconversion and four-wave mixing”, OFC'98 WC2,1998, p.112-113

  As described above, in the conventional optical clock extraction circuit, it is possible to extract a clock from a high-speed optical signal by a PLL using photonic down-conversion, but there is a modulation sideband used for clock extraction. In addition to depending on the RF driving power, there is a drawback that the sideband power due to modulation becomes weaker as the order increases. Due to such drawbacks, the SN (Signal to Noise Ratio) of the phase error signal obtained from the LPF deteriorates, and it is difficult to obtain good synchronization performance. In order to solve this problem, a method of increasing the modulation power and compensating for the signal degradation has been attempted, but in order to perform the signal degradation compensation, a high-power millimeter-wave circuit or microwave circuit is provided. Therefore, it has been difficult to achieve circuit miniaturization and low power consumption.

  The present invention has been made to solve the above-described problems, and provides an optical clock extraction circuit that can extract an optical clock without being limited by an electrical speed while being small in size and low in power consumption. Objective.

  The optical clock extraction circuit of the present invention includes three mode-locked lasers having different resonator lengths, a splitting unit that splits an input optical signal, and a first mode having the longest resonator length among the three mode-locked lasers. Incident means for injecting the divided optical signal into the saturable absorption region of the synchronous laser and the saturable absorption region of the second mode-locked laser with the shortest resonator length, and the incident optical signal is in the saturable absorption region Detecting means for independently detecting the intensity after passing through each of the first mode-locked laser and the second mode-locked laser, and an optical signal passing through the saturable absorption region of the first mode-locked laser Control means for electrically controlling the effective refractive index of the third mode-locked laser on the basis of the difference between the intensity of the optical signal and the intensity of the optical signal that has passed through the saturable absorption region of the second mode-locked laser. For example, by negative feedback the difference between the intensity of the optical signal to the control means, is obtained by from the third mode-locked laser to generate an optical clock synchronized with the input optical signal.

Also, one configuration example of the optical clock extraction circuit of the present invention includes a difference in cavity length between the first mode-locked laser and the third mode-locked laser, the third mode-locked laser, and the second mode-locked laser. The difference in the cavity length of the mode-locked laser is made equal.
Further, in one configuration example of the optical clock extraction circuit of the present invention, the incident means is disposed in the vicinity of the saturable absorption region of the first mode-locked laser formed on the semiconductor laser substrate, A first optical waveguide for allowing an optical signal to enter the saturable absorption region so that the optical axis is orthogonal to the optical axis of the first mode-locked laser; and the second mode-locked laser formed on the substrate. A second optical waveguide that is disposed adjacent to the saturable absorption region of the second optical waveguide and allows the optical signal to enter the saturable absorption region so that the optical axis of the optical signal is orthogonal to the optical axis of the second mode-locked laser. It consists of
Further, in one configuration example of the optical clock extraction circuit of the present invention, the detection means is on an optical axis of an optical signal passing through the first mode-locked laser, and the first mode-locked laser is saturable. A first light receiving element disposed in the vicinity of the absorption region and an optical axis of an optical signal passing through the second mode-locked laser, and close to the saturable absorption region of the second mode-locked laser And the first and second current-voltage conversion means for converting the photocurrents output from the first and second light-receiving elements into voltages, respectively.
In one configuration example of the optical clock extraction circuit of the present invention, the detection unit detects a photocurrent flowing to a reverse bias application circuit that applies a reverse bias to the saturable absorption region of the first mode-locked laser. A first current-voltage converting means for converting to a voltage; and a second current for detecting a photoelectric current flowing to a reverse bias applying circuit for applying a reverse bias to the saturable absorption region of the second mode-locked laser and converting it to a voltage. It comprises current-voltage conversion means.
In one configuration example of the optical clock extraction circuit of the present invention, the incident means is for light injection formed in a cap layer in a saturable absorption region of the first mode-locked laser formed on a semiconductor laser substrate. Formed in a cap layer in a saturable absorption region of the second mode-locked laser formed on the substrate; and a first irradiation unit that causes the optical signal to enter the window from a direction perpendicular to the substrate. And a second irradiating means for allowing the optical signal to enter the light injection window from a direction perpendicular to the substrate.

  According to the present invention, it is possible to realize a small and low power consumption ultra-high-speed optical clock extraction circuit that does not require a high-frequency RF oscillator, a phase comparator, and an RF amplifier. Further, in the present invention, there is no problem caused by the modulation sideband as in the conventional optical clock extraction circuit using photonic downconversion, so that good synchronization performance can be obtained. Furthermore, in the present invention, an optical circuit such as a mode-locked laser formed on a semiconductor laser substrate, a current supply that injects current into the gain region of the mode-locked laser, and a reverse bias that applies a reverse bias to the saturable absorption region of the mode-locked laser. An ultra-small clock extraction circuit can be realized by hybrid mounting electrical circuits such as a bias application circuit and a differential amplifier circuit (control means).

  In the present invention, the detection means is a first current-voltage conversion means for detecting a photocurrent flowing to a reverse bias application circuit for applying a reverse bias to the saturable absorption region of the first mode-locked laser and converting it into a voltage. And a second current-voltage conversion means for detecting a photocurrent flowing to a reverse bias application circuit for applying a reverse bias to the saturable absorption region of the second mode-locked laser and converting it to a voltage. The saturated absorption region can also be used as a light receiving element, and the light receiving element can be omitted.

  Further, in the present invention, the incident means is formed from a direction perpendicular to the substrate with respect to the light injection window formed in the cap layer of the saturable absorption region of the first mode-locked laser formed on the semiconductor laser substrate. From the direction perpendicular to the substrate to the first irradiation means for entering the optical signal and the light injection window formed in the cap layer of the saturable absorption region of the second mode-locked laser formed on the substrate By comprising the second irradiation means for making the optical signal incident, a complicated optical waveguide on the semiconductor laser substrate can be omitted.

[Principle of the Invention]
The present invention provides a mode-locked laser that can oscillate only by applying a reverse bias, a first mode-locked laser whose repetition frequency is lower than the carrier frequency of the optical signal, and a second mode-locking laser whose repetition frequency is higher than the carrier frequency of the optical signal. Three mode-locked lasers and a third mode-locked laser whose repetition frequency is substantially the same as the carrier frequency of the optical signal are provided, and the saturable absorption region of the first mode-locked laser and the saturable absorption of the second mode-locked laser. An optical signal is injected into the region, and the difference (phase error signal) between the optical detection signals obtained from the two lasers is negatively fed back to the control means for electrically controlling the effective refractive index of the third mode-locked laser. It is a thing.

  FIG. 1 is a cross-sectional view showing the basic structure of a passive mode-locked semiconductor laser. Here, a laser using an N-type substrate as the substrate 50 will be described as an example. On the substrate 50, an N-type cladding layer 51, an active layer 52, a P-type cladding layer 53, and a P-type cap layer 54 are sequentially formed. The active layer 52 has a PN junction, but has a double heterojunction structure in order to achieve carrier confinement in the case of a laser.

  In order to set the length of the laser strictly, the left and right side walls in FIG. 1 formed by etching are used as mirror surfaces (etched mirrors). This mirror can be formed at an accurate position by a drawing pattern. Such two etched mirrors form a mode-locked laser having a Fabry-Perot resonator.

  In order to achieve mode locking, an electrode separation groove 57 for separating the resonator into a gain region 55 and a saturable absorption region 56 is provided in the resonator. The gain region 55 and the saturable absorption region 56 are separated by a high resistance insulator (not shown) embedded in the electrode separation groove 57 and the electrode separation groove 57. The position of the electrode separation groove 57 is determined so that the ratio of the saturable absorption region 55 to all the resonators is about 10 to 20%. The laser diode in the oscillation state usually has a resistance of several Ω in the forward direction. However, since the separation resistance realized by this electrode separation reaches several hundreds Ω, the current between the separation elements is effectively zero.

  When a reverse bias is applied to the passive mode-locked semiconductor laser as described above, the absorption edge wavelength of exciton shifts and the light absorption rate changes (usually changes in the direction in which the absorption rate increases). Light that circulates in the semiconductor resonator is slightly modulated by the saturable absorption region 56 at the end of the resonator, and this modulation is enhanced with each lap. For this reason, this modulation component is added to the spontaneous emission light radiated and circulated in the resonator for each longitudinal mode of the laser, and the intensity gradually increases. As the phase difference of each mode is canceled by this increase in intensity, the light circulating in the resonator is pulsed. The spire portion of the pulse has extremely high light intensity, and when passing through the saturable absorption region 56, the transmittance of the pulse spire portion becomes higher than that of the other portions of the pulse due to absorption saturation. As a result, a strong self-modulation effect acts on the light circulating in the resonator, and finally a mode-locked pulse with a uniform phase can be obtained.

  The semiconductor passive mode locking described above is achieved with a range of reverse bias voltages. The effective refractive index of the saturable absorption region 56 depends on the reverse bias voltage. Therefore, it is possible to control the pulse repetition frequency via the effective refractive index of the resonator within a range where mode locking is achieved.

  Pulse light is injected from the outside into the saturable absorption region 56 of such a mode-locked semiconductor laser. When light injection is performed from a direction perpendicular to the optical axis of the resonator (a direction perpendicular to the paper surface of FIG. 1) so that the injected light does not circulate in the resonator, the saturable absorption region 56 is forced to be externally forced by the light. Undergo modulation. When the frequency of this modulation and the repetition frequency of the optical pulse that circulates inside the resonator are almost the same, passive mode synchronization is pulled into the frequency of the external signal and is synchronized with the phase of the external signal, as in forced mode synchronization. Mode-locked pulses can be obtained.

  However, when the intensity of the injected light is weak, the frequency pull-in becomes weak and the passive mode-locked oscillation becomes dominant. In such a state, the frequency difference between the modulation frequency and the repetition frequency of the optical pulse is superimposed as a beat on the envelope of the pulse train generated by the passive mode synchronization. When optical clock extraction is performed using a mode-locked semiconductor laser, the method of synchronization by optical signal injection is difficult. While the conditions for synchronization by such optical injection are severe, the polarization state of the injected light due to fluctuations in the transmission path This is because the change easily changes and the high input intensity cannot be maintained.

  In a state where there is no frequency pull-in due to light injection, synchronization is lost as the frequency of the external pulse light is detuned from the repetition frequency of the optical pulse that circulates in the resonator. Along with this, the probability that the optical pulse circulating around the resonator and the injection pulse collide with each other in the saturable absorption region 56 decreases. For this reason, when the externally injected light is transmitted through the saturable absorption region 56 without being coupled to the resonator, the transmittance decreases with detuning. If this transmittance is monitored, the degree of detuning can be estimated.

  Therefore, three passive mode-locked semiconductor lasers having different repetition frequencies are prepared, and light is injected from the outside into the saturable absorption regions of the laser having the highest repetition frequency and the laser having the lowest repetition frequency. Since the transmission intensity of the injection light depends on the detuning frequency, the intensity of the injection light transmitted through the saturable absorption region of the laser having the highest repetition frequency and the injection light transmitted through the saturable absorption region of the laser having the lowest repetition frequency. The difference between the intensity of and the intensity of the laser represents the error between the repetition frequency of the remaining laser, that is, the laser for regenerating the optical clock and the repetition frequency of the external optical pulse.

  Therefore, a phase-locked loop (PLL) is formed by negatively feeding back the error signal to the voltage in the saturable absorption region of the optical clock recovery laser so that this error becomes zero, and as a result, it is synchronized with the external pulse light. The generated optical clock can be generated by a passive mode-locked semiconductor laser. Although it is possible to inject an external optical pulse into the optical clock recovery laser, the oscillation state becomes more unstable than the frequency pull-in due to fluctuations such as polarization diversity.

[First Embodiment]
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a block diagram showing the configuration of the optical clock extraction circuit according to the first embodiment of the present invention. In the present embodiment, three passive mode-locked semiconductor lasers 3-1, 3-2 and 3-3 having different lengths are formed on the semiconductor laser substrate 2.

  The optical circuit formed on the semiconductor laser substrate 2 includes passive mode-locked semiconductor lasers 3-1, 3-2, and 3-3, and saturable absorption regions 31-1 and 31 of the semiconductor lasers 3-1, 3-2. -2 for injecting light into -2, first and second optical waveguides 4-1 and 4-2, and photodiodes (hereinafter referred to as PDs) 5-1 and 5- 2 and electrode pads 6-1, 6-2 and 6-2 for making electrical contact with the saturable absorption regions 31-1, 31-2 and 31-3 of the semiconductor lasers 3-1, 3-2 and 3-3. 6-3 and electrode pads 7-1, 7-2 for making electrical contact with the gain regions 30-1, 30-2, 30-3 of the semiconductor lasers 3-1, 3-2, 3-3. 7-3, electrode pads 8-1 and 8-2 for making electrical contact with the photodiodes 5-1 and 5-2, It is composed of a wire for Ntakuto. The structure of the semiconductor lasers 3-1 to 3-3 is as described with reference to FIG. The difference in resonator length between the first mode-locked laser 3-1 and the third mode-locked laser 3-3, and the resonator length between the third mode-locked laser 3-3 and the second mode-locked laser 3-2. Is equal to the difference.

  Current supplies 9-1, 9-2, 9-3 are gains of passive mode-locked semiconductor lasers 3-1, 3-2, 3-3 through electrode pads 7-1, 7-2, 7-3, respectively. Current is injected into the regions 30-1, 30-2, and 30-3. The reverse bias applying circuits 10-1 and 10-2 are saturable absorption regions 31-1 and 31-2 of the passive mode-locked semiconductor lasers 3-1 and 3-2 through the electrode pads 6-1 and 6-2, respectively. Apply reverse bias to. Transimpedance circuits 11-1 and 11-2 serving as first and second current-voltage conversion means convert the currents output from PD5-1 and 5-2 into voltages, respectively.

  The differential amplifier circuit 12 serving as the control means applies a reverse bias to the saturable absorption region 31-3 of the passive mode-locked semiconductor laser 3-3 based on the output difference between the transimpedance circuits 11-1 and 11-2. . The current supplies 9-1, 9-2, 9-3, reverse bias application circuits 10-1, 10-2, transimpedance circuits 11-1, 11-2, and differential amplifier circuit 12 are external to the semiconductor laser substrate 2. However, it may be formed on the semiconductor laser substrate 2.

  FIG. 3 is a perspective view of the passive mode-locked semiconductor laser 3-1, optical waveguide 4-1, and PD5-1 formed on the semiconductor laser substrate 2. FIG. In order to form various optical elements on the semiconductor laser substrate 2, electrode separation grooves are provided. FIG. 3 shows a part thereof. In the case of the passive mode-locked semiconductor laser 3-1, in order to achieve mode locking, an electrode separation groove 32-1 that separates the resonator into a gain region 30-1 and a saturable absorption region 31-1 is provided. . The optical waveguide 4-1 for light injection formed on the semiconductor laser substrate 2 is separated from the side wall of the saturable absorption region 31-1 by a separation groove 33-1 similar to the electrode separation groove 32-1. Yes. On the other hand, on the semiconductor laser substrate 2 on the exit side where the injected light passes through the saturable absorption region 31-1, the PD 5-1 separated from the side wall of the saturable absorption region 31-1 by the separation groove 34-1. Is provided.

  These separation grooves are formed up to the upper part of the cladding. Since the optical waveguides 4-1 and 4-2 are formed of a P-type semiconductor so as not to absorb, the isolation resistance is large. The deeper the separation groove, the greater the separation resistance, but the optical reflection affects the pulse circulation in the resonator. For this reason, the optimum design of the separation groove is applied. Usually, the separation resistance is 500 to 1000Ω.

  As shown in FIG. 3, the optical axis of the laser resonator is orthogonal to the optical axis of the optical signal injection so that the injected light does not circulate around the laser resonator. In the example of FIG. 3, the first passive mode-locked semiconductor laser 3-1 having the lowest repetition frequency is shown. However, the second passive mode-locked semiconductor laser 3-2 and the optical waveguide 4-2 having the highest repetition frequency are shown. And PD5-2 have the same configuration.

  Introduction of an optical signal into the optical circuit portion is performed by optical waveguides 4-1 and 4-2 formed on the semiconductor laser substrate 2. These optical waveguides 4-1 and 4-2 have a 45-degree mirror portion (the bent portions of the optical waveguides 4-1 and 4-2 in FIG. 2), and send optical signals to appropriate places in the optical circuit. Can be introduced. In the present embodiment, since optical signals are injected into the saturable absorption regions 31-1 and 31-2 of the passive mode-locked semiconductor lasers 3-1 and 3-2, the optical waveguides 4-1 and 4-2 are respectively This corresponds to the positions of the saturable absorption regions 31-1 and 31-2. In order to simultaneously introduce optical signals into these two optical waveguides 4-1 and 4-2, the light divided into two by the directional coupler 1 serving as a splitting means is connected to the optical waveguide 4-1 by an equal-length optical fiber for coupling. Guide to 4-2.

  In order to detect the optical signals that have passed through the saturable absorption regions 31-1 and 31-2 with the PDs 5-1 and 5-2, a reverse bias voltage is applied in the same manner as in the saturable absorption region, and the exciton absorption edge is detected. What is necessary is just to shift a wavelength. That is, light detection is based on monitoring the photocurrent obtained when a reverse bias is applied to the PDs 5-1 and 5-2. Photocurrents output from the PDs 5-1 and 5-2 are converted into voltages by the transimpedance circuits 11-1 and 11-2, respectively. Thereby, a light detection signal whose voltage is proportional to the light intensity is obtained.

  The output voltage of the transimpedance circuit 11-1 is input to the non-inverting input terminal of the differential amplifier circuit 12, and the output voltage of the transimpedance circuit 11-2 is input to the inverting input terminal of the differential amplifier circuit 12. The differential amplifier circuit 12 obtains a value obtained by adding a predetermined offset voltage Voff to the output difference between the transimpedance circuit 11-1 and the transimpedance circuit 11-2, and outputs a third passive mode-locked semiconductor laser 3- 3 is applied to the saturable absorber 31-3 as a reverse bias voltage of 3. Here, the offset voltage Voff is conveniently the median value of the reverse bias voltage range that achieves mode-locked oscillation.

  As described above, in the present embodiment, the intensity of the optical signal that has passed through the saturable absorption region 31-1 of the passive mode-locked semiconductor laser 3-1 and the saturable absorption region 31-2 of the passive mode-locked semiconductor laser 3-2 are determined. By passively controlling the effective refractive index of the passive mode-locked semiconductor laser 3-3 so that the difference from the intensity of the optical signal that has passed becomes zero, the optical clock synchronized with the optical signal is changed to the passive mode-locked semiconductor laser. 3-3 can be generated.

[Second Embodiment]
Next, a second embodiment of the present invention will be described. FIG. 4 is a block diagram showing the configuration of the optical clock extraction circuit according to the second embodiment of the present invention. The same components as those in FIG. 2 are denoted by the same reference numerals. In the present embodiment, saturable absorption regions 31-1 and 31-2 of passive mode-locked semiconductor lasers 3-1 and 3-2 are used as PDs.

  In order to operate the saturable absorption regions 31-1 and 31-2 as a PD, it is necessary to take out a photocurrent transmitted through the application electrode to an external electric circuit. Therefore, the resistors 13-1 and 13- are connected between the electrode pads 6-1 and 6-2 connected to the saturable absorption regions 31-1 and 31-2 and the reverse bias applying circuits 10-1 and 10-2. 2 is inserted to increase the apparent impedance of the reverse bias application circuits 10-1 and 10-2, thereby preventing current from flowing into the reverse bias application circuits 10-1 and 10-2, and the electrode pad 6-1. , 6-2 is converted into a voltage by the transimpedance circuits 14-1 and 14-2 to obtain a light detection signal.

The output voltage of the transimpedance circuit 14-1 is input to the non-inverting input terminal of the differential amplifier circuit 12, and the output voltage of the transimpedance circuit 14-2 is input to the inverting input terminal of the differential amplifier circuit 12. The operation of the differential amplifier circuit 12 is the same as that of the first embodiment.
As described above, in the present embodiment, saturable absorption regions 31-1 and 31-2 can be used as PDs, and the PDs can be omitted.

[Third Embodiment]
Next, a third embodiment of the present invention will be described. FIG. 5 is a cross-sectional view showing the structures of saturable absorption regions 31-1 and 31-2 of passive mode-locked semiconductor lasers 3-1 and 3-2 for light injection in the present embodiment. In this embodiment, in the optical clock extraction circuit of the first and second embodiments, a semiconductor laser is applied to the optical window provided by removing the cap layers of the saturable absorption regions 31-1 and 31-2. By irradiating the optical signal from a direction perpendicular to the substrate 2, the optical signal is injected into the saturable absorption regions 31-1 and 31-2. The present embodiment is characterized in that light injection into the saturable absorption regions 31-1 and 31-2 is performed using spatial propagation, and complicated optical wiring on the substrate is removed. Since the optical axis of light injection is perpendicular to the optical axis of the laser resonator in a direction perpendicular to the semiconductor laser substrate 2, the injected light does not circulate in the laser resonator.

  As described above, the cladding layer 35, the active layer 36, and the cladding layer 37 are sequentially formed on the semiconductor laser substrate 2, and the cap layer 38 is provided on the cladding layer 37 to make ohmic contact. . The cap layer 38 contains a metal such as Au / Sn and cannot transmit light. Therefore, in order to inject light into the saturable absorption region 31-1, a light injection window 39 is provided on a part of the upper surface of the saturable absorption region 31-1. The electrical connection is made by a cap layer 39 applied to portions other than the window 39. In order to form the electrode 41 electrically connected to the cap layer 39, an insulating layer 40 such as polyimide is formed on the side surface of the laser resonator and the substrate 2.

  In order to inject an optical signal into the saturable absorption region 31-1, light is condensed using the objective lens 42 to increase the density of the light injection. As an optical signal introduced up to the objective lens 42, collimated light propagating in space can be used. In consideration of compact mounting, when using collimated light along the semiconductor laser substrate 2, a prism lens 43 that bends the optical path by 90 degrees at the irradiated portion as shown in FIG. 5 is used. The objective lens 42 and the prism lens 43 constitute a first irradiation means. In FIG. 5, the saturable absorption region 31-1 of the semiconductor laser 3-1 is described, but the saturable absorption region 31-2 of the semiconductor laser 3-2 is also subjected to the same second irradiation unit. An optical signal can be injected.

  As described above, in the present embodiment, light injection into the saturable absorption regions 31-1 and 31-2 of the passive mode-locked semiconductor lasers 3-1 and 3-2 is performed using spatial propagation, Complex optical waveguides on the semiconductor laser substrate can be omitted.

  The present invention can be applied to an ultrafast optical signal processing circuit.

It is sectional drawing which shows the basic structure of the passive mode-locking semiconductor laser used by this invention. It is a block diagram which shows the structure of the optical clock extraction circuit used as the 1st Embodiment of this invention. FIG. 3 is a perspective view of a passive mode-locked semiconductor laser, an optical waveguide, and a photodiode formed on a semiconductor laser substrate in the optical clock extraction circuit of FIG. 2. It is a block diagram which shows the structure of the optical clock extraction circuit used as the 2nd Embodiment of this invention. It is sectional drawing which shows the structure of the saturable absorption area | region of the passive mode-locking semiconductor laser for light injection in the optical clock extraction circuit which becomes the 3rd Embodiment of this invention. It is a block diagram which shows the structure of the conventional optical clock extraction circuit of a phase locked loop type | mold. It is a block diagram which shows the structure of the conventional optical clock extraction circuit by photonic down conversion. It is a figure which shows the frequency spectrum of the output signal of the photodiode in the optical clock extraction circuit of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Directional coupler, 2 ... Semiconductor laser substrate, 3-1 to 3-3 ... Passive mode synchronous semiconductor laser, 4-1, 4-2 ... Optical waveguide, 5-1, 5-2 ... Photodiode, 6 -1-6-3, 7-1-7-3, 8-1, 8-2 ... electrode pads, 9-1-9-3 ... current supply, 10-1, 10-2 ... reverse bias application circuit, 11-1, 11-2, 14-1, 14-2 ... transimpedance circuit, 12 ... differential amplifier circuit, 13-1, 13-2 ... resistor, 30-1 to 30-3 ... gain region, 31- 1-31-3... Saturable absorption region, 39... Light injection window.

Claims (6)

Three mode-locked lasers with different cavity lengths;
A dividing means for dividing the input optical signal;
Of the three mode-locked lasers, the light divided into the saturable absorption region of the first mode-locked laser having the longest cavity length and the saturable absorption region of the second mode-locked laser having the shortest resonator length. An incident means for entering a signal;
Detecting means for independently detecting the intensity of the incident optical signal after passing through the saturable absorption region for each of the first mode-locked laser and the second mode-locked laser;
Based on the difference between the intensity of the optical signal passing through the saturable absorption region of the first mode-locked laser and the intensity of the optical signal passing through the saturable absorption region of the second mode-locked laser, the third mode Control means for electrically controlling the effective refractive index of the synchronous laser,
An optical clock extraction circuit characterized in that an optical clock synchronized with the input optical signal is generated from the third mode-locked laser by negatively feeding back the intensity difference of the optical signal to the control means. The optical clock extraction circuit according to claim 1,
The difference in cavity length between the first mode-locked laser and the third mode-locked laser is equal to the difference in cavity length between the third mode-locked laser and the second mode-locked laser. An optical clock extraction circuit. The optical clock extraction circuit according to claim 1,
The incident means is disposed in the vicinity of the saturable absorption region of the first mode-locked laser formed on the semiconductor laser substrate, and the optical axis of the optical signal is relative to the optical axis of the first mode-locked laser. A first optical waveguide for allowing an optical signal to enter the saturable absorption region so as to be orthogonal to each other, and a saturable absorption region of the second mode-locked laser formed on the substrate. An optical clock extraction circuit comprising: a second optical waveguide for allowing an optical signal to enter the saturable absorption region so that the optical axis is orthogonal to the optical axis of the second mode-locked laser. The optical clock extraction circuit according to claim 1,
The detection means includes a first light receiving element that is on the optical axis of an optical signal that passes through the first mode-locked laser and is disposed close to a saturable absorption region of the first mode-locked laser. A second light-receiving element disposed on the optical axis of the optical signal passing through the second mode-locked laser and disposed in the vicinity of the saturable absorption region of the second mode-locked laser; An optical clock extraction circuit comprising first and second current-voltage conversion means for converting the photocurrent output from the second light receiving element into a voltage, respectively. The optical clock extraction circuit according to claim 1,
The detection means detects a photocurrent flowing to a reverse bias application circuit that applies a reverse bias to a saturable absorption region of the first mode-locked laser, and converts the photoelectric current into a voltage, and the first current-voltage conversion means, An optical clock extraction comprising: a second current-voltage conversion means for detecting a photocurrent flowing to a reverse bias application circuit for applying a reverse bias to a saturable absorption region of the mode-locked laser of No. 2 and converting it into a voltage. circuit. The optical clock extraction circuit according to claim 1,
The incident means is configured to detect the optical signal from a direction perpendicular to the substrate with respect to a light injection window formed in a cap layer of a saturable absorption region of the first mode-locked laser formed on a semiconductor laser substrate. Direction perpendicular to the substrate with respect to the first irradiation means for injecting light and the light injection window formed in the cap layer of the saturable absorption region of the second mode-locked laser formed on the substrate An optical clock extraction circuit comprising: a second irradiating unit that causes the optical signal to be incident on the optical clock extraction circuit.

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