JP4397685B2 - Semiconductor detector - Google Patents

Description

  The present invention relates to a semiconductor detector for detecting irradiated charged particles, and more specifically, ions irradiated with a single energy such as helium or hydrogen and rebounded back by elastic scattering with atomic nuclei in the data. By measuring the energy spectrum of the ion, the ion scattering analyzer that identifies the constituent elements of the sample and analyzes the composition in the depth direction captures the scattered ions over a wide area, identifies the position where they were captured, and determines the energy of the ions. The present invention relates to a semiconductor detector that outputs a proportional electrical signal.

Among radiation, hard X-rays and γ-rays with a relatively low energy (10 to 150 keV) that are used for medical applications have a relatively high intensity. The solid scintillator once causes electromagnetic waves (visible light) and extremely low energy. By using a photomultiplier tube or a two-dimensional array element of a semiconductor photodiode that converts to an electron beam, the two-dimensional distribution of the irradiation beam can be detected easily and with high accuracy.
On the other hand, ion particles such as α rays (helium nuclei) having medium and high energy on the order of several tens keV to several MeV are often used for surface analysis of solids. In the case of such medium and high energy charged particles, since it is used for non-destructive analysis, information such as high detection sensitivity for distinguishing and counting individual ions and material composition related to scattering events. Energy resolution is required to obtain or distinguish from other particle beams. Therefore, position resolution type semiconductor detectors based on a direct conversion type detector structure have been devised and devised.
As a direct conversion type detector material, an intrinsic semiconductor crystal (typically silicon) that is always highly resistant at room temperature is used. When charged particles enter the surface, many electrons are generated along the track. -A general method is to collect hole pairs on an electrode with a high electric field and detect them as a minute current. FIG. 11 (a) shows a structure in which strip-like electrode arrays separated by grooves cut into the front surface (the side on which charged particles are incident) and the back surface of the intrinsic semiconductor substrate are arranged so as to intersect each other between the front and back surfaces. The example of a detection element is shown. By connecting the strip electrodes on both sides in series with resistors, the current charge generated by the charged particles flows to the amplifiers at both ends depending on the position and flows, and two-dimensional information is read (for example, (Refer nonpatent literature 1.). Further, in FIG. 11B, each pixel is separated in a matrix, and one amplifier is provided for each row and column, and the output of each detection element is guided to the corresponding row and column amplifier, A device for obtaining two-dimensional information has been devised (for example, see Patent Document 1).
However, a leakage current (referred to as a dark current) is generated between the electrodes deposited by ohmic contact on two opposing surfaces of the two-dimensional semiconductor as in the above example due to defects existing in the semiconductor crystal. For example, in the case of a silicon crystal having the highest specific resistance (up to 50 kΩcm) available, the resistance of a 1 cm ² × 1 mm thick element is 5 kΩ, and a dark current of 50 mA flows when a voltage of 100 V is applied. Become. Compared with the current of 1 μA when 10 ⁵ electron-hole pairs generated by one charged particle are collected, the current of 50 mA is extremely large, and the sensitivity as a detector is also great. This is not practical. Therefore, as a method for reducing the influence of this dark current, an electrode having a contact structure without carrier injection is used. For example, a material such as gold or aluminum that constructs a sufficiently high Schottky barrier for a semiconductor is used (surface barrier type), or in an n-type (p-type) semiconductor substrate, p-type (n In general, a structure in which a PN diode structure is formed (pn junction type) by performing a doping process of (type) is used.
Taking the latter as an example, the principle of a semiconductor detector in practical use will be described below. When a reverse bias voltage (a negative potential is applied to the electrode), holes flow from the p-type layer under the electrode to the n-type substrate, and conversely electrons flow from the n-type substrate to the p-type layer. Is formed (referred to as a “depletion layer”). The specific resistance of this depletion region is extremely high, and the gradient of the applied voltage is almost borne by this region, and a strong electric field of 10 ⁶ to 10 ⁷ V / m can be easily obtained. If charged particles enter the depletion layer, the generated hole-electron pairs can be efficiently collected by a strong electric field. If a depletion layer with a thickness larger than the charged particle range (entrance distance) is formed on the detector, a current signal proportional to the energy of the charged particles can be obtained.
The actual semiconductor detector selects the substrate doping concentration and operating bias voltage so that the thickness of the depletion layer is the same as the maximum range (entrance distance) determined by the type and energy of the target charged particles. To do. The design nomogram is shown in FIG. Since the α ray targeted for the present invention has an energy of 5.0 MeV or less, it can be read from FIG. 10 that the range (approach distance) is about 20 μm or less (FIG. 10 “Depletion Layer Thickness”). reference). Even if the depletion layer is further expanded, a bias voltage higher than necessary is required, and the dark current and the like only increase accordingly.
Such a thin depletion layer is formed under the electrode on the side where charged particles jump, and when the electrode is a negative potential (positive potential), holes (electrons) out of the hole-electron pairs are high on the depletion layer. Although it is immediately collected by the electric field and converted into a current signal by the electric field, electrons (holes) leave the depletion layer and then pass through a distance (up to several hundred μm) corresponding to the substrate thickness to the ground electrode on the back side. Arrive. At this time, the signal accompanying the movement of the electrons (holes) becomes a slow (slow) pulse proportional to the movement time, and overlaps with the hole (electron) signals of the charged particles that come one after another. Counting efficiency, ie sensitivity, is also reduced. Furthermore, a large number of electrons (holes) encounter crystal (lattice) defects existing inside the substrate before reaching the electrodes, and are lost due to recombination and trapping, leading to attenuation of the detection signal current.
In addition, in the case of a two-dimensional resolution type in which the back electrode as shown in FIG. 12 bears the position resolution in the direction intersecting the front electrode, the induced potential accompanying the movement of electrons (holes) spreads to sandwich the substrate thickness. As a result, the position information deteriorates. Furthermore, since the electric field in the substrate is distorted due to the charge remaining inside the substrate and trapped electrons, there is a problem that accurate position information cannot be obtained from the signal from the back electrode.
For example, as shown in FIG. 13, in addition to the front electrode and the back electrode for supplying the operating voltage, the signal current of the charged particles is applied to the above-mentioned many problems in order to ensure good response even in a thick substrate. A device in which a third electrode for detection is arranged on the surface in an interdigital structure is known (for example, see Patent Document 2). Further, as shown in FIG. 14, a device is known in which an effective substrate thickness is reduced using an SOI substrate, a through-hole is formed from the back surface, and the back electrode is brought close to the surface (for example, Patent Documents). 3). Neither of them relates to the detector of the position resolution type semiconductor detector that is the subject of the present invention, but is an example of a device for a common problem.
JP-A 61-14591 JP-A-10-56196 Japanese Patent Laid-Open No. 2003-294846 IEEE Trans. on Nuclear Science, Vol. MS-24, no. 1, 1997, p. 182-187

Conventional structure in which positive / cathode electrodes are arranged on the front / rear surface of a semiconductor substrate having a thickness (several hundred μm) several tens to several hundreds times the range (entrance distance) of incident charged particles of about several μm (FIG. 12). ), The charge of holes or electrons attracted to the back electrode is trapped by traps existing in the semiconductor material, and the detection signal waveform becomes smaller and the sensitivity deteriorates or the waveform becomes dull in time. Problems such as deterioration of the position information of the back signal.
An object of the present invention is to subsurface the surface of a semiconductor detector to a depth of about several μm in order to overcome the problem of a decrease in counting efficiency associated with the arrangement of positive / negative electrodes on the front / back side of a conventional detector. For charged heavy particle beams such as α-rays of several MeV or less that only enter, the electron-hole pairs generated inside the semiconductor detector are captured and collected efficiently and responsively. It is to provide a semiconductor detector that can be directly converted into a one-dimensional or two-dimensional position information signal.

In order to solve the above problems, the present invention provides:
A semiconductor detector for measuring the energy of charged particles incident on the surface of a semiconductor substrate,
A plurality of anode wirings and a plurality of cathode wirings are arranged in a lattice and / or alternately in an array on one surface of the semiconductor substrate on which the charged particles are incident,
When the semiconductor substrate is an n-type semiconductor substrate, a p-type layer is in contact with the cathode wiring of the n-type semiconductor substrate, and when the semiconductor substrate is a p-type semiconductor substrate, An n-type layer is formed in a portion in contact with the anode wiring ;
The plurality of anode wirings and the plurality of cathode wirings are formed in a lattice shape, and the p-type layer (or n-type layer) and / or the n ⁺ -type layer (or p ⁺ -type layer) forms a lattice shape. The semiconductor detector has a shape protruding in a convex shape toward a rectangular center surrounded by the anode wiring and the cathode wiring .
Further, the semiconductor substrate may be an SOI wafer having a SiO ₂ insulating layer.
Alternatively, the anode wiring is embedded in a groove formed in the semiconductor substrate when the semiconductor substrate is an n-type semiconductor substrate, and the cathode wiring is embedded in the semiconductor substrate when the semiconductor substrate is a p-type semiconductor substrate. Thus, a more preferable semiconductor detector is configured.
Alternatively, the present invention
A semiconductor detector for measuring the energy of charged particles incident on the surface of a semiconductor substrate, which is an SOI wafer having an insulating layer of SiO ₂ ,
A plurality of anode wirings and a plurality of cathode wirings are arranged in a lattice and / or alternately in an array on one surface of the semiconductor substrate on which the charged particles are incident,
When the semiconductor substrate is an n-type semiconductor substrate, a p-type layer is in contact with the cathode wiring of the n-type semiconductor substrate, and when the semiconductor substrate is a p-type semiconductor substrate, An n-type layer is formed in a portion in contact with the anode wiring;
The anode wiring is embedded in a groove formed in the semiconductor substrate when the semiconductor substrate is an n-type semiconductor substrate, and the cathode wiring is embedded in the semiconductor substrate is a p-type semiconductor substrate. It is also possible to configure as a semiconductor detector characterized by this.
Further, when the semi-conductor substrate is an n-type semiconductor substrate, an n ⁺ -type layer is formed on a portion of the semiconductor substrate in contact with the anode wiring, and when the semiconductor substrate is a p-type semiconductor substrate, the semiconductor substrate It is desirable that a p ⁺ -type layer is formed at a portion in contact with the cathode wiring .
Specific resistance value before Symbol semiconductor substrate is preferably not less than 10 .OMEGA.cm.
When the semiconductor substrate is an n-type semiconductor substrate, it is desirable that a p-type layer is formed by doping an appropriate amount of boron in the substrate portion in contact with the cathode wiring.
Alternatively, it is desirable that an n ⁺ -type layer is formed by doping an appropriate amount of arsenic or phosphorus in the substrate portion in contact with the anode wiring.
In addition, when the semiconductor substrate is a p-type semiconductor substrate, it is desirable that an n-type layer is formed by doping an appropriate amount of arsenic or phosphorus in a portion where the anode wiring is in contact.
Alternatively, it is desirable that the p ⁺ -type layer is formed by doping an appropriate amount of boron in the substrate portion in contact with the cathode wiring .

  As described above, according to the present invention, the electron-hole pair generated inside the semiconductor detector by receiving charged particle beams such as α rays that penetrate only to a depth of about 20 μm or less under the sensitive surface of the semiconductor detector is efficiently obtained. Therefore, it is possible to provide a semiconductor detector that has better responsiveness, position resolution, and the like than conventional detectors.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments and examples of the present invention will be described below with reference to the accompanying drawings for understanding of the present invention. It should be noted that the following embodiments and examples are examples embodying the present invention and do not limit the technical scope of the present invention. The following embodiments, examples and drawings are described on the assumption that the semiconductor substrate is an n-type semiconductor substrate, but all polarities are reversed even if the semiconductor substrate is a p-type semiconductor substrate. Since it is obvious that the present invention can be implemented, the description is merely omitted, and the technical scope of the present invention is limited to the case of an n-type semiconductor substrate. is not.
FIG. 1A is an example of an embodiment of a pn junction type charged particle semiconductor detector having a two-dimensional position resolution based on the present invention. In this embodiment, a plurality of anode wirings 7 and cathode wirings 5 orthogonal to the anode wirings 7 are provided on only one surface, which is a surface on which charged particles are incident on the n-type semiconductor substrate 1, via an insulating layer 8. It is characterized by being arranged in a grid pattern. In order to function as a semiconductor detector, a p-type layer 4 is formed in a portion where the cathode wiring 5 (excluding the intersection with the anode wiring 7) is in contact with the n-type semiconductor substrate 1, and the n-type semiconductor substrate A pn junction structure must be formed between
FIG. 3 is an example of an embodiment of a pn junction type charged particle semiconductor detector having one-dimensional position resolution according to the present invention. In this case, the basic structure is the same as that of the detector having the two-dimensional position resolution, but a plurality of anode wirings 7 and cathodes are provided only on one side, which is the side on which charged particles are incident on the n-type semiconductor substrate 1. A characteristic is that the wires 5 are alternately arranged in parallel in an array. In order to function as a semiconductor detector, a p-type layer 4 is formed in a portion where the cathode wiring 5 (excluding the intersection with the anode wiring 7) is in contact with the semiconductor substrate 1, and the n-type semiconductor substrate 1 A pn junction structure must be formed between the two.

Hereinafter, the operation of the semiconductor detector according to the present invention will be described with reference to FIGS.
The plurality of cathode wirings 5 are coupled by a pulse shaping circuit composed of a capacitor 13 and a resistor 14 and connected to two preamplifiers 15a and 15b via a coupling capacitor 16 for bias voltage cut at the end. The cathode wiring 5 is supplied with a bias voltage 11 through a high resistance 12, respectively. Similarly, the anode wiring 7 is also coupled by a pulse shaping circuit composed of a capacitor 13 and a resistor 14, and its end is directly coupled to the two preamplifiers 15c and 15d.
Through this circuit system, when a bias voltage 11 is applied to a pn junction formed from the p-type layer 4 immediately below the surface of the negative electrode wiring 5 and the n-type active layer 3 of the substrate, it moves downward to the p-type layer 4. The depletion layer 9 spreads, but eventually the depletion layer 9 spreads in the lateral direction and spreads into a region surrounded by the cathode wiring 5 and the anode wiring 7. The spread depletion layer 9 becomes a charged particle sensitive surface.
The charge of the holes generated when the charged particles are incident on the region where the depletion layer 9 is spread is collected on the negative electrode 5 and the charge of the electrons is collected on the positive electrode 7. The voltage signals are read out by the preamplifiers 15a-15b or 15c-15d at both ends which are divided according to the charge. FIG. 5 shows an embodiment of a signal readout circuit, and FIG. 6 shows an equivalent circuit simulating a two-dimensional readout system with a diode. The signal readout circuit system is not limited to the case where the cathode wiring 5 and the anode wiring 7 intersect at right angles. For example, as shown in FIG. 7, it may be configured to intersect at 60 ° or obliquely intersect.
As shown in FIG. 8, there are a resistance division type constituted only by a resistor and a capacitance division type constituted by a resistor and a capacitor as charge division methods for specifying the incident position. FIG. 9 summarizes each feature. In the case of measuring each signal as a pulse signal like a charged particle detector, a capacity division type is generally suitable.
In this embodiment, the anode wiring 7 and the cathode wiring 5 are disposed only on one side of the semiconductor substrate 1 that receives charged particles, so that the depletion layer 9 that senses charged particles has a surface side of several μm that receives charged particles. Since it is formed to be biased to a certain depth, charged particles that enter only a few μm of the surface of the sensitive surface of the semiconductor substrate 1 can be captured efficiently.

A specific embodiment of the present invention capable of obtaining particularly suitable detection characteristics will be described with reference to FIGS.
As a first embodiment, there is a case where an n ⁺ -type layer 6 is formed on a portion of the semiconductor substrate 1 in contact with the anode wiring 7. The n ⁺ -type layer 6 is for ensuring ohmic contact between the semiconductor substrate 1 and the anode wiring 7, and thereby the influence of dark current is relatively reduced, so that suitable detection characteristics are obtained. It becomes possible.
As a second embodiment, a semiconductor detector for pn junction type charged particles having the two-dimensional position resolution, in which the plurality of anode wirings 7 and the plurality of cathode wirings 5 are formed in a grid pattern (FIG. 1A). And the p-type layer 4 and / or the n ⁺ -type layer 6 is formed on a substrate surface exposed portion of a rectangular region surrounded by the cathode wiring 5 and the anode wiring 7. . In this case, it is preferable that the p-type layer 4 and / or the n ⁺ -type layer 6 have a shape protruding in a convex shape toward the center of the region. In this example, as shown in FIGS. 1B to 1D, since the surface area of the depletion layer 9 is increased and the sensitive area ratio can be increased, it is possible to obtain suitable detection characteristics. Further, as shown in the upper diagram (e) of FIG. 1, by extending the n ⁺ type layer 6 immediately below the anode wiring 7 and making it a “shape” shape parallel to the two sides of the rectangle, The sensitive area ratio can be increased.
As a third embodiment, the semiconductor substrate 1 has a specific resistance of 10 Ωcm or more. In this case, since the influence of the dark current becomes relatively small, it is possible to obtain suitable detection characteristics.
As a fourth embodiment, the p-type layer 4 is formed to a thickness of 0.1 to 2.0 μm by doping boron element of 10 ¹⁴ to 10 ¹⁵ [/ cm ² ] by ion implantation or surface diffusion. The n ⁺ -type layer 6 is formed to a thickness of 0.1 to 2.0 μm by doping arsenic or phosphorus elements of 10 ¹⁵ to 10 ¹⁶ [/ cm ² ] by ion implantation or surface diffusion. There are cases. Thus, it is possible to obtain suitable detection characteristics by selecting an appropriate doping concentration and forming a p-type layer and / or an n ⁺ -type layer having an appropriate thickness.
As a fifth embodiment, and the like when using an SOI wafer in which an insulating layer 2 of SiO ₂ is formed as the semiconductor substrate 1. As a result, charge collection efficiency can be improved, and suitable detection characteristics can be obtained.
As a sixth embodiment, as shown in FIG. 2, a groove shallower than the insulating layer 2 of SiO ₂ is formed in the active layer 3 of the semiconductor substrate 1, and the anode wiring 4 is embedded in the groove. Is mentioned. As a result, the charge collection efficiency can be further improved, and suitable detection characteristics can be obtained.

Here, the reason why the charge collection efficiency can be improved in the case of the fifth and sixth embodiments will be described in detail with reference to FIG.
FIG. 4A shows the case of a semiconductor detector having a positive electrode 7a having a ground potential on the back surface of the semiconductor substrate 1 (active layer 3), and shows the prior art. A plurality of cathode wirings 5 are arranged in parallel on the surface on which charged particles are incident, and a portion in contact with the semiconductor substrate 1 becomes a p-type layer, and a depletion layer spreads downward by applying a bias voltage. Holes generated when charged particles enter between the cathode wiring 5 are immediately collected by the cathode, but the electrons pass through the depletion layer, pass through the thick active layer, and are absorbed by the grounded positive electrode on the back surface. The The thick active layer has many lattice defects and electrons are lost due to recombination and trapping, so the charge collection efficiency is low.
FIG. 4B shows a semiconductor detector in which a plurality of cathode wirings 5 and anode wirings 7 are alternately arranged in parallel on the surface on which charged particles are incident, and shows an embodiment of the present invention. . Similarly, by applying a bias voltage, the depletion layer first spreads from the p-type layer 4 immediately below the cathode wiring 5, but eventually spreads toward the anode wiring 7 along the lines of electric force and covers the surface. Although the depletion layer extends somewhat in the substrate (ie, downward) but is limited to the vicinity of the surface, holes and electrons generated by the charged particles are efficiently collected on the cathode and the anode, respectively. Therefore, both responsiveness and position resolution are improved as compared with the prior art.
FIG. 4C shows a semiconductor detector that employs an SOI wafer in which an insulating layer 2 of SiO ₂ is buried under the surface as the semiconductor substrate 1, and is an embodiment of the present invention. This corresponds to the case of 5. The depletion layer first spreads downward, but when it reaches the insulating layer 2 of SiO ₂ , it does not spread downward and starts to spread laterally. As a result, the depletion layer is limited to a very thin active layer, so that the electric field strength inside the depletion layer is increased and the charge collection efficiency is improved. Therefore, responsiveness and position resolution are improved as compared with the embodiment of FIG.
FIG. 4D shows a semiconductor detector having a structure in which a groove is dug in the active layer 3 of the semiconductor substrate 1 which is the SOI wafer and a positive electrode 7 is buried, which is an embodiment of the present invention. This corresponds to the case of the sixth embodiment. The depletion layer spreads in the same manner as in FIG. In addition, in the case of the present embodiment, it can be understood from the figure that the electric field lines in the active layer run parallel to the surface, so that the electric field distribution is more uniform. Thereby, the charge collection efficiency is improved, and the response and the position resolution are further improved as compared with the embodiment of FIG.
In FIG. 4, only the case where a plurality of anode wirings and cathode wirings according to an embodiment of the present invention are alternately arranged in parallel is described. However, the drawing is simplified for easy understanding. Even when a plurality of anode wirings and cathode wirings, which are other embodiments of the present invention, are arranged in a grid pattern, the same principle will be used.

(A) The schematic cross-sectional perspective view of the two-dimensional position resolution type | mold detector which is an example of embodiment of the semiconductor detector which concerns on this invention. (B) thru | or (e) The schematic which looked at the rectangular shape enclosed by the anode wiring and the cathode wiring from the upper direction. It is a two-dimensional position resolution type detector similarly, Comprising: The schematic cross-sectional perspective view which shows another embodiment. 1 is a schematic cross-sectional perspective view of a one-dimensional position resolution type detector that is an example of an embodiment of a semiconductor detector according to the present invention. Sectional drawing of a one-dimensional resolution type | mold detector which shows that charge collection efficiency improves by each Example of this invention. The conceptual diagram which shows an example of the signal read-out circuit in the two-dimensional position resolution type | mold detector which is an example of embodiment of the semiconductor detector which concerns on this invention. FIG. 6 is an equivalent circuit diagram simulating an example of the signal readout circuit shown in FIG. 5 with a diode. The conceptual diagram which shows the modification of the signal read-out circuit shown in FIG. The circuit diagram which shows the resistance division type circuit and capacitance division type circuit which are examples of the circuit which performs the electric charge division for pinpointing the incident position of a charged particle. FIG. 9 is a comparison diagram comparing the resistance division type characteristics and the capacitance division type characteristics shown in FIG. 8. Design nomogram when a silicon substrate is used as the semiconductor substrate. The perspective view of the two-dimensional position resolution type | mold semiconductor detector for high energy particles, such as a gamma ray, which is a prior art. The schematic cross-sectional perspective view of the two-dimensional position resolution type | mold semiconductor detector which has arrange | positioned the cross electrode on the front and back which is a prior art. Fig. 1 and Fig. 2a, b of Patent Document 2. FIG. 4 of Patent Document 3.

Explanation of symbols

1 ... (n-type) semiconductor substrate 2 ... insulating layer (SiO ₂₎
DESCRIPTION OF SYMBOLS 3 ... Active layer 4 ... p-type layer 5 ... Cathode wiring 6 ... n ⁺ type layer 7 ... Anode wiring 8 ... Insulating layer 9 ... Depletion layer 11 ... Bias power supply 12, 14 ... Resistance 13, 16 ... Capacitor 15 ... Preamplifier

Claims (10)

A semiconductor detector for measuring the energy of charged particles incident on the surface of a semiconductor substrate,
A plurality of anode wirings and a plurality of cathode wirings are arranged in a lattice and / or alternately in an array on one surface of the semiconductor substrate on which the charged particles are incident,
When the semiconductor substrate is an n-type semiconductor substrate, a p-type layer is in contact with the cathode wiring of the n-type semiconductor substrate, and when the semiconductor substrate is a p-type semiconductor substrate, An n-type layer is formed in a portion in contact with the anode wiring ;
The plurality of anode wirings and the plurality of cathode wirings are formed in a lattice shape, and the p-type layer (or n-type layer) and / or the n ⁺ -type layer (or p ⁺ -type layer) forms a lattice shape. A semiconductor detector having a shape protruding in a convex shape toward a rectangular center surrounded by the anode wiring and the cathode wiring . The semiconductor substrate is made of SiO. ₂ The semiconductor detector according to claim 1, which is an SOI wafer having a plurality of insulating layers. The anode wiring is embedded in a groove formed in the semiconductor substrate when the semiconductor substrate is an n-type semiconductor substrate, and the cathode wiring is embedded in the semiconductor substrate is a p-type semiconductor substrate. The semiconductor detector according to claim 2. SiO ₂ A semiconductor detector for measuring the energy of charged particles incident on the surface of a semiconductor substrate which is an SOI wafer having an insulating layer of
A plurality of anode wirings and a plurality of cathode wirings are arranged in a lattice and / or alternately in an array on one surface of the semiconductor substrate on which the charged particles are incident,
When the semiconductor substrate is an n-type semiconductor substrate, a p-type layer is in contact with the cathode wiring of the n-type semiconductor substrate, and when the semiconductor substrate is a p-type semiconductor substrate, An n-type layer is formed in a portion in contact with the anode wiring;
The anode wiring is embedded in a groove formed in the semiconductor substrate when the semiconductor substrate is an n-type semiconductor substrate, and the cathode wiring is embedded in the semiconductor substrate is a p-type semiconductor substrate. A semiconductor detector. When the semiconductor substrate is an n-type semiconductor substrate, an n ⁺ -type layer is in contact with the anode wiring of the semiconductor substrate, and when the semiconductor substrate is a p-type semiconductor substrate, the cathode wiring of the semiconductor substrate. The semiconductor detector according to claim 1, wherein a p ⁺ -type layer is formed in a portion in contact with the semiconductor detector. The semiconductor detector according to any of claims 1 to 5 the resistivity of the semiconductor substrate is not less than 10 .OMEGA.cm. It said semiconductor substrate is an n-type semiconductor substrate, wherein by an appropriate amount of boron is doped into the substrate portion where the cathode lines are in contact with the semiconductor according to any one of claims 1 p-type layer is formed 6 Detector. Said semiconductor substrate is an n-type semiconductor substrate, wherein by an appropriate amount of arsenic or phosphorus is doped in the substrate portion where the anode wire is in contact, either to n ⁺ -type layer claims 1 becomes formed 7 The semiconductor detector as described. It said semiconductor substrate is a p-type semiconductor substrate, wherein by an appropriate amount of arsenic or phosphorus is doped in the substrate portion where the anode wire is in contact, according to any one of claims 1 n-type layer is formed 6 Semiconductor detector. It said semiconductor substrate is a p-type semiconductor substrate, one said by the appropriate amount of boron is doped into the substrate portion where the cathode lines are in contact with the preceding claims 1 p ⁺ -type layer is formed of 6 or claim 9 A semiconductor detector according to claim 1.

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