JP4393609B2 - Capacitor circuit, switched capacitor filter, and A / D converter - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a capacitor circuit using a capacitor whose capacitance value slightly changes depending on a voltage applied to both electrodes, and a switched capacitor filter and an A / D converter including the capacitor circuit.
[0002]
[Prior art]
A circuit in which a capacitor manufactured using two polycrystalline silicon electrodes is disclosed in, for example, US Pat. No. 5,208,597. FIG. 3 shows an example of a circuit using this, and includes a switched capacitor filter composed of switches S1 and S2, capacitors 1a and 1b (capacitance C ₁ ), and an operational amplifier 2 in which a capacitor 3 is connected between the input and output terminals. It is a circuit having.
[0003]
Capacitors 1a and 1b have a structure in which a polysilicon layer closer to the substrate and a polysilicon layer farther from the substrate are used as electrodes in the semiconductor multilayer structure, and an oxide layer is provided between them (having a curvature in the figure). What has been described thus shows a polysilicon layer closer to the substrate (the same applies hereinafter). The two capacitors are connected to each other using the same polysilicon layer farther from the substrate.
[0004]
Then, in this circuit, the switch S1 is turned on during the sampling, the equivalent circuit at that time, so the when the parasitic capacitance between the polysilicon layer closer to the substrate and the substrate and C ₂ FIGS. 4 (a) , there is no influence of the noise voltage v _n from the substrate. On the other hand, the switch S2 is in a conducting state during integration, and the equivalent circuit at that time is as shown in FIG. 4B, so that the noise during integration is “C ₂ · v _n ”. As a result, the mean square noise at the time of sampling and integration is expressed as “C ₂ · v _n .
[0005]
FIG. 5 shows another conventional circuit having a switched capacitor filter composed of switches S1 and S2, capacitors 1c and 1d (capacitance C ₁ ), and an operational amplifier 2 in which a capacitor 3 is connected between the input and output terminals. is there.
Capacitors 1c and 1d have a structure in which a polysilicon layer closer to the substrate and a polysilicon layer farther from the substrate are used as electrodes in the semiconductor laminated structure, and an oxide layer is provided between them. Are connected to each other using a polysilicon layer closer to the substrate.
[0006]
Then, in this circuit, the switch S1 is turned on during the sampling, the equivalent circuit at that time, when the parasitic capacitance between the polysilicon layer closer to the substrate and the substrate and C _2, is shown in FIGS. 6 (a) .
At this time, the voltage difference due to noise at the point A is “(2C ₂ / (2C ₁ + 2C ₂ )) · v _n ”, so the charge noise is “(2C ₂ / (2C ₁ + 2C ₂ )) · v _n · C ₁ = ((C ₁ · C ₂ ) / (C ₁ + C ₂ )) · v _n ”.
[0007]
On the other hand, the switch S2 is turned on when the integral, since the equivalent circuit at that time becomes as shown in FIG. 6 (b), the well voltage difference due to noise at point B, _{"(2C 2 / (2C 1 +} 2C 2)) · v _n ”, and the charge noise is“ (2C ₂ / (2C ₁ + 2C ₂ )) · v _n · C ₁ = ((C ₁ · C ₂ ) / (C ₁ + C ₂ )) · v _n ”.
As a result, v _n are the frequency to uniformly distributed, when a so-called white noise, the mean square noise at the time of integration with time of sampling _{"((C 1 · C 2)} / (C 1 + C 2 )) · √2 · v _n Equation 2 ”is known.
[0008]
[Problems to be solved by the invention]
By the way, since it is desirable to reduce such charge noise as much as possible, the appearance of a circuit for performing such noise reduction has hitherto been desired.
Further, in the above-mentioned US Pat. No. 5,208,597, although a circuit for suppressing odd-order voltage dependency is disclosed in a circuit in which capacitors manufactured using two polycrystalline silicon electrodes are disclosed, The present invention, which has been required to be improved from the viewpoint of reducing the nonlinearity of the value, has been made in view of such circumstances, and provides a capacitor circuit capable of reducing the nonlinearity of the capacitance value as much as possible while reducing the charge noise. This is the issue.
[0009]
Another object of the present invention is to provide a switched capacitor filter and an A / D converter including the capacitor circuit.
[0010]
[Means for Solving the Problems]
In order to achieve the above object, an invention according to claim 1 is a capacitor circuit connected to an input terminal of an operational amplifier, wherein the first polycrystalline silicon disposed closer to the semiconductor substrate and farther from the semiconductor substrate. A plurality of capacitors each having a second polycrystalline silicon disposed on the electrode and connected in series, and one capacitor connected to be adjacent to each other and the other capacitor are connected to each other. a capacitor circuit to said first of said second feature to be performed by connecting the polycrystalline silicon of the polycrystalline silicon and the other capacitor of the capacitor.
[0011]
The invention according to claim 2 is a switched capacitor filter comprising a first polycrystalline silicon disposed closer to a semiconductor substrate and a second polycrystalline silicon disposed farther from the semiconductor substrate. A capacitor circuit in which a plurality of capacitors as electrodes are connected in series; and a switching circuit that performs a switching operation so as to perform charge accumulation and charge transfer by the capacitor circuit, and are connected to be adjacent to each other in the capacitor circuit. one connection of the capacitor and the other capacitor has is characterized in that which is performed by connecting said second polycrystalline silicon of the first polycrystalline silicon and the other capacitor of the one capacitor This is a switched capacitor filter.
[0012]
The invention according to claim 3 is the switched capacitor filter according to claim 2,
A reference circuit that outputs one of a plurality of reference signals via a second switched capacitor filter;
An integrating circuit for performing an integral output of the output of the switched capacitor filter and the output of the reference circuit;
And an A / D converter including a quantization circuit for quantizing the output of the integration circuit.
[0013]
According to a fourth aspect of the present invention, in the A / D converter according to the third aspect, the integrating circuit includes an operational amplifier and a second capacitor circuit that connects between the input and output terminals. The second capacitor circuit includes a plurality of capacitors each having a first polycrystalline silicon arranged closer to the semiconductor substrate and a second polycrystalline silicon arranged farther from the semiconductor substrate as electrodes. In addition, the connection between one capacitor and the other capacitor connected to be adjacent to each other is performed by connecting the first polycrystalline silicon of the one capacitor and the second capacitor of the other capacitor. characterized in that it is performed by connecting the crystalline silicon.
[0014]
According to a fifth aspect of the present invention, there is provided a capacitor circuit connected to the input terminal of the operational amplifier, wherein the first polycrystalline silicon disposed closer to the semiconductor substrate and the first polycrystalline silicon disposed farther from the semiconductor substrate. A plurality of capacitors each having two polycrystalline silicon electrodes connected in series, and one capacitor connected to be adjacent to the other capacitor is connected to the other capacitor by the first capacitor. The first polycrystalline silicon is connected to the second polycrystalline silicon of the other capacitor , and the second polycrystalline silicon is connected to the input end direction side in any capacitor. The capacitor circuit is configured to be configured as described above.
[0015]
Here, to be connected to the input end direction side means to be connected directly or indirectly (for example, via a circuit element) to the input end of the operational amplifier.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows a switched capacitor filter according to an embodiment of the present invention and an integrating circuit connected thereto. Integrating circuit is constituted by an operational amplifier 20 connected to capacitor 30 between the input and output terminals, the operational amplifier 2 0 inverted input terminal to the capacitor 10a, 10b (the capacitance C ₁₎ with connecting those connected in series, the series A switched capacitor filter is configured by connecting switches S1 and S2 to both ends of the connected capacitors 10a and 10b.
[0017]
Capacitors 10a and 10b each have a first polysilicon arranged closer to the substrate and a second polysilicon arranged farther from the substrate in the semiconductor structure as both electrodes, and an oxide layer between the electrodes. Etc. are provided. Both capacitors are connected to each other by the second polysilicon electrode of the capacitor 10a and the first polysilicon electrode of the capacitor 10b.
[0018]
If it explains easily using the schematic plan view which showed only the principal part of the semiconductor structure of FIG. 7, the 1st polysilicon (lower electrode) which is one electrode of the capacitor | condenser 10a will be connected to the input terminal side. At the same time, the second polysilicon (upper electrode) which is the other electrode is connected to the first polysilicon (lower electrode) which is one electrode of the adjacent capacitor 10b. A certain second polysilicon (upper electrode) is connected to the inverting input terminal direction side of the operational amplifier 20 .
[0019]
Thus, in each of the capacitors, the second polysilicon electrode is connected to the inverting input terminal direction side of the operational amplifier 20 , and the first polysilicon electrode is connected to the input terminal direction side. and it is further connected with a different poly-silicon to each other. In this circuit, the switch S1 is in a conducting state at the time of sampling, and the equivalent circuit at that time assumes that the parasitic capacitance between the substrate and the first polysilicon layer close to the substrate is C ₂ , as shown in FIG. It becomes like this.
At this time, the voltage difference due to the noise at the point C is “(C ₂ / (2C ₁ + C ₂ )) · v _n ”, so the charge noise is “(C ₂ / (2C ₁ + C ₂ )) · v”. _n · C ₁ = ((C ₁ · C ₂ ) / (2C ₁ + C ₂ )) · v _n ”.
[0020]
On the other hand, the switch S2 becomes conductive during integration, and the equivalent circuit at that time is as shown in FIG. 2B. Therefore, the voltage difference due to noise at the point D is also "(C ₂ / (2C ₁ + C ₂ )) · v _n ”, and the charge noise is“ (C ₂ / (2C ₁ + C ₂ )) · v _n · C ₁ = ((C ₁ · C ₂ ) / (2C ₁ + C ₂ )) · v _n ”. As a result, the mean square noise at the time of sampling and integration is “((C ₁ · C ₂ ) / (2C ₁ + C ₂ )) · √2 · v _n ...
[0021]
Here, when comparing the above-described Expression 2 and Expression 3, Expression 3 clearly has a larger denominator, and the value of Expression 3 is smaller than the value of Expression 2. Further, in a normal MOSFET, C ₁ is about 10 times C ₂ , and therefore, Equation 3 is “((C ₁ · C ₂ ) / (2C ₁ + C ₂ )) · √2 · v _n = ((10 C _{2 · C 2) / (2} · 10C 2 + C 2)) · √2 · v n = (10C 2/21) · √2 · v n = 0.67C 2 · v n ", and therefore, of the formula 3 The value is smaller than the value of Equation 1 described above, and noise received from the substrate is reduced as compared with the conventional case.
[0022]
In addition, this configuration also reduces nonlinearity, which will also be described.
The voltage dependency of the capacitance value of the capacitor as shown in FIG. 8A is expressed as follows: “C = C ₀ (1 + k ₁ · V + k ₂ · V ² + k ₃ · V ³ ), where C ₀ is the capacitance value when no voltage is applied. + K ₄ · V ⁴ ... When two capacitors are connected in series as in the present invention, the capacitance value is doubled, and the capacitor value is increased prior to normal operation or intermittently as shown in FIG. Is shorted to make the charge accumulated in the capacitor zero, so that the applied voltage during normal operation becomes V / 2.
[0023]
Therefore, the capacitance of each capacitor is “C = 2C ₀ (1 + k ₁ · (V / 2) + k ₂ · (V / 2) ² + k ₃ · (V / 2) ³ + k ₄ · (V / 2) ⁴ ...) The _total capacitance C _total of the two capacitors is “C _total = C ₀ (1 + k ₁ · (V / 2) + k ₂ · (V / 2) ² + k ₃ · (V / 2) ³ + k ₄ · ( V / 2) ⁴ ... ”, And the coefficients of the first, second, third,... Are 1/2, 1/4, 1/8.
[0024]
In this way, a plurality of capacitors 10a and 10b connected in series are connected to the inverting input terminal of the operational amplifier 20, and both electrodes of each capacitor 10a and 10b are made of polysilicon closer to the substrate and polysilicon farther from the substrate. Further, since the electrodes are connected using different polysilicons, that is, the second polysilicon of the capacitor 10a and the first polysilicon of the capacitor 10b, the capacitance value is nonlinear while reducing charge noise. Therefore, a switched capacitor filter including the capacitor circuit can be realized.
[0025]
Furthermore, both the capacitor 10a, In the 10b respectively of, together with the second polysilicon electrode is connected to the inverting input terminal side of the operational amplifier 2 0, in the first polysilicon electrode input terminal direction Since they are connected and further connected using different polysilicons, the influence of noise from the substrate of the capacitor circuit is further reduced.
[0026]
Next, an A / D converter using the switched capacitor filter shown in FIG. 1, which is another embodiment of the present invention, will be described with reference to FIGS.
This A / D converter filters the output sampling circuit 100 using the switched capacitor filter shown in FIG. 1 and one of the two reference signals a and b with the switched capacitor filter and outputs the filtered signal. The integration circuit 200 that integrates the outputs of the reference circuit 400, the input sampling circuit 100, and the reference circuit 400 and outputs an integration result, and compares the output integration result with a threshold value to generate a 1-bit quantized signal. It has a quantizer 300 for outputting, and a control circuit 500 for generating a control signal by feeding back the quantized signal.
[0027]
The integrating circuit 200 includes an operational amplifier 20 in which capacitors 31a and 31b connected in series between input and output terminals thereof are connected. The capacitors 31a and 31b are arranged closer to the substrate in the semiconductor structure. The first polysilicon and the second polysilicon arranged farther from the substrate are both electrodes, and an oxide layer or the like is provided between the electrodes. The second polysilicon of the capacitors 31 a and 31 b is connected to the output end direction side of the operational amplifier 20.
[0028]
The control circuit 500 is configured to generate control signals for the switches S1 and S2 (both are conductive when a high level signal is supplied) so as to perform charge accumulation and transfer operations of the switched capacitor filter. The control circuit 500 gives a control signal to the input switch S4 so that the reference signal b is selectively output when the quantized signal is at a high level, while the reference signal a is at a low level when the quantized signal is at a low level. In order to give a high level signal to the input switch S3 so as to be selectively output, a low level signal is supplied to the inverter gate 31.
[0029]
Next, the operation will be described with reference to FIG. The control circuit 500 alternately sets the control signals S1 and S2 to the high level to alternately turn on the switches S1 and S2.
First, when the control circuit 500 sets the control signal S1 to a high level and the switch S1 becomes conductive, the capacitors 10a and 10b of the switched capacitor filter of the input sampling circuit 100 sample the analog signal and the switched capacity of the reference circuit 400. The filter filters 11a and 11b sample the reference signal selected at that time.
[0030]
Next, when the control circuit 500 sets the control signal S2 to the high level, the accumulated charges of the capacitors 10a and 10b and the accumulated charges of the capacitors 11a and 11b are transferred to the integrating circuit 200, and the integrating circuit 200 performs an integrating operation. The quantizer 300 compares this integrated value with a predetermined threshold value, and outputs a 1-bit signal “1” when the integrated value is larger than this, and otherwise outputs the 1-bit signal “1”. 0 "is output to perform the A / D conversion operation.
[0031]
Further, when the quantized signal is supplied to the control circuit 500, the control circuit 500 outputs a control signal so as to select the reference signal b when the quantized signal is “1”, while the quantized signal is quantized. When the signal is “0”, an A / D conversion operation is performed with feedback control by outputting a control signal so as to select the reference signal a.
[0032]
In this A / D converter, the capacitor of the present invention is applied to the set of capacitors 10a and 10b, the set of capacitors 11a and 11b, and the set of capacitors 31a and 31b in the feedback loop of the operational amplifier 20. Therefore, it is possible to realize an A / D converter including a capacitor circuit and an integration circuit that can reduce the nonlinearity of the capacitance value as much as possible while reducing charge noise, and thus an A / D converter with little conversion error can be realized. .
[0033]
【The invention's effect】
As described above, according to the first and fifth aspects of the invention, it is possible to achieve an effect of realizing a capacitor circuit capable of reducing the nonlinearity of the capacitance value as much as possible while reducing charge noise.
Further, according to the inventions according to claims 2 and 3, a switched capacitor filter and an A / D converter including this capacitor circuit can be realized. In particular, according to the invention according to claim 4, the integration result of the integration circuit is obtained. The effect that the included error can be reduced is obtained.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of an integrated circuit connected to a switched capacitor filter according to an embodiment of the present invention.
2 is an equivalent circuit diagram of the switched capacitor filter shown in FIG. 1. FIG. 3 is a circuit diagram of a conventional circuit.
FIG. 4 is an equivalent circuit diagram of a conventional circuit.
FIG. 5 is a circuit diagram of a conventional circuit.
FIG. 6 is an equivalent circuit diagram of a conventional circuit.
FIG. 7 is a schematic plan view of a semiconductor structure.
FIG. 8 is a diagram illustrating the principle of non-linearity reduction.
FIG. 9 is a circuit diagram of an A / D converter according to another embodiment of the present invention.
FIG. 10 is an operation timing chart of the A / D converter.
FIG. 11 is an explanatory diagram for explaining an operation;
[Explanation of symbols]
S1, S2 Switches S3, S4 Input switches 10a, 10b Capacitors 11a, 11b Capacitor 20 Operational amplifier 30 Capacitor 31 Inverter gate 100 Input sampling circuit 200 Integration circuit 300 Quantizer 400 Reference circuit 500 Control circuit

Claims (5)

A capacitor circuit connected to the input terminal of the operational amplifier,
A plurality of capacitors each having a first polycrystalline silicon disposed closer to the semiconductor substrate and a second polycrystalline silicon disposed farther from the semiconductor substrate and having both electrodes connected in series;
It connected one connection between the capacitor and the other capacitor so as adjacent to each other, to connect the second polycrystalline silicon of the first polycrystalline silicon and the other capacitor of the one capacitor Capacitor circuit characterized by being performed. A switched capacitor filter,
A capacitor circuit connecting a plurality of the first polycrystalline silicon and a second polycrystalline silicon disposed farther from the semiconductor substrate and the two electrodes capacitor disposed closer to the series by the semiconductor substrate,
A switching circuit that performs a switching operation so as to perform charge accumulation and charge transfer by the capacitor circuit,
In the capacitor circuit, one capacitor connected to be adjacent to each other and the other capacitor are connected to each other by the first polycrystalline silicon of the one capacitor and the second polycrystalline silicon of the other capacitor. And a switched capacitor filter characterized by being connected to The switched capacitor filter according to claim 2,
A reference circuit that outputs one of a plurality of reference signals via a second switched capacitor filter;
An integrating circuit for performing an integral output of the output of the switched capacitor filter and the output of the reference circuit;
A quantizing circuit for quantizing the output of the integrating circuit; and an A / D converter. The A / D converter according to claim 3,
The integration circuit includes an operational amplifier and a second capacitor circuit that connects between the input and output terminals.
The second capacitor circuit includes a plurality of capacitors each having a first polycrystalline silicon arranged closer to the semiconductor substrate and a second polycrystalline silicon arranged farther from the semiconductor substrate as electrodes. Connected, and
It connected one connection between the capacitor and the other capacitor so as adjacent to each other, to connect the second polycrystalline silicon of the first polycrystalline silicon and the other capacitor of the one capacitor A / D converter characterized by being performed. A capacitor circuit connected to the input terminal of the operational amplifier,
A plurality of capacitors each having a first polycrystalline silicon disposed closer to the semiconductor substrate and a second polycrystalline silicon disposed farther from the semiconductor substrate and having both electrodes connected in series;
It connected one connection between the capacitor and the other capacitor so as adjacent to each other, to connect the second polycrystalline silicon of the first polycrystalline silicon and the other capacitor of the one capacitor In any capacitor, the capacitor circuit is configured such that the second polycrystalline silicon is connected to the input end direction side.

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