JP4393259B2 - Class D amplifier - Google Patents

Description

  The present invention relates to electromagnetic interference (EMI) reduction of a class D amplifier whose main purpose is power amplification of an audio signal.

  Conventionally, class D amplification has been used as a method that enables downsizing of a device by performing power amplification of an audio signal with high efficiency and low loss. The modulation system of the class D amplifier is roughly classified into a pulse width modulation (PWM) type and a delta sigma (ΔΣ) modulation type, and the ΔΣ modulation type may use PWM together. For example, Patent Document 1 shows a configuration in which a digitized audio input signal is converted into a PWM signal and guided to a power switch, and rounding errors caused by re-quantization means necessary for performing PWM conversion are disclosed. Is taken using ΔΣ modulation.

Since the class D amplifier repeats the ON / OFF operation of the power switch according to the PWM signal, a large current is passed or stopped each time, and a large electromagnetic interference is generated. As an improvement measure, in Patent Document 2, only high frequency components are extracted from an analog signal demodulated by an output LC filter, an inverted signal thereof is created, and high frequency components are canceled out from the original analog signal via a choke transformer. Is used to reduce electromagnetic interference. Since the system described in this document is performed after the power switch, it can be assumed that both the above-described modulation systems can be used.
JP 2001-292040 A (paragraph 0003, FIG. 7) JP 2002-118430 A (paragraph 0016, FIG. 1)

  However, although the electromagnetic interference reduction method of the class D amplifier described above can certainly reduce electromagnetic interference from the analog signal output line, the electromagnetic interference from the power supply line due to the high-frequency current derived from the ON / OFF operation in the power switch. There was no reduction effect. That is, the source of electromagnetic interference appearing in the analog signal output line and the power supply line is the high frequency ON / OFF operation in the power switch, and no improvement measures have been taken with respect to the source common to both lines.

  Moreover, the electromagnetic interference of the class D amplifier is characterized by the fact that the harmonics of the PWM carrier frequency appear in the center, and the level of the center frequency appears higher as the modulation degree of the audio input signal is lower. In particular, it becomes maximum when the duty ratio of the PWM signal is 50%, that is, when the audio input signal is not modulated. This is a phenomenon that is clearly disadvantageous in determining an excess of a certain EMI standard reference value.

  The subject of this invention is providing the class D amplifier which reduced the level of the harmonic derived from the ON / OFF operation | movement in a power switch, and suppressed electromagnetic interference.

  The present invention has been made to solve the above-described problems, and has the following features.

The class D amplifier according to claim 1 of the present invention includes a delta-sigma modulation means for delta-sigma-modulating a digital audio signal, a PWM signal generation means for generating a PWM signal from the delta-sigma-modulated digital audio signal, and the PWM A class D amplifier comprising power switch means for power-amplifying a signal and filter means for PWM demodulation connected to the power switch means,
The PWM signal generating means PWM converts the delta-sigma modulated digital audio signal, and a PWM carrier changing means for changing the frequency of the PWM carrier output from the PWM converting means based on an audio out-of-band signal input. It equipped with a door,
The PWM carrier changing means changes the PWM carrier frequency only during the mute operation of the audio signal output .

A class D amplifier according to claim 2 is the class D amplifier according to claim 1, wherein the power supply voltage detecting means for detecting the power supply voltage fluctuation of the power switch means, and the power supply voltage detecting means before the delta-sigma modulation means. and a amplitude compensation means for compensating the amplitude of the digital audio signal based on the output, characterized by being configured to compensate for the distortion of the PWM demodulated signal generated by the power supply voltage fluctuation of the power switching means.

The class D amplifier according to claim 3 is a signal superimposing unit that receives a digital audio signal and an out-of-band audio signal, a delta sigma modulating unit that delta-sigma modulates the output of the signal superimposing unit, and the delta-sigma modulated signal. PWM conversion means for PWM-converting the digital audio signal, power switch means for power amplification of the PWM signal, and filter means for PWM demodulation connected to the power switch means,
In the signal superimposing means, a signal based on the audio out-of-band signal is superimposed on the digital audio signal ,
The signal superimposing means superimposes the audio out-of-band signal only when the audio signal output is muted .

A class D amplifier according to claim 4 is the class D amplifier according to claim 3 , wherein the power supply voltage detecting means for detecting the power supply voltage fluctuation of the power switch means, and the power supply voltage detecting means before the delta-sigma modulating means. and a amplitude compensation means for compensating the amplitude of the digital audio signal based on the output, characterized by being configured to compensate for the distortion of the PWM demodulated signal generated by the power supply voltage fluctuation of the power switching means.

  According to the present invention, modulation by a signal outside the audio signal band is given to the PWM carrier frequency or PWM modulation with respect to the PWM signal, and particularly with respect to the harmonics derived from the ON / OFF operation in the power switch. When the energy is concentrated at the center frequency as in the case where the audio signal is not modulated, the energy is dispersed, so that electromagnetic interference from the analog signal output line and the power supply line is reduced.

Embodiment 1 FIG.
FIG. 1 is a block diagram showing a configuration of a class D amplifier according to Embodiment 1 of the present invention. In the figure, a digital audio signal is input from an audio signal input terminal 1, subjected to delta sigma modulation by a delta sigma modulation unit 2, and then input to a PWM signal generation unit 3. The PWM signal generator 3 receives an audio out-of-band signal from the modulation signal input terminal 7, and generates a PWM signal modulated by the out-of-audio signal. This PWM signal is demodulated by the power switch 4 and the filter 5, and an audio signal is output from the audio signal output terminal 6.

  Hereinafter, the operation will be described in detail. In the class D amplifier configured as described above, in the delta-sigma modulation unit 2, the digital audio signal is given as one input of the subtractor 2a. The other input of the subtractor 2a is supplied with the output from the requantizer 2c through a delay unit 2d which gives a delay of one sample period. Here, the digital audio signal is oversampled in advance so as to be suitable for the delta-sigma modulation operation.

  Thus, an error between the input of the digital audio signal and the digital audio signal one sample period before the output of the requantizer 2c is given to the output of the subtractor 2a. The integrator 2b integrates this error and outputs it to the requantizer 2c.

  In the requantizer 2c, an operation to cut the output signal to an appropriate accuracy, for example, about 6 bits, is given to the PWM signal generation unit 3. Therefore, when compared with the input signal, the output of the requantizer 2c instantaneously includes a relatively large error, but this error is fed back and compensated while accumulating in the integrator 2b. Thus, it is sufficiently reduced in a relatively low frequency audio signal region.

  The PWM converter 3a constituting the PWM signal generator 3 outputs a rectangular wave signal having a duty ratio corresponding to the numerical value, that is, a PWM signal, with respect to the output of the requantizer 2c. FIG. 2 illustrates an output waveform of the PWM signal when the input is 6 bits. In this example, the range is from -31 to 31, which is a positive / negative symmetrical numerical range that can be expressed in 6 bits, and one cycle of the waveform is divided into 64, and the output duty ratio is changed in this unit corresponding to the input numerical value. It is. The figure shows a state in which a waveform with a minimum duty ratio is output for the numerical value -31, a duty ratio of 50% for the numerical value 0, and a maximum duty ratio is output for the numerical value 31.

  FIG. 3 exemplifies the configuration of the PWM carrier fluctuation unit 3b constituting the PWM signal generation unit 3, and FIG. 4 shows the waveform of the PWM signal for explaining the operation concept. In FIG. 3, the PWM carrier variation unit 3b is configured by a memory 3b1 and a read clock generation unit 3b2. According to the above example, the writing to the memory 3b1 is performed by a clock signal (write clock) having a time width obtained by dividing one period of the PWM signal into 64, for example. Reading from the memory 3b1 is performed by a read clock from the read clock generator 3b2. The read clock generation unit 3b2 receives the audio out-of-band signal, and generates a read clock whose frequency is continuously varied based on the out-of-band signal centered on the same frequency as the write clock. A specific example of the read clock generation unit 3b2 can be realized by a configuration in which the control voltage of the voltage controlled oscillator is changed based on an out-of-band signal. In this example, an external audio band signal is supplied from the outside, but internal oscillation may be used.

  In FIG. 4, (a) is the output of the PWM conversion unit 3a, the input of the memory 3b1 in the PWM carrier fluctuation unit 3b, (b) is the output of the memory 3b2, and (c) is out of the audio band for frequency-modulating the read clock. One cycle of the signal is shown. In the figure, the horizontal axis represents the time axis and the vertical axis represents the signal amplitude. Actually, each rectangular signal of (a) and (b) has a deviation in the temporal positional relationship, but in this figure, the relationship of the period of each rectangular signal (PWM carrier period) is conceptually shown. For the sake of illustration, it is shown that there is no deviation. According to the above-described example, as shown in (a), one PWM cycle T1 is constituted by 64 sample periods by a constant frequency clock. In the memory 3b1, it is sequentially stored by a write clock having a constant frequency, and is read according to a read clock modulated by an audio out-of-band signal. As a result, the period of the PWM signal changes as shown in (b). The period of each PWM signal has a relationship of T2 <T1 <T3.

  What is characteristic here is that the read clock fluctuates based on the out-of-band signal, and as a result, the output of the PWM signal generating unit 3 is changed to the frequency based on the out-of-band signal as shown in (b). It becomes a modulated form. Obviously, the number of sample data in (a) and (b) is the same when viewed for one period of the audio out-of-band signal. The capacity of the memory 3b1 needs to be at least a scale that does not cause overtaking due to the writing and reading of the memory. For example, one cycle of the out-of-band signal is sufficient.

  FIGS. 5 and 6 are diagrams for explaining the effect of EMI reduction according to the present invention. In the case where there is no modulation by the audio signal and the duty ratio of the PWM signal is 50%, this is based on the out-of-band signal. Thus, the difference in frequency distribution compared with the case where frequency modulation is performed at a modulation level of about 2% is compared. A 30 kHz sine wave is used as the audio out-of-band signal, which is shown by observing the spectrum of the PWM signal. At this time, the PWM carrier frequency is 400 kHz. In both figures, when (a) is not modulated by a signal outside the audio band and the duty ratio is fixed to 50%, (b) is an example of frequency modulation of about 2% modulation at 30 kHz. The peak level in FIG. 5 (a) is an odd-order harmonic, and almost coincides with the coefficient change of the Fourier series expansion formula of a rectangular wave. FIG. 4A is an enlarged view of the vicinity of the 101st harmonic (40.4 MHz).

  From the comparison of FIGS. 5 and 6A and 6B, the energy of the harmonic center frequency of the PWM carrier signal is dispersed by changing the frequency of the PWM carrier based on the out-of-band audio signal. It can be seen that the peak level of EMI due to the harmonics of the carrier signal is reduced over the entire frequency.

  As described above, since the harmonic level of the PWM carrier signal is the highest when the audio signal is unmodulated, the EMI reduction effect is particularly enhanced in this case. Therefore, a reduction effect can also be obtained by adopting a configuration in which the PWM carrier fluctuation unit 3b is operated only at the time of mute in conjunction with the mute operation of the audio signal.

Embodiment 2. FIG.
FIG. 7 is a block diagram showing a configuration of a class D amplifier according to Embodiment 2 of the present invention. In the figure, the power supply fluctuation of the power switch 4 is detected by the power supply fluctuation detector 8, the coefficient generator 9b of the amplitude compensator 9 generates an amplitude compensation coefficient for compensating the power fluctuation, and the multiplier 9a generates a digital audio signal input signal. Is multiplied by this amplitude compensation coefficient to compensate for the amplitude of the digital audio signal. Other configurations and operations are the same as those in FIG.

  FIG. 8 shows a configuration example of the power switch 4 and the filter 5. In the figure, the power switch 4 includes a timing control unit 4a, a power supply side switching element 4b and a diode 4d, a ground side switching element 4c and a diode 4e, and the filter 5 includes an inductor 5a and a capacitor 5b.

  Hereinafter, the operation will be described in detail. The timing control unit 4a receives a signal from the PWM conversion unit 3 and generates a signal for turning off the other when one of the two switch elements 4b and 4c is turned on. The switch is turned on and turned off. The timing of the drive signal is controlled so that the two elements do not turn on simultaneously due to the delay. The two switch elements 4b and 4c are composed of a low-impedance MOS-FET or the like for efficient amplification, and a diode 4d for circulating a current based on the electromotive force generated because the filter 5 is inductive. 4e is provided, but when a MOS-FET is used as the switch element, a parasitic diode inside the element may be substituted.

  In this way, the power switch 4 has, for example, the output of the PWM signal generation unit 3 in a high level period, the power supply side switch element 4b is turned on, the ground side switch element 4c is turned off, the output terminal voltage is the power supply potential, and the PWM signal generation unit 3 When the output is at a low level, the switch element operation is reversed and the output terminal voltage operates to be at the ground potential.

  The filter 5 smoothes the output of the power switch 4 and extracts the original audio signal to obtain an audio signal demodulated output. As a filter, a secondary low-pass filter composed of an inductor 5a and a capacitor 5b can be used as shown in FIG.

Here, when the input signal Vi is in the range of −1 to 1 and the duty ratio d of the PWM signal is 0 to 1,
d = 0.5 + 0.5 * Vi (1)
Suppose that At this time, if the power supply voltage of the power switch 4 is Vsup, the output voltage Vo of the low-pass filter is
Vo = Vsup * d
= Vsup (0.5 + 0.5 * Vi)
= 0.5 * Vsup + Vot (2)
It is. The output audio signal component Vot is
Vot = 0.5 * Vsup * Vi (3)
Thus, the input signal Vi and the power supply voltage of the power switch 4 are proportional to Vsup. Furthermore, when Vsup is divided into the rated voltage Vnom and the fluctuation component Vrpl,
Vsup = Vnom + Vrpl (4)
And when
Vot = 0.5 * Vi * Vnom * (Vsup / Vnom)
= Von * (Vsup / Vnom) (5)
It becomes. Here, Von = 0.5 * Vi * Vnom is an ideal output when the power supply voltage of the power switch 4 is fixed to Vnom and there is no fluctuation.

  Therefore, in order to obtain Von by compensation for the input audio signal Vi, it is understood that the compensation coefficient Vnom / Vsup should be multiplied in order to cancel the value in parentheses in the equation (5). The power supply fluctuation detection unit 8 in FIG. 7 detects this power supply voltage Vsup, the coefficient generation unit 9b calculates Vnom / Vsup, and the multiplier 9a compensates the power supply fluctuation for the digital audio signal input, thereby distortion due to power supply fluctuation. Is reduced. Specifically, in the power supply fluctuation detecting unit 8, the power supply voltage of the power switch 4 is sequentially converted into a numerical value by, for example, an AD converter, and the coefficient generating unit 9b is a numerical value corresponding to the compensation coefficient Vnom / Vsup by, for example, a conversion table or a conversion formula calculation. And the multiplier 9a multiplies the digital audio signal input by a compensation coefficient. Since the configuration and operation other than the power supply fluctuation detection unit 8 and the amplitude compensation unit 9 are the same as those in the first embodiment, description thereof will be omitted.

Embodiment 3
FIG. 9 is a block diagram showing a configuration of a class D amplifier according to Embodiment 3 of the present invention. In the figure, the signal superimposing unit 11 includes an adder 11a and a superimposed signal generating unit 11b. The PWM converter 10 is the same as the PWM converter 3a of the first embodiment, and the other configuration and operation are the same as those in FIG.

  In the signal superimposing unit 11, in order to superimpose the audio out-of-band signal as a desired modulation level, a superimposed signal based on the out-of-band signal is generated in the superimposed signal generating unit 11b, added to the digital audio signal in the adder 11a, and delta This is supplied to the subtracter 2a of the sigma modulation unit 2. At this time, it is desirable that the sampling frequency of the audio out-of-band signal matches the frequency of the oversampled digital audio signal, so that it is higher than the audio band and outside the audio band of a slightly lower frequency that can be sufficiently expressed by the sampling frequency. The signal will be selected.

  10 and 11 are diagrams for explaining the effect of EMI reduction according to the present invention. In the case where there is no modulation by the audio signal and the duty ratio of the PWM signal is 50%, the out-of-band signal is reduced to about 50%. This is a simulation comparison of the difference in frequency distribution from the case of superimposing at a modulation level of 2%. In the PWM conversion unit constituted by a comparator, the duty ratio of the PWM signal is set to 50% when the input signal is set to 0 level, and the difference from the case where a 30 kHz sine wave is input at a modulation level of about 2%, This is shown by observing the spectrum of the PWM signal. At this time, the PWM carrier frequency is 400 kHz. In both figures, (a) is an example in which a signal with a modulation of about 2% at 30 kHz is input when the duty ratio is fixed at 50% in a state where there is no modulation by a signal outside the audio band. The peak level in FIG. 10 (a) is an odd-order harmonic, and almost coincides with the coefficient change of the Fourier series expansion formula of a rectangular wave. FIG. 11A is an enlarged view of the vicinity of the 101st harmonic (40.4 MHz).

  From the comparison of FIGS. 10 and 11A and 11B, the energy of the harmonic center frequency of the PWM carrier signal is dispersed by superimposing the audio out-of-band signal on the digital audio signal input. It can be seen that the EMI peak level due to the higher harmonics is reduced over the entire frequency.

  As described above, since the harmonic level of the PWM carrier signal is the highest when the audio signal is unmodulated, the EMI reduction effect is particularly enhanced in this case. Therefore, a reduction effect can also be obtained by linking the audio signal mute operation and superposing the audio out-of-band signal in the signal superimposing unit 11 only at the time of mute.

  FIG. 12 shows a configuration including the power supply fluctuation detection unit 8 and the amplitude compensation unit 9 described in the second embodiment in the configuration of FIG. 9 and compensates for power supply voltage fluctuation. Other configurations and operations are substantially the same as those described above, and a description thereof will be omitted.

It is a block diagram which shows the structural example of the class D amplifier of Embodiment 1 of this invention. It is a figure explaining the operation | movement of the PWM conversion part of the class D amplifier of Embodiment 1 of this invention. It is a block diagram which shows the structural example of the PWM carrier fluctuation | variation part of Embodiment 1 of this invention. It is a figure explaining the operation | movement of the PWM carrier fluctuation | variation part of Embodiment 1 of this invention. It is a figure which shows an example of the EMI reduction effect by the structure of Embodiment 1 of this invention. It is a figure which shows an example of the EMI reduction effect by the structure of Embodiment 1 of this invention. It is a block diagram which shows the structural example of the class D amplifier of Embodiment 2 of this invention. It is a block diagram which shows the structural example of a power switch and a filter. It is a block diagram which shows the structural example of the class D amplifier of Embodiment 3 of this invention. It is a figure which shows an example of the EMI reduction effect by the structure of Embodiment 3 of this invention. It is a figure which shows an example of the EMI reduction effect by the structure of Embodiment 3 of this invention. It is a block diagram which shows the other structural example of the class D amplifier of Embodiment 3 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Audio | voice signal input terminal 2 Delta-sigma modulation part 2a Subtractor 2b Integrator 2c Requantizer 2d Delay device 3 PWM signal generation part 3a PWM conversion part 3b PWM carrier fluctuation | variation part 4 Power switch 5 Filter 6 Audio | voice signal output terminal 7 Modulation Signal input terminal

Claims (4)

Delta-sigma modulation means for delta-sigma modulating a digital audio signal;
PWM signal generating means for generating a PWM signal from the delta-sigma modulated digital audio signal;
Power switch means for power amplifying the PWM signal;
In a class D amplifier comprising filter means connected to the power switch means for PWM demodulation,
The PWM signal generating means PWM converts the delta-sigma modulated digital audio signal, and a PWM carrier changing means for changing the frequency of the PWM carrier output from the PWM converting means based on an audio out-of-band signal input. It equipped with a door,
The class D amplifier characterized in that the PWM carrier fluctuation means changes the PWM carrier frequency only during the mute operation of the audio signal output . Power supply voltage detection means for detecting a power supply voltage fluctuation of the power switch means, and amplitude compensation means for compensating the amplitude of the digital audio signal based on the output of the power supply voltage detection means before the delta-sigma modulation means. 2. The class D amplifier according to claim 1, wherein a distortion of the PWM demodulated signal caused by a power supply voltage fluctuation of the power switch means is compensated. Signal superimposing means for inputting a digital audio signal and an out-of-band audio signal;
Delta-sigma modulation means for delta-sigma modulating the signal superimposing means output;
PWM conversion means for PWM converting the delta-sigma modulated digital audio signal;
Power switch means for power amplifying the PWM signal;
Filter means connected to the power switch means for PWM demodulation,
In the signal superimposing means, a signal based on the audio out-of-band signal is superimposed on the digital audio signal ,
The class D amplifier characterized in that the signal superimposing means superimposes the audio out-of-band signal only during the mute operation of the audio signal output . Power supply voltage detection means for detecting a power supply voltage fluctuation of the power switch means, and amplitude compensation means for compensating the amplitude of the digital audio signal based on the output of the power supply voltage detection means before the delta-sigma modulation means. 4. The class D amplifier according to claim 3 , wherein a distortion of the PWM demodulated signal caused by a power supply voltage fluctuation of the power switch means is compensated.

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