JP2010078731A - Actuator device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To remove inconsistency of a digital signal between a feedback signal for detecting a position and an input signal into a PWM driving part for driving a shape memory alloy, when controlling the position of a control object by using an extending/contracting property of the shape memory alloy. <P>SOLUTION: This device includes the shape memory alloy 2 for displacing a lens of an autofocus mechanism of an optical system 3 of an image capturing apparatus by being expanded/contracted corresponding to a driving signal, the PWM driving part 1 for supplying the driving signal to the shape memory alloy 2, a feedback control part 4 for output of a feedback signal carrying information to be fed-back to the PWM driving part 1 corresponding to a change state of the lens displaced by the shape memory alloy 2, and a delta sigma modulation part 5 for reducing the number of bits which is an information quantity of digital data of the feedback signal output from the feedback control part 4 to input it into the PWM driving part 1. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an actuator device. More specifically, the present invention relates to an actuator device using a shape memory alloy.

  In recent years, proposals have been made to use shape memory alloys as means for displacing the position of a lens in a lens barrel in an autofocus mechanism of a camera or other imaging device. The shape memory alloy is composed of, for example, a fine wire or a coil spring. Such a shape memory alloy has the property that when it is heated by passing an electric current, it shrinks and its resistance value changes. Therefore, the position of the lens of the autofocus mechanism can be displaced using the property that the shape memory alloy expands and contracts according to the current. As means for supplying power to the shape memory alloy, voltage control or PWM (pulse width modulation) control is used. In particular, in the case of PWM control, the power supplied to the shape memory alloy is controlled by a digital signal by changing the duty ratio of a pulse signal having a constant amplitude and period, so a feedback circuit using a microcomputer or the like is compared. Can be constructed easily.

  For example, in the actuator device of Patent Document 1, the actuator is controlled so that the brightness of the image is maximized, and the focus, that is, the focus is automatically adjusted. For this purpose, an image luminance signal is input from the camera control unit to the control device. The voltage waveform applied to the shape memory alloy is composed of a PWM signal control signal having a period T and a duty ratio t / T. Further, the current value of the current waveform intermittently flowing in the shape memory alloy is held by the sample hold circuit, so that the resistance value is calculated and fed back to the control device.

JP 2002-130114 A (see paragraph number 0032, FIG. 11 and FIG. 17)

  In general, in a recent imaging apparatus such as a digital camera, a circuit that processes an image signal performs signal processing with a resolution of 1024 steps, that is, 10 bits or more. However, when the shape memory alloy is driven by the PWM signal as in Patent Document 1, the resolution of the duty ratio of the PWM signal is generally 256 steps to 64 steps, that is, about 8 bits to 6 bits. For this reason, a feedback signal based on, for example, a 10-bit (or more) detection signal based on an image luminance signal for detecting a focal point or an edge signal for contour detection, and a duty ratio having a resolution of 256 steps to 64 steps. There was a problem that the digital signal could not be matched with the PWM signal. For example, when the detection signal is 10 bits and the input signal of the PWM drive unit is 6 bits, the information amount ratio is actually 16 times. As a countermeasure, a shape memory alloy drive circuit that generates a PWM signal by a 10-bit (or more) input signal is also conceivable. However, a dedicated hardware for that purpose is required, and physical resources required for system development are also required. Due to the human resources, there is a new problem of increasing the cost of the product.

  Further, the response speed at which the shape memory alloy contracts by heating according to the current of the drive signal is considerably low. That is, since the shape memory alloy itself constitutes a low-pass filter, there is a problem that the expansion and contraction of the shape memory alloy cannot respond to, for example, a high-speed change in 1024 steps, that is, a 10-bit drive signal.

  The present invention solves the above-described problem. When a PWM signal is supplied as a drive signal to a shape memory alloy and the position of the control object is controlled using the property that the shape memory alloy expands and contracts, An object of the present invention is to provide an actuator device that realizes an inexpensive product by eliminating digital signal inconsistency between the obtained feedback signal for position detection and the input signal to the PWM drive unit. To do.

  Further, the present invention supplies a PWM signal as a drive signal to the shape memory alloy, and controls the position of the controlled object by utilizing the property that the shape memory alloy expands and contracts. It is another object of the present invention to provide an actuator device that constitutes an optimal feedback loop by generating

  In order to achieve the above object, an actuator device according to the present invention supplies a drive signal to a shape memory alloy that expands and contracts according to a supplied drive signal and displaces a predetermined control object, and the shape memory alloy. A state detection means for detecting a change state of the controlled object displaced by the shape memory alloy and outputting a feedback signal carrying information to be fed back to the drive means according to the change state; and the state detection And an information reduction means for reducing the amount of information of the feedback signal output by the means and inputting the information to the driving means.

  In the actuator device according to the present invention, the information reduction unit includes a digital sigma modulation unit, and reduces the number of bits of digital data constituting the feedback signal and inputs the digital data to the driving unit.

  Further, in the actuator device according to the present invention, the information reduction unit includes a quantization unit that quantizes the feedback signal output by the state detection unit, and a delay unit that delays quantization noise generated in the quantization unit. And combining means for combining the quantization noise delayed by the delay means with the feedback signal output by the state detecting means and feeding back to the quantizing means.

  Further, in this case, the driving unit generates a pulse width modulation signal based on the digital data input from the information reduction unit as a driving signal.

  Furthermore, in this case, the driving means includes a smoothing means for smoothing the generated pulse width modulation signal and converting it into an analog driving signal.

  In the actuator device according to the present invention, the object to be controlled is an imaging device having optical means of an autofocus mechanism, and the shape memory alloy expands and contracts according to a drive signal supplied from the drive means. The lens of the mechanism is displaced, and the state detection unit detects a focus state of the optical unit based on an image signal captured by the imaging device.

  According to the present invention, when a PWM signal is supplied as a drive signal to a shape memory alloy and the position of the controlled object is controlled using the property of the shape memory alloy to expand and contract, the position detection obtained from the controlled object is performed. An inexpensive product can be realized by eliminating digital signal inconsistency between the feedback signal and the input signal to the PWM drive unit.

  Further, according to the present invention, when a PWM signal is supplied to a shape memory alloy as a drive signal and the position of the controlled object is controlled using the property that the shape memory alloy expands and contracts, the response speed of the controlled object is determined. By generating the drive signal, an optimal feedback loop can be constructed.

  Hereinafter, with respect to the first to third embodiments and modifications of the actuator device according to the present invention, taking as an example a case where an imaging device having an autofocus mechanism such as a digital camera or a mobile phone with a camera is a control target, This will be described with reference to the drawings.

  FIG. 1 is a block diagram showing the configuration of the actuator device according to the first embodiment. In FIG. 1, a PWM drive unit 1 (drive means) is composed of a D / A conversion circuit, a PWM signal generation circuit, a 6-bit microcomputer, etc. (all not shown), and a 6-bit input signal S1. In response, a PWM signal S2 having a duty ratio of 64 steps is output.

  The SMA (Shape Memory Alloy) 2 is composed of, for example, a thin wire, and expands and contracts in accordance with the current value of the PWM signal input from the PWM drive unit 1 to act on the autofocus mechanism of the optical system 3. The position of the lens is adjusted by changing the force A1.

  The optical system 3 includes an autofocus mechanism in which the lens position is adjusted by the acting force of the SMA 2, an image pickup device such as a CCD or CMOS, an image processing circuit, and the like (none of which are shown). The optical system 3 outputs a 10-bit edge signal S3 obtained from the image of the contour of the subject from the image processing circuit. The edge signal S3 has a maximum level when the focus is achieved, and the level decreases as the focus is removed. Therefore, the edge signal S3 is widely used as an autofocus detection signal.

  The feedback control unit 4 (state detection unit) performs amplification processing, waveform shaping processing, impedance conversion processing, etc. based on the edge signal S3 for detecting the focus state output from the optical system 3 and the target value signal S5. The 10-bit feedback signal S4 that carries information to be fed back to the PWM drive unit 1 is output. The target value signal S5 is, for example, a zoom setting value for far-field shooting or foreground shooting set by operating a mechanical part of the lens barrel or a switch.

  The delta-sigma modulation unit 5 (information reduction unit) is a characteristic component of the present invention, and performs bit conversion (reduction) of the 10-bit feedback signal S4 input from the feedback control unit 4 into a 6-bit digital signal. And output as an input signal S1 to be supplied to the PWM drive unit 1. Details of the bit conversion will be described later.

  In FIG. 1, the PWM drive unit 1 is configured to supply the generated digital PWM signal directly to the SMA 2. However, as a modification of the first embodiment, the PWM signal is converted from digital to analog to convert the SMA 2. May be supplied. FIG. 2 is a block diagram and a circuit diagram showing a PWM drive unit 1 according to a modification of the first embodiment. 2 (1), the PWM generation circuit 11 outputs a PWM signal S11 having a duty ratio of 64 steps in accordance with the 6-bit input signal S1 supplied from the delta-sigma modulation unit 5 in FIG. An LPF (low-pass filter) circuit or smoothing circuit 12 integrates the PWM signal S11, converts it into a sawtooth analog signal, and outputs it. The V / I conversion circuit 13 converts the sawtooth analog signal into a current and outputs the current.

  FIG. 2B is a circuit diagram of a specific example of the LPF circuit 12 and the V / I conversion circuit 13 of FIG. In FIG. 2 (2), a passive primary LPF circuit 12 is an integrating circuit composed of a series resistor Ri and a parallel capacitor C, and integrates (filters) the PWM signal S11 to provide a sawtooth wave analog signal having a voltage Vc. Convert to S12 and output. The V / I conversion circuit 13 includes an operational amplifier OP having a high input impedance, a current setting resistor (feedback resistor) Rf, an NPN transistor Tr, and protective resistors Rp1 and Rp2. In the V / I conversion circuit 13, the voltage at the inverting input of the operational amplifier OP is equal to Vc at the non-inverting input. Therefore, If · Rf = Vc, and the input signal S2 of the current If proportional to the voltage Vc represented by If = Vc / Rf is supplied to the SMA2. That is, even if the resistance value of the load SMA2 changes, the load current If does not change, and the voltage across the SMA2 changes.

  FIG. 3 is a block diagram showing an internal circuit of the delta-sigma modulation unit 5 of FIG. In FIG. 3, the delta-sigma modulation unit 5 includes a quantization circuit 51 (quantization means), an addition circuit (or subtraction circuit) 52, a delay circuit 53, a multiplication circuit 54, and an addition circuit 55 (synthesis means). . That is, as shown in FIG. 3, the delta-sigma modulation unit 5 performs a primary noise shaping operation that gives a differential characteristic that rises higher by returning the quantization noise generated in the quantization circuit 51 to the input side. .

As described above, the 10-bit feedback signal S4 is input to the delta-sigma modulation unit 5, and is input to the quantization circuit 51 via the addition circuit 55. In the quantization circuit 51, a quantization noise Nq having no correlation with the input signal S51 is generated. The quantization noise Nq is output (extracted) as S52 by subtracting the input signal S51 to the quantization circuit 51 from the output signal S1 of the quantization circuit 51 in the addition circuit 52. The quantization noise component of the output signal S52 (= Nq) of the adder circuit 52 is input to the delay circuit 53 of the transfer function of z ⁻¹ and is delayed by one sampling time fs. The output signal S53 (= Nq · z ⁻¹ ) of the delay circuit 53 is input to the multiplication circuit 54, multiplied by the coefficient a1 (in this case, −1), and the output signal S54 (= −Nq · z ⁻¹ ). Is added to the adder circuit 55 and added to the input signal S4 to become the input signal S51 (= S4-Nq · z ⁻¹ ) of the quantizer 51. As a result, the output signal of the quantization circuit 51, that is, the output signal S1 of the delta-sigma modulation unit 5 is expressed by the following equation.
S1 = S4 + Nq (1-z ⁻¹ )

  FIG. 4 is a diagram showing the contents of the 10-bit input signal S4 converted into the 6-bit output signal by the delta-sigma modulation unit 5 of FIG. Excluding 0 representing no signal, the 10-bit input bit signal S4 is represented by level 1 to level 1023 from “0000000001” to “1111111111”. On the other hand, the 6-bit output bit signal S1 is represented by level 1 to level 63 from “000001” to “111111”. In addition, the correspondence between the two is indicated by a decimal display that is a normalized number.

In FIG. 4, when the input bit signal S4 is “1000000000” (512 level), the normalized number corresponds to “0.5”, that is, 50% of the full scale, and the output bit signal S1 is “100,000” (32 Level). For example, when an input bit signal S4 of 522 (512 + 10) level is input,
S4 = 0.5 + 10/1024
It becomes. In this state, when the sampling time t is 0, Ts, 2Ts, 3Ts, 4Ts, 5Ts (more than 6Ts is omitted), the input signal S51, the output signal S1, and the quantization noise Nq of the quantization circuit 51 are expressed by the following equations. Is done.
S51 (t = 0) = 0.5 + 10/1024
S51 (t = Ts) = 0.5 + 20/1024
S51 (t = 2Ts) = 0.5 + 14/1024
S51 (t = 3Ts) = 0.5 + 24/1024
S51 (t = 4Ts) = 0.5 + 18/1024
S51 (t = 5Ts) = 0.5 + 12/1024
S1 (t = 0) = 32 levels = 32/64 = 0.5
S1 (t = Ts) = 32 level = 33/64 = 0.5 + 1/64
S1 (t = 2Ts) = 32 levels = 32/64 = 0.5
S1 (t = 3Ts) = 32 levels = 33/64 = 0.5 + 1/64
S1 (t = 4Ts) = 32 levels = 33/64 = 0.5 + 1/64
S1 (t = 5Ts) = 32 levels = 32/64 = 0.5
Nq (t = 0) = − 10/1024
Nq (t = Ts) = − 4/1024
Nq (t = 2Ts) = − 14/1024
Nq (t = 3Ts) = − 8/1024
Nq (t = 4Ts) = − 2/1024
Nq (t = 5Ts) = − 12/1024

  FIG. 5 shows that when a 522 level input bit signal S4 is input, the input signal S51 of the quantization circuit 51 when the sampling time t is 0, Ts, 2Ts, 3Ts, 4Ts, 5Ts, The transition of the output signal, that is, the output signal S1 of the delta-sigma modulation unit 5 is shown. In FIG. 5, L1 indicates 0.5 level, L2 indicates 0.5 + 1/64, and L3 indicates 0.5 + 1/32.

  FIG. 6 shows the duty ratio of 64 steps of the PWM signal when the output signal S1 of the delta-sigma modulation unit 5 is from 0 level to 63 level.

FIG. 7 is a diagram illustrating a reduction effect of quantization noise in the vicinity of direct current by the primary noise shaper of the delta-sigma modulation unit 5 of FIG. Energy Nq ² spectrum Nq of the quantization noise in the frequency f is represented by the sampling frequency fs by the following equation.
Nq ² = 4 {sin (ω / fs)} ²
However, ω = 2πf
In FIG. 7, among the quantization noise energy Nq ² in the range from direct current (f = 0) to 1/2 of the sampling frequency fs, the noise component from direct current to 1/6 of the sampling frequency fs is the sampling frequency fs. Is reduced by the primary noise shaper of the delta-sigma modulation unit 5 in comparison with a high-frequency noise component of 1/6 or more.

  FIG. 8 is a modification of the first embodiment, and shows an internal circuit of the delta-sigma modulation unit 5 of FIG. In FIG. 8, the delta sigma modulation unit 5 includes a quantization circuit 51, an addition circuit (or subtraction circuit) 52, a delay circuit 53, a multiplication circuit 54, a delay circuit 56, a multiplication circuit 57, and an addition circuit 55. In other words, as shown in FIG. 8, the delta-sigma modulation unit 5 double-feeds back the quantization noise generated in the quantization circuit 51 to the input side, so that the differential characteristic of higher frequency rise is higher than that of primary noise shaping. Perform intense secondary noise shaping.

The quantization noise Nq of the quantization circuit 51 in FIG. 8 is output (extracted) as S52 by subtracting the input signal S51 to the quantization circuit 51 from the output signal S1 of the quantization circuit 51 in the addition circuit 52. The quantization noise of the output signal S52 (= Nq) of the adder circuit 52 is input to the delay circuit 53 of the transfer function of z ⁻¹ and is delayed by one sampling time fs. The output signal S53 (= Nq · z ⁻¹ ) of the delay circuit 53 is input to the multiplication circuit 54, multiplied by the coefficient a1 (in this case −2), and the output signal S54 (= −2Nq · z ⁻¹ ). Is input to the adder circuit 55. The output signal S53 in the delay circuit 53 (= Nq · ^{z -1) is} input to the delay circuit 56 of the transfer function of ^{z -1,} the output signal ^{S56 (= Nq (z -1)} 2) is multiplied by The signal is input to the circuit 57 and multiplied by a coefficient a2 (in this case, 1). Therefore, the output signal S54 (= −2Nq · z ⁻¹ ) of the multiplication circuit 54 and the output signal S57 (= Nq (z ⁻¹ ) ² ) of the multiplication circuit 57 are added to the input signal S4 in the addition circuit 55. . Therefore, the input signal S51 of the quantization circuit 51 is S4 + Nq (z ⁻¹ ) ² −2Nq · z ⁻¹ . In the quantization circuit 51, the generated quantization noise Nq is added to S51. As a result, the output signal of the quantization circuit 51, that is, the output signal S1 of the delta-sigma modulation unit 5 is expressed by the following equation.
S1 = S4 + Nq-2Nq · z ⁻¹ + Nq (z ⁻¹ ) ² = S4 + Nq (1-z ⁻¹ ) ²

FIG. 9 is a diagram illustrating the effect of reducing quantization noise in the vicinity of direct current by the secondary noise shaper of the delta-sigma modulation unit 5 in FIG. Energy Nq ² spectrum Nq of the quantization noise in the frequency f is represented by the sampling frequency fs by the following equation.
Nq ² = 16 {sin (ω / fs)} ⁴
However, ω = 2πf
In FIG. 9, among the quantization noise energy Nq ² in the range from DC (f = 0) to 1/2 of the sampling frequency fs, the noise component from DC to 1/6 of the sampling frequency fs is the sampling frequency fs. Is significantly reduced by the secondary noise shaper of the delta-sigma modulation unit 5 in comparison with a high-frequency noise component of 1/6 or more.

  As described above, the actuator device according to the first embodiment includes the SMA (shape memory alloy) 2 that expands and contracts according to the supplied drive signal and displaces the lens of the autofocus mechanism of the optical system 3 of the imaging device. The PWM drive unit 1 that supplies a drive signal to the SMA 2 and the change in the focus state of the imaging device of the lens displaced by the SMA 2 are detected, and information to be fed back to the PWM drive unit 1 according to the change state A feedback control unit 4 that outputs a responsible feedback signal, and a delta-sigma modulation unit 5 that is input to the PWM drive unit 1 by reducing the number of bits that is the amount of digital data information of the feedback signal output by the feedback control unit 4 It is equipped with.

  In this case, the PWM drive unit 1 generates a PWM signal based on the digital data input from the delta-sigma modulation unit 5 as a drive signal.

  In this case, the delta-sigma modulation unit 5 also includes a quantization circuit 51 that quantizes the feedback signal output from the feedback control unit 4 and a delay circuit 53 that delays the quantization noise generated in the quantization circuit 51 (further, Includes a delay circuit 56) and an adder circuit 55 that combines the quantization noise delayed by the delay circuit 53 and the like with the feedback signal output by the feedback control unit 4 and feeds back to the quantization circuit 51.

  In this case, the PWM drive unit 1 may include a low-pass filter circuit or a smoothing circuit that smoothes the generated PWM signal and converts it into an analog drive signal.

  Therefore, according to the first embodiment and the modification described above, a PWM signal is supplied to the SMA 2 as a drive signal, and the position of the lens of the autofocus mechanism of the optical system 3 of the imaging apparatus is controlled using the property that the SMA 2 expands and contracts. In this case, an inexpensive product can be obtained by eliminating the inconsistency of the digital signal between the feedback signal for position detection obtained from the optical system 3 of the imaging device and the input signal to the PWM drive unit 1. Can be realized.

  Further, according to the first embodiment, when a PWM signal is supplied to the SMA 2 as a drive signal and the position of the lens of the autofocus mechanism of the optical system 3 of the imaging apparatus is controlled using the property that the SMA 2 expands and contracts, An optimal feedback loop can be configured by generating a drive signal corresponding to the response speed of SMA2.

  Next, a second embodiment of the present invention will be described. FIG. 10 is a block diagram illustrating a configuration of the actuator device according to the second embodiment. In FIG. 10, the PWM drive unit 1 is composed of a D / A conversion circuit, a PWM signal generation circuit, a 6-bit microcomputer, or the like (all not shown), and 64 according to the 6-bit input signal S1. The step duty ratio PWM signal S2 is output.

  The SMA (Shape Memory Alloy) 2 is composed of a thin wire, for example, and is deformed according to the current value by the PWM signal input from the PWM drive unit 1 to act on the autofocus mechanism of the optical system 3. The position of the lens is adjusted by changing the force A1.

  The optical system 3 includes an autofocus mechanism in which the lens position is adjusted by the acting force of the SMA 2, an image pickup device such as a CCD or CMOS, an image processing circuit, and the like (none of which are shown).

  The feedback control unit 6 detects a change in the resistance value of the SMA 2 and outputs a 6-bit feedback signal S1. The target value signal S7 is, for example, a zoom setting value for far-field shooting or foreground shooting set by operating a mechanical part of the lens barrel or a switch.

FIG. 11 is a block diagram showing an internal configuration of the feedback control unit 6 and the PWM drive unit 1 of FIG. In FIG. 11, a resistor Rsma is an equivalent circuit of the SMA 2 in FIG. 10, and expands and contracts according to the current value I supplied from the PWM drive unit 1 and changes in resistance value (referred to as “Rsma” for convenience). The resistor Rref is a reference fixed resistor having a constant resistance value (for convenience, “Rref”). Therefore, the voltages Vsma and Vref at both ends of the resistor Rsma and the resistor Rref are expressed by the following formulas depending on the supplied current value I.
Vsma = Rsma · I
Vref = Rref · I

  The high input resistance differential amplifier circuit 61 amplifies the voltage Vsma across the resistor Rsma and outputs a first detection signal k1 · Vsma. The high input resistance differential amplifier circuit 62 amplifies the voltage Vref across the resistor Rref and outputs a second detection signal k1 · Vref.

  The logarithmic amplifier circuit 63 logarithmically amplifies the first detection signal k1 · Vsma output from the high input resistance differential amplifier circuit 61 and outputs a signal k2 · ln (k1 · Vsma). The logarithmic amplifier circuit 64 logarithmically amplifies the second detection signal k1 · Vref output from the high input resistance differential amplifier circuit 62 and outputs a signal k2 · ln (k1 · Vref).

  The subtraction circuit 65 has a positive input terminal connected to the logarithmic amplifier circuit 63, a negative input terminal connected to the logarithmic amplifier circuit 64, a signal k2 · ln (k1 · Vsma) output from the logarithmic amplifier circuit 63, and a logarithmic amplifier circuit. The difference from the signal k2 · ln (k1 · Vref) output from 64 is calculated, and the difference signal k2 · ln (Vsma / Vref) is output.

  The inverse logarithmic amplifier circuit 66 performs inverse logarithmic conversion on k2 · ln (Vsma / Vref) output from the subtracting circuit 65, and a ratio signal k3 · (Vsma) representing the ratio between the resistance value Rsma of the SMA2 and the reference resistance value Rref. / Vref) is output.

  Although not shown in the figure, the control circuit 67 comprising an MPU (microcomputer) or the like has a control program ROM, work RAM, sample hold circuit, A / D conversion circuit, etc., and an antilogarithmic amplifier circuit. The ratio signal k3 · (Vsma / Vref) output from 66 is sampled and held, A / D converted, and fed back to the PWM drive unit 1 as an input signal S1 of 6-bit digital data corresponding to an error from the target value S7. To do.

  FIG. 12 is a flowchart showing an autofocus operation executed by the control circuit 67. First, after processing of the RAM work area, for example, initialization processing (step S1) such as clearing the timer T to 0, the value of the timer T is from 0 to a predetermined time T1, which is an interval for measuring SMA. It is determined whether or not it has been reached (step S2). If the predetermined time has not been reached, another process as the imaging device is executed (step S3). As other processes, for example, there are a timer interrupt process that occurs at regular intervals and other interrupt processes.

  In step S2, when the value of the timer T reaches T1, the signal k3 · (Vsma / Vref) output from the antilogarithmic amplifier circuit 66 of FIG. 11 is sampled and held, and A / D is converted into 6-bit digital data. Conversion is performed and the resistance value Rsma of SMA is taken in (step S4). Next, the resistance value of SMA is detected (step S5), and the displacement amount of the position of an optical component such as a lens is calculated (step S6).

  Next, an error between the target position and the detected position is calculated based on the calculated displacement amount (step S7), and a feedback signal is generated based on the calculation result (step S8). Next, the generated feedback signal is output to the PWM drive unit 1 (step S9). Thereafter, the timer T is cleared to 0 (step S10), the process proceeds to step S2, and the loop process up to step S10 is repeated every time the predetermined time T1 elapses.

  As described above, the actuator device according to the second embodiment includes the PWM drive unit 1 that supplies a drive signal to the SMA 2 and the high input that detects the resistance value Rsma of the SMA 2 and outputs the first detection signal. A resistance differential amplifier circuit 61, a high input resistance differential amplifier circuit 62 that detects the reference resistance value Rref and outputs a second detection signal, and a first detection output by the high input resistance differential amplifier circuit 61 A logarithmic amplification circuit 63 that performs logarithmic conversion processing on the signal, a logarithmic amplification circuit 64 that performs logarithmic conversion processing on the second detection signal output by the high input resistance differential amplification circuit 62, and a logarithmic amplification circuit 63 The subtraction circuit 65 that calculates a difference between the signal output from the logarithmic amplification circuit 64 and the signal output from the logarithmic amplification circuit 64 and outputs a difference signal, and performs an inverse logarithmic conversion process on the difference signal output from the subtraction circuit 65 The inverse logarithmic amplifier circuit 66 that outputs a ratio signal representing the ratio between the resistance value of the SMA 2 and the reference resistance value, and a feedback signal corresponding to the ratio signal output from the antilogarithmic amplifier circuit 66 are generated, and the PWM driver 1 A control circuit 67 is provided. Therefore, the control circuit 67 generates a feedback signal having the number of bits adapted to the generation of the PWM signal in the PWM drive unit 1.

  As described above, according to the second embodiment, the position of the lens of the autofocus mechanism detected by the ratio of the first detection signal of the resistance value of SMA2 and the second detection signal of the reference resistance value. When the error is fed back to the PWM drive unit 1, instead of using a complicated division circuit that directly calculates the ratio of the first detection signal and the second detection signal, the first detection signal and the second detection signal are used. Each signal is logarithmically converted and the difference between these is calculated to detect the ratio between the resistance value of SMA2 and the reference resistance value, so that high-speed arithmetic processing can be performed compared to arithmetic processing of the division circuit. Thus, high-speed autofocus control can be realized.

  Next, a third embodiment of the present invention will be described. FIG. 13 is a block diagram illustrating the configuration of the actuator device according to the third embodiment. As shown in FIG. 13, the third embodiment has a configuration in which the delta-sigma modulation unit 5 in the first embodiment is incorporated into the configuration of the second embodiment shown in FIG. The other components are the same as those in the second embodiment, and are thus denoted by the same reference numerals and the description thereof is omitted.

  In the second embodiment, the microcomputer output of the control circuit 67 in FIG. 11 has a 6-bit configuration, and a 6-bit feedback signal adapted to generate a PWM signal in the PWM drive unit 1 is generated. A configuration in which the circuit 67 controls the entire imaging apparatus is also conceivable. As the microcomputer in this case, it is general to use a microcomputer having 10 bits or more, for example, a 16-bit structure, rather than a 6-bit structure. For this reason, there is a problem that the consistency of the digital signal cannot be obtained with the PWM signal having a resolution with a duty ratio of 64 steps, and a problem that the expansion and contraction of the shape memory alloy cannot respond to a high-speed change of the drive signal. Therefore, it is necessary to reduce the number of 16-bit to 32-bit feedback signals output from the control circuit 67 and convert the feedback signals into bits suitable for generating the PWM signal in the PWM drive unit 1. At this time, the sampling frequency of S1 to S4 in FIG. 1 is several to several tens of times the frequency at which the expansion and contraction response of SMA2 is possible.

  In FIG. 13, the feedback control unit 6 detects the ratio between the resistance value of the SMA 2 and the reference resistance value without using a divider circuit, as in the second embodiment. When the microcomputer of the feedback control unit 6 that processes the detection signal has a general-purpose 16-bit or more configuration, a delta-sigma modulation unit 5 outputs a feedback signal of 10-bit or more as in the case of the first embodiment. It is converted into a 6-bit feedback signal and supplied to the PWM drive unit 1.

  Therefore, according to the third embodiment, it is possible to perform high-speed arithmetic processing as compared with the arithmetic processing of a complicated division circuit, and high-speed autofocus control can be realized. Further, an inexpensive product can be realized by eliminating the inconsistency of the digital signal between the feedback signal from the feedback control unit 6 and the input signal to the PWM drive unit 1. Furthermore, an optimal feedback loop can be configured by generating a drive signal corresponding to the response speed of SMA2.

  The above embodiments are for explaining the present invention, and the present invention is not limited to the above embodiments, and other embodiments and other embodiments that can be considered by those skilled in the art without departing from the scope of the claims. Modifications also belong to the present invention.

  For example, in the above-described embodiment, the actuator device whose control target is the autofocus mechanism of a camera or other imaging device has been described. However, the control target of the actuator device of the present invention is not limited to the autofocus mechanism. The present invention is effective as any actuator device that requires high-precision and high-speed position control in devices or parts other than the imaging device, as well as being usable for controlling the iris mechanism and shutter mechanism of the imaging device. It is clear that there is.

It is a block diagram which shows the structure of the actuator apparatus in 1st Embodiment of this invention. It is a figure which shows the PWM drive part by the modification of 1st Embodiment, (1) is the block diagram, (2) is the circuit diagram. It is a block diagram which shows the internal circuit of the delta-sigma modulation part of FIG. It is a figure which shows the content by which a 10-bit input signal is converted into a 6-bit output signal by the delta-sigma modulation part of FIG. It is a figure which shows transition of the output signal of the delta-sigma modulation part of FIG. It is a figure showing the duty ratio of the PWM signal corresponding to the level of the output signal of the delta-sigma modulation part of FIG. It is a figure which shows the reduction effect of the quantization noise near direct current | flow by the primary noise shaper of the delta-sigma modulation part of FIG. It is a circuit diagram of the delta-sigma modulation part of FIG. 1 in the modification of 1st Embodiment. It is a figure which shows the reduction effect of the quantization noise of DC vicinity by the secondary noise shaper of the delta-sigma modulation part of FIG. It is a block diagram which shows the structure of the actuator apparatus in 2nd Embodiment of this invention. It is a block diagram which shows the internal structure of the feedback control part of FIG. 10, and the PWM drive part 1. FIG. 12 is a flowchart illustrating an autofocus operation executed by the control circuit of FIG. 11. It is a block diagram which shows the structure of the actuator apparatus in 3rd Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 PWM drive part 2 Shape memory alloy 3 Optical system 4,6 Feedback control part 5 Delta-sigma modulation part 51 Quantization circuit 53,56 Delay circuit 52,55 Addition circuit 61,62 High input resistance differential amplification circuit 63,64 Logarithm Amplifier circuit 65 Subtractor circuit 66 Reverse logarithmic amplifier circuit 67 Control circuit

Claims (6)

A shape memory alloy that expands and contracts according to a supplied drive signal to displace a predetermined control object;
Driving means for supplying a driving signal to the shape memory alloy;
State detection means for detecting a change state of the controlled object displaced by the shape memory alloy and outputting a feedback signal carrying information to be fed back to the drive means according to the change state;
Information reduction means for reducing the amount of information of the feedback signal output by the state detection means and inputting it to the driving means;
An actuator device comprising:   2. The actuator device according to claim 1, wherein the information reduction unit includes a delta-sigma modulation unit, and reduces the number of bits of digital data constituting the feedback signal and inputs the digital data to the driving unit.   The information reduction means includes a quantization means for quantizing the feedback signal output from the state detection means, a delay means for delaying quantization noise generated in the quantization means, and a quantum delayed by the delay means. The actuator device according to claim 2, further comprising: a combining unit that combines the quantization noise with the feedback signal output by the state detection unit and feeds back to the quantization unit.   The actuator device according to claim 2, wherein the driving unit generates a pulse width modulation signal based on the digital data input from the information reduction unit as a driving signal.   The actuator device according to claim 4, wherein the driving unit includes a smoothing unit that smoothes the generated pulse width modulation signal and converts the signal into an analog driving signal.   The control target is an imaging device having an optical means of an autofocus mechanism, and the shape memory alloy expands and contracts according to a drive signal supplied from the drive means to displace the lens of the autofocus mechanism, 6. The actuator device according to claim 1, wherein the state detection unit detects a focus state of the optical unit based on an image signal imaged by the imaging device.

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