JP4375564B2 - Sealing resin composition, electronic component device sealed with sealing resin composition, and method for repairing semiconductor element - Google Patents
Sealing resin composition, electronic component device sealed with sealing resin composition, and method for repairing semiconductor element Download PDFInfo
- Publication number
- JP4375564B2 JP4375564B2 JP2005077742A JP2005077742A JP4375564B2 JP 4375564 B2 JP4375564 B2 JP 4375564B2 JP 2005077742 A JP2005077742 A JP 2005077742A JP 2005077742 A JP2005077742 A JP 2005077742A JP 4375564 B2 JP4375564 B2 JP 4375564B2
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- Prior art keywords
- resin composition
- sealing resin
- multilayer structure
- particles
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000007789 sealing Methods 0.000 title claims description 145
- 239000004065 semiconductor Substances 0.000 title claims description 135
- 239000011342 resin composition Substances 0.000 title claims description 59
- 238000000034 method Methods 0.000 title claims description 30
- 229920005989 resin Polymers 0.000 claims description 123
- 239000011347 resin Substances 0.000 claims description 123
- 239000002245 particle Substances 0.000 claims description 112
- -1 siloxane skeleton Chemical group 0.000 claims description 61
- 239000000463 material Substances 0.000 claims description 44
- 239000003822 epoxy resin Substances 0.000 claims description 21
- 230000009477 glass transition Effects 0.000 claims description 21
- 229920000647 polyepoxide Polymers 0.000 claims description 21
- 239000000758 substrate Substances 0.000 claims description 20
- 230000008439 repair process Effects 0.000 claims description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 239000000203 mixture Substances 0.000 claims description 16
- 239000011256 inorganic filler Substances 0.000 claims description 8
- 229910003475 inorganic filler Inorganic materials 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- 229920002050 silicone resin Polymers 0.000 claims description 4
- 229920002379 silicone rubber Polymers 0.000 claims description 3
- 239000004945 silicone rubber Substances 0.000 claims description 3
- 238000004381 surface treatment Methods 0.000 claims description 3
- 239000004094 surface-active agent Substances 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 description 30
- 239000011162 core material Substances 0.000 description 27
- 239000010410 layer Substances 0.000 description 16
- 229920001296 polysiloxane Polymers 0.000 description 15
- 230000002950 deficient Effects 0.000 description 10
- 230000008569 process Effects 0.000 description 10
- 229920001169 thermoplastic Polymers 0.000 description 10
- 239000004416 thermosoftening plastic Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- 239000002904 solvent Substances 0.000 description 7
- 238000004140 cleaning Methods 0.000 description 6
- 239000003795 chemical substances by application Substances 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 239000000945 filler Substances 0.000 description 5
- 239000012792 core layer Substances 0.000 description 4
- 239000007822 coupling agent Substances 0.000 description 4
- NIHNNTQXNPWCJQ-UHFFFAOYSA-N fluorene Chemical compound C1=CC=C2CC3=CC=CC=C3C2=C1 NIHNNTQXNPWCJQ-UHFFFAOYSA-N 0.000 description 4
- 230000004907 flux Effects 0.000 description 4
- 230000035699 permeability Effects 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 229920000742 Cotton Polymers 0.000 description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 3
- 239000000654 additive Substances 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 239000011368 organic material Substances 0.000 description 3
- 239000005011 phenolic resin Substances 0.000 description 3
- 229920000642 polymer Polymers 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 229920000178 Acrylic resin Polymers 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 2
- 235000017166 Bambusa arundinacea Nutrition 0.000 description 2
- 235000017491 Bambusa tulda Nutrition 0.000 description 2
- 241001330002 Bambuseae Species 0.000 description 2
- BTBUEUYNUDRHOZ-UHFFFAOYSA-N Borate Chemical compound [O-]B([O-])[O-] BTBUEUYNUDRHOZ-UHFFFAOYSA-N 0.000 description 2
- VTYYLEPIZMXCLO-UHFFFAOYSA-L Calcium carbonate Chemical compound [Ca+2].[O-]C([O-])=O VTYYLEPIZMXCLO-UHFFFAOYSA-L 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- 235000015334 Phyllostachys viridis Nutrition 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 239000004721 Polyphenylene oxide Substances 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 150000004645 aluminates Chemical class 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000011425 bamboo Substances 0.000 description 2
- ZCDOYSPFYFSLEW-UHFFFAOYSA-N chromate(2-) Chemical compound [O-][Cr]([O-])(=O)=O ZCDOYSPFYFSLEW-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000011258 core-shell material Substances 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 239000012948 isocyanate Substances 0.000 description 2
- 150000002513 isocyanates Chemical class 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 150000007524 organic acids Chemical class 0.000 description 2
- 235000005985 organic acids Nutrition 0.000 description 2
- 239000011146 organic particle Substances 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 229920000570 polyether Polymers 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 150000003839 salts Chemical class 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 229940071182 stannate Drugs 0.000 description 2
- 125000005402 stannate group Chemical group 0.000 description 2
- 230000008719 thickening Effects 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004641 Diallyl-phthalate Substances 0.000 description 1
- 229920000877 Melamine resin Polymers 0.000 description 1
- 239000004640 Melamine resin Substances 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000005062 Polybutadiene Substances 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 150000001408 amides Chemical class 0.000 description 1
- 150000001412 amines Chemical class 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 125000005605 benzo group Chemical group 0.000 description 1
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 1
- QUDWYFHPNIMBFC-UHFFFAOYSA-N bis(prop-2-enyl) benzene-1,2-dicarboxylate Chemical compound C=CCOC(=O)C1=CC=CC=C1C(=O)OCC=C QUDWYFHPNIMBFC-UHFFFAOYSA-N 0.000 description 1
- 229910000019 calcium carbonate Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- CFBGXYDUODCMNS-UHFFFAOYSA-N cyclobutene Chemical compound C1CC=C1 CFBGXYDUODCMNS-UHFFFAOYSA-N 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 229910001872 inorganic gas Inorganic materials 0.000 description 1
- 239000010954 inorganic particle Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 150000007522 mineralic acids Chemical class 0.000 description 1
- 239000012766 organic filler Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 229920003217 poly(methylsilsesquioxane) Polymers 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920006122 polyamide resin Polymers 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920005668 polycarbonate resin Polymers 0.000 description 1
- 239000004431 polycarbonate resin Substances 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
- 229920005672 polyolefin resin Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 229920005990 polystyrene resin Polymers 0.000 description 1
- 229920002635 polyurethane Polymers 0.000 description 1
- 239000004814 polyurethane Substances 0.000 description 1
- 229920005749 polyurethane resin Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229920002803 thermoplastic polyurethane Polymers 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
- C08G77/00—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule
- C08G77/42—Block-or graft-polymers containing polysiloxane sequences
- C08G77/44—Block-or graft-polymers containing polysiloxane sequences containing only polysiloxane sequences
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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Description
本発明は、硬化させた後に封止された半導体素子を除去することができ、かつ配線基板上に残された封止樹脂残さを除去することが可能な封止樹脂組成物、封止樹脂組成物で封止された電子部品装置及び半導体素子のリペア方法に関する。 The present invention provides a sealing resin composition and a sealing resin composition capable of removing a semiconductor element sealed after being cured and capable of removing a sealing resin residue remaining on a wiring board The present invention relates to an electronic component device sealed with an object and a method for repairing a semiconductor element.
電子機器の急速な発達に伴い、半導体素子にはこれまで以上に高機能化が求められるようになった。半導体素子の多機能化に伴い半導体素子の入出力端子数は増加し、また半導体素子を高速動作させるための配線長は短縮化が求められている。こうした要求を実現するために開発された接続工法としてフリップチップ接続(図1参照)がある。 With the rapid development of electronic equipment, semiconductor devices have been required to have higher functionality than ever before. As the number of multifunctional semiconductor elements increases, the number of input / output terminals of the semiconductor elements increases, and the wiring length for operating the semiconductor elements at high speed is required to be reduced. There is a flip-chip connection (see FIG. 1) as a connection method developed to realize such a requirement.
図1に示すように、半導体素子1は、ビルドアップ配線基板6上にソルダーレジスト5を介して搭載されている。半導体素子1とビルドアップ配線基板6とは、接続用パッド3とはんだ4を介して電気的に接続されている。このような構成の下、ビルドアップ配線基板6上に形成された接続用電極パッド3(接続用電極部)とビルトアップ配線基板6上に搭載された半導体素子1との接続部に生じる空隙部分を封止樹脂2で封止する。フリップチップ接続は、半導体素子の配線面にエリア上に接続パッドを設けることができるため多ピン化に適している。
As shown in FIG. 1, the semiconductor element 1 is mounted on a build-
また、ワイヤボンディング(図2参照)やテープオートメイティッドボンディング(図3参照)の様な他の半導体素子接続工法と比較し、引き出し線を必要としないため配線長の短縮化が可能である。一般に、フリップチップ接続される高機能半導体素子の多くは高付加価値のものが多い。また、これらの半導体素子をうける微細配線基板は高多層なものが必要となるため非常に高価であり、実装歩留まりを向上させるための要求は非常に強いものがある。 Further, compared to other semiconductor element connection methods such as wire bonding (see FIG. 2) and tape automated bonding (see FIG. 3), the lead length is not required, so that the wiring length can be shortened. In general, many of the high-performance semiconductor elements that are flip-chip connected are high-value-added. In addition, a fine wiring substrate that receives these semiconductor elements is very expensive because a high-layered substrate is required, and there is a very strong demand for improving the mounting yield.
以上のように、高付加価値の電子機器に用いられる半導体素子の実装には、フリップチップ接続を使用したものが増加している。一方、フリップチップ接続される半導体素子の多くは、半導体素子−配線基板間の熱膨張差を緩和するため、接続部に封止樹脂とよばれる液状の封止剤を注入し硬化させることにより接続信頼性を確保する必要がある。封止に用いる材料には、封止状態で、耐落下衝撃性、耐熱衝撃性、耐振動性、耐埃性、耐水性を向上させるためにセラミック、金属材料、樹脂材料等様々な材料が考案されており、非常に高い気密性を持っている。セラミック、金属材料を用いた封止は信頼性が高いもののコスト高であり、樹脂材料を用いた封止に比べて作業性に劣るため、現在では樹脂封止が一般的となっている。 As described above, the number of semiconductor devices used in high value-added electronic devices using flip chip connection is increasing. On the other hand, many flip-chip connected semiconductor elements are connected by injecting and curing a liquid sealing agent called sealing resin in the connection part in order to alleviate the difference in thermal expansion between the semiconductor element and the wiring board. It is necessary to ensure reliability. Various materials such as ceramics, metal materials, and resin materials have been devised as materials used for sealing in order to improve drop impact resistance, thermal shock resistance, vibration resistance, dust resistance, and water resistance in the sealed state. And has a very high airtightness. Sealing using a ceramic or metal material is high in reliability but costly, and is inferior in workability compared to sealing using a resin material. Therefore, resin sealing is now common.
樹脂封止に用いられる材料にはエポキシ樹脂、シリコーン樹脂、フェノール樹脂、ジアリルフタレート樹脂、ポリイミド樹脂、アクリル樹脂、ウレタン樹脂等があるが、耐熱性、耐湿性、耐薬品性、接着性、コスト等の面で優れているエポキシ樹脂が広く使用されている。エポキシ樹脂を含む多くの封止樹脂はその接着強度の高さのため、高い実装信頼性が確保できる反面、一度熱処理を施して樹脂を硬化させてしまうと、その高い樹脂強度、接着強度のため除去することが非常に困難となってしまう。従って、半導体素子あるいは配線基板の不良発生時に不良部品を交換することが非常に困難となり、実装コストが高くなるという問題がある。特に、ハイエンドサーバー、ハイエンドコンピュータ等、高付加価値な装置については、1枚の微細配線基板上に搭載される半導体素子が数十個に及ぶこともあり、1個の半導体素子の不良によりその他の良品部品全てが廃棄となってしまうことは非常に多くのコスト損失を招くことになる。 Materials used for resin sealing include epoxy resin, silicone resin, phenolic resin, diallyl phthalate resin, polyimide resin, acrylic resin, urethane resin, etc., but heat resistance, moisture resistance, chemical resistance, adhesion, cost, etc. Epoxy resin, which is superior in terms of the above, is widely used. Many sealing resins including epoxy resins have high adhesive strength, so high mounting reliability can be ensured. On the other hand, once the resin is cured by heat treatment, its high resin strength and adhesive strength. It will be very difficult to remove. Therefore, it is very difficult to replace a defective part when a semiconductor element or a wiring board is defective, and there is a problem that the mounting cost increases. Especially for high-value added devices such as high-end servers and high-end computers, several tens of semiconductor elements can be mounted on one fine wiring board. If all non-defective parts are discarded, a great amount of cost is lost.
樹脂を用いた封止には大きくわけてグロブトップタイプ(図4参照)、モールドタイプ(図5参照)アンダーフィルタイプ(図6参照)の3種類の形態がある。グロブトップタイプ及びモールドタイプは主にワイヤーボンディング接続の際に用いられる封止形態であり、図4及び図5に示すように、半導体素子1自体を封止樹脂2で取り囲んだ状態で硬化させる形態である。
Sealing using resin is roughly divided into three types: a glob top type (see FIG. 4), a mold type (see FIG. 5), and an underfill type (see FIG. 6). The glob top type and the mold type are sealing forms mainly used in wire bonding connection, and as shown in FIGS. 4 and 5, the semiconductor element 1 itself is hardened in a state surrounded by the
アンダーフィルタイプとは、主にフリップチップ接続の際に用いられる封止形態であり、図6に示すように、半導体素子1と配線基板6との接続部分にのみ封止樹脂2を流し込み、流し込んだ封止樹脂2を硬化させる形態である。近年の半導体素子の狭ピッチ化に伴い、半導体素子−配線基板間のギャップは非常に狭くなっており、封止剤に対しより一層の充填性が要求されている。
The underfill type is a sealing form mainly used at the time of flip-chip connection. As shown in FIG. 6, the
半導体素子を実装する基板には、主にセラミックを用いたものと有機材料を用いたものの2種類がある。高密度実装に用いられる配線基板の多くは、狭ピッチ化に優れ、軽量、低コストであることから有機配線基板を用いたものが多い。高密度配線基板の多くは、図7に示すようにビルドアップと呼ばれる積層構造をとっている。ビルドアップ配線基板は、コア層10とビルドアップ層9の2つの部分からなっている。コア層10は配線基板の反りを低減して実装歩留まりを向上させる構造上の支持体としての役割と、電源層などの配線密度の低い層を受け持つことで高密度配線層を低い密度で使用して配線密度のバランスをとる役割とを有している。
There are two types of substrates on which semiconductor elements are mounted, mainly using ceramics and using organic materials. Many of the wiring boards used for high-density mounting use organic wiring boards because they are excellent in narrowing the pitch, are lightweight, and are low in cost. Many high-density wiring boards have a laminated structure called build-up as shown in FIG. The buildup wiring board is composed of two parts, a
狭ピッチの配線を描くことの出来る点で有利な有機基板材料には、アクリル、ポリオレフィン、ポリウレタン、ポリカーボネート、ポリスチレン、ポリエーテル、ポリアミド、ポリイミド、フッ素を含むポリマー、ポリエステル、フェノール樹脂、フルオレン樹脂、ベンゾシクロブテン、シリコ−ン系ポリマー等様々な材料があるが、コスト、低熱膨張、低誘電損失、耐熱性等の面に優れるエポキシ樹脂が一般に用いられている。 Organic substrates that are advantageous in that they can draw narrow pitch wiring include acrylic, polyolefin, polyurethane, polycarbonate, polystyrene, polyether, polyamide, polyimide, fluorine-containing polymer, polyester, phenol resin, fluorene resin, benzo Although there are various materials such as cyclobutene and silicone-based polymers, epoxy resins that are excellent in terms of cost, low thermal expansion, low dielectric loss, heat resistance and the like are generally used.
また、配線基板の最外層には、はんだ流れ防止目的のソルダーレジストが塗布されている。このソルダーレジストの多くも基板材料や封止樹脂と同様にエポキシ樹脂であり、現在の有機配線基板の多くはエポキシ樹脂により形成されていると言える。 A solder resist for preventing solder flow is applied to the outermost layer of the wiring board. Many of the solder resists are epoxy resins as well as the substrate material and the sealing resin, and it can be said that many of the current organic wiring boards are formed of the epoxy resin.
次に、リペアを可能にする封止樹脂の従来技術について述べる。リペアを可能にする封止樹脂の多くは、熱可塑性の成分を添加し高温下にさらすことで樹脂の密着強度あるいは樹脂強度を低下させ、半導体素子を取り外す工程と、基板上に残された残さ樹脂を高温下における可塑性を利用することにより除去する工程を含むコンセプトが提案されている(特許文献1、特許文献2及び特許文献3参照)。
Next, the prior art of the sealing resin that enables repair will be described. Many of the sealing resins that enable repair are the process of removing the semiconductor element and the residue left on the substrate by adding a thermoplastic component and exposing it to high temperatures to reduce the adhesion strength or resin strength of the resin. The concept including the process of removing resin by utilizing the plasticity under high temperature is proposed (refer patent document 1,
しかし、一般的な熱可塑性成分の添加に関しては、増粘やチキソ性発現による狭ギャップへの充填性の悪化、線膨張係数の増大による接続信頼性低下、耐マイグレーション性の低下等の性能劣化を招く場合が多く、充填性、接続信頼性及びリペア性を両立することは困難である。 However, with regard to the addition of general thermoplastic components, performance degradation such as deterioration of filling capability in narrow gaps due to thickening and thixotropy, reduction of connection reliability due to increase of linear expansion coefficient, and reduction of migration resistance, etc. In many cases, it is difficult to achieve both filling properties, connection reliability, and repairability.
その他の方法として、有機溶剤を用い、封止樹脂を膨潤させることで封止樹脂と配線基板の間の密着強度及び樹脂強度を低下させ、半導体素子の取り外し、残渣樹脂の除去を行う方法が考案されている(特許文献2、特許文献4及び特許文献5参照)。しかし、現在用いられている封止樹脂および配線基板の多くは共にエポキシ樹脂であるため、樹脂残さ除去用の溶剤が封止樹脂のみでなく配線基板も膨潤させ、ビルドアップ基板の層間剥離を起こす恐れがある。さらに、配線基板表面の状態が樹脂残さ除去用の溶剤により変化し、配線基板を再利用する際に封止樹脂の再充填性を悪化させる恐れがある。以上のように溶剤を用いた場合に、配線基板に影響を与えずに封止樹脂のみを選択的に除去することは一般的には困難である。
As another method, an organic solvent is used to swell the sealing resin, thereby reducing the adhesion strength and resin strength between the sealing resin and the wiring board, and removing the semiconductor element and removing the residual resin. (See
上記のような懸念から不良発生時に備えて、実装形体自体を再利用可能な構造とする方法も提案されている。この例として、半導体素子実装時にインターポーザ構造を取り、不良発生時にははんだリフローによってインターポーザごと取り外してしまう方法(特許文献6参照)が考案されている。 In view of the above concerns, a method has been proposed in which the mounting form itself has a reusable structure in preparation for occurrence of a defect. As an example of this, a method has been devised in which an interposer structure is taken when a semiconductor element is mounted and the interposer is removed by solder reflow when a defect occurs (see Patent Document 6).
しかし、インターポーザを用いた実装方法は、配線長が長くなるため一般的には信号の高速伝搬に不利であり、また、インピーダンス整合をとるのが困難であるという欠点がある。また、インタポーザ構造をとることで実装面積及び実装高さが増大し、小型化及び高密度化との両立ができないという欠点がある。以上のように、インターポーザ構造をとることによる半導体素子のリペアは根本的な問題解決の手段としては不十分である。 However, the mounting method using an interposer is generally disadvantageous for high-speed signal propagation because the wiring length is long, and has a drawback that it is difficult to achieve impedance matching. Further, the interposer structure increases the mounting area and the mounting height, and there is a disadvantage that it is impossible to achieve both miniaturization and high density. As described above, the repair of the semiconductor element by adopting the interposer structure is insufficient as a fundamental problem solving means.
溶剤を必要としない封止樹脂除去方法として、樹脂残さに電磁波を照射することにより樹脂残さを除去する方法(特許文献7参照)、レーザ光が透過する配線基板を実装時に用い、半導体素子の実装されている裏面からレーザ光を照射し、封止樹脂の密着力を弱める方法(特許文献8参照)等が考案されている。 As a sealing resin removing method that does not require a solvent, a method of removing resin residue by irradiating the resin residue with electromagnetic waves (see Patent Document 7), mounting a semiconductor element using a wiring board through which laser light is transmitted A method of irradiating a laser beam from the rear surface to weaken the adhesion of the sealing resin (see Patent Document 8) has been devised.
しかし、現在用いられている封止樹脂および配線基板の多くは共にエポキシ樹脂であるため、封止樹脂のみを選択的に加工することは難しい。また、封止樹脂除去を可能にする程度のレーザ強度でレーザ照射を行うと、配線基板の損傷および配線基板表面状態の変化により配線基板再利用時の封止樹脂再充填性を悪化させる恐れがある。また、現在使用されている配線基板の多くはレーザ透過性を持っておらず、上記特許文献8の方法による問題解決は困難である。以上のように、非接触のエネルギーを用いた方法による封止樹脂のみの選択的加工は困難である。 However, since most of the sealing resins and wiring boards currently used are epoxy resins, it is difficult to selectively process only the sealing resin. In addition, if laser irradiation is performed with a laser intensity that enables removal of the sealing resin, there is a risk that the refillability of the sealing resin when the wiring board is reused is deteriorated due to damage to the wiring board and changes in the wiring board surface state. is there. In addition, many of the wiring boards currently used do not have laser transparency, and it is difficult to solve the problem by the method of Patent Document 8. As described above, it is difficult to selectively process only the sealing resin by a method using non-contact energy.
以上述べたように、従来技術には配線基板に損傷を与えることなく半導体素子ならびに封止樹脂を選択的に除去し、充填性、接続信頼性及びリペア性のいずれをも両立する材料および方法に関する開示は見られない。 As described above, the prior art relates to a material and method that selectively removes the semiconductor element and the sealing resin without damaging the wiring board, and achieves both filling properties, connection reliability, and repairability. There is no disclosure.
一般に、リペア性を持たせた封止樹脂材料は、熱可塑性成分を添加することにより、高温下での可塑性、溶剤膨潤性を高める設計のものが多かった。これら熱可塑性成分の多くは、封止樹脂に必要な狭ギャップへの充填性及び接続信頼性を低下させるものが多く、リペア性、充填性及び信頼性を両立させることは困難であった。 In general, many sealing resin materials having repair properties are designed to enhance plasticity and solvent swellability at high temperatures by adding a thermoplastic component. Many of these thermoplastic components often reduce the filling property and the connection reliability in a narrow gap necessary for the sealing resin, and it has been difficult to achieve both repairability, filling property and reliability.
そこで、本発明は上記従来技術の問題点に鑑みて成されたものであり、その目的とするところは、狭ギャップへの充填性及び接続信頼性と、封止樹脂硬化後の半導体素子(LSI)の取り外しならびに配線基板上に残る封止樹脂残渣の除去を両立することにある。 Therefore, the present invention has been made in view of the above-mentioned problems of the prior art, and its object is to fill a narrow gap and connection reliability, and a semiconductor element (LSI after curing the sealing resin). ) And removal of the sealing resin residue remaining on the wiring board.
上記目的を達成するために、本発明は、配線基板上に形成された接続用電極部と配線基板上に搭載された半導体素子との接続部に生じる空隙部分を封止するための封止樹脂組成物であって、前記封止樹脂組成物中に多層構造となる粒子を含み、多層構造となる粒子の少なくとも1層以上はシロキサン骨格を有することを特徴とする。 In order to achieve the above-described object, the present invention provides a sealing resin for sealing a gap portion generated in a connection portion between a connection electrode portion formed on a wiring substrate and a semiconductor element mounted on the wiring substrate. A composition comprising a particle having a multilayer structure in the sealing resin composition, wherein at least one of the particles having a multilayer structure has a siloxane skeleton.
前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、封止樹脂組成物の弾性を低下させる。 The particles having a multilayer structure having at least one siloxane skeleton reduce the elasticity of the sealing resin composition.
また、前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、多層構造となる粒子の最外殻であるシエル部と、多層構造となる粒子に包含されるコア部とから成り、コア部がシエル部よりも硬度が低いことが好ましい。 The particle having a multilayer structure having at least one siloxane skeleton is composed of a shell portion that is an outermost shell of the particle having the multilayer structure and a core portion included in the particles having the multilayer structure. However, the hardness is preferably lower than that of the shell portion.
好ましくは、前記コア部及びシエル部が、シシロキサン骨格で形成されている。また、前記コア部がシリコーンゴムであり、前記シエル部がシリコーンレジンであることが好ましい。前記コア部のガラス転移温度が、前記シエル部分のガラス転移温度よりも低いことが好ましい。 Preferably, the core part and the shell part are formed of a siloxane skeleton. Moreover, it is preferable that the said core part is a silicone rubber and the said shell part is a silicone resin. It is preferable that the glass transition temperature of the core portion is lower than the glass transition temperature of the shell portion.
好ましくは、前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子を添加する封止樹脂組成物のガラス転移温度が、前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子よりも高く、前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子のシエル部よりも低い。前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子を含む封止樹脂組成物のガラス転移温度は、例えば80℃以上である。 Preferably, the glass transition temperature of the sealing resin composition to which particles having a multilayer structure having at least one siloxane skeleton are added is higher than that of particles having a multilayer structure having at least one siloxane skeleton, It is lower than the shell portion of a particle having a multilayer structure having at least one siloxane skeleton. The glass transition temperature of the sealing resin composition containing particles having a multilayer structure having at least one siloxane skeleton is, for example, 80 ° C. or higher.
前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、例えば、球状である。 The particles having a multilayer structure having at least one siloxane skeleton are, for example, spherical.
好ましくは、前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子の表面に対して、界面活性剤による表面処理が行われている。 Preferably, a surface treatment with a surfactant is performed on the surface of particles having a multilayer structure having at least one siloxane skeleton.
前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子の平均粒径は、好ましくは1〜30μm、より好ましくは5〜15μmである。 The average particle size of the particles having a multilayer structure having at least one siloxane skeleton is preferably 1 to 30 μm, more preferably 5 to 15 μm.
前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子の添加量は、好ましくは1〜30Vol%、より好ましくは15〜25Vol%である。 The addition amount of the particles having a multilayer structure having at least one siloxane skeleton is preferably 1 to 30% by volume, more preferably 15 to 25% by volume.
好ましくは、前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子を添加した封止樹脂組成物が、前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子未添加の封止樹脂組成物と比較し、ガラス転移温度点以下の温度領域で線膨張係数が低い。 Preferably, a sealing resin composition to which a particle having a multilayer structure having at least one siloxane skeleton is added is a non-particle-added sealing resin composition having a multilayer structure having at least one siloxane skeleton. In comparison, the linear expansion coefficient is low in the temperature region below the glass transition temperature point.
好ましくは、前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子が、母材封止樹脂と相溶性を持たない。前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子が、封止樹脂硬化後に溶融しないことが好ましい。 Preferably, particles having a multilayer structure having at least one siloxane skeleton do not have compatibility with the base material sealing resin. It is preferable that the particles having a multilayer structure having at least one siloxane skeleton do not melt after the sealing resin is cured.
また、前記封止樹脂組成物が、平均粒径10μm以下の球状の無機充填剤を含むことが好ましい。前記無機充填剤は、例えば、球状シリカである。 Moreover, it is preferable that the said sealing resin composition contains the spherical inorganic filler with an average particle diameter of 10 micrometers or less. The inorganic filler is, for example, spherical silica.
また、本発明では、配線基板上に搭載された複数の半導体素子の少なくとも一つを取外し可能にした半導体素子のリペア方法であって、配線基板上に形成された接続用電極部と上記半導体素子との接続部に生じる空隙部分を封止するための封止樹脂組成物としてシロキサン骨格を持つ多層の粒子を含む組成物を用いることにより、封止樹脂硬化後の半導体素子の取外し及び配線基板上に残る封止樹脂残渣の除去を行うことを特徴とする。 The present invention also provides a method for repairing a semiconductor element in which at least one of a plurality of semiconductor elements mounted on the wiring board can be removed, the connection electrode portion formed on the wiring board and the semiconductor element described above By using a composition containing multi-layer particles having a siloxane skeleton as a sealing resin composition for sealing a void portion generated in a connection portion with the semiconductor device, the semiconductor element is removed after the sealing resin is cured and on the wiring board The sealing resin residue remaining on the substrate is removed.
前記シロキサン骨格を持つ多層の粒子は、多層構造となる粒子の最外殻であるシエル部と、多層構造となる粒子に包含されるコア部とから成り、コア部がシエル部よりも硬度が低いことが好ましい。 The multilayer particle having the siloxane skeleton is composed of a shell portion that is an outermost shell of the particle having a multilayer structure and a core portion included in the particle having the multilayer structure, and the core portion has lower hardness than the shell portion. It is preferable.
リペアを必要とする温度域においては前記シエル部分が軟化すると共に前記コア部分の弾性が低下し、これにより半導体素子の取外し及び配線基板上の樹脂残渣除去が促進される。前記リペアを必要とする温度域は、例えば、180℃以上の温度域である。 In the temperature range where repair is required, the shell portion is softened and the elasticity of the core portion is lowered, thereby promoting the removal of the semiconductor element and the removal of the resin residue on the wiring board. The temperature range that requires repair is, for example, a temperature range of 180 ° C. or higher.
このように、本発明は、狭ギャップへの充填性、リペア時の低弾性及び半導体素子動作温度領域における接続信頼性の両立を実現することで、従来不可能であった封止樹脂硬化後の半導体素子交換を可能とし、実装コストの低減及び環境負荷低減を実現するものである。コアシエル構造を有する特殊な粒子を封止樹脂に添加することにより、以上の性能を両立することが可能となり本発明に至った。 As described above, the present invention realizes the compatibility between the filling ability in the narrow gap, the low elasticity at the time of repair, and the connection reliability in the semiconductor element operating temperature region, which has been impossible before. The semiconductor element can be exchanged, and the mounting cost and the environmental load can be reduced. By adding special particles having a core shell structure to the encapsulating resin, it is possible to achieve both of the above performances, and the present invention has been achieved.
今回検討にもちいた粒子は、コアシエル構造を有する多層のシロキサン骨格をもつ。シロキサン骨格とはSiとOを共有結合でつないだ繰り返し構造を持ち、コアはビニル基含有のメチルポリシロキサンとメチルハイドロジエンポリシロキサンの付加重合物で形成され、シエルはシロキサン結合が三次元網目状に架橋した構造を持つポリメチルシルセスキオキサンから形成される。 The particles used in this study have a multilayer siloxane skeleton having a core shell structure. The siloxane skeleton has a repeating structure in which Si and O are covalently bonded, the core is formed from an addition polymer of vinyl group-containing methylpolysiloxane and methylhydropolysiloxane, and the shell has a three-dimensional network of siloxane bonds. It is formed from polymethylsilsesquioxane having a crosslinked structure.
本封止樹脂に用いられるシロキサン骨格を有する粒子は多層構造を形成している。以下に本発明に用いられる多層シロキサン骨格の例として、コア部とシエル部の2層構造の場合の例を示す。本発明において述べるシエル部とは、多層構造となる粒子の最外殻であり、またコア部とは多層構造となる粒子に包含される部分を示す。コアに用いるシリコーンは硬度を低く設計しており弾性が低い。また、最表層を示すシエルに用いる材料はコアと比較して硬度が高く弾性が高い構造となっている。 The particles having a siloxane skeleton used for the sealing resin form a multilayer structure. As an example of the multilayer siloxane skeleton used in the present invention, an example in the case of a two-layer structure of a core part and a shell part is shown below. The shell portion described in the present invention is the outermost shell of particles having a multilayer structure, and the core portion is a portion included in the particles having a multilayer structure. Silicone used for the core is designed to have low hardness and low elasticity. Moreover, the material used for the shell showing the outermost layer has a structure having higher hardness and higher elasticity than the core.
一般に、フリップチップ接続される半導体素子に封止樹脂を用いる際には、半導体素子を含むボード全体を加温し、封止樹脂の粘度を下げた状態で狭ギャップへの充填を行うことが多い。これは封止樹脂の粘度を下げることで、半導体素子及び配線基板への濡れ性を高め、ボイドのない充填を短時間で完了し、接続信頼性を高めるために行われる。 In general, when a sealing resin is used for a flip-chip connected semiconductor element, the entire board including the semiconductor element is often heated to fill a narrow gap with the sealing resin lowered in viscosity. . This is performed in order to increase the wettability to the semiconductor element and the wiring substrate by completing the viscosity of the sealing resin, complete the filling without voids in a short time, and increase the connection reliability.
本発明に用いられるシエルに用いる硬度の高いシロキサン骨格は封止樹脂の充填温度と比較して熱軟化点が高く、充填の際に封止樹脂と反応することがないため、高温で生産性高く充填作業を行うことができる。一方で、一般の熱可塑剤を添加した場合には、熱をかけることで熱可塑剤が軟化、変形し、熱可塑剤どうしでの二次凝集、封止樹脂基材との反応、封止樹脂基材への相溶等することで増粘あるいはチキソ性を発現することが多い。従って、一般的な熱可塑剤を添加した材料においては、生産性高く狭ギャップにボイドレス充填を達成することは困難である。 The siloxane skeleton with high hardness used in the shell used in the present invention has a high thermal softening point compared to the filling temperature of the sealing resin, and does not react with the sealing resin during filling. A filling operation can be performed. On the other hand, when a general thermoplastic agent is added, the thermoplastic agent is softened and deformed by applying heat, secondary aggregation between the thermoplastic agents, reaction with the sealing resin substrate, sealing In many cases, thickening or thixotropy is exhibited by compatibility with a resin base material. Therefore, it is difficult to achieve voidless filling in a narrow gap with high productivity in a material to which a general thermoplastic agent is added.
本発明に用いられるシロキサン骨格ならびに多層シリコーン粒子は、一般の熱可塑剤粒子添加の場合と比較し、封止樹脂の線膨張係数増大を抑える働きを有している。特に添加粒子のガラス転移温度点以下の領域において、従来熱可塑粒子添加の場合と比較して線膨張の増大を抑える効果が顕著であり、多層ビルドアップ配線基板と半導体素子を繋ぐはんだ接続部に生じる熱応力を緩和することで高い接続信頼性を保持することができる。 The siloxane skeleton and the multilayer silicone particles used in the present invention have a function of suppressing an increase in the linear expansion coefficient of the sealing resin as compared with the case of adding general thermoplastic particles. Especially in the region below the glass transition temperature point of the additive particles, the effect of suppressing the increase of linear expansion is remarkable compared to the case of adding conventional thermoplastic particles, and in the solder connection part connecting the multilayer build-up wiring board and the semiconductor element. High connection reliability can be maintained by relaxing the generated thermal stress.
一方、本発明に用いられる多層シロキサン骨格は、コア部分の硬度が低く、シエル部分の硬度が高い構造を取っている。 On the other hand, the multilayer siloxane skeleton used in the present invention has a structure in which the hardness of the core portion is low and the hardness of the shell portion is high.
半導体素子(LSI)の実動作温度である105℃以下においてはシエル部が線膨張を押さえることでSiO2等の無機フィラーのように線膨張の増大を抑え、リペアを必要とする温度域である180℃以上の温度域においてはシエル部が軟化し、コア部分の低硬度層の特性である低弾性が発現し、半導体素子の取り外しならびに配線基板上の樹脂残渣除去を容易にする。
When the actual operating temperature of the semiconductor element (LSI) is 105 ° C. or lower, the shell portion suppresses the linear expansion, thereby suppressing the increase of the linear expansion like an inorganic filler such as
本発明に用いられる多層シロキサン骨格を有する封止樹脂材料は、半導体素子の実装プロセスにおいて用いられる有機酸、アミン、アミド、またそれらの塩、無機酸、無機塩、無機ガス等に対し、高い耐溶剤性を有する。そのため複数の半導体素子の一部をリペアする際に付着するフラックス等の有機酸、あるいは半導体素子を交換した後の洗浄に用いられる有機溶剤等、実装プロセスで受ける負荷に対し、他の半導体素子の信頼性に影響を及ぼすことがない。以上のように構造、硬度、軟化点等を制御したシロキサン骨格を有する特殊な粒子を添加することで、充填性、リペア性及び接続信頼性を両立する。 The encapsulating resin material having a multilayer siloxane skeleton used in the present invention is highly resistant to organic acids, amines, amides, salts thereof, inorganic acids, inorganic salts, inorganic gases, etc. used in the mounting process of semiconductor elements. Has solvent properties. For this reason, other semiconductor elements are exposed to the load received in the mounting process, such as organic acids such as flux that adheres when repairing a part of a plurality of semiconductor elements, or organic solvents used for cleaning after replacing semiconductor elements. Does not affect reliability. As described above, by adding special particles having a siloxane skeleton whose structure, hardness, softening point, and the like are controlled, filling properties, repair properties, and connection reliability are compatible.
現在基板材料に用いられている材料の大半はエポキシ樹脂である。また半導体素子と配線基板との間を封止する樹脂は、一般にエポキシ樹脂を用いたものが多い。以上のような材料を用いていることから、半導体素子あるいは配線基板側に不良が生じた場合に、例え半導体素子を熱等により除去することができたとしても、配線基板上に残る封止樹脂残さを除去しようとした際には、配線基板にダメージを与えてしまうことが多かった。 Most materials currently used for substrate materials are epoxy resins. In general, the resin that seals between the semiconductor element and the wiring board often uses an epoxy resin. Since the material as described above is used, when a defect occurs on the semiconductor element or the wiring board side, even if the semiconductor element can be removed by heat or the like, the sealing resin remaining on the wiring board When trying to remove the residue, the wiring board was often damaged.
そこで、本発明では、シロキサン骨格を持つ多層の粒子を用いることにより、従来不可能であった狭ギャップへの充填性及び接続信頼性と、封止樹脂硬化後の半導体素子の取外しならびに配線基板上に残る封止樹脂残渣の除去を両立することができる。 Therefore, in the present invention, by using multi-layered particles having a siloxane skeleton, filling capability and connection reliability in a narrow gap, removal of a semiconductor element after curing of a sealing resin, and on a wiring board were impossible. The sealing resin residue remaining on the substrate can be removed at the same time.
本発明の一実施形態としての電子部品装置の例として、複数の半導体素子(LSI)を積層したLSIパッケージを1枚のビルドアップ配線基板に半田接続し、フリップチップ実装したモジュールの例を示す。ビルドアップ配線基板とLSIパッケージの間のはんだ接続部分に本発明の封止樹脂を充填し、封止するものとする。LSIパッケージはCSP、BGA、ベアチップ等、いずれの形態でも良く特に限定されるものではない。 As an example of an electronic component device according to an embodiment of the present invention, an example of a module in which an LSI package in which a plurality of semiconductor elements (LSIs) are stacked is solder-connected to one build-up wiring board and flip-chip mounted is shown. The soldering connection portion between the build-up wiring board and the LSI package is filled with the sealing resin of the present invention and sealed. The LSI package may be in any form such as CSP, BGA, bare chip, etc. and is not particularly limited.
半導体素子(LSI)とビルドアップ配線基板の間の電気接続を取る材料は半田材料のみに限るものではなく、導電性を有する材料であれば特に限定されるものではない。例えば,導電粒子を分散させた導電性樹脂接続あるいは金―半田等異種材料の接続を用いても良い。 The material that establishes electrical connection between the semiconductor element (LSI) and the build-up wiring board is not limited to the solder material, and is not particularly limited as long as it is a conductive material. For example, a conductive resin connection in which conductive particles are dispersed or a connection of different materials such as gold-solder may be used.
ビルドアップ配線基板の表面を覆っているソルダーレジスト、コア材等の配線基板を構成している有機ならびに無機材料については、金属配線、接続パッド等に対し、腐食性等の悪影響を及ぼさない材料を選択する必要がある。また、半導体素子のリペア工程に耐える耐熱性を有する事が望ましい。例えば、一般的に使用される鉛フリーはんだのリフロー温度250℃のプロセスにおいて、配線基板、半導体素子、電子部品等に対して悪影響を及ぼさないものが望ましい。 For the organic and inorganic materials that make up the wiring board such as solder resist and core material that cover the surface of the build-up wiring board, use materials that do not adversely affect the metal wiring, connection pads, etc. Must be selected. It is also desirable to have heat resistance that can withstand the repair process of the semiconductor element. For example, in a generally used process of lead-free solder having a reflow temperature of 250 ° C., it is desirable that it does not adversely affect a wiring board, a semiconductor element, an electronic component, or the like.
多層シロキサン骨格を添加する封止樹脂の基材となる材料には、アクリル樹脂、メラミン樹脂、エポキシ樹脂、ポリオレフィン樹脂、ポリウレタン樹脂、ポリカーボネート樹脂、ポリスチレン樹脂、ポリエーテル樹脂、ポリアミド樹脂、ポリイミド樹脂、フッ素樹脂、ポリエステル樹脂、フェノール樹脂、フルオレン樹脂、ベンゾシクロブテン樹脂、シリコーン樹脂等様々な材料があるが、特に限定されるものではなく、これらを1種あるいは2種以上組み合わせて用いることもできる。粘度、コスト、耐熱性等の面に優れるエポキシ樹脂が一般に用いられるが、25℃の室温において液状である樹脂が望ましい。 Materials used as the base material of the sealing resin to which the multilayer siloxane skeleton is added include acrylic resin, melamine resin, epoxy resin, polyolefin resin, polyurethane resin, polycarbonate resin, polystyrene resin, polyether resin, polyamide resin, polyimide resin, fluorine There are various materials such as a resin, a polyester resin, a phenol resin, a fluorene resin, a benzocyclobutene resin, and a silicone resin, but there is no particular limitation, and these can be used alone or in combination of two or more. Epoxy resins that are excellent in terms of viscosity, cost, heat resistance, and the like are generally used, but resins that are liquid at room temperature of 25 ° C. are desirable.
本発明に係る封止樹脂に添加するシロキサン骨格を有する多層粒子は、コア部分の硬度がシエル部分の硬度よりも低くなるように設計している。例えば、2層の粒子を用いる場合、好適なコア部の硬度は75未満であり(JISA)、シエル部の硬度は75以上であるが、より好適にはコア部の硬度を40以下に設定することが望ましい。コア部の硬度を小さく設計した場合、低弾性化の効果が大きくなりリペア性を高めることができる。 The multilayer particles having a siloxane skeleton added to the sealing resin according to the present invention are designed such that the hardness of the core portion is lower than the hardness of the shell portion. For example, when two-layer particles are used, the preferred core portion hardness is less than 75 (JISA) and the shell portion hardness is 75 or more, but more preferably the core portion hardness is set to 40 or less. It is desirable. When the hardness of the core portion is designed to be small, the effect of lowering the elasticity is increased and the repairability can be improved.
本発明の封止樹脂に添加するシロキサン骨格を有する多層粒子は、コア部の体積比率がシエル部分の体積比率よりも高い構造となっている。具体的には、コア部の体積比率がシエル部の体積比率の1.5倍以上、より好ましくは2倍以上大きい場合に、低弾性化効果と線膨張を抑える効果がより強く現れる。 The multilayer particle having a siloxane skeleton added to the sealing resin of the present invention has a structure in which the volume ratio of the core portion is higher than the volume ratio of the shell portion. Specifically, when the volume ratio of the core portion is 1.5 times or more, more preferably 2 times or more larger than that of the shell portion, the effect of reducing the elasticity and suppressing the linear expansion appears more strongly.
本発明に係る封止樹脂に添加するシロキサン骨格を有する多層粒子は、シエル部のガラス転移温度がコア部のガラス転移温度よりも高い構造となっている。具体例の一つとして、コア部のガラス転移温度が80℃、封止樹脂母材が110℃、シエル部のガラス転移温度が260℃の構成で用いた場合、封止樹脂充填時の増粘がなく、また180℃を超えるリペア温度域において配線基板に損傷を与えることなく封止樹脂のクリーニングができた。 The multilayer particle having a siloxane skeleton added to the sealing resin according to the present invention has a structure in which the glass transition temperature of the shell portion is higher than the glass transition temperature of the core portion. As one specific example, when the glass transition temperature of the core part is 80 ° C., the sealing resin base material is 110 ° C., and the glass transition temperature of the shell part is 260 ° C., the viscosity increases when the sealing resin is filled. In addition, the sealing resin could be cleaned without damaging the wiring board in a repair temperature range exceeding 180 ° C.
現行の半導体素子の動作温度105℃を想定した場合の信頼性への影響、リペア時の作業性から、コア部のガラス転移温度は100℃未満かつシエル部のガラス転移温度が125℃以上であることが望ましい。コア部分のガラス転移温度点がこれ以上に高い場合にはリペア性が損なわれる傾向が強く、またシエル部分のこれ以上のガラス転移温度低下は半導体素子の熱サイクル試験に用いられる温度上限を下回るからである。こうした設計により、リペア性と信頼性の両立が実現できる。 The glass transition temperature of the core portion is less than 100 ° C. and the glass transition temperature of the shell portion is 125 ° C. or higher due to the influence on reliability when the operating temperature of the current semiconductor element is assumed to be 105 ° C. and workability during repair. It is desirable. When the glass transition temperature point of the core portion is higher than this, the repair property tends to be impaired, and the further glass transition temperature decrease of the shell portion is lower than the upper temperature limit used in the thermal cycle test of the semiconductor element. It is. This design makes it possible to achieve both repairability and reliability.
本発明に係る封止樹脂に加えるシロキサン骨格を有する多層粒子は球状であることが望ましく、添加量としては1〜30vol%程度が望ましい。より好ましくは、15〜25Vol%程度の添加が望ましい。球状以外の粒子添加は増粘等傾向が強く、またこれ以上の添加は粘度増加、チキソ性発現による充填性の悪化が見られる場合が多いため、半導体素子と配線基板の間の狭ギャップに対する充填性を損なうことになる。 The multilayer particles having a siloxane skeleton added to the sealing resin according to the present invention are preferably spherical, and the addition amount is preferably about 1 to 30 vol%. More preferably, addition of about 15 to 25 Vol% is desirable. Addition of particles other than spheres has a strong tendency to increase viscosity, and addition of more than this often increases viscosity and deteriorates filling properties due to thixotropy, so filling for narrow gaps between semiconductor elements and wiring boards It will damage the sex.
本発明に係る封止樹脂に添加されるシロキサン骨格を有する多層粒子の平均粒子径は、充填される半導体素子―配線基板間ギャップの1/10以下のサイズのものが好適であり、平均粒径が0.1〜30μm程度の範囲にあることが望ましい。また、シリコーン粒子の粒径、硬度等のパラメータにより低線膨張化に与える効果は異なる。例えば、同種のシリコーン原料を用いてシロキサン骨格を有する多層粒子を形成し、平均粒径0.5μmの粒度分布を有する粒子、平均粒径3μmの粒度分布を有する粒子、平均粒径5μmの粒度分布を有する粒子を封止樹脂に添加した場合の線膨張係数に与える影響においては、粒子径5μmのものに、より強く線膨張係数の増大を抑える効果が見られた。 The average particle size of the multilayer particles having a siloxane skeleton added to the sealing resin according to the present invention is preferably a size of 1/10 or less of the gap between the semiconductor element and the wiring substrate to be filled, and the average particle size Is preferably in the range of about 0.1 to 30 μm. Further, the effect on the low linear expansion varies depending on parameters such as the particle size and hardness of the silicone particles. For example, the same kind of silicone raw material is used to form multilayer particles having a siloxane skeleton, particles having an average particle size of 0.5 μm, particles having an average particle size of 3 μm, particles having an average particle size of 5 μm As for the influence on the linear expansion coefficient when particles having a particle size are added to the sealing resin, the effect of suppressing the increase in the linear expansion coefficient more strongly was observed with a particle diameter of 5 μm.
また、これらの無機添加剤の表面には封止樹脂との濡れ性を改善し、充填性を高めるためにカップリング剤を用いても良い。カップリング剤はシラン系、チタネート系、アルミネート系、ジルコアルミネート系、クロメート系、ボレート系、スタネート系、イソシアネート系等といった共有結合性タイプのものや、β―ジケトンカプラーのように配位結合性のものなど各種用いることが出来る。 Further, a coupling agent may be used on the surface of these inorganic additives in order to improve the wettability with the sealing resin and enhance the filling property. Coupling agents such as silane, titanate, aluminate, zircoaluminate, chromate, borate, stannate, isocyanate, etc., and covalent bonds such as β-diketone couplers Various types can be used.
本発明に係る封止樹脂に添加される無機フィラーには、シリカ、炭酸カルシウム、アルミナ、ジルコニウム、酸化チタン等様々な材料が用いられるが、コスト、真球度、低線膨張化等のメリットが最も顕著なシリカを用いることが多い。添加するシリカの平均粒子径は充填される半導体素子―配線基板間ギャップの1/10以下のサイズのものが好適であり、平均粒径が0.1〜30μm程度の範囲にあることが望ましい。また、これらの無機添加剤の表面には封止樹脂との濡れ性を改善し、充填性を高めるためにカップリング剤を用いても良い。カップリング剤はシラン系、チタネート系、アルミネート系、ジルコアルミネート系、クロメート系、ボレート系、スタネート系、イソシアネート系等といった共有結合性タイプのものや、β―ジケトンカプラーのように配位結合性のものなど各種用いることが出来る。 Various materials such as silica, calcium carbonate, alumina, zirconium, and titanium oxide are used for the inorganic filler added to the sealing resin according to the present invention, but there are advantages such as cost, sphericity, and low linear expansion. Often the most prominent silica is used. The average particle diameter of the silica to be added is preferably 1/10 or less of the gap between the semiconductor element and the wiring board to be filled, and the average particle diameter is preferably in the range of about 0.1 to 30 μm. Further, a coupling agent may be used on the surface of these inorganic additives in order to improve the wettability with the sealing resin and enhance the filling property. Coupling agents such as silane, titanate, aluminate, zircoaluminate, chromate, borate, stannate, isocyanate, etc., and covalent bonds such as β-diketone couplers Various types can be used.
次に、本発明に係る封止樹脂を用いて封止された電子部品装置をリペアする際のプロセス例について述べる。前記電子部品装置を接続材料の溶融温度付近まで加熱し、接続部が溶融した状態で電子部品装置を除去する。配線基板上に残る封止樹脂残さについては、封止樹脂のガラス転移温度付近の温度下にて、実装プロセス中で用いる洗浄溶剤等を用いながら膨潤させることにより、配線基板と封止樹脂残さの間の界面剥離を起こし、綿棒等の配線基板に傷をつけることなくクリーニングすることができる。多層ビルドアップ配線基板、リペアを行った不良半導体素子を除くその他の良品半導体素子は再生することができるため、実装コストの低減と同時に、排気資源削減による環境負荷低減を実現することができる。 Next, an example of a process for repairing an electronic component device sealed with the sealing resin according to the present invention will be described. The electronic component device is heated to near the melting temperature of the connection material, and the electronic component device is removed in a state where the connection portion is melted. About the sealing resin residue remaining on the wiring substrate, the wiring substrate and the sealing resin residue are swollen by using a cleaning solvent used in the mounting process at a temperature near the glass transition temperature of the sealing resin. It is possible to perform cleaning without causing interfacial peeling and scratching a wiring board such as a cotton swab. Since the non-defective semiconductor elements other than the multi-layered build-up wiring board and the defective semiconductor element that has been repaired can be recycled, it is possible to reduce the environmental burden by reducing the exhaust resources as well as reducing the mounting cost.
以下、本発明の作用について説明する。 The operation of the present invention will be described below.
現在、配線基板材料に用いられている材料の大半はエポキシ樹脂である。この材料をビルドアップした高密度配線基板の内層には銅箔、ポリイミド、ガラスクロス等の材料が用いられている。しかし、最上層には、はんだ流れ防止目的のソルダーレジスト層が存在しており、このソルダーレジスト層は配線基板と同様にエポキシ樹脂であるものが多い。また半導体素子と配線基板との間を封止する樹脂は、一般にエポキシ樹脂を用いたものが多い。以上のような材料を用いていることから、半導体素子あるいは配線基板側に不良が生じた場合に、例え、半導体素子を熱等により除去することができたとしても、配線基板上に残る封止樹脂残さを除去しようとした際には、配線基板にダメージを与えてしまうことが多かった。そこで、本発明においては、シリコーン骨格を持つ多層の粒子を用いることにより、従来不可能であった狭ギャップへの充填性、接続信頼性と、封止樹脂硬化後の半導体素子の取り外しならびに配線基板上に残る封止樹脂残渣の除去を両立することのできる材料を提供することができる。 Currently, most of the materials used for wiring board materials are epoxy resins. Materials such as copper foil, polyimide, and glass cloth are used for the inner layer of the high-density wiring board that is built up from this material. However, a solder resist layer for the purpose of preventing solder flow exists in the uppermost layer, and this solder resist layer is often an epoxy resin like the wiring board. In general, the resin that seals between the semiconductor element and the wiring board often uses an epoxy resin. Since the materials as described above are used, when a defect occurs on the semiconductor element or the wiring board side, even if the semiconductor element can be removed by heat or the like, the sealing remaining on the wiring board When trying to remove the resin residue, the wiring board was often damaged. Therefore, in the present invention, by using multi-layered particles having a silicone skeleton, it has been impossible to fill a narrow gap, connection reliability, removal of a semiconductor element after curing a sealing resin, and a wiring board. It is possible to provide a material capable of achieving both removal of the sealing resin residue remaining on the top.
以下に、実施例を用いて、本発明をさらに具体的に説明するが、本発明はその要旨を越えない限り、以下の実施例に限定されるものではない。なお、以下の表中に記載する有機粒子とは本発明のシロキサン骨格を有する粒子等、有機材料からなる粒子であり、無機粒子とはSiO2等の無機材料からなる粒子を示す。 The present invention will be described more specifically with reference to the following examples. However, the present invention is not limited to the following examples unless it exceeds the gist. The organic particles described in the table below are particles made of an organic material such as particles having a siloxane skeleton of the present invention, and the inorganic particles are particles made of an inorganic material such as SiO2.
エポキシ樹脂母材に対し、異なる種別の粒子を添加した封止樹脂組成物を試作した。本発明の多層シロキサン骨格を有する粒子を添加した組成A、ポリブタジエン系粒子を添加した組成B、アクリル系粒子を添加した組成C、前記の有機粒子未添加の組成Dを下記表に示す割合で混合し、その線膨張係数、弾性率を測定した。結果を表1に示す。 A sealing resin composition in which different types of particles were added to the epoxy resin base material was made as a prototype. The composition A to which particles having a multilayer siloxane skeleton of the present invention are added, the composition B to which polybutadiene particles are added, the composition C to which acrylic particles are added, and the composition D to which no organic particles are added are mixed in the proportions shown in the following table. The linear expansion coefficient and elastic modulus were measured. The results are shown in Table 1.
本発明の多層シリコーン骨格を有する粒子を添加した組成Aは、組成B,組成Cと比較し、多量の有機フィラー添加にもかかわらず、線膨張係数を増加させることがない。また、同量の無機フィラーを添加した組成Dと比較し、リペア時に必要となる弾性率を低くすることができた。耐ヒートサイクル性確保に必要な低線膨張係数と、リペア時に必要な低弾性の両方を両立させることができた。なお、表1に示す線膨張係数のデータはn3以上の繰り返し測定を行い、平均した値を記載した。
エポキシ樹脂母材に対し、本発明のシリコーンフィラーを下記表2に示す割合で添加し、粘弾性測定を実施した。その結果、シリコーンフィラーの添加はガラス転移温度の大幅な低下を生じさせることなく、封止樹脂の弾性率を低下させることができた。
本発明の同一組成からなるシリコーンフィラーを作製し、分級処理を施すことで、同一素材でありかつ平均粒径の異なるシリコーン粒子を2種準備した(表3参照)。得られた粒子を同一のエポキシ母材に添加し、線膨張係数測定を実施した。その結果、平均粒径5μmの粒子に平均粒径3μmの粒子と比較して線膨張係数増大を抑える効果が認められた。この際、シエル部の膜厚はいずれの粒径の粒子についても0.5μmとし、コア部の直径が異なる構造をとっており、コア部の体積比率がシエル部の体積比率より高い場合に線膨張係数をより低く抑える効果が認められた。
エポキシ樹脂母剤に対し、本発明のシリコーンフィラー及び二酸化ケイ素を混合する際、表面処理を施した組成Hと、予めシリコーンフィラー及び二酸化ケイ素に表面処理を施したものを混合した組成Iを試作し、粘度と浸透性を測定した結果を表4に示す。その結果、表面処理を施すことにより、大幅に粘度を低下させ浸透性を向上することが出来た。
エポキシ母剤に対し異なる種別の粒子を添加した封止樹脂組成物を試作した。本発明の多層シリコーン骨格を有する粒子を添加した組成A、多層構造を持たないシリコーンゴム粒子を添加した組成J、アクリル系粒子を添加した組成Cを下記に示す割合で混合し、その粘度、チクソトロピー指数、浸透性を測定した結果を、表5に示す。結果、多重シリコーン骨格を有する粒子を用いることにより、低粘度、低チクソトロピー指数で、浸透性を向上することが出来た。
以下に、複数の半導体素子を1枚のビルドアップ配線基板上に半田接続し封止したが、一部の半導体素子に不良が発生し、配線基板を傷めずに半導体素子、封止樹脂組成物を配線基板から除去する場合の実施例を示す。ビルドアップ配線基板とLSIパッケージの間のはんだ接続部分に本発明の封止樹脂組成物を充填し、封止するものとする。なお、以下の説明に用いる封止樹脂組成物の例を表6に示すが、本発明はこれに限定されるものではない。
プリコート半田が形成されたビルドアップ配線基板上に、フラックスを均一に薄く塗布した。半導体素子をフリップチップマウンタにて位置あわせし、搭載した後ピーク温度250℃のリフロー炉にて半田リフローを行い、ビルドアップ配線基板と半導体素子を接続することができた。以上の搭載を複数行い、1枚のビルドアップ配線基板上に4パッケージの半導体素子を搭載した。 The flux was uniformly and thinly applied on the build-up wiring board on which the precoat solder was formed. After aligning the semiconductor element with a flip chip mounter and mounting it, solder reflow was performed in a reflow furnace with a peak temperature of 250 ° C. to connect the build-up wiring board and the semiconductor element. A plurality of the above mountings were performed, and four package semiconductor elements were mounted on one build-up wiring board.
得られた半導体素子搭載済みのビルドアップ配線基板をアルコール中で揺動し、半導体素子とビルドアップ配線基板間の狭ギャップに残るフラックス残さを洗浄した。洗浄を行ったギャップは約250μmであった。得られた洗浄済みパッケージを125℃のオーブン中で2時間ベーキングし、フラックス洗浄に用いたアルコールを乾燥させた。 The obtained build-up wiring board on which the semiconductor element was mounted was swung in alcohol, and the residual flux remaining in the narrow gap between the semiconductor element and the build-up wiring board was cleaned. The gap after washing was about 250 μm. The obtained cleaned package was baked in an oven at 125 ° C. for 2 hours to dry the alcohol used for flux cleaning.
得られた乾燥済みパッケージをホットプレート上で加温し、ビルドアップ配線基板の表面温度が80℃であることを確認した後、樹脂塗布装置を用いて半導体素子の側面より封止樹脂組成物を供給した。この際、封止樹脂組成物は毛細管現象により半導体素子の下面を流動し、約250μmのギャップに充填することができた。以上の充填作業を繰り返し行い、1枚のビルドアップ配線基板上の複数の半導体素子を封止した。 The obtained dried package is heated on a hot plate, and after confirming that the surface temperature of the build-up wiring board is 80 ° C., the sealing resin composition is applied from the side surface of the semiconductor element using a resin coating device. Supplied. At this time, the encapsulating resin composition flowed on the lower surface of the semiconductor element by capillary action, and was able to fill a gap of about 250 μm. The above filling operation was repeated to seal a plurality of semiconductor elements on one build-up wiring board.
封止完了後、得られた封止状態を観察するため、超音波探傷装置を用いて半導体素子下面の充填状態を観察し、評価に用いたパッケージ全てがボイドなく充填完了していることを確認した。 After the completion of sealing, in order to observe the obtained sealing state, use an ultrasonic flaw detector to observe the filling state on the lower surface of the semiconductor element, and confirm that all the packages used for evaluation have been filled without voids. did.
ところが、得られた半導体素子の電気検査を行ったところ、一部の半導体素子に導通不良が確認された。そこでその導通不良が検出された半導体素子のみを除去し、新たな良品半導体素子を再搭載することにした。 However, when an electrical inspection of the obtained semiconductor elements was performed, conduction failure was confirmed in some of the semiconductor elements. Therefore, it was decided to remove only the semiconductor element in which the conduction failure was detected and to re-install a new non-defective semiconductor element.
ホットプレート上にビルドアップ配線基板を設置し、半田リフロー温度になるまで半導体素子を加熱した。所望の温度に達した半導体素子の外周部に竹ベラをいれ、支点となる部分にアルミナ板を置き、てこの原理を用いて半導体素子をビルドアップ配線基板上より引き剥がした。封止樹脂残渣の一部は半導体素子側に付着し、また一部はビルドアップ配線基板側に付着した。ビルドアップ配線基板側に付着した封止樹脂組成物の残渣を除去するため、およそ半田溶融温度に加熱されたビルドアップ配線基板上の封止樹脂組成物残渣を綿棒を用いて除去した。封止樹脂組成物残渣と配線基板表面のソルダーレジストの界面付近で封止樹脂組成物残渣が剥離し、クリーニングすることができた。溶融した半田材料とともに封止樹脂組成物残渣を除去することができた。 A build-up wiring board was placed on the hot plate, and the semiconductor element was heated until the solder reflow temperature was reached. A bamboo spatula was placed on the outer periphery of the semiconductor element that reached the desired temperature, an alumina plate was placed on the fulcrum, and the semiconductor element was peeled off from the build-up wiring board using this principle. A part of the sealing resin residue adhered to the semiconductor element side, and a part adhered to the build-up wiring board side. In order to remove the residue of the sealing resin composition adhering to the build-up wiring board side, the sealing resin composition residue on the build-up wiring board heated to approximately the solder melting temperature was removed using a cotton swab. The sealing resin composition residue peeled off near the interface between the sealing resin composition residue and the solder resist on the surface of the wiring board, and cleaning was possible. The encapsulating resin composition residue could be removed together with the molten solder material.
ビルドアップ配線基板上の半導体素子を除去した箇所に対し、プリコート半田を再印刷し、プリコート半田形成した。その後、初回の半導体素子搭載時と同様の工程を経ることで良品パッケージを作成することができた。 The precoat solder was reprinted on the place where the semiconductor element on the build-up wiring board was removed to form a precoat solder. After that, a non-defective package could be created through the same process as that for mounting the first semiconductor element.
以上のようにして、封止なし、封止あり(リペアなし)、封止あり(リペアあり)の3種のパッケージを、それぞれ10セットずつ作製した。得られたパッケージを−25℃〜125℃の温度条件(各槽10分保持、中間保持なし)の温度サイクル試験槽に投入し、電気抵抗をモニターした結果、封止なしの水準は50〜400サイクルでパッケージ全数に高抵抗化不良が検出されたのに対し、封止ありのサンプル20パッケージについては、半導体素子をリペアし、再搭載したパッケージについても1500サイクルを超える耐熱サイクル信頼性を確認することができた(表7参照)。
信頼性試験完了後のPKGを断面観察し、半田接続部周辺の封止樹脂の充填状態を観察した。その結果、シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、封止樹脂硬化後においても球形を維持していることが確認できた。シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、封止樹脂の硬化温度において溶融せず、また、封止樹脂の母剤となるエポキシ樹脂と相溶していないことを確認した。 The cross section of the PKG after completion of the reliability test was observed, and the filling state of the sealing resin around the solder connection portion was observed. As a result, it was confirmed that the particles having a multilayer structure having at least one siloxane skeleton maintained a spherical shape even after the sealing resin was cured. It was confirmed that the particles having a multilayer structure having at least one siloxane skeleton did not melt at the curing temperature of the sealing resin and were not compatible with the epoxy resin serving as the base material of the sealing resin.
その他の半導体素子実装形態として、図8に示すように、1枚のビルドアップ配線基板の両面に、複数の半導体素子が積層されたパッケージ11を実装封止し、積層された半導体素子の一部に不良が確認され、半導体素子の交換が必要になった場合の実施例を示す。ここで、ビルドアップ配線基板は、一対のビルドアップ層9とコア層10とから成る。
As another semiconductor element mounting form, as shown in FIG. 8, a
複数の半導体素子を積層したパッケージ11を実装したビルドアップ配線基板を充填用冶具上におき、冶具とともにホットプレート上で加温した。ビルドアップ配線基板の表面温度が80℃であることを確認した後、樹脂塗布装置を用いて半導体素子の側面より封止樹脂組成物を供給した。この際、封止樹脂組成物は毛細管現象により半導体素子の下面を流動し、約250μmのギャップに充填することができた。以上の充填作業を繰り返し行い、1枚のビルドアップ配線基板上の半導体素子を全て封止した。
A build-up wiring board on which a
ところが、得られた半導体素子の電気検査を行ったところ、積層された半導体素子の上段の一部に導通不良が確認された。そこで、その導通不良が検出された半導体素子のみを除去し、新たな良品半導体素子を再搭載することにした。 However, when an electrical inspection of the obtained semiconductor element was performed, a conduction failure was confirmed in a part of the upper stage of the stacked semiconductor elements. Therefore, it was decided to remove only the semiconductor element in which the conduction failure was detected and to re-install a new non-defective semiconductor element.
ヒートガンを用いて、不良が確認された半導体素子を半導体素子側から半田リフロー温度になるまで加熱した。所望の温度に達した半導体素子の外周部より竹ベラをいれ、ビルドアップ配線基板を固定した上でスライドさせることで、不良が確認された半導体素子をビルドアップ配線基板上より引き剥がした。封止樹脂残渣の一部は半導体素子側に付着し、また一部は下段の半導体素子に付着した。 Using a heat gun, the semiconductor element confirmed to be defective was heated from the semiconductor element side until the solder reflow temperature was reached. A bamboo spatula was inserted from the outer periphery of the semiconductor element that reached the desired temperature, and the build-up wiring board was fixed and slid to peel off the semiconductor element confirmed to be defective from the build-up wiring board. A part of the sealing resin residue adhered to the semiconductor element side, and a part adhered to the lower semiconductor element.
下段の半導体素子に付着した封止樹脂組成物の残渣を除去するため、およそ半田溶融温度に加熱された下段半導体素子上の封止樹脂組成物残渣を綿棒を用いて除去した。封止樹脂組成物残渣と下段半導体素子の界面付近で封止樹脂組成物残渣が剥離し、クリーニングすることができた。溶融した半田材料とともに封止樹脂組成物残渣を除去することができた。 In order to remove the residue of the sealing resin composition adhering to the lower semiconductor element, the sealing resin composition residue on the lower semiconductor element heated to approximately the solder melting temperature was removed using a cotton swab. The sealing resin composition residue peeled off near the interface between the sealing resin composition residue and the lower semiconductor element, and cleaning was possible. The encapsulating resin composition residue could be removed together with the molten solder material.
信頼性試験完了後のPKGを断面観察し、半田接続部周辺の封止樹脂の充填状態を観察した。その結果、シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、封止樹脂硬化後においても球形を維持していることが確認できた。シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、封止樹脂の硬化温度において溶融せず、また封止樹脂の母剤となるエポキシ樹脂と相溶していないことを確認した。 The cross section of the PKG after completion of the reliability test was observed, and the filling state of the sealing resin around the solder connection portion was observed. As a result, it was confirmed that the particles having a multilayer structure having at least one siloxane skeleton maintained a spherical shape even after the sealing resin was cured. It was confirmed that the particles having a multilayer structure having at least one siloxane skeleton did not melt at the curing temperature of the sealing resin and were not compatible with the epoxy resin serving as the base material of the sealing resin.
1 半導体素子
2 封止樹脂
3 接続用電極パッド
4 はんだ
5 ソルダーレジスト
6 ビルドアップ配線基板
7 ワイヤ線
8 引き出し線
9 ビルドアップ層
10 コア層
11 パッケージ
DESCRIPTION OF SYMBOLS 1
Claims (24)
前記封止樹脂組成物中に多層構造となる粒子と樹脂と無機充填剤を含み、多層構造となる粒子の少なくとも1層以上はシロキサン骨格を有し、
前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、封止樹脂組成物の弾性を低下させ、
前記シロキサン骨格を少なくとも1層以上有する多層構造となる粒子は、多層構造となる粒子の最外殻であるシエル部と、多層構造となる粒子に包含されるコア部とから成り、コア部がシエル部よりも硬度が低く、
前記コア部がシリコーンゴムであり、前記シエル部がシリコーンレジンであることを特徴とする封止樹脂組成物。 A sealing resin composition for sealing a gap portion formed in a connection portion between a connection electrode portion formed on a wiring substrate and a semiconductor element mounted on the wiring substrate,
The encapsulating resin composition contains particles having a multilayer structure, a resin and an inorganic filler, and at least one layer of the particles having a multilayer structure has a siloxane skeleton,
Particles having a multilayer structure having at least one siloxane skeleton reduces the elasticity of the sealing resin composition,
The particle having a multilayer structure having at least one siloxane skeleton is composed of a shell part which is an outermost shell of the particle having a multilayer structure and a core part included in the particle having the multilayer structure. The hardness is lower than the part,
The core resin is a silicone rubber, and the shell part is a silicone resin.
配線基板上に形成された接続用電極部と上記半導体素子との接続部に生じる空隙部分を封止するための封止樹脂組成物としてシロキサン骨格を持つ多層の粒子を含む組成物を用いることにより、封止樹脂硬化後の半導体素子の取外し及び配線基板上に残る封止樹脂残渣の除去を行うことを特徴とする半導体素子のリペア方法。 A method of repairing a semiconductor element that enables removal of at least one of a plurality of semiconductor elements mounted on a wiring board,
By using a composition containing multi-layered particles having a siloxane skeleton as a sealing resin composition for sealing a gap formed in a connection portion between a connection electrode portion formed on a wiring board and the semiconductor element A method for repairing a semiconductor element, comprising removing the semiconductor element after curing the sealing resin and removing a sealing resin residue remaining on the wiring board.
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