JP4372070B2 - Flat display device and adjustment method thereof - Google Patents

Description

  The present invention relates to a method for adjusting a flat display device having an image capturing function.

  Recently, a display device has been proposed in which a contact area sensor for capturing an image is arranged on an array substrate of a liquid crystal display device (see, for example, Patent Documents 1 and 2).

This conventional liquid crystal display device captures an image by changing the charge amount of a capacitor connected to the sensor in accordance with the amount of light received by the sensor and detecting the voltage across the capacitor.
JP 2001-292276 A JP 2001-339640 A

  By the way, in the liquid crystal display device having the area sensor as described above, it is necessary to accurately detect the position of an object to be captured.

  For this purpose, it is necessary to control the photosensor characteristics in consideration of variations.

  Therefore, the present invention provides a flat display device that can be adjusted at the time of shipment of a product and an adjustment method thereof so that imaging processing can be performed in consideration of variations in characteristics of the photosensor.

  The present invention provides a signal line and a first gate line arranged in rows and columns, a display pixel arranged corresponding to each intersection of the signal line and the first gate line, and provided corresponding to the display pixel. In the flat display device having a plurality of photosensor pixels integrated in a display area, a predetermined ratio of the photosensor pixels in the plurality of photosensor pixels with respect to a predetermined external light illuminance is the external light. The flat display device is characterized by having storage means for storing imaging parameters at the time of imaging of the photosensor pixels.

  According to the present invention, by performing imaging using the stored imaging parameters, imaging processing can be performed in consideration of variations in characteristics of the photosensor.

  Hereinafter, a liquid crystal display device according to an embodiment of the present invention will be described.

[1] Liquid Crystal Display Device First, the configuration of the liquid crystal display device and details of each circuit will be described.

(1) Configuration of Liquid Crystal Display Device The configuration of the liquid crystal display device of the present embodiment will be described with reference to FIGS.

  As shown in FIG. 1, the array substrate 11 of the liquid crystal display device is formed of a transparent support base material made of, for example, a glass substrate or an organic material as an insulating substrate.

  Each display pixel 26 includes, for example, a color filter, and a black matrix is formed between the color filters.

  A phase film is disposed between the array substrate 11 and the polarizing plate 145.

  The array substrate 11 has pixels 16 (display pixels 26 (+ photosensor pixels 27)) arranged in a matrix. The array substrate 11 and the counter substrate 144 are arranged with a sealing wall 142 functioning as a spacer interposed therebetween, for example. A counter electrode 147 (36) is formed on the counter substrate 144. A polarizing plate 145 a is disposed on the array substrate 11, and a polarizing plate 145 b is disposed on the opposing substrate 144. Light 151 emitted from the backlight 146 enters from the counter substrate 144 side, is modulated by the liquid crystal layer 143, and is transmitted through the display pixels 26 from the array substrate 11 side.

  FIG. 2 shows the array substrate 11 and the circuit board 17.

  The array substrate 11 has a display resolution of 320 pixels in the horizontal direction and 240 pixels in the vertical direction. The pixel 16 is a name used when the display pixel 26 and the photosensor pixel 27 are expressed together. However, the photosensor pixel 27 is not necessarily formed for each display pixel 26.

  In the array substrate 11, for example, 320 × R, G, B = 960 source signal lines 23 are wired in the vertical direction, and 240 display gate signal lines 22a are wired. A pixel 16 is provided in the vicinity of the intersection of the source signal line 23 and the display gate signal line 22a.

  There are 960 precharge voltage signal lines 24, 340 second gate signal lines 22c, 340 third gate signal lines 22b, 340 common signal lines 31, 960 photosensor output signal lines 25. Yes. The precharge voltage signal line 24 and the photosensor output signal line 25 are wired in parallel with the source signal line 23, and the second gate signal line 22c, the third gate signal line 22b, and the common signal line 31 are the display gate signal line 22a. Is wired in parallel.

  A source driver circuit 14 connected to the source signal line 23; a photosensor processing circuit 18 connected to the precharge voltage signal line 24; a display gate driver circuit 12 for driving the display gate signal line 22a; The imaging gate driver circuit 12b to which the three gate signal line 22b, the second gate signal line 22c, and the common signal line 31 are connected, and the photosensor output processing circuit 18 to which the photosensor output signal line 25 is connected are provided. . These circuits are formed by, for example, a low-temperature polysilicon TFT.

(2) Configuration of Each Circuit On the circuit board 17, a control IC (not shown) for controlling each circuit of the array board 11, a memory (not shown) for storing image data, the array board 11 and the circuit A power supply circuit (not shown) for outputting various DC voltages used on the substrate 17 is mounted. A video signal processing circuit 21 that performs display control and image capture control is mounted on the circuit board 17. The array substrate 11 and the circuit substrate 17 transmit and receive various signals via, for example, a flexible substrate (FPC) 20. The output video signal from the video signal processing circuit 21 is applied to the source driver circuit 14.

  The source driver circuit 14 includes a D / A conversion circuit that converts digital pixel data input from the video signal processing circuit 21 into an analog voltage suitable for driving a liquid crystal display element.

  The display gate driver circuit 12 a sequentially selects the display gate signal lines 22 a and performs an operation of writing video data to the display pixels 26 in synchronization with the source driver circuit 14.

  The reading gate driver circuit 12b sequentially selects the third gate signal line 22b and the second gate signal line 22c, applies a precharge voltage to the photosensor pixel 27 in synchronization with the source driver circuit 14, and also detects the photosensor pixel. The operation of taking out the output voltage from 27 is performed.

  The photosensor processing circuit 18 applies a precharge voltage to each precharge voltage signal line 24. The photo sensor processing circuit 18 takes in the output voltage from the photo sensor pixel 27 via the photo sensor output signal line 25.

  The photo sensor processing circuit 18 is directly formed on the array substrate 11. Basic components are a comparator circuit 233 and a selection circuit including a switch.

  The photo sensor signal processing circuit 15 controls the imaging gate driver circuit 12 b and the photo sensor processing circuit 18. Further, the output data from the photosensor processing circuit 18 is subjected to calculation or comparison processing, etc., the photosensor position where light is irradiated or shielded is determined, and the coordinate position is output.

(3) Configuration of Pixel 16 FIG. 3 is a block diagram illustrating the pixel 16 in detail.

(3-1) Configuration of Display Pixel 26 The display pixel 26 is formed in the vicinity of each intersection of the source signal line 23 and the display gate signal line 22a arranged in rows and columns. The display pixel 26 has a low-temperature polysilicon thin film transistor (hereinafter referred to as display TFT) 32 for display control (see FIG. 4), a pixel electrode 61 formed at one end of the display TFT 32, and the pixel electrode 61. The liquid crystal capacitor 34 is formed between the counter electrode 36 and the pixel electrode 61, and the display auxiliary capacitor 35 is connected between the common signal line 31.

(3-2) Configuration of Photosensor Pixel 27 As shown in FIG. 5, the photosensor pixel 27 includes a photosensor 64 made of, for example, a TFT, a capacitor 63 that holds a precharge voltage, a second TFT 62b that operates as a source follower, The first TFT 62 a that operates as a switching element that applies a charge voltage to the capacitor 63, and a third TFT 62 c that selects and outputs the source follower output of the second TFT 62 b to the photosensor output signal line 25. One terminal such as the photosensor 64 is connected to the common signal line 31 and grounded. The first TFT 62a, the second TFT 62b, the third TFT 62c, and the photosensor 64 are formed together with the display TFT 32 in the same process of the array process. In particular, the array process preferably uses polysilicon technology such as low-temperature polysilicon or high-temperature polysilicon.

(3-3) Arrangement of Photosensor Pixel 27 The photosensor pixel 27 is arranged for each of at least one or a plurality of display pixels 26. For example, the photosensor pixel 27 is formed corresponding to the display pixel 26 in FIG. Has been. That is, the number of display pixels 26 and the number of photosensor pixels 27 are the same.

(4) Configuration of Equivalent Circuit of Photosensor Pixel 27 An equivalent circuit of the photosensor pixel 27 will be described with reference to FIGS.

  The equivalent circuit of the photosensor pixel 27 includes a photosensor 64, a capacitor 63, a first TFT 62a, a second TFT 62b, and a third TFT 62c.

  The photosensor 64 is composed of TFTs as described above, and is configured to operate as a photodiode. The photosensor 64 is formed by N-channel diode connection of TFT. By connecting the TFT with an N-channel diode, the configuration becomes easy and the charge retention characteristics are improved. When the photosensor 64 is irradiated with light, the photosensor 64 leaks according to the intensity of the light. Due to this leakage, the potential between both terminals of the photosensor 64 decreases. Therefore, by detecting the potential between both terminals of the photosensor 64, it is possible to grasp that the photosensor 64 is irradiated with light and the relative intensity of the light irradiated to the photosensor 64.

  The capacitor 63 holds a precharge voltage, and is configured using, for example, a gate insulating film of a TFT. By using the gate insulating film, the manufacturing process can be simplified, and an auxiliary capacitor having a small area and a large capacity can be configured.

  The second TFT 62b operates as a source follower, and one terminal of the photosensor 64 is connected to the gate terminal, and one terminal of the capacitor 63 is connected. When the gate terminal voltage of the second TFT 62b becomes the Vt voltage, the second TFT 62b is turned off. If it is equal to or higher than the Vt voltage, the second TFT 62b is turned on.

  The first TFT 62 a applies the precharge voltage applied to the precharge voltage signal line 24 to one terminal of the capacitor 63. When a turn-on voltage is applied to the second gate signal line 22c, the first TFT 62a is turned on. The precharge voltage is a voltage at which the second TFT 62b is turned on (Vt voltage or more). The first TFT 62a is controlled by the gate driver circuit 12b, and the gate terminal of the first TFT 62a is connected to the second gate signal line 22c.

  The third TFT 62c is controlled by the gate driver circuit 12b, and the gate terminal of the third TFT 62c is connected to the third gate signal line 22b. When a turn-on voltage is applied to the third gate signal line 22b, the third TFT 62c is turned on.

(5) Operation Contents of Equivalent Circuit of Photosensor Pixel 27 Hereinafter, operation contents of an equivalent circuit of the photosensor pixel 27 having the above-described configuration will be described.

(5-1) First Operation When a turn-on voltage is applied to the second gate signal line 22c, the first TFT 62a is turned on. Then, the precharge voltage applied to the precharge voltage signal line 24 is applied to one terminal of the capacitor 63. The precharge voltage is applied, for example, every frame (one screen rewrite cycle). Of course, it may be applied once to a plurality of frames. Further, it may be applied once in a plurality of horizontal scanning periods. Further, it may be applied multiple times in one frame.

  The precharge voltage Vprc or the comparison voltage Vref of the comparator circuit 233 may be applied to the photosensor output signal line 25 and the precharge voltage Vprc may be applied to the precharge voltage signal line 24 at the same time.

(5-2) Second Operation The capacitor 63 stores a precharge voltage.

(5-3) Third Operation When the photosensor 64 is irradiated with light, the electric charge accumulated in the capacitor 63 is discharged between the channels of the photosensor 64. The second TFT 62b is turned on or off depending on the discharged discharge voltage value. The discharge voltage value of the photosensor 64 is determined by the amount of light leak corresponding to the light intensity.

(5-4) Fourth Operation When a turn-on voltage is applied to the third gate signal line 22b, the third TFT 62c is turned on. The timing for turning on the third TFT 62c is performed in synchronization with the timing for applying the precharge voltage.

  At this time, if the second TFT 62b is in an ON state, the charge of the photosensor output signal line 25 is discharged to the common signal line 31 via the third TFTs 62c and 62b. For example, the common signal line 31 is grounded although it may be charged depending on the potential of the common signal line 31.

  On the other hand, even if the third TFT 62c is turned on, the charge of the photosensor output signal line 25 does not change if the second TFT 62b is turned off.

(5-5) Definition of Exposure Time Here, the “exposure time” used below is defined. The exposure time is the time from when the first TFT 62a is turned on and the precharge voltage is applied to the gate terminal of the second TFT 62b to when the third TFT 62c is turned on and the output is taken out to the photosensor output signal line 25.

(5-6) Summary of Equivalent Circuit As described above, if a change in the charge of the photosensor output signal line 25 is detected, it is detected whether the second TFT 62b is in an on state, an intermediate on state, or an off state. Can do. That is, this detection detects the potential of the gate terminal of the second TFT 62b. The gate terminal voltage of the second TFT 62b varies depending on the magnitude of the precharge voltage, the intensity of light irradiated on the photosensor 64 (including the transmittance of the liquid crystal layer), and the exposure time. That is, it is possible to detect the intensity of light applied to the photosensor 64 from the magnitude of the precharge voltage, the length of the exposure time, and the amount of light leakage of the photosensor 64.

  The light intensity detection corresponds to an image scanning (imaging) operation like an image scanner. In the present embodiment, the photosensor pixels 27 are formed in a matrix. Therefore, by detecting the on / off state of the second TFT 62b of each photosensor pixel 27, an image image formed or illuminated on the display region 10 can be captured. Further, it is possible to detect the shadow of the object or the light reflected by the object.

  FIG. 7 shows an on / off state of the pixel when external light is irradiated. As shown in FIG. 7A, a leak of the photosensor 64 does not occur in a portion where there is a shadow of the object. The precharge voltage Vprc is held. This location becomes the ON region. As shown in FIG. 7B, the photosensor 64 leaks at a place where there is no shadow of the object and external light is irradiated. The precharge voltage Vprc decreases. This location is the off region.

  When the photosensor 64 is irradiated with light, the electric charge is discharged through the photosensor 64, and the terminal voltage of the photosensor 64 is lowered from the precharge voltage. The decrease is determined by the intensity and time of the light applied to the photosensor 64. If the applied precharge voltage drops below the Vt voltage of the second TFT 62b, the second TFT 62b is turned off, and if it is above the Vt voltage, the second TFT 62b is turned on.

  The Vt voltage is a voltage at which the TFT starts to be turned on or a voltage in the vicinity thereof. In this specification, the voltage is often described as a voltage corresponding to a switching position between a state where the TFT is turned on and a state where the TFT is turned off.

  The gate driver circuit 12b sequentially selects pixel rows in synchronization with the clock of one horizontal scanning period (hereinafter referred to as “1H”) for the third gate signal line 22b, and the switching third TFT 62c of the selected photosensor pixel 27 is The output of the second TFT 62b is output to the voltage output signal line 25. When the photosensor 64 is irradiated with light, the electric charge is discharged through the photosensor 64, and the terminal voltage of the photosensor 64 is lowered from the precharge voltage. As described above, the voltage drop (charge discharge) is determined by the intensity of light (including the transmittance of the liquid crystal layer) applied to the photosensor 64 and time. Further, it is determined by the capacity of the capacitor 63. Of course, it is also determined by the magnitude of the precharge voltage. When the applied precharge voltage decreases and is equal to or lower than the Vt voltage of the second TFT 62b, the second TFT 62b is turned off, and when it is equal to or higher than the Vt voltage, the second TFT 62b is turned on. Therefore, the operating state of the second TFT 62b can be output to the voltage output signal line 25 by turning on the third TFT 62c.

(6) Configuration of Photosensor Processing Circuit 18 FIG. 8 is a configuration diagram illustrating the peripheral portion of the pixel 16.

  The photosensor output signal line 25 is connected to the photosensor processing circuit 18. The photo sensor processing circuit 18 mainly includes a comparator circuit 233 and a selection circuit 81. The selection circuit 31 is an analog switch as an example. The selection circuit 81 includes a shift register circuit in addition to the switching or selection circuit.

  The connection state between the photosensor pixel 27 and the comparator circuit 233 is shown in FIG. The comparator circuit 233 may be an operational amplifier circuit or a differential amplifier. In other words, any one may be used as long as the output of the circuit 233 changes with respect to the comparison voltage or the comparison reference at one terminal.

  The comparator circuit 233 determines whether the comparison voltage Vref is large or small, and outputs (binarizes) either high (H) or low (L) logically. Therefore, since the output is converted into a logic signal, the subsequent logic processing becomes easy.

(7) Function of Comparator Circuit 233 Next, the comparator circuit 233 will be described with reference to FIG.

  As shown in FIG. 8, a precharge voltage Vpr is applied to the precharge voltage signal line 24 from a precharge voltage terminal 83. The precharge voltage is applied in synchronization with the video signal output from the source driver circuit 14. As the precharge voltage, the same precharge voltage is applied to all the precharge voltage signal lines 24.

  The comparison voltage Vref is applied from the comparator voltage terminal 83 to one terminal of the input terminals of all the comparator circuits 233. The comparison voltage Vref applies the same voltage to all the comparator circuits 233.

  One end of the photosensor output signal line 25 is connected to the input terminal of the comparator circuit 233. A selection circuit 81 is connected to the output terminal of the comparator circuit 233. A switch Sk (k = 1 to n, where n is the number of pixel columns) of the selection circuit 81 is formed, and one switch Sk is selected. The output of the selected comparator circuit 233 is connected to the voltage output terminal. Therefore, an output voltage is output to the output voltage terminal 82. The switch Sk (k = 1 to n) is configured to be selected at least once in one horizontal scanning period. That is, the gate driver circuit 12b selects the third gate signal line 22b in synchronization with the 1H clock, and outputs the output voltage of the third TFT 62c to the photosensor output signal line 25 (see FIG. 10).

(8) Display Method and Imaging Method The display method and imaging method will be described with reference to FIG.

  The video signal is applied to the source signal line 23 in units of 1H corresponding to the display image. The polarity of the video signal is inverted with respect to the reference voltage every 1H, for example. In addition, the polarity of the voltage applied to each pixel row is inverted with respect to the reference voltage every frame, for example.

  The display gate signal line 22 a sequentially selects pixel rows in synchronization with the 1H clock, and the TFT 32 of the selected pixel 16 writes the video signal applied to the source signal line 23 to the pixel electrode 61.

  The imaging gate driver circuit 12b selects the gate signal line 22a in the 1H cycle and shifts the position of the second gate signal line 22c to be sequentially selected. The shifting method is matched with the shift direction of the gate signal line 22a. When an on voltage is applied to the second gate signal line 22c, the first TFT 62a corresponding to the pixel row connected to the second gate signal line 22c is turned on. Therefore, the precharge voltage applied to the precharge voltage signal line 83 is applied to the photosensor 64. The precharge voltage may be changed every 1H, but is preferably a constant voltage.

(9) Exposure time Next, the exposure time will be described. The exposure time has been described above, but will be described in more detail.

  As shown in FIG. 10, after selecting the second gate signal line 22c, the third gate signal line 22b is selected after the A period has elapsed. This period A is called “exposure time”. That is, the exposure time is the time from when the precharge voltage is applied to an arbitrary photosensor pixel 27 until reading. To be precise, this is the time from when the precharge voltage applied to the photosensor 64 is determined until the voltage is output to the photosensor output signal line 82 and the output state becomes stable and can be called from the voltage output terminal 82. However, generally, the time from the timing at which the precharge voltage is applied to the photosensor pixel 27 to the timing at which the holding voltage of the photosensor 64 of the applied photosensor pixel 27 is read is defined as the exposure time. Since the selection timing of the third gate signal line 22b and the second gate signal line 22c is synchronized, the time for detecting the terminal voltage of the photosensor 64 is relatively proportional even if the exposure time is adjusted. Therefore, the external light illuminance can be grasped with high accuracy. Further, there is no problem even if the photosensor 64 differs depending on the lot of the array substrate 11.

  The exposure time can be adjusted as shown in FIG.

  FIG. 12A shows a selection signal for the second gate signal line 22c. An on-voltage is applied to the second gate signal line 22c for a fixed period of 1H, and a precharge voltage is applied to the photosensor pixel 27. FIG. 12B shows a selection signal for the third gate signal line 22b. An ON voltage is applied to the third gate signal line 22b for a certain period of 1H, and a voltage or the like is extracted from the photosensor pixel 27 to the photosensor output signal line 25. FIG. 12B1 shows a case where the exposure time is within 1H. FIG. 12B2 shows an embodiment when the exposure time is 1H or more (near 2H in the figure). FIG. 12B3 shows an embodiment when the exposure time is nH (n is an integer).

(10) Terminal voltage of the photosensor 64 The terminal voltage of the photosensor 64 varies depending on the magnitude of the precharge voltage applied to the photosensor 64, the intensity of external light applied to the photosensor 64, and the like. This change is shown in FIG. A precharge voltage is applied during period A in FIG.

  FIG. 11A shows the case where the precharge voltage Vprc = 3.5V. After the precharge voltage Vprc of 3.5 V is applied, when the external light applied to the photosensor 64 is weak, the terminal voltage of the photosensor 64 changes along the straight line a. When the external light irradiated to the photosensor 64 is strong, the terminal voltage of the photosensor 64 changes along the straight line b. After the period B, the third TFT 62c is turned on, and a voltage or the like is taken out to the photosensor output signal line 25. In the case of the b straight line in FIG. 11 (1), 1.0 V is taken out to the photosensor output signal line 25. If the B period is short, the voltage of the photosensor output signal line 25 becomes 1.0 V or more. If the period B is long, the voltage of the photosensor output signal line 25 is 1.0 V or less.

  FIG. 11B shows the case where the precharge voltage Vprc = 4.0V. After the precharge voltage Vprc of 4.0 V is applied, when the external light applied to the photosensor 64 is weak, the terminal voltage of the photosensor 64 changes along the straight line a. When the external light irradiated to the photosensor 64 is strong, the terminal voltage of the photosensor 64 changes along the straight line b. After the period B, the switching third TFT 62c is turned on, and a voltage or the like is taken out to the photosensor output signal line 25. If the change in impedance of the photosensor 64 with respect to the light irradiation intensity is proportional, the slope of the b line in FIG. 11 (1) and the slope of the b line in FIG. 11 (2) are the same. The inclination of the a line in FIG. 11 (1) is the same as the inclination of the a line in FIG. 11 (2). However, 1.0 V is taken out to the photosensor output signal line 25.

  FIG. 11 (3) shows the case where the precharge voltage Vprc = 4.5V, and FIG. 11 (4) shows the case where the precharge voltage Vprc = 5.0V.

(11) Relationship between exposure time and precharge voltage The sensitivity to external light is adjusted by changing the precharge voltage. Also, the sensitivity is adjusted by changing the precharge voltage with respect to the exposure time.

  FIG. 9 is an explanatory diagram of this. The leak amount of the photosensor 64 increases as the outside light increases. Further, the electric charge is discharged substantially in proportion to the exposure time. In order to adjust the precharge voltage so that it is changed to Vt of the second TFT 62b, the exposure time is shortened when the external light to the photosensor 64 is strong. When the external light to the photosensor 64 is weak, the exposure time is lengthened. The above relationship is illustrated in FIG. Therefore, when the external light is very strong, the exposure time is extremely shortened. In addition, when the sensitivity of the photosensor 64 is very good with respect to outside light, the exposure time is extremely shortened.

(12) Matrix processing The photosensor 64 is formed in the same process as the display pixel 26. The process used is a polysilicon formation technique. The semiconductor film by the polysilicon forming technique is formed using a crystallization technique such as a laser annealing technique. Therefore, the characteristics vary greatly depending on the temperature distribution of energy rays such as laser light. Therefore, matrix processing is performed as shown in FIG.

  Matrix processing is a combination of a plurality of photosensor pixels 27 arranged in a matrix to form one block, and counts the output (on or off state) of the photosensor pixels 27 in the one block. Perform signal processing.

  For example, in the laser annealing method, the characteristics of the second TFT 62b and the photosensor 64 are characteristic distributions having an inclination from one direction of the display area to the other direction. In order to correct this characteristic distribution, the area where the photosensor 64 is formed is irradiated with uniform external light, the exposure time is constant, the precharge voltage is constant, and the output of the second TFT 62b for each block. Are counted and added. The output from the voltage output terminal 82 is converted into binary data (on (1), off (0)) by the comparator circuit 233.

  For example, in a 10 × 10 block, the count value ranges from 0 to 100. This count value is totaled and stored for each photosensor 64 in the block. That is, this count value is stored as a set value.

  Data picked up by the liquid crystal display device is also processed in the same block section, and a difference process is performed on the previous set value at a constant ratio from the processed count value. Since the characteristic distribution of the photo sensor 64 and the like is subtracted from the difference data, good imaging data is obtained.

  As described above, the influence of the distribution of the photosensor 64 and the second TFT 62b is removed or reduced in the data resulting from the difference processing. In addition, the variation due to the characteristic distribution of the small area is not affected by the characteristic distribution of the small area because the block processing is performed and the output data of the block is handled as one data (which is consequently averaged). . For example, even if a small number of second TFTs 62b having a low Vt voltage and a low Vt voltage are distributed in the block, if the second TFTs 62b of other photosensor pixels 27 are good, the second TFT 62b having a high Vt voltage is obtained. If it is a small number, there is no effect as a whole.

  As shown in FIG. 13A, the matrix processing is exemplified by a grid pattern. FIG. 13A shows an implementation of 3 × 3 matrix processing. In the present embodiment, it is preferable that the number of photosensors 64 is 25 or more, such as 5 × 5. Furthermore, it is preferable that the configuration is 50 or more, such as 8 × 8. In particular, it is preferable to be configured to be 100 or more, such as 10 × 10. However, the number of photosensors included in the block does not exceed 1000, such as 35 × 35.

  In the above embodiment, the processing is divided into nxn blocks (n is an integer of 2 or more), but the concept of the blocks is not limited to this. For example, as shown in FIG. That is, it is divided into blocks in units of 3 pixel columns. It may be divided into blocks in the horizontal direction (pixel row direction). Further, processing may be performed by dividing into blocks of nxm (where n and m are integers of 2 or more, and n and m are different).

[2] Imaging Method Hereinafter, a reading method will be described with reference to FIGS. 14 and 15.

(1) First Imaging Operation of Object 141 As shown in FIG. 14, it is assumed that an object 141 that is a finger or an image scanner object (image paper) is arranged on the array substrate 11 side.

  Light 151a emitted from a place where the object 141 is not present is transmitted as it is. When there is an object 141, it is reflected by the object. The reflected light 151b is incident on the photosensor pixel 27 at the B position. The photosensor pixel 27 on which the light 151b is incident leaks electric charge in accordance with the intensity of the light 151b and the exposure time. The gate terminal voltage of the second TFT 62b changes corresponding to the amount of charge leakage, and the on / off state of the second TFT 62b is determined. Since the light reflected by the object 141 has an intensity distribution for each part, each photosensor pixel 27 reacts according to the intensity, and an image distribution corresponding to the object 141 can be formed.

  The above is an embodiment in which the image 151 is formed by the photosensor 64 by irradiating the object 141 with the light 151 from the backlight 146.

(2) Second Imaging Operation of Object 141 FIG. 15 is a diagram in which external light 151a is blocked by the object 141, a shadow and a light irradiation unit are formed by the photosensor 64, and an image distribution of the shadow of the object 141 is formed. is there. The outside light 151 is room light, sunlight, or the like.

  As shown in FIG. 15, the outside light 151 a where there is no object 141 is incident on the photosensor pixel 27 without being blocked by the object. The photosensor 64 of the incident photosensor pixel 27 leaks electric charge according to the intensity of the external light 151a. In most cases, the photosensor pixel 27 on which the external light 151a is incident discharges the charge, and the second TFT 62b is turned off.

  On the other hand, as shown in FIG. 15, the external light 151 a is blocked by the object 141 at a place where the object 141 is present, so that the external light does not enter the B position. Therefore, the photosensor 64 of the photosensor pixel 27 at the B position hardly leaks charges. In most cases, the photosensor pixel 27 holds electric charge, and the second TFT 62b is turned on. Accordingly, the external light 151a can be blocked by the object 141, the shadow and the light irradiation unit can be formed by the photosensor 64, and the shadow image distribution of the object 141 can be formed.

[3] Derivation of Precharge Voltage (1) Relationship between Precharge Voltage and On Pixel Number Ratio As shown in FIG. 16, when the exposure time Tc is constant and the precharge voltage Vprc is varied, the on pixel number ratio ( %) Changes. When the second TFT 62b of the photosensor pixel 27 is an N-channel, the ON pixel number ratio (%) increases as the precharge voltage Vprc increases. The precharge voltage Vprc at which the on-pixel ratio (%) starts to increase is defined as the origin voltage V0. The on-pixel ratio (%) becomes 100% from the origin voltage V0 to the A voltage. The width of the A voltage is about 0.4 to 0.8V.

  The precharge voltage Vprc between the origin voltage V0 and V0 + A causes the ON pixel number ratio (%) to be any ON pixel number ratio (%) from 0% to 100%. That is, a predetermined on-pixel ratio (%) is obtained by applying the origin voltage V0 and the precharge voltage Vprc = V0 + Vx as a reference.

  From the above, it is important to accurately obtain the origin voltage V0. This is because it becomes a reference for obtaining a predetermined ratio (%) of the number of ON pixels. In order to obtain the origin voltage V0, for example, the characteristics of FIG. 16 are approximated by a straight line as shown in FIG. The characteristics of the photosensor pixels 27 in the display area 10 shown in FIG. The graph of FIG. 16 is obtained by accurately adding this normal distribution. Therefore, the graph is non-linear near the origin voltage V0 and near V0 + A. However, in this liquid crystal display device, a change in the on-pixel ratio (%) is a problem. Therefore, non-linearity such as the vicinity of the origin voltage V0 hardly causes a problem in the driving method. Further, the ratio (%) of the number of on-pixels is around 50% (20% or more and 80%) is not particularly problematic.

  FIG. 17A is a graph obtained by rotating the graph of FIG. 16 by 90 degrees for easy explanation. The dotted line in FIG. 17A is the characteristic of FIG. This is approximated by a solid line as shown in FIG.

  Note that the position of the origin voltage V0 in FIG. 16 and the position of the origin voltage V0 in FIG. Also, the V0 + A position in FIG. 16 and the V3 position in FIG. However, for the sake of convenience, description will be made with approximation as shown in FIG. That is, the on-pixel ratio (%) starts to change from the precharge voltage Vprc = V0. When the precharge voltage Vprc = V3, the ON pixel number ratio (%) is 100%. Further, the on-pixel number ratio (%) when the precharge voltage Vprc = V1 is applied = a, and the on-pixel number ratio (%) when the precharge voltage Vprc = V2 = b. Also, 0 to V0 is Va, and V3-V0 is Vb.

(2) Relationship between External Illuminance and On Pixel Number Ratio FIG. 18 shows the relationship between external illuminance and on pixel number ratio (%). FIG. 18A is a graph of FIG. FIG. 18B shows the relationship between the external light illuminance and the precharge voltage Vprc. In FIG. 18, for ease of explanation, the on-pixel number ratio (%) will be described by exemplifying 0% (or a position where the on-pixel number ratio (%) slightly occurs).

  However, this embodiment is not limited to 0%. For example, the ON pixel number ratio a (%) may be set as indicated by a dotted line. In this case, at a certain external illuminance L, the precharge voltage Vprc at point A is obtained. The precharge voltage Vprc at point A is VLa. The conversion of the VLa voltage into the precharge voltage Vprc = VL0 in which the ON pixel number ratio (%) is 0% can be easily performed in FIG. This is because the relationship between the on-pixel ratio (%) and the precharge voltage Vprc is linearly approximated from VL0 to VL100 as shown by the dotted line (see FIG. 17).

  Since the on-pixel ratio (%) and the precharge voltage Vprc VL0 to VL100 have a proportional relationship, the position of VL0 can be easily obtained by calculation, so that the point B in FIG. 18B is also obtained. For general expression, a straight line having an ON pixel number ratio (%) of 0% will be described below as an ON pixel number ratio b (%).

  It is preferable that the precharge voltage Vprc is adjusted with respect to an arbitrary external light illuminance L, and the target ON pixel number ratio b (%) is 0% or more and 20% or less. In particular, it is preferably 0% or more and 10% or less. This is because the interval ΔVw between VL0 and VL100 varies depending on the temperature, the precharge voltage Vprc, etc., but the amount of change in ΔV at the position where the on-pixel ratio (%) starts to change (precharge voltage Vprc = VL0) is small. . VL0 = VLa−ΔVw · a / 100.

  A feature of the present embodiment is that the precharge voltage Vprc is adjusted so as to be an arbitrary on-pixel ratio (%) (for example, 0%, 5%, 10%, etc.) at a certain external illuminance. is there. Further, the precharge voltage Vprc is adjusted so that the arbitrary on-pixel number ratio (%) is obtained in a plurality of exposure times Tc.

  In FIG. 18B, the plurality of exposure times Tc are set to 324H, which is half that time, 162H. Of course, in the present embodiment, the exposure time Tc is not limited to 324H or the like. In the present embodiment, two or more exposure times Tc may be set. When selecting two exposure times Tc, it is preferable to adopt a value close to one frame for one exposure time Tc. For example, if one frame is 340H, it is preferable to be close to 340H.

  Further, the exposure time Tc is changed according to the intensity of external light. The change is preferably changed stepwise. For example, if 0 to 1000 Lx is in the level 1 range, 1000 to 10000 Lx is in the level 2 range, and 10,000 to 100,000 Lx is in the level 3 range, the exposure time Tc for level 1 is 320H, The exposure time Tc is set to 1/4 of 80H shifted by 2 bits. The exposure time Tc of level 3 is further changed by 2 bits to 1/4 of 20H. The exposure time Tc is preferably a multiple of 8 or a multiple of 4. The step amount of each level is preferably a multiple of 2.

  As an example, if the horizontal scanning period D (1 frame = DH) constituting one frame is set, the first exposure time Tc is preferably Dx0.6 <Tc <D. In particular, Dx0.8 <Tc <D is preferable. In order to make the description concrete, it is assumed that 1 frame = 340H, and in FIG. 18B, the first exposure time Tc is 324H.

  The second exposure time Tc is preferably in the vicinity of ½ of the first exposure time Tc. As an example, if the horizontal scanning period D (1 frame = DH) constituting one frame is set, the second exposure time Tc is preferably Dx0.6x0.5 <Tc <Dx0.8. In particular, it is preferable to satisfy Dx0.8x0.5 <Tc <Dx0.6. For ease of explanation, 1 frame = 340H, and in FIG. 18B, the second exposure time Tc is 324/2 = 162H.

  The on-pixel number ratio b straight line is obtained by applying the precharge voltage Vprc so that the on-pixel number ratio (%) is b (%) (b = 0 in FIG. 18) at a certain external light illuminance (Lx). It is. When the first exposure time Tc = 324H, the straight line of the ON pixel number ratio 0 (%) becomes the precharge voltage Vprc = VL0 at the point B when the ambient light illuminance is L. When the second exposure time Tc is 324 / 2H, the straight line having the on-pixel ratio 0 (%) is the precharge voltage Vprc = VL02 at the point C when the ambient light illuminance L is reached. Point D is a precharge voltage Vprc = Vk set at the time of imaging.

  VL0 and VL02 of the precharge voltage Vprc are voltages measured by changes in the precharge voltage Vprc. The precharge voltage Vprc = Vk is obtained by calculation from VL0 and VL02 of the precharge voltage Vprc.

  The distance between point B and point C is VL0−VL02. Therefore, it is obtained by changing the precharge voltage Vprc so that the ON pixel number ratio b (%) (exposure time Tc = DH) and the ON pixel number ratio b (%) (exposure time Tc = D / 2H). .

  The distance between point B and point C is m, and the distance between point C and point D is n. The ratio of m: n is the same even in the ambient light illuminances L, L ′, and L ″. Further, it hardly changes depending on the temperature and the wavelength of external light. If the value of m (or relative size) is known by obtaining the ratio of m: n at the time of shipment, inspection or adjustment of the panel, the value of n (or relative size) Can be requested. The value of m can be obtained from the precharge voltage Vprc by measuring VL0 and VL02 as the precharge voltage Vprc. This finding method will be described in detail later.

  When the exposure time Tc is changed, the ratio of m: n is kept constant with respect to arbitrary external light illuminance if the target on-pixel ratio (%) is the same. Further, by changing the exposure time Tc, a plurality of on-pixel number ratio b (%) straight lines pass through the E point of the origin. This embodiment utilizes this property. A straight line having an on-pixel ratio of a (%) (indicated by a dotted line) does not pass through the origin E. However, as described above, it can be obtained by VL0 = VLa−ΔVw · a / 100. ΔVw is obtained when the panel is shipped or inspected or adjusted. Therefore, Vk can be obtained from the ratio of AC: CD.

  If m: n = 2: 1, the first precharge voltage VL0 = 2.0V and the second precharge voltage VL02 = 1.2V, then m = 0.8 and n = 0.4. From this, the corrected precharge voltage (ie, calibration voltage) Vk = 0.8V.

(3) Method of using precharge voltage (that is, calibration voltage) The precharge voltage Vk = 0.8 V obtained as described above is applied as a precharge voltage for imaging, and the above-described imaging is performed. . If the precharge voltage is corrected every predetermined time (for example, every second), it is possible to cope with a change in the intensity of external light.

  The precharge voltage Vprc is changed to determine the on-pixel number ratio (%). That is, data is read from the photosensor pixels 27 of the panel, and the on-pixel ratio (%) is acquired. The precharge voltage Vprc is changed so that the ON pixel number ratio (%) is within a preset range such as 60% to 70%. When the on-pixel number ratio (%) is a% within a predetermined range, the voltage VL0 at which the on-pixel number ratio (%) is 0% is calculated and stored.

  Further, the exposure time Tc1 is set to ½, the second exposure time Tc2 is set, the precharge voltage Vprc is changed, and the on-pixel number ratio (%) with respect to the changed precharge voltage Vprc is obtained. The precharge voltage Vprc is changed so that the ON pixel number ratio (%) is within a preset range such as 60% to 70%. When the on-pixel number ratio (%) is a% within a predetermined range, the voltage VL02 at which the on-pixel number ratio (%) is 0% is calculated and stored.

  As described above, the photosensor pixels 27 that change the precharge voltage Vprc are the same, and the exposure time Tc is changed to Tc1 and Tc2. Therefore, the temperature dependence is canceled. Further, variations in the threshold value Vt of the panel transistor 62 can be canceled. Further, a corrected precharge voltage Vk is obtained from VL0 and VL02 and m and n measured in advance for each panel. Therefore, it is possible to always set the precharge voltage with high accuracy.

[5] Adjustment Method for Optimal Precharge Voltage (ie Calibration Voltage) Before Product Shipment (1) Method for Obtaining Values of m and n As shown in FIG. 18, the optimum precharge voltage (ie calibration) In order to set Vprc = Vk before shipment, it is necessary to accurately determine the ratio of m and n, the difference between VL0 and VL02, or the difference between VL02 and Vk. Hereinafter, in order to facilitate the explanation, it is assumed that the values of m and n are obtained.

  The values of m and n are measured by each panel and set in the EEPROM. Of course, m and n may be measured for each lot of panels, and values common to the lots may be set in the EEPROM of each panel.

  In order to obtain the Vt voltage distribution of the photosensor in the display region 10, the region where the photosensor pixel 27 is formed is shielded from light, or the region where the photosensor pixel 27 is formed is irradiated with light having a constant illuminance and uniform distribution. This light shielding state will be described later. After the precharge voltage Vprc is applied to the photosensor pixel 27, the on / off state of all the photosensor pixels 27 is read.

  The precharge voltage Vprc varies at least in increments of 0.05 V, and the on / off state of the photosensor pixel 27 with respect to each precharge voltage Vprc is recorded. By repeating the above operation, it is possible to measure the distribution of the precharge voltage Vprc in the photo sensor pixel 27 in the display area 10. As shown in FIG. 26, the number of the precharge voltage Vprc selected by each processing block 691 is derived from the measurement result, and the selected number is stored as the distribution of the photosensor pixels 27 in the EEPROM disposed in the panel module.

  FIG. 28 shows an embodiment in which the processing block 691 is irradiated with light and the precharge voltage Vprc corresponding to the calibration Vk is plotted. Note that the amount of light emitted from the light generating means may be adjusted by adjusting the voltage applied to the LED 672, but as shown in FIG. 28B, a neutral density filter is provided between the display panel 148 and the light generating means. 731 may be arranged. The amount of light incident on the processing block 691 of the display panel 148 can be varied by replacing the neutral density filter 731 with one having a plurality of transmittances.

  As shown in FIG. 28, the external light illuminance incident on the photosensor pixel 27 is changed, and the precharge voltage Vprc is changed so that the ratio of the number of ON pixels to the external light illuminance is constant (a% or 0%). At this time, the exposure time Tc is the same. In FIG. 28, the external light illuminance is changed to 200, 500, 1000, and 1500 Lx, and points A, B, C, and D of the precharge voltage Vprc corresponding to each external light illuminance and the V0 point in the light shielding state are plotted.

  The straight line in FIG. 28 is changed to a plurality of exposure times Tc so as to obtain the same ratio of the number of ON pixels, and the relationship between the external light illuminance and the precharge voltage Vprc is obtained. From these plural relational expressions, m and n values are obtained.

  Note that ΔVw in FIG. 18A changes when the ambient light illuminance range is different. Therefore, when the external light illuminance is greatly different, it is necessary to change the values of m and n. Therefore, as shown in FIG. 29, when the ambient light illuminance range is different (FIG. 28 is a range of approximately 0 to 2000 Lx, and FIG. 29 is a range of 20000 Lx), m, n, and V0 are different in different ranges. It is necessary to measure.

  In the present embodiment, measurement is performed before a display panel such as m, n, and V0 is shipped as a product in a plurality of ranges, and is stored in the EEPROM. When auto calibration is performed, m, n corresponding to each range or a value corresponding thereto is read and used.

(2) Second Determination Method In FIG. 28, the horizontal axis is the absolute value of the external light illuminance, but the absolute value of the external light illuminance is not necessary for calculating values such as m and n. That is, any relative value may be used. For example, in FIG. 28, the position D of the precharge voltage Vprc is measured with the position of 15000 Lx as 1. Further, a neutral density filter 731 that attenuates the light quantity to 2/3 is inserted in the optical path. At this time, the point D of the precharge voltage Vprc is measured. Similarly, a neutral density filter 731 that attenuates the amount of light to 1/3 is inserted into the optical path. At this time, the point B of the precharge voltage Vprc is measured.

  As described with reference to FIG. 18, the straight line in FIG. 28 obtains a relational expression in which the number of on-pixels is a% and a relational expression in which the ratio of the number of on-pixels is a% at the same exposure time Tc as in the above state. The value of a is 0 or more and 20 or less. Further, as described with reference to FIG. 18, the relational expression of the on-pixel number ratio a% may be obtained and converted into the relational expression of the on-pixel number being 0% or other arbitrary on-pixel number ratio.

  By measuring as described above, a relational expression of the optimum precharge voltage Vprc (calibration voltage Vk) with respect to the illuminance of outside light can be obtained.

(3) Adjustment tool In order to set the value of n accurately, an adjustment tool 681 as shown in FIG. 23 is used. In FIG. 23, the adjustment rule 681 has a stepped shape. The staircase has a plurality of planes (A, B, C). Each plane is configured to be located at a different distance from the formation surface of the photosensor pixel 27 of the display panel 148. For example, the plane A is 1 mm, the plane B is 5 mm, and the plane C is 10 mm. Note that the planes A, B, and C are made of an object that blocks the light 151.

  The adjustment tool 681 shows a state in which the plane A is in contact with the object 681. A plane C shows a state where the finger 681 and the like are detached from the input surface. The plane B is an intermediate state between the plane A and the plane C. In order for the object to be input satisfactorily, it is possible to determine without erroneous recognition that the object is not input in the air and that the input surface is touched at the time of contact.

  Therefore, as shown in FIG. 23B and the like, when the adjustment tool 681 is arranged on the display surface 10, it is important that the plane A can be completely determined as contact and the plane C is not recognized. In order to achieve the above state, the photo sensor pixel 27 is irradiated with light by the light irradiating means shown in FIGS. 22 and 25 to adjust the precharge voltage Vprc or the exposure time Tc. By adjustment, the plane A can be completely recognized (a state in which the object 681 is in contact), and the plane C cannot be recognized (the object 681 is isolated from the input surface and is not input in the air). The precharge voltage Vprc in this state becomes the calibration voltage Vk.

(4) Arrangement of light shielding plate at the time of adjustment As shown in FIG. 19, a light shielding plate 641 or a film 641 is arranged at a part of the display area 10 at the time of adjustment performed as described above. The light shielding plate 641 rotates at a fulcrum and is configured to be removed from the display area 10 except during calibration. The light shielding plate 641 is mounted on the surface of the display panel during calibration.

  The light shielding plate 641 does not mean a complete light shielding material. If the transmittance is 20% or less, it can be sufficiently handled. Any photosensor 64 may be used as long as it can block light having sensitivity. When the photosensor 64 is made of polysilicon, light having a dominant wavelength of 500 nm or less is blocked. The light shielding plate 641 may be always disposed on the surface of the display panel where the photosensor pixels 27 are formed. This location cannot be used as a coordinate input location.

  Further, a light shielding sticker may be attached to the display area 10 instead of the light shielding plate 641. If the illuminance under the light-shielding seal (shadow) or the state of the photosensor pixel 27 is known, V0 or the calibration voltage can be known. That is, the calibration voltage corresponding to V0 or the external light illuminance shown in FIG. 18 is a voltage at which the photosensor pixel 27 in the light-shielded state maintains the on state or a voltage correlated therewith.

(5) Method of applying precharge voltage at the time of adjustment The precharge voltage Vprc at the time of adjustment is not limited to applying the predetermined precharge voltage Vprc to a predetermined location in the display area 10.

(5-1) Application to three regions For example, as shown in FIG. 20, the precharge voltage Vprc applied to each part of the display region 10 may be changed for each frame.

  In FIG. 20, the display area 10 is divided into at least three areas. In the first frame (first F), the precharge voltage Vprc = V1 = 2.5V is applied to the upper portion of the display area 10, the precharge voltage Vprc = V2 = 2.3V is applied to the central portion, and the precharge is applied to the lower portion. The voltage Vprc = V3 = 2.5V is applied.

  In the second frame (second F) following the first frame, the precharge voltage Vprc = V1 = 2.3V is applied to the upper portion of the display area 10, and the precharge voltage Vprc = V2 = 2.5V is applied to the center portion. The precharge voltage Vprc = V3 = 2.1V is applied to the lower part.

  In the third frame (third F) following the second frame, the precharge voltage Vprc = V1 = 2.5V is applied to the upper portion of the display area 10, and the precharge voltage Vprc = V2 = 2.1V is applied to the central portion. The precharge voltage Vprc = V3 = 2.3V is applied to the lower part.

  FIG. 20 shows one cycle for three frames. In one cycle, a precharge voltage Vprc = 2.1 V, 2.3 V, and 2.5 V is applied to the upper portion of the display region 10. Therefore, the precharge voltage Vprc is 2.3 V if averaged over one period. Similarly, a precharge voltage Vprc = 2.1V, 2.3V, and 2.5V is applied to the upper portion of the display area 10. Therefore, the precharge voltage Vprc is 2.3 V if averaged over one period. Precharge voltages Vprc = 2.3V, 2.5V, and 2.1V are applied to the center of the display area 10. Therefore, the precharge voltage Vprc is 2.3 V if averaged over one period. A precharge voltage Vprc = 2.5V, 2.1V, 2.3V is applied to the lower part of the display area 10. Therefore, the precharge voltage Vprc is 2.3 V if averaged over one period. Therefore, the average value of the precharge voltage Vprc applied in one period is the same in each part of the display region 10.

  Note that the precharge voltage Vprc is not limited to being applied to all the photosensor pixels 27 in the display region 10. For example, it goes without saying that it may be applied only to even-numbered photosensor pixels 27.

(5-2) Application for each block FIG. 20 shows an embodiment in which the display area 10 is divided into at least three areas. It is not limited to this embodiment. For example, as shown in FIG. 21, the precharge voltage Vprc selected in the processing block 691 may be applied, and the precharge voltage Vprc selected in each processing block 691 may be changed.

  FIG. 21A shows an application state of the precharge voltage Vprc in the first frame. FIG. 21B shows the application state of the precharge voltage Vprc in the second frame.

  In FIG. 21, the number in the processing block 691 represents the number of the precharge voltage Vprc selected and applied. The period is 2 frames. As apparent from FIG. 21, the processing block 691 to which the precharge voltage Vprc V1 (shown as 1 in the figure) is applied in the first frame is equal to the precharge voltage Vprc = V4 (in the figure, 4). Is applied). The processing block 691 to which the precharge voltage Vprc V1 is applied in the first frame applies the precharge voltage Vprc = V4 in the second frame. The processing block 691 to which the precharge voltage Vprc V2 is applied in the first frame applies the precharge voltage Vprc = V3 in the second frame. The processing block 691 to which the precharge voltage Vprc V4 is applied in the first frame applies the precharge voltage Vprc = V1 in the second frame. The processing block 691 to which the precharge voltage Vprc V3 is applied in the first frame applies the precharge voltage Vprc = V2 in the second frame.

  The average value of V1 and V4 of the precharge voltage Vprc is set to be the same as the average value of V2 and V3 of the precharge voltage Vprc.

(6) Configuration of light generation means In order to stably measure the values of m and n in each panel, a stable light generation means is required. Therefore, the light generation means will be described.

(6-1) First Light Generation Unit As shown in FIG. 22, the first light generation unit irradiates each panel with light 151 using a light generation unit including one or a plurality of LEDs 672. To do.

  A diffusion plate 673 is disposed on the emission side of the LED 672. The LED 672 is disposed in the case 674. The diffusion plate 673 is diffused with light from the light generating means such as the LED 672 and generates uniform surface light generating means. The light generating means thus configured is arranged on the processing block 691 of the display area 10 of the panel 148 as shown in FIG. The light generating means described with reference to FIG. 22 and the like is adjusted to generate a predetermined illuminance (light flux amount). The light generating means is configured to be able to periodically turn on (irradiate light) and turn off (stop light generation) the light generation.

  As shown in FIG. 24, the processing block defines a region irradiated with the illuminance in charge. In FIG. 24, the processing block 691a is irradiated with 100 Lx light by the light generating means. The processing block 691b is irradiated with 1000 Lx light by the light generating means. The processing block 691c is irradiated with 10,000 Lx light by the light generating means. The processing block 691d is irradiated with 100,000 Lx light by the light generating means.

  A precharge voltage Vprc is applied to the display panel 148. The light generating means turns light on / off. The control means of the display panel 148 monitors in synchronization with light on / off. In each processing block 691, the optimum precharge voltage Vprc is measured, and the V0 voltage and the Vk voltage at each light intensity are obtained.

(6-2) Second Light Generating Unit FIG. 25 shows a configuration in which a positive lens 701 is disposed on the emission side of a light generating unit such as the LED 672. The emission intensity of the LED 672 can be adjusted by adjusting the volume VR (VR1, VR2, VR3). Light from the LED 672 is converted into substantially balanced light by the lens 701. The substantially balanced light is light having a narrow directivity whose chief ray has a directivity angle of 5 degrees (DEG) or less. The narrow directivity light enters the processing block 691 specified by the display panel 148.

(6-3) Modified Example Although the adjustment processing block 691 is designated and light irradiation is performed, the present invention is not limited to this.

  The entire display area 10 of the display panel 148 may be irradiated with light. Further, a plurality of processing blocks 691 that irradiate one light amount may be provided, and each processing block 691 may be irradiated with the light amount. For example, as shown in FIG. 27A, a light irradiation range 721 may be provided in the display area 10, and light may be irradiated to this range. As shown in FIG. 27B, the precharge voltage Vprc is varied, and the ratio of the number of ON pixels to the precharge voltage Vprc is measured or measured. Further, the irradiation light from one light generation means may be moved by sequentially scanning the surface on which the photosensor pixel 27 is formed.

(6) Modification Example In FIG. 28 and FIG. 29, the precharge voltage Vprc is adjusted for a plurality of external light illuminances. However, as described in FIG. By changing Tc and adjusting the precharge voltage Vprc so that the ratio of the number of on-pixels is the same, m, n, or a numerical value related thereto can be obtained. Therefore, it is not necessary to obtain a relational expression. However, as shown in FIGS. 28 and 29, by calculating the relational expression, the calculation accuracy of m, n, etc. is improved.

  Further, the calibration voltage Vk and the like are obtained by varying the precharge voltage Vprc, but the exposure time Tc may be varied as shown in FIG. Needless to say, both the precharge voltage Vprc and the exposure time Tc may be changed. However, the exposure time Tc and the precharge voltage Vprc are changed so as to maintain a certain relationship as described above.

[6] Modification Examples The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist thereof.

  For example, not only a liquid crystal display device but also a self-luminous display device such as an organic EL element or an inorganic EL element can be applied. It can also be applied to other displays such as SED (trademark), PDP (plasma display panel), liquid crystal display device, display using carbon nano tube (CNT), cathode ray tube (CRT). . Further, the present invention can be applied not only to the active block display panel but also to a simple block display panel.

It is a block diagram of the liquid crystal display device of one Embodiment of this invention. It is an expansion explanatory drawing of a liquid crystal display device similarly. It is the equivalent circuit schematic of a pixel similarly. It is a longitudinal cross-sectional view of a liquid crystal display device. It is an equivalent circuit diagram of a photo sensor pixel. It is the equivalent circuit schematic of a photo sensor pixel similarly. It is an equivalent circuit schematic of the photo sensor pixel of a shadow part (a) and an external light irradiation part (b). It is a circuit diagram of the periphery of a liquid crystal display device. It is a graph which shows the relationship between exposure time and external light. It is a timing chart of each signal. It is a figure which shows the relationship between a precharge voltage and time. It is a timing chart of exposure time and precharge voltage. It is explanatory drawing of a matrix process. It is a longitudinal cross-sectional view of the liquid crystal display device at the time of finger input. It is a longitudinal cross-sectional view of the liquid crystal display device at the time of finger input. It is a graph of the number of ON pixels and precharge voltage. It is a graph of the number of ON pixels and precharge voltage. It is a graph of ON pixel number ratio, precharge voltage, and external illuminance. It is explanatory drawing of the light-shielding part of a display panel. It is explanatory drawing of the 1st application method of a precharge voltage. It is explanatory drawing of the 2nd application method of a precharge voltage. It is explanatory drawing of a structure of a 1st light generation means. It is explanatory drawing of a structure of an adjustment tool. It is explanatory drawing of the light irradiation method. It is explanatory drawing of a structure of a 2nd light generation means. It is a graph of exposure time, a precharge voltage, and illumination intensity. It is a graph of ON pixel number ratio, precharge voltage, and external illuminance. It is a graph of a precharge voltage and external illumination intensity. It is a graph of a precharge voltage and external illumination intensity.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Display area | region 11 Array substrate 16 Pixel 26 Display pixel 27 Photo sensor pixel 31 Common signal line 61 Pixel electrode 62a 1st TFT
62b 2nd TFT
62c 3rd TFT
63 Capacitor (auxiliary capacity)
64 photo sensor

Claims (11)

A signal line and a first gate line arranged in rows and columns, a display pixel disposed corresponding to each intersection of the signal line and the first gate line, and a plurality of photosensors provided corresponding to the display pixel In a flat display device integrally provided with a pixel in a display area,
Storage means for storing imaging parameters at the time of imaging of the photosensor pixels so that a predetermined ratio of the photosensor pixels among the plurality of photosensor pixels responds to the external light with respect to a predetermined external light illuminance A flat display device characterized by comprising: The flat display device according to claim 1, wherein the imaging parameter is a precharge voltage supplied to the photosensor pixel when the photosensor pixel performs imaging. While adjusting the exposure time, obtain the adjustment imaging parameters for each of the multiple external light illuminances,
The flat display device according to claim 1, wherein an imaging parameter at the time of imaging is obtained based on the plurality of adjustment imaging parameters. The flat display device according to claim 1, wherein the imaging parameter divides the display area into a plurality of blocks and is obtained for each of the blocks. The flat panel display according to claim 1, wherein the external light illuminance includes an illuminance in a light shielding state. The flat display device according to claim 1, wherein the external light illuminance is constant illuminance and illuminance based on external light having a uniform distribution. The flat display device according to claim 1, wherein the photosensor constituting the photosensor pixel is made of an amorphous or polycrystalline semiconductor film. The flat display device according to claim 1, wherein the photosensor constituting the photosensor pixel is constituted by a polycrystalline silicon film. The photosensor pixel is
A first switching element that is turned on / off by a second gate signal from a second gate signal line disposed in parallel with the first gate signal line;
A capacitor for storing a charge by applying a predetermined precharge voltage from a precharge voltage supply line arranged in parallel with the signal line when the first switching element is on;
A photosensor that discharges the electric charge accumulated by the capacitor by changing the amount of light leakage according to the intensity of light;
A second switching element that is turned on / off based on a discharge voltage from the capacitor;
A third switching element for turning on / off between the second switching element and the photosensor signal output line by a third gate signal from a third gate signal line arranged in parallel with the first gate signal line;
The flat display device according to claim 1, comprising: A plurality of the photosensor pixels are arranged in a matrix on the insulating substrate,
A plurality of photosensor pixels arranged in a matrix form one block,
A plurality of the blocks are provided on the insulating substrate,
A photo sensor processing unit that counts the number of the photo sensors in the on state or the off state for each block and determines whether the photo sensor in the block is in the on state or the off state based on the counted number. The flat display device according to claim 9. A signal line and a first gate line arranged in rows and columns, a display pixel disposed corresponding to each intersection of the signal line and the first gate line, and a plurality of photosensors provided corresponding to the display pixel In a method for adjusting a flat display device integrally provided with a pixel in a display area,
Adjusting imaging parameters at the time of imaging of the photosensor pixels so that a predetermined ratio of the photosensor pixels among the plurality of photosensor pixels reacts to the external light with respect to a predetermined external light illuminance. A method for adjusting a flat display device.

Images