JP4361549B2 - Display device - Google Patents

Description

  The present invention relates to a display device, and more particularly to a display device such as a liquid crystal display device called a horizontal electric field method.

  A liquid crystal display device called a horizontal electric field method is a counter electrode that generates an electric field between a pixel electrode and a pixel electrode in a pixel region on a liquid crystal side surface of one substrate of each substrate that is disposed to face the liquid crystal. The liquid crystal is made to behave by a component substantially parallel to the substrate in the electric field.

  In the case where such a configuration is applied to an active matrix type, first, a plurality of gate signal lines arranged in parallel on the liquid crystal side surface of the one substrate cross each of these gate signal lines. Each region surrounded by the plurality of drain signal lines arranged in parallel is used as the pixel region.

  Then, in each of these pixel regions, a thin film transistor operated by a scanning signal from a gate signal line, the pixel electrode to which a video signal from a drain signal line is supplied via the thin film transistor, and a reference to the video signal The counter electrode to which a signal is supplied is provided.

Here, the pixel electrode and the counter electrode are each formed as a strip-like pattern extending in one direction, and these electrodes are usually formed in two or more and are alternately arranged.
Further, in such a configuration, the counter electrode is formed on the upper surface of the insulating film formed so as to cover the drain signal line, and the central axis of the drain signal line is substantially coincident with the width of the drain signal line. A structure having a large width and formed along the drain signal line is also known.

This is because electric lines of force from the drain signal line are easily terminated at the counter electrode above the drain signal line and are prevented from terminating at the pixel electrode. This is because if the electric lines of force terminate in the pixel electrode, it becomes noise.
In such a configuration, in order to reduce the parasitic capacitance between the drain signal line and the counter electrode, an interlayer insulating film between them is also known in which an organic material layer such as a resin is interposed. .

However, in the liquid crystal display device having such a configuration, it is pointed out that in the manufacturing process, the organic material layer is easily peeled off from the edge thereof, and the peeling reaches the liquid crystal display part to cause a display defect. It was done.
As a result of pursuing this cause, the following was found. That is, when an electrode is formed on the upper surface of the organic material layer, its end face is exposed to a resist developer and a stripper and an electrode etchant.
These liquids are for removing the residue of the organic material layer. In particular, the developer has the purpose of melting the uncured organic material layer itself, and the stripping solution is a photoresist made of the organic material layer that has completed its function. It has the purpose of removing itself.
Therefore, these liquids have the property of causing the organic film to peel off, and it has become necessary to take countermeasures on the premise of this.
The present invention has been made based on such circumstances, and an object thereof is to provide a display device that avoids peeling of an organic material layer.

Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows .

Means 1 .
In the display device according to the present invention, for example, a plurality of gate signal lines arranged in parallel and a plurality of drain signal lines arranged in parallel across the gate signal lines are formed on the substrate surface,
A group of pixel regions surrounded by these signal lines is used as a display unit. In each pixel region, a switching element that is activated by a scanning signal from a gate signal line, and a video signal from a drain signal line is passed through the switching element. a pixel electrode which is supplied, and an opposed been counter electrode via the pixel electrode and the light emission material layer,
With the bank layer is formed of an organic material formed to demarcating the respective light emission material layer of the pixel regions adjacent to each other,
The bank layer is formed over the display unit, in addition to the insulating film formed on the lower layer, is characterized in that interspersed opened or juxtaposed grooves are formed.

  As is apparent from the above description, the display device according to the present invention can avoid peeling of the organic material layer.

Embodiments of a display device according to the present invention will be described below with reference to the drawings.
<Overall configuration>
FIG. 2 is an overall plan view showing a liquid crystal display device which is an embodiment of the display device according to the present invention. This figure is an equivalent circuit, but is drawn corresponding to the actual geometric arrangement.
In the figure, there is a pair of transparent substrates SUB1 and SUB2 arranged to face each other via a liquid crystal, and the liquid crystal is sealed by a sealing material SL that also serves to fix the other transparent substrate SUB2 to one transparent substrate SUB1.

On the liquid crystal side surface of the one transparent substrate SUB1 surrounded by the sealing material SL, the gate signal lines GL extending in the x direction and arranged in parallel in the y direction, and extending in the y direction and aligned in the x direction. A drain signal line DL is provided.
A region surrounded by each gate signal line GL and each drain signal line DL constitutes a pixel region, and a matrix aggregate of these pixel regions constitutes a liquid crystal display unit AR.

  A common counter voltage signal line CL that runs in each pixel region is formed in each pixel region arranged in parallel in the x direction. The counter voltage signal line CL serves as a signal line for supplying a reference voltage for a video signal to a counter electrode CT (described later) in each pixel region.

In each pixel region, a thin film transistor TFT operated by a scanning signal from one side gate signal line GL and a pixel electrode PX to which a video signal from one side drain signal line DL is supplied via the thin film transistor TFT are formed. Has been.
The pixel electrode PX generates an electric field between the pixel electrode PX and the counter electrode CT (connected to the counter voltage signal line) commonly formed in each pixel region on the liquid crystal side surface of the other transparent substrate SUB2. Thus, the light transmittance of the liquid crystal is controlled.

One end of each of the gate signal lines GL extends beyond the sealing material SL, and the extending end constitutes a terminal to which the output terminal of the vertical scanning drive circuit V is connected. The input terminal of the vertical scanning drive circuit V receives a signal from a printed circuit board disposed outside the liquid crystal display panel.
The vertical scanning drive circuit V is composed of a plurality of semiconductor devices, a plurality of gate signal lines adjacent to each other are grouped, and one semiconductor device is assigned to each group.

Similarly, one end of each of the drain signal lines DL extends beyond the seal material SL, and the extending end constitutes a terminal to which the output terminal of the video signal driving circuit He is connected. . The input terminal of the video signal driving circuit He is adapted to receive a signal from a printed circuit board arranged outside the liquid crystal display panel.
The video signal drive circuit He is also composed of a plurality of semiconductor devices, and a plurality of adjacent drain signal lines are grouped, and one semiconductor device is assigned to each group.

The counter voltage signal line CL is commonly connected at the right end in the drawing, and the connection line extends beyond the seal material SL, and constitutes a terminal CLT at the extended end. A voltage serving as a reference for the video signal is supplied from the terminal CLT.
One of the gate signal lines GL is sequentially selected by a scanning signal from the vertical scanning circuit V.
In addition, a video signal is supplied to each of the drain signal lines DL by the video signal driving circuit He in accordance with the selection timing of the gate signal line GL.

  In the above-described embodiment, the vertical scanning drive circuit V and the video signal drive circuit He indicate the semiconductor device mounted on the transparent substrate SUB1, but for example, straddle between the transparent substrate SUB1 and the printed circuit board. It may be a so-called tape carrier type semiconductor device to be connected. Further, when the semiconductor layer of the thin film transistor TFT is made of polycrystalline silicon (p-Si), the transparent substrate SUB1 is made of the polycrystalline silicon. A semiconductor element may be formed together with a wiring layer.

  The liquid crystal display device formed in this way is a dummy liquid crystal formed as a so-called dummy pixel in each peripheral pixel region of the liquid crystal display AR as shown in FIG. 3 drawn corresponding to FIG. A display portion DAR is formed.

  The dummy pixel is configured not to contribute for display even though its configuration itself is formed in the same manner as other pixels. The reason for this is to make the capacitance element Cstg in another pixel adjacent to the dummy pixel the same value as the capacitance element Cstg of another pixel adjacent to the other pixel.

  From this point of view, it is sufficient to provide the dummy pixel only in a portion arranged in parallel with the gate signal line GL. However, in this embodiment, the dummy pixel is separately provided in a portion arranged in parallel with the drain signal line DL. The dummy liquid crystal display unit DAR described above is also formed.

<Pixel configuration>
FIG. 1 is a plan view showing an example of the dummy pixel and another pixel adjacent to the dummy pixel. Here, the dummy pixel indicates one of the dummy pixels arranged in parallel with the drain signal line DL.
1 is a sectional view taken along line IV-IV in FIG. 1, and FIG. 5 is a sectional view taken along line VV.

In each drawing, first, gate signal lines GL extending in the x direction and arranged in parallel in the y direction are formed on the liquid crystal side surface of the transparent substrate SUB1.
These gate signal lines GL surround a rectangular region together with a drain signal line DL described later, and this region is configured as a pixel region.

Thus, an insulating film GI made of, for example, SiN is formed on the surface of the transparent substrate SUB1 on which the gate signal line GL is formed so as to cover the gate signal line GL.
The insulating film GI functions as an interlayer insulating film for the gate signal line GL in a region where a drain signal line DL described later is formed, and functions as a gate insulating film in a region where a thin film transistor TFT described later is formed. It has become.

A semiconductor layer AS made of, for example, amorphous Si is formed on the surface of the insulating film GI so as to overlap a part of the gate signal line GL.
This semiconductor layer AS is that of the thin film transistor TFT, and by forming a drain electrode SD1 and a source electrode SD2 on the upper surface thereof, a MIS (metal insulator semiconductor) having an inverted stagger structure having a part of the gate signal line as a gate electrode. Type transistors can be constructed.

Here, the drain electrode SD1 and the source electrode SD2 are formed simultaneously with the formation of the drain signal line DL.
That is, a drain signal line DL extending in the y direction and juxtaposed in the x direction is formed, and a part of the drain signal line DL is extended to the upper surface of the semiconductor layer AS to form the drain electrode SD1. A source electrode SD2 is formed by being separated from the electrode SD1 by the channel length of the thin film transistor TFT.

  Here, each drain signal line DL has a plurality of bent portions in the extending direction thereof and is formed in a zigzag shape. In this embodiment, for example, bent portions are formed in the formation portion of the gate signal line GL, the central portion of the pixel region, and the formation portion of the next gate signal line GL.

The source electrode SD2 is integrally formed with the pixel electrode PX formed in the pixel region.
That is, the pixel electrode PX is composed of an electrode having one end portion also serving as the source electrode SD2 and extending substantially in the center of the pixel region in the y direction. Also, a bent portion is formed at the center of the pixel electrode, and a pattern shape is formed by shifting a part of the drain signal line DL as it is in the x direction.

  Thus, a protective film is formed on the surface of the transparent substrate SUB1 on which the thin film transistor TFT, the drain signal line DL, the drain electrode SD1, the source electrode SD2, and the pixel electrode PX are formed. This protective film is a film that avoids direct contact with the liquid crystal of the thin film transistor TFT, and prevents the deterioration of the characteristics of the thin film transistor TFT.

  This protective film is composed of a laminated body of a protective film PAS made of an inorganic material layer such as SiN and a protective film OPAS made of an organic material layer such as resin. The reason why at least the organic material layer is used as the protective film is to reduce the dielectric constant of the protective film itself.

  A counter electrode CT is formed on the upper surface of the protective film OPAS. The counter electrode CT is composed of a plurality (two in the figure) of electrode groups extending in the y direction and arranged in parallel in the x direction, and each of these electrodes, when viewed in a plan view, is the pixel electrode PX. It is designed to be positioned in between.

  Here, each counter electrode CT is formed so that the central axis thereof coincides with that of the drain signal line DL and overlaps, and has a width larger than the width of the drain signal line DL. Yes.

  In this way, by forming the counter electrode CT wider than the drain signal line DL above the drain signal line DL, the electric lines of force from the drain signal line DL terminate in the counter electrode CT and become pixel electrodes. There is an effect that the termination to PX can be avoided. This is because when the electric lines of force from the drain signal line DL terminate in the pixel electrode PX, it becomes noise.

  In this case, since the protective film OPAS having a low dielectric constant is interposed between the counter electrode CT and the drain signal line DL, the parasitic capacitance between them can be reduced.

  Each counter electrode CT formed of an electrode group is formed integrally with a counter voltage signal line CL made of the same material and sufficiently covered with the gate signal line GL, and the reference voltage is passed through the counter voltage signal line CL. Is to be supplied.

The counter voltage signal line CL that is sufficiently covered with the gate signal line GL is positioned at the other end of the pixel electrode PX in the lower layer of the counter voltage signal line CL that protrudes from the gate signal line GL. Between the pixel electrode PX and the counter voltage signal line CL, a capacitive element Cstg having the protective films PAS and OPAS as dielectric films is formed.
The capacitive element Cstg has a function of, for example, accumulating a video signal supplied to the pixel electrode PX for a relatively long time.

  An alignment film (not shown) is formed on the upper surface of the transparent substrate SUB1 on which the counter electrode CT is formed in such a manner so as to cover the counter electrode CT. This alignment film is in direct contact with the liquid crystal, and the initial alignment direction of the molecules of the liquid crystal is determined by rubbing formed on the surface thereof.

  The liquid crystal display device configured as described above can stop the progress of the peeling in the region of the dummy liquid crystal display unit DAR even if the protective film OPAS may be peeled off from the edge thereof. It is possible to avoid reaching the liquid crystal display part AR in the dummy liquid crystal display part DAR.

  In this case, since each pattern of the drain signal line DL, the counter electrode CT, and the pixel electrode PX in the dummy liquid crystal display unit DAR is formed in a zigzag shape, the peeling force of the protective film OPAS is alleviated, and a wide range is collectively obtained. There is an effect that can prevent peeling.

In such a configuration, if there is a relationship such as the film thickness of the protective film OPAS> the film thickness of the protective film PAS> the film thickness of each electrode under the protective film PAS, the film thickness of the electrode under the protective film is protected. Since it appears on the surface of the film, the contact area can be increased.
For this reason, the adhesiveness with the lower layer of the organic film OPAS is improved, and peeling can be reduced.

Example 2
FIG. 6 is a sectional view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
A configuration different from the case of FIG. 5 is that the protective film PAS made of an inorganic material layer is not used as the protective film, but only the protective film OPAS made of an organic material layer is used. Needless to say, this case also has the same effect.

Example 3
FIG. 7 is a sectional view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
A configuration different from the case of FIG. 5 is that the pixel electrode PX is formed on the upper surface of the protective film OPAS similarly to the counter electrode CT.
In this case, the connection between the pixel electrode PX and the source electrode SD2 of the thin film transistor TFT is made through a through hole formed in the protective film OPAS.
Needless to say, this case also has the same effect.

Example 4
FIG. 8A is a plan view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG. FIG. 8B is a cross-sectional view taken along line bb in FIG.
The configuration different from the case of FIG. 1 is that each pixel of the dummy liquid crystal display unit DAR is not a dummy pixel, but is simply formed as an anti-peeling pattern of the protective film OPAS, and the pattern is very similar to the pixel. .
That is, the counter voltage signal line CL is formed in the same layer as the gate signal line GL in common to the pixels arranged in the x direction in the liquid crystal display portions AR and DAR, and the counter voltage signal line CT is a normal pixel ( Each pixel in the effective display area) is connected to the counter electrode CT through a through hole TH that penetrates the protective films OPAS and PAS. Thereby, the overall electrical resistance value of the counter electrode CT formed of, for example, a translucent material can be reduced.
On the other hand, a counter electrode CT is formed integrally with the counter voltage signal line CL in a portion very similar to the pixel of the liquid crystal display unit DAR formed as a peeling prevention pattern. In other words, this portion has a configuration in which the counter electrode CT is formed in place of the pixel electrode PX.
Even in this case, the same effect as that of the first embodiment can be obtained.
Further, when configured in this way, the voltage difference can be greatly reduced in a portion very similar to the pixel of the liquid crystal display portion DAR formed as a prevention pattern, and the occurrence of so-called electrolytic corrosion can be suppressed. This can also avoid the peeling of the protective film OPAS caused by galvanic corrosion caused by energization in the actual use state.

Embodiment 5 FIG.
FIG. 9 is a sectional view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
8B is different from the configuration shown in FIG. 8B in that a protective film is formed instead of the counter electrode CT formed integrally with the counter voltage signal line CL in a portion very similar to the pixel of the liquid crystal display unit DAR formed as a peeling prevention pattern. A separate counter electrode CT is formed together with the counter electrode CT formed on the OPAS. The same effects as those shown in Example 4 can be obtained.

Example 6
FIG. 10A is a sectional view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG. FIG. 10B is a cross-sectional view taken along the line bb in FIG.
The configuration different from that in FIG. 8 is that the number of counter electrodes CT formed integrally with the counter voltage signal line CL is large in a portion very similar to the pixel of the liquid crystal display unit DAR formed as a peeling prevention pattern. It is in.
Thus, the protective film OPAS is formed on the surface of the protective film PAS where the steps of the counter electrode CT are generated, and the bonding strength can be increased.

Example 7
FIG. 11 is a block diagram showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
The configuration different from that in FIG. 8 is that a material layer is formed on the upper surface of the insulating film GI so as to overlap the lower counter electrode CT in a portion very similar to the pixel of the liquid crystal display portion DAR formed as a peeling prevention pattern. It is in the formation.
Here, this material layer is formed at the same time as the formation of the drain signal line DL, and is provided in order to reveal the uneven step due to the formation on the surface of the protective film PAS.
By doing so, it is possible to stop the peeling from the end face of the protective film OPAS at this portion and to avoid the substantial liquid crystal display portion AR.

Example 8 FIG.
FIG. 12 is an explanatory view showing another embodiment of the liquid crystal display device according to the present invention, and is a plan view showing the upper right corner portion of the liquid crystal display portion AR.
In each of the embodiments so far, the drain signal line DL, the pixel electrode PX, and the counter electrode CT are each formed in a zigzag shape in each pixel region of the substantial liquid crystal display portion AR. It may be formed linearly.
The drain signal line DL, the pixel electrode PX, and the counter electrode CT are zigzag because the portion corresponding to the dummy liquid crystal display portion DAR is sufficient.

Example 9
FIG. 13A is a partial plan view showing another embodiment of the liquid crystal display device according to the present invention. Further, FIG. 13B shows a cross-sectional view taken along line bb in FIG.
In each figure, there is almost no pattern similar to the pattern in each pixel region of the substantial liquid crystal display area AR around the substantial liquid crystal display area AR. Interspersed or juxtaposed openings are formed. The opening may have a hole shape or a groove shape.
By doing so, a large number of irregularities are formed on the surface of the insulating film GI, and the adhesive strength against peeling of the protective film OPAS formed on the upper surface is strengthened.

Example 10
FIG. 14 is a sectional view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
A configuration different from that in FIG. 13B is that a protective film PAS is formed on the upper surface of the insulating film GI, and openings that are scattered or juxtaposed in the insulating film GI are formed together with the protective film PAS. It is in.
Even in this case, the same effects as those of the ninth embodiment are obtained.

Example 11
FIG. 15 is a sectional view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
The configuration different from that in FIG. 14 does not form an opening in either the insulating film GI or the protective film PAS, and is scattered or arranged in parallel on the surface of the insulating film GI for the purpose of forming irregularities. A large number of material layers formed.
In this embodiment, the material layer is formed simultaneously with the formation of the drain signal line DL, for example.
FIGS. 16A to 16F show examples of specific patterns of a large number of scattered or juxtaposed material layers shown in the eleventh embodiment.

Example 12
FIG. 17 is a block diagram showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
A different configuration compared to FIG. 13 is to prevent the protective film OPAS from peeling off by providing an opening in the protective film OPAS itself.
In this case, a plurality of openings are provided from the end side of the protective film OPAS toward the liquid crystal display unit AR, and the opening on the end side of the protective film OPAS is formed larger than the opening on the liquid crystal display unit AR side.
By doing so, it is possible to prevent the protective film OPAS from being peeled off at once. In this case, the size of the opening is changed as described above because it corresponds to the force required for the peeling of the protective film OPAS.

Example 13
FIG. 18 is a block diagram showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
A configuration different from that in FIG. 17 is that an inspection terminal is formed by covering an opening region formed in the protective film OPAS.
Here, the inspection terminal is a terminal for inspecting disconnection or the like of the drain signal line DL or the gate signal line GL in the process of manufacturing the liquid crystal display device, and the drain signal line DL before the completion of the liquid crystal display device. Alternatively, it includes a terminal that is included when the gate signal line GL or the like is disconnected.
In this case, it is possible to prevent various solutions from entering through the opening formed in the protective film OPAS and promoting the peeling of the protective film OPAS by covering the inspection terminal material.

Example 14
FIG. 19A is a plan view showing another embodiment of the liquid crystal display device according to the present invention. FIG. 19B is a cross-sectional view taken along line bb in FIG.
In this embodiment, the drive circuit is formed in a part of a region surrounding the substantial liquid crystal display portion AR. This driving circuit is a scanning signal driving circuit V or a video signal driving circuit He, and is a circuit in which a thin film transistor and a wiring layer for connecting them are formed directly on the transparent substrate SUB1.
As a semiconductor material of the thin film transistor, polysilicon, polycrystalline silicon, continuous grain boundary silicon, CGS, or the like is used.
If these circuits are formed in the lower layer of the protective film OPAS, since complex irregularities are formed on the surface of the circuit, adhesion of the protective film OPAS can be improved and peeling can be prevented. .

Example 15.
FIG. 20 is a plan view showing another embodiment of the liquid crystal display device according to the present invention.
This figure shows a portion where the gate signal line GL is connected to the scanning signal drive circuit V, and the connection of the gate signal line GL of the scanning signal drive circuit V to each gate signal line GL with respect to the interval between the adjacent gate signal lines GL. Since the interval between the bumps to be formed is small, there is a portion where each gate signal line GL converges to the scanning signal drive circuit V.
In this embodiment, the end of the protective film OPAS is arranged so as to cross the converging portion of each gate signal line GL.
In this case, some of the gate signal lines GL run obliquely with respect to the edge of the protective film OPAS, and for this reason, the protective film OPAS is difficult to peel off from the edge. be able to.
In this embodiment, the connection portion of the gate signal line GL to the scanning signal drive circuit V has been described, but the connection portion of the drain signal line DL to the video signal drive circuit He may be configured similarly. Of course, both may be used together.

Example 16
FIG. 21 is a plan view showing another embodiment of the liquid crystal display device according to the present invention. This figure shows the edge of the protective film OPAS, and the edge is, for example, uneven (a), zigzag (b), deformed zigzag (c), or random (d). , Curve (e) and the like.
Even in this case, peeling from the end of the protective film OPAS can be prevented, and the protective film OPAS may be formed alone or in combination with the above-described embodiments.
Note that the effect of the cycle of the repetitive pattern shown in FIG. 21 increases as the cycle is reduced. Specifically, it is desirable to set one cycle from one pixel to several pixels as one cycle.

Example 17.
FIG. 22 is a sectional view showing another embodiment of the liquid crystal display device according to the present invention. The figure shows the edge of the protective film OPAS.
In the figure, a gate signal line GL or a drain signal line DL is made of aluminum (Al) or an alloy containing the same, and covers an inorganic film (insulating film GI or a protective film made of an insulating film GI and an inorganic material layer). A protective film OPAS made of an organic material layer is formed on the upper surface of the PAS laminate.
Then, an opening for exposing a part of the gate signal line GL or the drain signal line DL is formed in the inorganic film around the region substantially functioning as the liquid crystal display portion AR, and the opening serves as a protective film OPAS. It is configured to be covered by.
In such a configuration, a so-called hillock is generated from the gate signal line GL or the drain signal line DL in the region where the opening of the inorganic film is formed, and this hillock causes a phenomenon of sufficient growth up to the protective film OPAS. be able to.
Thereby, the protective film OPAS can be configured to be difficult to peel off due to the hillock.

Example 18
FIG. 23 is a block diagram showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
The structure different from FIG. 22 is that the gate signal line GL or the drain signal line DL made of aluminum (Al) or an alloy including the aluminum (Al) is covered with a metal layer for protecting it from hillocks. This metal layer is that an opening is formed together with the inorganic film in the vicinity of a region substantially functioning as the liquid crystal display portion AR.
The metal layer is formed of, for example, Mo and an alloy containing the same, and reliably prevents hillocks from occurring in a region that substantially functions as the liquid crystal display portion AR. In addition, this metal layer can reduce the connection resistance with the outside.

Example 19.
FIG. 24 is a block diagram showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
The structure different from FIG. 23 is that the surface of the gate signal line GL or the drain signal line DL made of aluminum (Al) or an alloy containing the same is anodized to form aluminum oxide.
And it has the part from which this aluminum oxide was removed in the peripheral part of the area | region of the substantial liquid crystal display part AR.
In the inorganic film covering the gate signal line GL or the drain signal line DL, no opening is formed in the portion where the aluminum oxide is removed, and a protective film OPAS is formed on the upper surface of the inorganic film. .
From the gate signal line GL or the drain signal line DL, a hillock that penetrates the inorganic film and reaches the protective film OPAS is formed through the portion from which the aluminum oxide has been removed, so that the protective film OPAS is hardly peeled off. It has become.

Example 20.
FIG. 25 is a block diagram showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
The difference from FIG. 24 is that an opening is also formed in the inorganic film so as to coincide with the portion of the gate signal line GL or the drain signal line DL from which the aluminum oxide has been removed.
The growth of the hillock to the protective film OPAS is facilitated, and the structure becomes more effective.

Example 21.
FIG. 26A is a plan view showing another embodiment of the liquid crystal display device according to the present invention. FIG. 26B is a cross-sectional view taken along the line bb in FIG.
This figure is a plan view showing the upper right corner of the liquid crystal display AR. A covering layer CVL is formed on the end face of the protective film OPAS so as to cover the entire circumference.
The coating layer CVL may be any of an organic film, an inorganic film, a transparent conductive layer, and a metal material.
That is, the edge of the protective film OPAS that easily peels off is covered with the coating layer CVL.

Example 22.
FIG. 27 is a plan view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
A configuration different from that in FIG. 26A is that the coating layer CVL is intermittently formed along the edge of the protective film OPAS.
Even if it does in this way, there exists an effect similar to the case of Example 21. FIG.

Example 23.
FIG. 28 is a plan view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
A configuration different from that in FIG. 26B is that a conductive layer is used as the covering layer CVL covering the edge of the protective film OPAS. In this case, the conductive layer is formed simultaneously with the formation of the electrode. It is preferable. This is because the number of manufacturing steps is not increased and the side wall surface of the edge of the protective film OPAS is protected from contact with any of the developer, cleaning solution, etching solution, and resist stripping solution for electrode patterning. .
FIGS. 29A to 29E are process diagrams showing an example of forming the conductive layer formed simultaneously with the formation of the electrodes. In the step shown in FIG. 29C, the end surface of the protective film OPAS is protected from the resist developer by the resist and the electrode layer, and in the step shown in FIG. 29D, the end surface of the protective film OPAS is protected from the etching solution by the resist and the electrode layer. In the step shown in FIG. 29E, the end face of the protective film OPAS is protected from the resist stripping solution by the electrode layer.

Example 24.
FIG. 30 is a sectional view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
The structure different from that in FIG. 28 is that the conductive material covering the end face of the protective film OPAS is electrically connected to a signal line (gate signal line GL or drain signal line DL) formed under the inorganic film. The terminal is configured.
This terminal can function as, for example, an inspection terminal TT.
In this figure, the terminal and the signal line are connected through a through hole formed in the inorganic film. For example, as shown in FIG. 31, a protective film OPAS and a through hole penetrating the inorganic film are provided. Of course, it may be made to connect through.

Example 25.
FIG. 32 is a sectional view showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
The difference from FIG. 26B is that the angle θ of the end face of the protective film OPAS with respect to the surface of the transparent substrate SUB1 is set in the range of 10 ° to 80 °.
This is because when the angle is larger than 80 °, the formation of the protective film OPAS tends to be insufficient, and disconnection is likely to occur. Further, when the angle is smaller than 10 °, the distance between the upper side and the lower side as the cross-sectional structure of the protective film OPAS is too wide, and the end face of the protective film OPAS is likely to be rolled up.
When the coating layer CVL also serves as an inspection electrode, the angle θ of the end surface of the protective film OPAS with respect to the surface of the transparent substrate SUB1 is preferably set in the range of 10 ° to 70 °. This is to facilitate contact with the inspection needle during the inspection.
Further, as shown in FIG. 33, it is desirable that the protruding amount L of the covering layer CVL from the lower side end portion of the protective film OPAS is 10 μm or more. This is for preventing the lower end portion of the protective film OPAS from being lifted.

Example 26.
FIG. 34 (a) is a plan view showing another embodiment of the liquid crystal display device according to the present invention, and FIG. 34 (b) is a cross-sectional view taken along the line bb of FIG. 34 (a). This figure is a plan view showing the upper right corner of the liquid crystal display AR.
The configuration of each pixel is substantially the same as shown in FIG. 1 (in this case, the drain signal line DL, the pixel electrode PX, and the counter electrode CT may be linear), and the counter electrode CT is It is formed on the upper surface of the protective film OPAS.
The covering layer CVL covering the end face of the protective film OPAS is formed by extending the counter electrode CT as it is.
In this case, the area of the coating layer CVL covering the protective film OPAS is greatly expanded, and the protective film OPAS can be completely peeled off. In addition, since the counter voltage signal line CL that supplies a voltage to the counter electrode CT is also used, the electrical resistance value can be greatly reduced.
When a dummy liquid crystal display unit DAR or the like is substantially formed around a region that becomes the liquid crystal display unit AR, the electrodes formed on the protective film OPAS in each pixel region of the dummy liquid crystal display unit DAR are extended as they are. Of course, the coating layer CVL may be formed.

Example 27.
FIG. 35 to FIG. 38 show each aspect of the formation pattern of the covering layer CVL covering the edge of the protective film OPAS.
FIG. 35 is formed intermittently along the edge of the protective film OPAS, FIG. 36 is formed on the edge parallel to the y direction among the edges of the protective film OPAS, and FIG. 37 is the x of the protective film OPAS. FIG. 37 shows an end side parallel to the x direction and an end side parallel to the y direction of the protective film OPAS, which are formed separately on the end side parallel to the direction and the end side parallel to the y direction. It shows what was formed in a continuous state.
Needless to say, the form of the formation pattern of the covering layer CVL covering the edge of the protective film OPAS is not limited to the above.

Example 28.
FIG. 39 is a block diagram showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
A configuration different from FIG. 34 is that the extended portion of the counter electrode CT formed on the upper surface of the protective film OPAS and the inspection terminal TT cover the edge of the protective film OPAS. .
That is, in the region where the inspection terminal TT is formed, the extension portion of the counter electrode CT avoids the region and covers the end of the protective film OPAS in the other region. is there.
Note that such a configuration is not necessarily limited to the one in which an electrode or the like is formed on the upper surface of the protective film OPAS. As shown in FIG. 40, for example, separate terminals arranged alternately with the inspection terminals TT are provided. The protective film OPAS may be formed so as to cover the edge of the protective film OPAS.

Example 29.
FIG. 41 is a block diagram showing another embodiment of the liquid crystal display device according to the present invention and corresponds to FIG.
The configuration different from that in FIG. 39 is a portion in which the formation portion of the sealing material SL is clarified, and the sealing material SL is formed on the coating layer CVL extending from the edge of the protective film OPAS to the edge of the transparent substrate SUB1. It is formed so as to overlap.
The covering layer CVL can be prevented from being peeled off by the sealing material SL, which can also reliably prevent the protective film OPAS from peeling off. In particular, resistance to vibration and impact after the product is completed is improved.
For the same purpose, for example, as shown in FIG. 42, the sealing material SL has the same effect even if it is formed along the edge of the protective film OPAS.

Example 30. FIG.
Each of the above-described embodiments describes a liquid crystal display device. However, in the organic EL display device, the gate signal line and the drain signal line are formed on the substrate surface in the same pattern as described above, and the organic material layer is formed over almost the entire display surface. Needless to say, the present invention can also be applied to other display devices including an EL display device.

Hereinafter, a schematic configuration of the organic EL display device will be described.
FIG. 43 is a plan view showing an embodiment of the organic EL display device. 44 is a sectional view taken along line IVIV-IVIV in FIG. 43, FIG. 45 is a sectional view taken along line IVV-IVV in FIG. 43, and FIG. 46 is a sectional view taken along line IVVI-IVVI in FIG.
In each figure, a semiconductor layer PS made of a polysilicon layer extending in the x direction is formed, for example, at a lower left portion of each pixel region on the surface of the substrate SUB. The semiconductor layer PS becomes a semiconductor layer of the thin film transistor TFT.

An insulating film GI is formed on the surface of the substrate SUB, covering the semiconductor layer PS. This insulating film GI functions as a gate insulating film in the formation region of the thin film transistor TFT.
A gate signal line GL extending in the x direction and arranged in parallel in the y direction is formed on the surface of the insulating film GI. The gate signal line GL is formed so as to define the pixel region with a drain signal line DL described later.

In addition, the gate signal line GL is formed with an extension part extending so as to cross almost the central part of the semiconductor layer PS, and this extension part functions as the gate electrode GT of the thin film transistor TFT. It is supposed to be.
After the formation of the gate electrode GT, impurity ions are implanted using the gate electrode GT as a mask so that the resistance of the semiconductor layer PS in the region other than directly below the gate electrode GT is reduced.

  An insulating film IN is formed on the surface of the substrate SUB, covering the gate signal line GL (gate electrode GT). This insulating film IN has a function as an interlayer insulating film for the gate signal line GL in the formation region of the drain signal line DL described later.

  A drain signal line DL extending in the y direction and arranged in parallel in the x direction is formed on the surface of the insulating film IN. A part of the drain signal line DL extends to one end portion of the semiconductor layer PS, and is connected to the semiconductor layer PS through a through hole formed in advance through the insulating film IN and the insulating film GI. That is, the extending portion of the drain signal line DL functions as the drain electrode SD1 of the thin film transistor TFT.

  The other end of the semiconductor layer PS is formed with a source electrode SD2 that penetrates the insulating film IN and the insulating film GI and is connected through a pre-formed through hole. The source electrode SD2 is a pixel electrode PX described later. An extending portion for connection to the dome is formed.

An insulating film IL is formed on the surface of the substrate SUB on which the drain signal line DL (drain electrode SD1) and the source electrode SD2 are thus formed.
On the upper surface of the insulating film IL, a pixel electrode PX is formed in the center except for a slight periphery of each pixel region. The pixel electrode PX is connected to the source electrode SD2 of the thin film transistor TFT through a through hole formed in the insulating film IL. It is connected.

A light emitting material layer FLR is formed on the upper surface of the pixel electrode PX via a hole injection layer HP, and this light emitting material layer FLR passes through a bank film BNK made up of a light emitting material layer and an organic material layer in another adjacent pixel region. It is drawn.
A common electrode CT common to each pixel region is formed on the upper surfaces of the light emitting material layer FLR and the bank film BNK, and a protective film PSV is formed on the upper surface of the common electrode CT.

  When a current flows through the light emitting material layer FLR interposed between the pixel electrode PX and the counter electrode CT, the light emitting material layer FLR emits light, and at least one of the pixel electrode PX and the counter electrode CT is connected to the ITO. By using a light-transmitting conductive material such as IZO or ITZO, the light can be visually observed.

The organic EL display device configured in this way uses an organic material layer in the display portion, and since a conductive film must be formed on the upper surface thereof, the situation is the same as the above-described liquid crystal display device. Similar challenges arise.
From this, each Example mentioned above can be applied also to this organic EL display device.

It is a top view which shows one Example of the pixel of the display apparatus by this invention. 1 is an overall equivalent circuit diagram showing an embodiment of a display device according to the present invention. It is a whole top view which shows one Example of the display apparatus by this invention. It is sectional drawing in the IV-IV line of FIG. It is sectional drawing in the VV line of FIG. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is a block diagram which shows the other Example of the pixel of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is a block diagram which shows the other Example of the pixel of the display apparatus by this invention. It is a block diagram which shows the other Example of the pixel of the display apparatus by this invention. It is a top view which shows the other Example of the pixel of the display apparatus by this invention. It is a block diagram which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is explanatory drawing which shows the other Example of the display apparatus by this invention. It is a block diagram which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is a block diagram which shows the other Example of the display apparatus by this invention. It is a top view which shows the other Example of the display apparatus by this invention. It is explanatory drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is a block diagram which shows the other Example of the display apparatus by this invention. It is a top view which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is a top view which shows one Example of the manufacturing method of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is a block diagram which shows the other Example of the display apparatus by this invention. It is a top view which shows the other Example of the display apparatus by this invention. It is a top view which shows the other Example of the display apparatus by this invention. It is a top view which shows the other Example of the display apparatus by this invention. It is a top view which shows the other Example of the display apparatus by this invention. It is a block diagram which shows the other Example of the display apparatus by this invention. It is a top view which shows the other Example of the display apparatus by this invention. It is a block diagram which shows the other Example of the display apparatus by this invention. It is sectional drawing which shows the other Example of the display apparatus by this invention. It is a top view which shows the other Example of the display apparatus by this invention. It is sectional drawing in the IVIV-IVIV line | wire of FIG. It is sectional drawing in the IVV-IVV line | wire of FIG. It is sectional drawing in the IVVI-IVVI line | wire of FIG.

Explanation of symbols

SUB ... Substrate, GL ... Gate signal line, DL ... Drain signal line, CL ... Counter voltage signal line, TFT ... Thin film transistor, PX ... Pixel electrode, CT ... Counter electrode, PAS ... Protective film (inorganic material layer), OPAS ... Protection Film (organic material layer), AR ... liquid crystal display unit, DAR ... dummy liquid crystal display unit, CVL ... coating layer, TT ... terminal for inspection, FLR ... light emitting material layer, BNK ... bank film.

Claims (1)

On the substrate surface, a plurality of gate signal lines arranged side by side and a plurality of drain signal lines arranged side by side crossing these gate signal lines are formed,
A group of pixel regions surrounded by these signal lines is used as a display unit. In each pixel region, a switching element that is activated by a scanning signal from a gate signal line, and a video signal from a drain signal line is passed through the switching element. a pixel electrode which is supplied, and an opposed been counter electrode via the pixel electrode and the light emission material layer,
With the bank layer is formed of an organic material formed to demarcating the respective light emission material layer of the pixel regions adjacent to each other,
The bank layer is formed over the display unit, in addition to the insulating film formed on the lower layer, the display device characterized by interspersed opened or juxtaposed grooves are formed.

Images