JP4354317B2 - IC tag and manufacturing method thereof - Google Patents

Description

  The present invention relates to a combination of two or more IC tags that damage a built-in electronic circuit when peeled after being attached to an article, and a method for manufacturing the same.

In recent years, an IC tag is attached to an article such as a product, a stored item, or a baggage to manage the article. For example, an IC tag on which information such as manufacturing conditions, purchase status, price information, and usage status is recorded is attached to the product, and the recorded information is checked and managed by an interrogator (interrogator) as necessary. To be done.
However, when the adhesive force of the adhesive used for the IC tag attached to the article is not sufficient, it may be replaced with another article for some reason such as error or carelessness. In some cases, it may be intentionally attached to another article.
In such a situation, the article management can no longer be performed accurately.
As a conventional IC tag, a technique has been proposed in which when a base material bonded to the tag surface is tampered with, the surface base material causes in-layer destruction and enhances the forgery prevention effect (see Patent Document 1).

However, a cut is made at the interface between the adhesive layer of the IC tag affixed to the article and the article with a cutter, a finger or the like is inserted into the notch, the edge of the IC tag is picked, and the IC tag is peeled off to remove the electronic circuit surface. There is a problem that the electronic circuit surface and the surface base material can be easily peeled off without being destroyed.
In order to improve this, the present inventors provided a planar protrusion on the circuit line, and further provided a separation treatment portion on the surface of the planar protrusion, so that when the IC tag is removed, the vicinity of the planar protrusion is removed. An IC tag in which circuit lines are easily cut has been proposed (see Patent Documents 2 and 3).
Japanese Patent Laid-Open No. 10-171962 Japanese Patent Application No. 2003-014081 Japanese Patent Application No. 2003-352892

However, if the arrangement position of the planar protrusions in the electronic circuit is constant, there is a problem that the IC tag can be skillfully peeled off and replaced with another article by predicting the arrangement position.
The present invention provides an IC tag that makes it difficult to predict the arrangement position of the planar protrusions, so that when the IC tag is peeled off, the function of the IC tag is impaired, and the IC tag can be prevented from being replaced with another article. The purpose is to do.

As a result of intensive studies to solve the above problems, the present inventor has found that the above problems can be solved by combining two or more IC tags having different planar protrusion arrangement positions, thereby completing the present invention. It was.
That is, according to the present invention, the first adhesive layer is laminated on the surface of the base sheet, and the surface of the first adhesive layer is composed of a circuit line or a circuit line having a detour. An electronic circuit extending to a route or a detour, and an IC chip connected to the electronic circuit, and a second adhesive layer covering the electronic circuit and the IC chip is laminated; and A release agent layer is partially provided at a position corresponding to a circuit surface formed by an electronic circuit and an IC chip, which is an interface between the base material sheet and the first adhesive layer, and the planar protrusion is formed of the circuit A combination of two or more types of IC tags provided at least one in a plane and at a position where a release agent layer is provided , wherein at least two types of IC tags are installed positions of the planar protrusions The first IC tag and the second IC tag are different from each other. Ri, distance planar projections of different said installation position in the second IC tag is most inner ring circuit line longitudinal of the electronic circuit from the installation position of the planar protrusions having different said installation position in the first IC tag there is provided an IC tag assembly, characterized in that you are provided in more than 10% different locations.
In the present invention, the first adhesive layer is laminated on the surface of the base sheet, and the surface of the first adhesive layer is composed of a circuit line or a circuit line having a detour. An electronic circuit extending to a route or a detour, and an IC chip connected to the electronic circuit, and a second adhesive layer covering the electronic circuit and the IC chip is laminated; and A release agent layer is partially provided at a position corresponding to a circuit surface formed by an electronic circuit and an IC chip, which is an interface between the base material sheet and the first adhesive layer, and the planar protrusion is formed of the circuit A combination of two or more types of IC tags provided in the surface and at a position where the release agent layer is provided, wherein at least two types of IC tags are provided with the release agent layer. The installation positions of the planar protrusions provided at the The first IC tag and the second IC tag are different from each other, and the planar protrusions having different installation positions in the second IC tag are different from the installation positions of the planar protrusions having different installation positions in the first IC tag. An IC tag assembly is provided, which is provided at a position different by 10% or more of the distance in the longitudinal direction of the circuit line of the innermost ring of the electronic circuit.

Further, in the above IC tag assembly, in which a circuit line of an electronic circuit, to provide gold, silver, nickel, an IC tag assembly is formed of a metal foil of copper or aluminum.
The present invention also provides an IC tag assembly in which the circuit lines of the electronic circuit are made of copper foil.
Further, according to the present invention, in the IC tag assembly, the planar protrusion has a formula S ≧ (2W) ² (where S is the area of the planar protrusion, and W is a circuit line adjacent to the planar protrusion. The IC tag aggregate having the area required by the line width) is provided.
Further, in the above IC tag assembly, there is provided an IC tag assembly tangent angle of the tangent of the circuit line of the detour is not less than 10 degrees at the connection point of the bypass passage and the circuit line.

In the present invention, the first adhesive layer is laminated on the surface of the base sheet, and the surface of the first adhesive layer is composed of a circuit line or a circuit line having a detour. An electronic circuit extending to a route or a detour, and an IC chip connected to the electronic circuit, and a second adhesive layer covering the electronic circuit and the IC chip is laminated; and A release agent layer is partially provided at a position corresponding to a circuit surface formed by an electronic circuit and an IC chip, which is an interface between the base material sheet and the first adhesive layer, and the planar protrusion is formed of the circuit a first IC tag provided at least one in the position provided with the release agent layer a plane, is provided at a position that is provided with the release agent layer of the first IC tag and installation position of the planar projections of a different IC tag, different said installation position The second IC planar projections that provided more than 10% different from a position at a distance of the top inner circuit line longitudinal of the electronic circuit from the installation position of the different planar projection of the installation position of the first IC tag the IC tag assembly comprising a tag into pieces is to provide a method of manufacturing an IC tag which is characterized by the production of IC tag.
In the present invention, the first adhesive layer is laminated on the surface of the base sheet, and the surface of the first adhesive layer is composed of a circuit line or a circuit line having a detour. An electronic circuit extending to a route or a detour, and an IC chip connected to the electronic circuit, and a second adhesive layer covering the electronic circuit and the IC chip is laminated; and A release agent layer is partially provided at a position corresponding to a circuit surface formed by an electronic circuit and an IC chip, which is an interface between the base material sheet and the first adhesive layer, and the planar protrusion is formed of the circuit 1st IC tag provided in the position where the release agent layer is provided in the surface, and provided in the position where the release agent layer of the first IC tag is provided IC tags with different installation positions of planar protrusions, with different installation positions A second IC in which a planar protrusion is provided at a position that differs by 10% or more of the distance in the longitudinal direction of the circuit line of the innermost ring of the electronic circuit from the installation position of the planar protrusion having a different installation position of the first IC tag. An IC tag manufacturing method is provided, in which an IC tag is manufactured by dividing an IC tag assembly including tags into individual pieces.

Further, according to the present invention, in the IC tag manufacturing method, the IC tag assembly includes a first adhesive layer laminated on the surface of the base sheet, and an electronic circuit and an IC are formed on the surface of the first adhesive layer. A release agent layer is partially provided at a position corresponding to a circuit surface formed by a chip, and is composed of a circuit line having a circuit line or a detour on the surface of the first adhesive layer, and a planar protrusion is a circuit line or is Nobese' the detour, the planar projection, the first electronic circuit is provided to at least one position that is provided with the release agent layer a said circuit surface, wherein the first electronic circuit An electronic circuit having different installation positions of the planar protrusions provided at the position where the release agent layer is provided , wherein the planar protrusions having different installation positions have different installation positions of the first electronic circuit. distance from the installation position of the Jo projection of the top inner circuit line longitudinal electronic circuit Of a second electronic circuit that provided 10% or more different positions provided, then the IC chip to be connected to these electronic circuits is provided, the second adhesive layer covering these electronic circuits and IC chips The present invention provides a method for producing an IC tag obtained by laminating.

  The IC tag of the present invention makes it difficult to predict the arrangement position of the planar protrusion, and when the IC tag is peeled off, the circuit line or detour in the vicinity of the planar protrusion is easily cut, and the function of the IC tag is impaired. In this way, it is possible to prevent reattachment to another article.

The IC tag of the present invention will be described with reference to the drawings. FIG. 1 shows a schematic sectional view of an example of each IC tag of the present invention.
The base sheet 1 is preferably a sheet made of a thermoplastic resin. Examples of the thermoplastic resin sheet include polyethylene resins such as high density polyethylene, medium density polyethylene, and low density polyethylene, polypropylene resins such as polypropylene, polymethyl-1-pentene / ethylene / cycloolefin copolymer, ethylene- Polyolefin resins such as vinyl acetate copolymer, polyester resins such as polyethylene terephthalate, polyethylene naphthalate, polybutylene terephthalate, polyvinyl chloride resin, polyvinyl alcohol resin, polycarbonate resin, polyamide resin, polyimide resin, fluorine resin, or Sheets made of various synthetic resins such as copolymers, polymer blends, and polymer alloys containing any of these can be used. In particular, sheets made of polyester resins are preferably used. It is.

The base sheet 1 may be uniaxially stretched or biaxially stretched. The base sheet 1 may be a single layer or a multilayer of two or more layers of the same type or different types. The base sheet 1 is preferably water resistant. If it is water resistant, it will not break even if it gets wet. In addition, the base sheet 1 is preferably concealable, and when the base sheet 1 is not concealable, it is preferable to paste a concealable sheet on the surface of the base sheet 1.
Although the thickness in particular of the base material sheet 1 does not have a restriction | limiting, Usually, what is necessary is just 10-250 micrometers, Preferably it is 20-100 micrometers.

In order to increase the adhesive force between the base sheet 1 and the first adhesive layer 2, the surface of the base sheet 1 may be surface-treated. Examples of the surface treatment method include corona discharge treatment, chemical treatment, and resin coating.
Examples of the adhesive used for the first adhesive layer 2 include various adhesives such as a hot-melt adhesive, a pressure-sensitive adhesive, and a thermosetting adhesive. Examples of adhesive types include natural rubber adhesives, synthetic rubber adhesives, acrylic resin adhesives, polyester resin adhesives, polyvinyl ether resin adhesives, urethane resin adhesives, and silicone resin adhesives. Agents and the like.

  Specific examples of the synthetic rubber adhesive include styrene-butadiene rubber, polyisobutylene rubber, isobutylene-isoprene rubber, isoprene rubber, styrene-isoprene block copolymer, styrene-butadiene block copolymer, styrene-ethylene-butylene block. Examples thereof include copolymers and ethylene-vinyl acetate thermoplastic elastomers. Specific examples of acrylic resin adhesives include acrylic acid, methyl acrylate, ethyl acrylate, propyl acrylate, butyl acrylate, 2-ethylhexyl acrylate, methyl methacrylate, ethyl methacrylate, butyl methacrylate, acrylonitrile Homopolymers or copolymers such as The polyester resin adhesive is a copolymer of a polyhydric alcohol and a polybasic acid. Examples of the polyhydric alcohol include ethylene glycol, propylene glycol, and butanediol. Polybasic acids include terephthalic acid and adipic acid. And maleic acid. Specific examples of the polyvinyl ether resin adhesive include polyvinyl ether and polyvinyl isobutyl ether. Specific examples of the silicone resin adhesive include dimethylpolysiloxane. These adhesives can be used individually by 1 type or in combination of 2 or more types.

The first adhesive layer 2 may contain a tackifier, a softener, an anti-aging agent, a colorant such as a filler, a dye or a pigment, if necessary. Examples of the tackifier include rosin resin, terpene phenol resin, terpene resin, aromatic hydrocarbon-modified terpene resin, petroleum resin, coumarone / indene resin, styrene resin, phenol resin, xylene resin and the like. Examples of the softener include process oil, liquid rubber, and plasticizer. Examples of the filler include silica, talc, clay, calcium carbonate and the like.
Although the thickness in particular of the 1st adhesive bond layer 2 does not have a restriction | limiting, Usually, what is necessary is just 1-100 micrometers, Preferably it is 3-50 micrometers.

In each IC tag of the present invention, a release agent is partially formed at the interface between the base sheet 1 and the first adhesive layer 2 at a position corresponding to the circuit surface 13 formed by the electronic circuit 3 and the IC chip 6. Layer 7 is provided. Two or more release agent layers 7 are provided at intervals. The shape and size of the release agent layer 7 and the interval between the release agent layers 7 are not particularly limited, and can be various shapes, sizes and intervals.
For example, the release agent layer 7 may be provided so as to cover the entire surface corresponding to both ends of the circuit surface 13, or the entire surface corresponding to both ends of the circuit surface 13 as shown in FIG. 2. There may be a portion that is not covered but partially covered. Further, as shown in FIG. 3, a release agent layer 7 may be further provided at a position corresponding to the intermediate portion of the circuit surface 13, but a portion not covered with the release agent layer 7 is left. Further, the release agent layer 7 may be provided at a position corresponding to an intermediate portion of the circuit surface 13 without being provided at positions corresponding to both end portions of the circuit surface 13.

By adopting such a structure, the first adhesive layer 2 is directly laminated on the surface of the base sheet 1 at a position where the release agent layer 7 is not present, and at the position where the release agent layer 7 is present. The first adhesive layer 2 is directly laminated on the release agent layer 7. When the IC tag is peeled off after being attached to an article, for example, at a position where the release agent layer 7 is present, the first adhesive layer 2 is peeled off at the interface with the release agent layer 7 and at a position where the release agent layer 7 is not present. The electronic circuit 3 is peeled off at the interface between the article and the second adhesive layer 5 or inside the second adhesive layer 5, and the electronic circuit 3 remains adhered to the first adhesive layer 2 together with the base sheet 1. The electronic circuit 3 is cut off.
The release agent layer 7 is preferably provided so as to cover 20 to 90% of the area surrounded by the outer periphery of the circuit surface 13 via the first adhesive layer 2, and is provided so as to cover 40 to 80%. It is particularly preferred.

The release agent layer 7 is preferably provided so as to protrude outward beyond the outer periphery of the circuit surface 13, and the protrusion width is not particularly limited, but is preferably 1 mm or more.
The shape of the release agent layer 7 is preferably a triangle, a quadrangle, a pentagon or more polygon, an ellipse, a circle, or the like (see FIGS. 2 and 3). The shapes of the two release agent layers 7 may be the same or different. The two release agent layers 7 are preferably completely separated and independent, but may be partially connected.
Examples of the release agent used for the release agent layer 7 include release agents such as silicone resins, long-chain alkyl resins, and fluorine resins.
The thickness of the release agent layer 7 is not particularly limited, but is preferably 0.01 to 5 μm, and particularly preferably 0.03 to 1 μm.

In each IC tag of the present invention, an electronic circuit 3 is provided on the surface of the first adhesive layer 2.
The electronic circuit 3 is composed of circuit lines 4 made of a conductive material. Examples of the conductive substance include a metal simple substance such as a metal foil, a deposited film, and a thin film formed by sputtering. Gold, silver, nickel, copper, aluminum, etc. can be used as the metal simple substance. Further, as the conductive substance, a conductive paste in which metal particles such as gold, silver, nickel, and copper are dispersed in a binder can be used.
1-15 micrometers is preferable and, as for the average particle diameter of a metal particle, 2-10 micrometers is especially preferable. Examples of the binder include polyester resin, polyurethane resin, epoxy resin, phenol resin, and the like.

The thickness of the circuit line 4 constituting the electronic circuit is not particularly limited, but is 5 to 50 μm in the case of a metal foil, 0.01 to 1 μm in the case of a deposited film or a metal film formed by sputtering, and 5 to 30 μm in the case of a conductive paste. It is preferable that
Although there is no restriction | limiting in particular in the width | variety of the circuit wire 4, 0.01-10 mm is preferable and 0.1-3 mm is especially preferable.
In order to form the electronic circuit 3 on the first adhesive layer 2, for example, a metal foil is bonded to the base sheet 1 with an adhesive, and the metal foil is etched to remove portions other than the circuit. And a method of forming the electronic circuit 3. The etching process can be performed by a process similar to a normal etching process. The electronic circuit 3 can also be formed on the surface of the first adhesive layer 2 by attaching a conductive paste to the shape of the electronic circuit 3 by means of printing, coating, or the like.

Examples of the shape of the electronic circuit 3 include those shown in FIGS. 2 and 3. In FIG. 2 and FIG. 3, the circuit line 4 made of a single conductive material line is arranged in a ten-fold annular shape from the outer periphery of the rectangular base sheet 1 toward the inner side with a predetermined interval therebetween. The electronic circuit 3 is formed. The electronic circuit 3 may be arranged in a ten-folded ring as shown in FIGS. 2 and 3, but may be a single-nine-folded ring or an eleven-fold or more ring.
The circuit line 4 of the electronic circuit 3 may have a detour 8. The circuit line 4 having the detour 8 may be the innermost circuit line 4, the outermost circuit line 4, or any of the circuit lines 4 in the middle. Is preferably the innermost circuit line 4. The angle between the tangent 15 of the detour 8 and the tangent 16 of the circuit line 4 at the connection point 14 between the detour 8 and the circuit line 4 is described as an angle θ in FIG. The angle θ is preferably 10 degrees or more, more preferably 45 degrees or more, and particularly preferably 80 degrees or more. Moreover, the upper limit of angle (theta) should just be less than 180 degree | times.

The shape of the detour 8 is not particularly limited, and is a shape that lacks a part of an outer peripheral line such as a circle or an ellipse, a shape that lacks one side of a triangular outer periphery, or a square outer periphery such as a square, rectangle, rhombus, or trapezoid Various shapes such as a shape lacking one side of a line and a shape lacking one side of a polygonal peripheral line of pentagon or more are included.
When the detour 8 is provided on the circuit line 4 of the innermost ring, the size of the detour 8 may be smaller than the empty portion surrounded by the electronic circuit. When provided on the route 4, it may be smaller than the size of the IC tag. Further, the distance from the farthest part of the detour 8 farthest away from the circuit line 4 to the circuit line 4 is preferably 2 mm or more.

The thickness of the detour 8 is not particularly limited, but is preferably 5 to 50 μm in the case of a metal foil, 0.01 to 1 μm in the case of a deposited film or a metal film by sputtering, and 5 to 30 μm in the case of a conductive paste. .
The line width of the detour route 8 is not particularly limited, but is preferably 0.01 to 10 mm, and particularly preferably 0.10 to 3 mm.
The number of detours 8 is preferably 1-10, and particularly preferably 1-5. When a plurality of detours 8 are provided, the plurality of detours 8 may have the same shape and / or size, or may be different.

A planar protrusion 9 is extended on the circuit line 4 or the detour 8.
The shape of the planar protrusion 9 is preferably a target shape such as a square, a regular hexagon, a regular octagon, a regular decagon, or a target shape such as a circle, a circle, or a similar shape.
The planar protrusion 9 has an area determined by the formula S ≧ (2W) ² (wherein S is the area of the planar protrusion and W is the line width of the circuit line adjacent to the planar protrusion). Those having an area determined by the formula S ≧ (4W) ² (wherein S and W are the same as described above) are particularly preferable.
The upper limit of the area of the planar protrusion 9 is preferably 10% or less, more preferably 5% or less, and particularly preferably 3% or less with respect to the area of the empty part surrounded by the electronic circuit. When there are a plurality of planar protrusions 9, the total area of the plurality of planar protrusions 9 is preferably 50% or less, and particularly preferably 40% or less, with respect to the area of the empty portion surrounded by the electronic circuit.

The thickness of the planar protrusion 9 is the same as the thickness of the electronic circuit, and the preferred range is also the same.
The planar protrusion 9 may extend directly to the circuit line 4 or the detour 8 of the electronic circuit 3, or the coupling line 10 is connected between the circuit line 4 or the detour 8 and the planar protrusion 9. It may be extended. By doing so, as shown in FIG. 4, a notch 17 is made in advance with a cutter knife or the like, and when it is peeled off from this portion, the portion of the planar protrusion 9 and the detour 8 where the release agent layer 7 is located is the first. In a state where the adhesive layer 2 and the second adhesive layer 5 are adhered, the first adhesive layer 2 is peeled off at the interface with the release agent layer 7, and at a position where the release agent layer 7 is not present, It is shredded at the interface with the second adhesive layer 5 or inside the second adhesive layer 5, and the electronic circuit 3 is peeled off together with the base sheet 1 while being adhered to the first adhesive layer 2. The electronic circuit 3 is disconnected.

When the coupling line 10 is provided, the length is preferably 10 times or less the width of the circuit line 4 to be connected. If the coupling line 10 is too long, the antenna function may be impaired.
The width of the coupling line 10 is preferably 1/2 to 2 times the width of the circuit line 4.
The planar protrusion 9 may extend to the circuit line 4 of the innermost ring of the electronic circuit, or may extend to the circuit line 4 of the outermost ring. You may extend in any circuit line 4 of the route 4. When the planar protrusion 9 is extended to the intermediate circuit line 4, the outer circuit line 4 is formed avoiding the planar protrusion 9.
The number of planar protrusions 9 is not particularly limited as long as it is within a range that does not impair radio wave characteristics, but 1 to 10 is preferable, and 1 to 5 is particularly preferable. When a plurality of planar protrusions 9 are provided, the plurality of planar protrusions 9 may have the same shape and / or different sizes, but are preferably different.

The material of the detour 8 is the same material as the circuit line 4 of the electronic circuit, and is preferably integrated.
The planar protrusion 9 may be made of any material as long as the planar protrusion 9 has an adhesive property so that the planar protrusion 9 does not peel off from the detour 8 or the coupling line 10 of the circuit line 4 of the electronic circuit when the IC tag of the present invention is peeled off. For example, various materials such as conductive materials, acrylic resins, polyester resins, and the like, which are materials for electronic circuits, may be mentioned, but the same material as the circuit lines 4 or the bonding wires 10 of the electronic circuit is preferable for manufacturing, and is integrated. Particularly preferred is
The bonding wire 10 may be made of any material as long as the bonding wire 10 has an adhesive property so that the bonding wire 10 is not peeled off from the bypass 8 and the planar protrusion 9 of the circuit line 4 of the electronic circuit when the IC tag of the present invention is peeled off. For example, a conductive material that is a material of the electronic circuit can be used, and the same material as the circuit line 4 or the coupling line 10 of the electronic circuit is particularly preferable.

There are various methods for extending the detour 8, the planar protrusion 9 and / or the coupling line 10 to the circuit line 4 of the electronic circuit 3. For example, the detour 8, the planar protrusion 9 and / or the metal foil is used. Alternatively, a method of forming an electronic circuit together with the coupling wire 10 by etching, a method of forming a detour 8 on the circuit line 4 of the electronic circuit 3 by printing or coating, and the like can be mentioned. And / or a method of forming an electronic circuit together with the bond line 10 by etching is particularly preferred.
The planar protrusion 9 is preferably provided at a position in contact with the first adhesive layer 2.
Although the release agent layer 7 is partially provided at the interface between the base sheet 1 and the first adhesive layer 2, the detour 8 may be provided in a place without the release agent layer 7, It is particularly preferable that at least one of the detours 8 is provided in a place where the release agent layer 7 is present in the circuit plane. Further, when the planar protrusion 9 is extended on the detour 8, at least one of the detours 8 on which the planar protrusion 9 is extended is a place where the release agent layer 7 is located in the circuit plane. It is preferable to provide in.

The present invention relates to a combination of two or more types of IC tags having different installation positions of the planar protrusions 9, but a combination of three or more types of IC tags having different installation positions of the planar protrusions 9 is preferable. A combination of four or more types of IC tags having different installation positions of the protrusions 9 is particularly preferable. The upper limit of the types of IC tags with different installation positions of the planar protrusions 9 is not particularly limited and is preferably large. However, there is a problem if the number is too large from the viewpoint of manufacturing efficiency, and it may be selected as appropriate. Usually, it may be 20 or less. Further, the combination may include an IC tag having the same installation position of the planar protrusion 9.
In the present invention, each of these IC tags has at least one, preferably at least 2, and particularly preferably at least three planar protrusions 9 of the electronic circuit at a distance 10 in the longitudinal direction of the circuit line of the innermost ring of the electronic circuit. % Or more, preferably 20% or more of the projections 9 provided at different positions are moved.

The movement of the planar protrusion 9 is not limited to the longitudinal direction of the circuit line of the innermost ring of the electronic circuit, but may be a short direction.
It is preferable that the planar protrusions 9 not only have different installation positions but also have at least one planar protrusion 9 having a different shape.
Furthermore, the planar protrusions 9 may not only have different installation positions, but may be extended to a detour or a circuit line by providing a detour or deleting the detour.
An IC chip 6 is connected to both ends of the electronic circuit 3. The IC chip 6 may be provided inside the electronic circuit 3, may be provided outside the electronic circuit 3, or may be provided above the electronic circuit 3.

In order to connect the end of the electronic circuit 3 of the outermost ring and the innermost ring with the IC chip 6, the end of the electronic circuit 3 of the outermost ring or innermost ring jumps out without being short-circuited with the annular electronic circuit 3 ( It is preferable to extend inside or outside the jumper circuit) or the electronic circuit 3 and connect to the IC chip 6.
The jumper circuit 18 is formed by forming an insulating layer 20 by printing an insulating ink in a band shape by screen printing or the like across the annular electronic circuit 3 from the end of the electronic circuit 3 and then forming the insulating layer 20. A method of forming a conductive circuit line 4 by printing a conductive paste on the line 20 by screen printing or the like. The conductive paste is exemplified above. Examples of the insulating ink include photocurable ink such as ultraviolet curable ink.

  Examples of the method of connecting the IC chip 6 to the terminal of the electronic circuit 3 include a method of connecting to the surface of the terminal of the electronic circuit 3 by a flip chip bonding method through an anisotropic conductive film. In the flip chip bonding method, wire bumps are provided on the electrode portions of the IC chip 6, and the surface of the IC chip 6 with the wire bumps is pressed onto the anisotropic conductive film coated on the terminal surface of the electronic circuit 3. In this method, wire bumps enter into the isotropic conductive film to facilitate electrical connection between the end of the electronic circuit 3 and the IC chip 6.

In each IC tag of the present invention, the second adhesive layer 5 is laminated so as to cover the surface of the first adhesive layer 2 where the electronic circuit 3 is not provided, the electronic circuit 3 and the IC chip 6. .
Examples of the adhesive used for the second adhesive layer 5 include various adhesives such as a hot-melt adhesive, a pressure-sensitive adhesive, and a thermosetting adhesive. As a kind of adhesive agent, the thing similar to the adhesive agent used for the said 1st adhesive bond layer 2 is mentioned. These adhesives can be used alone or in combination of two or more. Of these adhesives, pressure-sensitive adhesives are preferable, and acrylic pressure-sensitive adhesives are particularly preferable.
The surface of the second adhesive layer 5 is preferably a flat surface.
The thickness of the second adhesive layer 5 is not particularly limited, but the thickness is different between the place covering the electronic circuit 3 and the IC chip 6 and the place covering the first adhesive layer 2, and the maximum thickness is usually 10. It should just be -100micrometer, Preferably it is 15-50micrometer.

The surface of the second adhesive layer 5 may be covered with a release sheet 11.
Any release sheet 11 may be used. For example, films made of various resins such as polyethylene terephthalate, polybutylene terephthalate, polyethylene, polypropylene, polyarylate, polyethylene laminated paper, polypropylene laminated paper, clay coat Various paper materials such as paper, resin-coated paper, glassine paper and the like can be used as the base material, and the surface of the base material to which the second adhesive layer 5 is bonded can be used if necessary.
In this case, as a typical example of the release treatment, formation of the release agent layer 7 made of a release agent such as a silicone resin, a long chain alkyl resin, or a fluorine resin can be mentioned.
The thickness of the release sheet 11 is not particularly limited and may be appropriately selected.

The second adhesive layer 5 may be directly applied and formed on the surface of the first adhesive layer 2 where the electronic circuit 3 is not provided, and on the electronic circuit 3 and the IC chip 6, and the release sheet 11 is applied to the surface of the release agent layer 7 to form the second adhesive layer 5, and then the surface of the first adhesive layer 2 where the electronic circuit 3 is not provided, the electronic circuit 3 and the IC chip. 6 may be pasted together.
As a method for forming the first adhesive layer 2, the second adhesive layer 5, and the release agent layer 7, various methods can be used without particular limitation. For example, an air knife coater, a blade coater, a bar coater, Gravure coater, roll coater, curtain coater, die coater, knife coater, screen coater, Meyer bar coater, kiss coater and the like.

After pasting each IC tag of the present invention to an article, in particular, an incision 17 is made with a cutter or the like at the interface between the adhesive layer of the IC tag affixed to the article and the article, and a finger or the like is inserted into the incision 17 to provide an IC. When the edge of the tag is picked and the IC tag is peeled off, as shown in FIG. 4, the portion of the detour 8 or the planar protrusion 9 at the position where the release agent layer 7 is located is bonded to the first adhesive layer 2 and the second adhesive With the adhesive layer 5 still adhered, the first adhesive layer 2 is peeled off at the interface with the release agent layer 7, and at a position where the release agent layer 7 is not present, the article and the second adhesive layer 5 The electronic circuit 3 is peeled off together with the base material sheet 1 while being bonded to the first adhesive layer 2, and the electronic circuit 3 is cut.
The IC tag manufacturing method of the present invention manufactures an IC tag by dividing an IC tag assembly composed of two or more types of IC tags having different installation positions of the planar protrusions 9 into pieces. Here, the IC tag aggregate includes two or more types of IC tags having different installation positions of the planar protrusions 9 and includes IC tags having the same installation position of the planar protrusions 9. May be. Further, to divide the IC tag aggregate into pieces means to separate each IC tag constituting the IC tag aggregate separately.

As a preferred method for producing an IC tag of the present invention, a circuit is formed by laminating a first adhesive layer on the surface of a base sheet, and forming an electronic circuit and an IC chip on the surface of the first adhesive layer. A release agent layer is partially provided at a position corresponding to the surface, and is composed of a circuit line having a circuit line or a detour on the surface of the first adhesive layer, and the planar protrusion 9 extends to the circuit line or the detour. And at least one planar protrusion 9 of the electronic circuit is moved by a distance of 10% or more of the distance in the longitudinal direction of the innermost ring of the electronic circuit. By providing one or more types of electronic circuits having different installation positions, then providing IC chips to be connected to the electronic circuits, and laminating a second adhesive layer covering the electronic circuits and the IC chips. Manufacture tag assembly, then IC tag Method of manufacturing an IC tag into pieces coalescence and the like.
The manufacturing method of the IC tag is preferably carried out continuously, and it is preferable that the base sheet 1 is used by sequentially feeding the rolls wound up in a roll shape. An IC tag can be continuously manufactured by performing each process of said manufacturing method to the sent base material sheet 1 sequentially.

  Next, the present invention will be specifically described with reference to examples. However, the present invention is not limited by these examples.

(Example 1)
On the surface of one side of a polyethylene terephthalate film (width 150 mm, length 500 mm, thickness 50 μm) as the base sheet 1, a shape as shown in FIG. 2 (angle of trapezoidal diagonal lines: 45 degrees, width of uncoated portion: 3 mm, area surrounded by the outer periphery of the electronic circuit covered with two trapezoids: about 75% of the area surrounded by the outer periphery of the electronic circuit, the length of the end of the trapezoid and the outer edge of the base sheet 1: 1 mm) A silicone resin release agent was dried on a gravure coater to a thickness of 0.05 μm and dried and cured at 130 ° C. for 1 minute to form six pairs of release agent layers 7 in a row. Next, a polyester-based hot-melt adhesive (trade name “Byron 30SS”, manufactured by Toyobo Co., Ltd.) is dried on the surface of the six sets of the release agent layer 7 and the base sheet 1 with a gravure coater. The first adhesive layer 2 was laminated so as to have a thickness of 5 μm.

Further, an electrolytic copper foil having a thickness of 35 μm was thermocompression bonded to the surface of the first adhesive layer 2 with a heat seal roll at 100 ° C. Next, on the surface of the electrolytic copper foil, as shown in FIG. 6, A, B, C Etching resist ink was printed by a screen printing method (line width: 0.15 mm) so that six patterns of the planar protrusions 9 and D of the planar protrusions 9 and D were arranged in a line. This was etched with a ferric chloride solution to remove portions other than the annular circuit wire 4, the planar protrusion 9 and the detour 8. Thereafter, the etching resist ink was removed with an alkaline aqueous solution, and six electronic circuits 3 provided with the same planar protrusions 9 and detours 8 as in FIG. 6 were formed in a row. The size of the detour 8 and the angle θ of the tangent line are such that the detour 8 having a shape that lacks the base of an isosceles triangle has a side of 7 mm and an angle θ of 75 degrees. The path 8 had a radius of 3 mm and the angle θ was 85 degrees. The triangular planar protrusions in FIG. 6 have been moved a distance of 10% or more with respect to the circuit line longitudinal direction 45 mm, and the other planar protrusions in FIG. 6 are similarly 10% with respect to the circuit line longitudinal direction 45 mm. The distance has been moved over.

In order to make the terminal of the innermost ring electronic circuit (antenna) 3 of each of the six electronic circuits and the terminal of the outermost ring electronic circuit 3 conductive, an ultraviolet curable ink is strip-shaped between them by screen printing. After printing, the film is cured by irradiating ultraviolet rays to form six insulating layers, and silver paste (average particle diameter of silver particles: 5 μm, binder: polyester resin) is formed on the surface of the insulating layers by screen printing. The shape (length 10 mm) was printed and dried to form six jumper circuits.
Next, wire bumps are provided on the electrode portion of the IC chip (manufactured by Philips, trade name “I / CODE”) 6 using a gold wire, and this IC chip 6 is made of an anisotropic conductive film (trade name “Sony Chemical Co., trade name“ Through FP2322D "), both terminals of the circuit were connected using a flip chip bonding method to complete six electronic circuits.

On the other hand, using a roll knife coater on the release treatment surface of the release sheet 11 obtained by releasing the entire surface of one side of a glassine paper having a thickness of 70 μm with a silicone resin, an acrylic strong adhesive pressure-sensitive adhesive (manufactured by Lintec Corporation) The release sheet 11 with the second adhesive layer 5 was prepared by applying and drying the name “PA-T1”) to form the second adhesive layer 5 having a thickness of 20 μm.
Next, the acrylic adhesive strong pressure-sensitive adhesive and release sheet 11 are laminated as the second adhesive layer 5 on the entire surface of the first adhesive layer 2 on which the electronic circuit 3 and the IC chip 6 are provided. Then, the first adhesive layer 2, the electronic circuit 3 and the IC chip 6 are covered with the second adhesive layer 5, and the other surface of the base sheet 1 is concealed (resin: milky white polypropylene). ) To create 6 IC tags in a row. Next, six IC tags were cut and separated in a row to create six IC tags. In addition, the base sheet 1 wound up in a roll shape is sequentially sent out, and the steps of the above manufacturing method are sequentially performed on the sent out base sheet 1 so that six IC tags are arranged in a row. Many rows were repeatedly formed in the delivery direction, and IC tags were efficiently manufactured continuously.

When the obtained IC tag was subjected to a non-contact transmission / reception test, the transmission / reception was successfully performed.
The IC tag release sheet 11 was peeled off, and the IC tag was attached to a polypropylene resin plate. After 24 hours, a cut 17 was made in the second adhesive layer with a 5 mm cutter knife from one end of this IC tag, this part was picked with fingers and carefully peeled off from the polypropylene resin plate little by little. 7 was left on the polypropylene resin plate, and the other non-release agent layer portion was peeled from the polypropylene resin plate together with the polyethylene terephthalate sheet of the base sheet 1. When the electronic circuit 3 was cut along with the peeling and a non-contact transmission / reception test was performed, transmission / reception could not be performed (peeling cutting test).
The results of the peel cutting test are shown in Table 1.

(Comparative Example 1)
As shown in FIG. 7, an IC tag was produced in the same manner as in Example 1 except that six electronic circuits having the same arrangement position of the planar protrusion 9 and the detour 8 were formed in a row.
The obtained IC tag was subjected to a non-contact transmission / reception test. The results are shown in Table 1.

It is a schematic sectional drawing of an example of each IC tag of this invention. It is a see-through | perspective plan view which shows the electronic circuit of an example of each IC tag of this invention. It is a see-through | perspective plan view which shows the electronic circuit of the other example of each IC tag of this invention. It is a schematic sectional drawing of an example after each IC tag of this invention was peeled off. It is a top view of an example of the shape of the circuit line and detour in each IC tag of the present invention. It is a see-through | perspective plan view which shows the electronic circuit of the IC tag of this invention. It is a perspective top view which shows the electronic circuit of the IC tag of a comparative example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Base material sheet 2 1st adhesive layer 3 Electronic circuit 4 Circuit line 5 2nd adhesive layer 6 IC chip 7 Release agent layer 8 Detour 9 Planar protrusion 10 Bonding line 11 Release sheet 12 Article 13 Circuit surface 14 Connection point of circuit line and detour 15 Tangent line of detour at connection point of circuit line and detour 16 Tangent line of circuit line at connection point of circuit line and detour 17 Notch 18 Jumper wiring part 19 Circuit line wide part
20 Insulating layer 21 Circuit terminal for IC chip connection 22 Distance in the longitudinal direction of the innermost ring of the electronic circuit

Claims (9)

A first adhesive layer is laminated on the surface of the base sheet, the surface of the first adhesive layer is composed of circuit lines or circuit lines having a detour, and the planar protrusion extends to the circuit line or detour. A contacted electronic circuit and an IC chip connected to the electronic circuit are provided, and a second adhesive layer that covers the electronic circuit and the IC chip is laminated. A release agent layer is partially provided at a position corresponding to the circuit surface formed by the electronic circuit and the IC chip, and the planar protrusion is peeled in the circuit surface. A combination of two or more types of IC tags provided at least one at the position where the agent layer is provided , wherein at least two types of IC tags are different from each other in the installation positions of the planar protrusions . An IC tag and a second IC tag, the second IC tag Planar projections of different said installation position is provided on more than 10% different from a position at a distance of the top inner circuit line longitudinal of the electronic circuit from the installation position of the planar protrusions having different said installation position in the first IC tag in IC tag assembly and said that you are. A first adhesive layer is laminated on the surface of the base sheet, the surface of the first adhesive layer is composed of circuit lines or circuit lines having a detour, and the planar protrusion extends to the circuit line or detour. A contacted electronic circuit and an IC chip connected to the electronic circuit are provided, and a second adhesive layer that covers the electronic circuit and the IC chip is laminated. A release agent layer is partially provided at a position corresponding to the circuit surface formed by the electronic circuit and the IC chip, and the planar protrusion is peeled in the circuit surface. A combination of two or more types of IC tags provided at least one at a position where an agent layer is provided , wherein at least two types of IC tags are provided at a position where the release agent layer is provided. first I which has the installation position of the planar projections are different from each other A tag and the second IC tag, planar projections of different said installation position in the second IC tag of the electronic circuit from the installation position of the planar protrusions having different said installation position in the first IC tag top IC tag assembly, characterized in that you are provided in more than 10% different from the position of the circuit line longitudinal distance of the inner ring. The IC tag assembly according to claim 1 or 2, wherein the circuit line of the electronic circuit is made of a metal foil of gold, silver, nickel, copper or aluminum. The IC tag assembly according to claim 1 or 2, wherein the circuit lines of the electronic circuit are made of copper foil. The planar protrusion has an area determined by the formula S ≧ (2W) ² (wherein S is the area of the planar protrusion and W is the line width of the circuit line adjacent to the planar protrusion). IC tag assembly according to any one of claim 1 to 4. The IC tag assembly according to any one of claims 1 to 5 , wherein an angle between a tangent of the detour and the tangent of the circuit line at a connection point between the detour and the circuit line is 10 degrees or more. A first adhesive layer is laminated on the surface of the base sheet, the surface of the first adhesive layer is composed of circuit lines or circuit lines having a detour, and the planar protrusion extends to the circuit line or detour. A contacted electronic circuit and an IC chip connected to the electronic circuit are provided, and a second adhesive layer that covers the electronic circuit and the IC chip is laminated. A release agent layer is partially provided at a position corresponding to the circuit surface formed by the electronic circuit and the IC chip, and the planar protrusion is peeled in the circuit surface. and at least one and provided with which the first IC tag, the first is different from the IC tag installation position of the planar projection of the IC tag in which the position provided with the adhesive layer, different planes of the installation position Jo projections planar projections of different installation positions of the first IC tag To produce an IC tag IC tag assembly consisting of a location position and a second IC tag that provided in different positions at least 10% of the distance of the top inner circuit line longitudinal of the electronic circuit by singulation An IC tag manufacturing method characterized by the above. A first adhesive layer is laminated on the surface of the base sheet, the surface of the first adhesive layer is composed of circuit lines or circuit lines having a detour, and the planar protrusion extends to the circuit line or detour. A contacted electronic circuit and an IC chip connected to the electronic circuit are provided, and a second adhesive layer that covers the electronic circuit and the IC chip is laminated. A release agent layer is partially provided at a position corresponding to the circuit surface formed by the electronic circuit and the IC chip, and the planar protrusion is peeled in the circuit surface. At least one of the first IC tag provided, the installation position of the planar projection is provided at a position that is provided with the release agent layer of the first IC tag in a position which is provided with adhesive layer and it is a different IC tag, planar projections of different said installation position said IC tag consisting of installation position setting position of the planar protrusions having different one of the IC tag and the second IC tag that provided more than 10% different from a position at a distance of the top inner circuit line longitudinal electronic circuit An IC tag manufacturing method comprising manufacturing an IC tag by dividing an assembly into individual pieces. The IC tag assembly is formed by laminating a first adhesive layer on the surface of the base sheet, and partially at a position corresponding to a circuit surface formed by an electronic circuit and an IC chip on the surface of the first adhesive layer. the release agent layer is provided on, consists circuit line having a circuit line or detour to the surface of the first adhesive layer, the planar projection is Nobese' the circuit line or detour, the planar projections, the a first electronic circuit provided to at least one position that is provided with the release agent layer to a circuit surface, provided in a position that is provided with the release agent layer of the first electronic circuit The planar projections having different installation positions of the planar projections are arranged so that the projections having different installation positions are rotated from the installation positions of the planar projections having different installation positions of the first electronic circuit. second electronic that provided in different positions 10% or more routes longitudinal distance A road is provided, then the IC chip to be connected to these electronic circuits is provided, according to claim 7 or 8 is obtained by laminating a second adhesive layer covering these electronic circuits and IC chips The manufacturing method of IC tag.

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