JP4349159B2 - Switching power supply and overcurrent protection circuit - Google Patents

Description

  The present invention relates to a pulse width modulation (PWM) control type switching power supply and an overcurrent protection circuit. More specifically, the present invention relates to a switching power supply and an overcurrent protection circuit that can protect against overcurrent without changing the PWM frequency.

  2. Description of the Related Art Conventionally, PWM control type switching power supplies have been used in electronic devices such as automobile electronic control units (ECUs). The switching power supply is provided with an overcurrent protection circuit that stops the switching operation of the switch element in order to protect the components and the load when an overcurrent is detected.

  FIG. 10 is a configuration diagram of a general switching power supply 200 having an overcurrent protection function. The switching power supply 200 includes a power conversion unit 1, an output voltage voltage dividing unit 2, an error amplifier 3, a triangular wave oscillation circuit 4, a PWM comparator 5, an overcurrent detection unit 6, a reset signal generation circuit 7, A latch circuit 8, level shift circuits 91 and 92, and AND circuits 93 and 94 are provided.

Power conversion unit 1, and outputs a voltage V _out by exclusively switching the NMOS transistor Q2, which is connected to the connected NMOS transistor Q1 and the ground to the power supply V _in. The output voltage divider 2 divides the output voltage from the power converter 1. The error amplifier 3 detects the difference between the output voltage from the output voltage dividing unit 2 and the reference voltage, and amplifies the difference. The triangular wave oscillation circuit 4 generates a triangular wave for PWM control (PWM triangular wave). The PWM comparator 5 outputs a pulse signal (PWM signal) for driving the switching element of the power converter 1 based on the output voltage from the error amplifier 3 and the PWM triangular wave from the triangular wave oscillation circuit 4. . Overcurrent detection unit 6 is configured to monitor the current supplied from the power source V _in, it is to detect an overcurrent. Specifically, the voltage between the terminals of the resistor 62 and the overcurrent detection threshold voltage are compared with each other by the comparator 61. , “Hi”). The reset signal generation circuit 7 generates a reset signal synchronized with the peak of the PWM triangular wave. The level shift circuits 91 and 92 convert the signals output from the AND circuits 93 and 94 into drive voltages for the power conversion circuit 1.

  The operation of the switching power supply 200 configured as described above will be described with reference to FIGS. FIG. 11 is a diagram showing a signal waveform in a normal state, and FIG. 12 is a diagram showing a signal waveform in overcurrent detection.

First, normal operation will be described with reference to FIG. First, the error amplifier 3 amplifies and outputs the difference between the output voltage from the output voltage divider 2 and the reference voltage (a). That is, the difference between the desired voltage and the output voltage _Vout is amplified and output. Then, the output voltage of the error amplifier 3 and the PWM triangular wave (b) generated by the triangular wave oscillation circuit 4 are input to the PWM comparator 5. The PWM comparator 5 compares the output voltage (a) of the error amplifier 3 with the PWM triangular wave (b) and outputs the result as a PWM signal.

  In the normal state, the output signal (d) from the overcurrent detection unit 6 is at a low level (hereinafter referred to as “Lo”). Therefore, the inverted output signal (e) from the latch circuit 8 becomes Hi. Therefore, the signal input to one terminal of the AND circuit 93 is Hi. Accordingly, the drive signal (f) for the NMOS transistor Q1 of the power converter 1 is generated based on the output signal from the PWM comparator 5 input to the other terminal. Similarly, the signal input to one terminal of the AND circuit 94 is also Hi. Therefore, the drive signal (g) for the NMOS transistor Q2 is also generated based on the inverted signal of the output signal from the PWM comparator 5 input to the other terminal.

Then, the NMOS transistor Q1 and the NMOS transistor Q2 are switching driven in accordance with the generated drive signal. That is, it operates as follows.
When error amplifier output voltage> PWM triangular wave, Q1 is on and Q2 is off. When error amplifier output voltage <PWM triangular wave, Q1 is off and Q2 is on. And the output voltage _Vout is controlled to be stable.

  Next, the operation at the time of overcurrent detection will be described with reference to FIG. The overcurrent includes a mild overcurrent and a severe overcurrent due to a ground fault of the power output. Therefore, the operation at the time of overcurrent detection will be described separately for a mild overcurrent and a severe overcurrent.

  First, the operation when a slight overcurrent is detected is described. When an overcurrent occurs, the overcurrent detection unit 6 detects the overcurrent, and the output signal from the overcurrent detection unit 6 becomes Hi. Therefore, the inverted output signal from the latch circuit 8 becomes Lo, and Lo is input to one terminal of each of the AND circuits 93 and 94. Therefore, Lo is output from the AND circuits 93 and 94 regardless of the output signal from the PWM comparator 5, and accordingly, the NMOS transistor Q1 and the NMOS transistor Q2 are turned off. As a result, the coil current (h) starts to decrease and is limited to a current value near the overcurrent detection threshold. That is, it can be seen that the overcurrent protection function is functioning effectively. The latch circuit 8 is set when an overcurrent is detected, and is reset by a reset signal (c) from the reset signal generation circuit 7.

  Next, the operation when detecting a severe overcurrent will be described. When a severe overcurrent is detected due to a ground fault of the power output, the coil current (h) greatly exceeds the overcurrent detection threshold. Then, as in the case of a slight overcurrent, Hi is output from the overcurrent detection unit 6, and the NMOS transistor Q1 and the NMOS transistor Q2 are turned off. As a result, the coil current (h) starts to decrease. However, there is a response delay from when the overcurrent is detected until both NMOS transistors are actually turned off and the current starts to decrease, or both the time required for the coil current to fall below the overcurrent detection threshold. The latch circuit 8 is reset and the current begins to increase again before the coil current falls below the overcurrent detection threshold, for example because the NMOS transistor is off for a short time. Accordingly, the coil current (h) continues to increase without staying in the vicinity of the overcurrent detection threshold. That is, the overcurrent protection function is invalidated.

  In order to solve this problem, there is one in which the frequency (PWM frequency) of the PWM triangular wave output from the triangular wave oscillation circuit 4 is changed when a severe overcurrent is detected. FIG. 13 is a configuration diagram of a switching power supply 300 having a function of changing the PWM frequency. The switching power supply 300 includes a triangular wave oscillation circuit 41 having a PWM frequency changing function. This is different from the switching power supply 200 provided with the fixed frequency triangular wave oscillation circuit 4.

  FIG. 14 is a diagram illustrating a signal waveform when an overcurrent is detected in the switching power supply 300. In this switching power supply 300, when an overcurrent is detected, the frequency of the PWM triangular wave output from the triangular wave oscillation circuit 41 is gradually changed. That is, the PWM frequency is gradually reduced. As a result, the time during which the NMOS transistor Q1 and the NMOS transistor Q2 are turned off gradually increases, and the time necessary for the coil current (h) to fall below the overcurrent detection threshold is ensured. Therefore, even when a severe overcurrent is detected, the coil current can be limited to the vicinity of the overcurrent detection threshold. The PWM frequency is determined in consideration of the frequency of the PWM triangular wave during normal operation, the inductance value of the coil, and the like.

As described above, for example, there are a power controller disclosed in Patent Document 1 and a PWM control device disclosed in Patent Document 2 that change the frequency of the oscillation circuit when an overcurrent is detected.
JP-A-6-245503 JP-A-6-105562

  However, the switching power supply 300 has the following problems. That is, as the PWM frequency changes, the frequency of noise generated from the switching power supply 300 also changes. When a component that becomes a noise source such as a switching power supply is mounted on an ECU or the like of an automobile, it is required to suppress the noise level generated therefrom to a certain level or less. As a noise reduction method, a method of filtering noise on an electronic device is generally used. However, as the frequency becomes wider, it becomes more difficult to reduce the noise. In order to meet the demand for noise level, a higher-performance filter is required, which leads to circuit complexity and cost increase.

  When the PWM frequency is changed, it takes time to return the output voltage control when the overcurrent state returns to the normal state. In other words, it takes time for the output ripple voltage to return to the default value and settle down.

  The present invention has been made to solve the problems of the overcurrent protection circuit in the above-described conventional switching power supply. That is, an object of the present invention is to provide a switching power supply and an overcurrent protection circuit that prevent invalidation of the overcurrent protection function and that have a short control transition period.

A switching power supply for solving this problem includes a PWM signal output unit that outputs a PWM signal based on a carrier wave signal, and at least two switching elements that are turned on and off by an output signal from the PWM signal output unit. A switching power supply that controls the supply current by switching on and off the element, and outputs a first level signal when the current to be detected is greater than or equal to a threshold value, and outputs a second level signal otherwise. and parts in synchronization with the frequency division signal of the carrier signal, and a reset signal output unit that outputs a reset signal having a frequency below the frequency of the carrier signal, the beginning is defined by the output signal from the overcurrent detection unit, a reset signal output A current suppression that specifies the period when the end is determined by the reset signal from the unit and outputs whether or not it is the period And while defining portion, in a period defined by the current suppression period defining unit, and an output current controller for turning on and off the switching element so that the supply current is reduced, the reset signal output unit, in response to the output of the reset signal When the first level signal is output from the overcurrent detection unit, the frequency division ratio is made smaller than that at the present time, and the second level signal is output from the overcurrent detection unit and the frequency division ratio is 1 In the case of being small, the frequency dividing ratio is made larger than that at the present time .

  That is, in the switching power supply of the present invention, the overcurrent is detected by the overcurrent detection unit. Then, the current suppression period defining unit defines the suppression period of the supply current based on the overcurrent detection signal and the reset signal. For example, the period from when the overcurrent is detected until the reset signal is input is defined as the suppression period. Here, a reset signal having a frequency equal to or lower than the frequency of the carrier signal is output from the reset signal output unit. For this reason, a suppression period longer than the period of the carrier signal is defined. As a result, a sufficient time can be secured for reducing the output current value, and the overcurrent protection can be reliably functioned. In the switching power supply of the present invention, the frequency of the carrier signal does not change during overcurrent protection. Therefore, the noise frequency range is narrow and noise countermeasures can be easily achieved.

  In the output current control unit, the switching element is turned on / off so as to reduce the supply current during the suppression period. On the other hand, if it is not the suppression period, on / off of the switching element is switched according to the PWM signal. That is, the supply current can be controlled without changing the frequency of the carrier signal. Therefore, it is possible to quickly return from the overcurrent state to the normal state, or to make a transition from the normal state to the overcurrent state.

  In addition, the reset signal output unit of the switching power supply according to the present invention is preferably configured to generate a reset signal that is synchronized with the divided signal of the carrier wave signal. For example, a pulse signal synchronized with the carrier wave signal is generated, and a divided signal of the pulse signal is output as a reset signal. The frequency of the signal after frequency division (reset signal) is smaller than that of the signal before frequency division (carrier wave signal). Therefore, it is possible to sufficiently secure the supply current suppression period. Further, such a suppression period can be ensured without changing the frequency of the carrier signal. Therefore, the frequency of generated noise is limited to an integral multiple of the frequency of the carrier signal. Therefore, it is easy to take measures against noise.

  Further, the reset signal output unit of the switching power supply according to the present invention reduces the division ratio when an overcurrent is detected by the overcurrent detection unit, and the division ratio when no overcurrent is detected. It is better to increase the value. As a result, the frequency division ratio of the reset signal can be changed due to the weight of the overcurrent, and protection according to the degree of the overcurrent can be achieved.

  The current suppression period defining unit of the switching power supply according to the present invention is set when an overcurrent is detected by the overcurrent detection unit, and outputs a current suppression signal that is reset by a reset signal from the reset signal output unit. And better.

In addition, the present invention includes a PWM signal output unit that outputs a PWM signal based on a carrier wave signal, and at least two switching elements that are turned on and off by an output signal from the PWM signal output unit. An overcurrent protection circuit for a switching power supply that controls a supply current, wherein an overcurrent detection unit that outputs a first level signal if the current to be detected is equal to or greater than a threshold value, and outputs a second level signal otherwise. in synchronization with the frequency division signal of the carrier signal, and a reset signal output unit that outputs a reset signal having a frequency below the frequency of the carrier signal, the beginning is defined by the output signal from the overcurrent detection unit, a reset signal output section A current suppression period defining part that defines the period for which the end is determined by the reset signal and outputs whether or not that period is present, and current suppression The defined period in between defining portion, and an output current control unit that turns on and off so as to reduce the switching element supply current, the reset signal output unit, in response to the output of the reset signal at the overcurrent detection unit When the first level signal is output, the frequency division ratio is made smaller than that at the present time. When the second level signal is output by the overcurrent detection unit and the frequency division ratio is smaller than 1, the frequency division ratio is Including an overcurrent protection circuit characterized in that the current is made larger than the present time .

  According to the present invention, a reset signal having a small frequency can be generated without changing the frequency of the carrier wave signal (PWM triangular wave), and the overcurrent suppression period can be defined based on the reset signal. Therefore, a switching power supply and an overcurrent protection circuit that prevent invalidation of the overcurrent protection function and that have a short control transition period are realized.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments embodying the present invention will be described below in detail with reference to the accompanying drawings. In the present embodiment, the present invention is applied to a switching power supply of an ECU mounted on an automobile.

[First embodiment]
As shown in FIG. 1, a switching power supply 100 according to the first embodiment includes a power conversion unit 1, an output voltage voltage dividing unit 2, an error amplifier 3, a triangular wave oscillation circuit 4, a PWM comparator 5, and an overcurrent detection. A unit 6, a reset signal generation circuit 71, a latch circuit 8, level shift circuits 91 and 92, and AND circuits 93 and 94 are provided. In the switching power supply 100 of this embodiment, a frequency dividing function is provided in the reset signal generation circuit 71 that generates a reset signal. This is different from the fixed-frequency reset signal generation circuit 7 (see FIG. 10) provided in the conventional switching power supply 200.

Power conversion unit 1, and outputs a voltage V _out by exclusively switching the NMOS transistor Q2 connected to the connected NMOS transistor Q1 and the ground to the power supply V _in. The output voltage divider 2 divides the output voltage from the power converter 1. The error amplifier 3 detects the difference between the output voltage from the output voltage dividing unit 2 and the reference voltage, and amplifies the difference. The triangular wave oscillation circuit 4 generates a PWM triangular wave for PWM control. The PWM comparator 5 outputs a pulse signal for driving the switching element of the power conversion unit 1 based on the output voltage from the error amplifier 3 and the PWM triangular wave from the triangular wave oscillation circuit 4. Overcurrent detector 6 monitors the current value supplied from the power source V _in, is to detect an overcurrent.

  The AND circuit 93 receives the PWM signal and the inverted output signal of the latch circuit 8, and outputs the logical product to the shift level circuit 91. On the other hand, the inverted signal of the PWM signal and the inverted output signal of the latch circuit 8 are input to the AND circuit 94, and the logical product thereof is output to the shift level circuit 92. The level shift circuits 91 and 92 convert the transistor drive signal created by the AND circuits 93 and 94 into the drive voltage of the power conversion circuit 1.

  Next, a part of the reset signal generation circuit 71 having a frequency dividing function is shown in the circuit diagram of FIG. The reset signal generation circuit 71 shown in FIG. 2 includes a latch circuit 711 and an AND circuit 712. In the reset signal generation circuit 71, as shown in the signal waveform diagram of FIG. 3, the input reset signal (x) can be divided into ½ frequency. The reset signal generation circuit 71 shown in FIG. 2 is an example of a circuit having a frequency dividing function, and is not limited to this.

  The operation of the switching power supply 100 configured as described above will be described with reference to FIGS. FIG. 4 is a diagram illustrating a signal waveform when an overcurrent is detected. In the switching power supply 100 of this embodiment, frequency division by the reset signal generation circuit 71 is not performed when normal. Therefore, the signal waveform at the normal time is the same as the signal waveform of the conventional form shown in FIG.

  First, the operation when the supply current is normal will be briefly described with reference to FIG. First, the error amplifier 3 amplifies and outputs the difference between the output voltage from the output voltage divider 2 and the reference voltage (a). Then, the output voltage of the error amplifier 3 and the PWM triangular wave (b) generated by the triangular wave oscillation circuit 4 are input to the PWM comparator 5. A PWM signal is output from the PWM comparator 5.

In the normal state, the output signal (d) from the overcurrent detection unit 6 is Lo. Therefore, the inverted output signal (e) from the latch circuit 8 becomes Hi. Accordingly, the drive signal (f) of the NMOS transistor Q1 and the drive signal (g) of the NMOS transistor Q2 of the power converter 1 are generated according to the output signal from the PWM comparator 5, and the NMOS transistor Q1 is generated based on these drive signals. The NMOS transistor Q2 is driven to be switched. As a result, a current (h) having a triangular waveform flows through the coil in the power converter 1. Then, after smoothing, the voltage _Vout is output. When the output signal (d) from the overcurrent detection unit 6 is Lo, the reset signal is not divided.

  Next, the operation when a severe overcurrent is detected will be described with reference to FIG. First, an overcurrent is detected by the overcurrent detection unit 6, and the output signal (d) from the overcurrent detection unit 6 becomes Hi. The output signal from the overcurrent detection unit 6 is sent to the latch circuit 8, and the inverted output signal (e) from the latch circuit 8 turns to Lo. Thereby, the NMOS transistor Q1 and the NMOS transistor Q2 are turned off regardless of the output signal from the PWM comparator 5. Therefore, the coil current (h) starts to decrease.

  The output signal from the overcurrent detection unit 6 is also sent to the reset signal generation circuit 71. When the output signal from the overcurrent detection unit 6 is Hi, the reset signal generation circuit 71 divides the reset signal. Specifically, first, a reset signal synchronized with the peak of the PWM triangular wave (a) output from the triangular wave oscillation circuit 4 is generated. Thereafter, a signal having a frequency half that of the generated reset signal is generated and output as a reset signal (c) after frequency division. The reset signal after the frequency division is sent to the latch circuit 8, and the inverted output signal (e) from the latch circuit 8 turns to Hi. As a result, the NMOS transistor Q1 and the NMOS transistor Q2 are turned on and off again, and the coil current (h) starts to increase.

  The switching power supply 100 of the first embodiment is provided with a reset signal generation circuit 71 having a frequency dividing function, so that the switching power supply 200 (see FIG. 10) and the switching power supply 300 (see FIG. 13) that do not have the frequency dividing function are provided. Compared with, it has the following characteristics. That is, by dividing the frequency of the reset signal, the period during which both NMOS transistors are turned off becomes longer. Therefore, the time required for the coil current to fall below the overcurrent detection threshold is ensured, and the coil current can be limited to the vicinity of the overcurrent detection threshold. Therefore, it can be seen that the overcurrent protection function is functioning effectively even during a severe overcurrent.

  Further, since the PWM frequency output from the triangular wave oscillation circuit 4 does not change, the frequency of noise generated from the switching power supply does not change greatly. Therefore, noise can be easily reduced in an electronic device such as an ECU of an automobile equipped with a switching power supply.

  Further, since the switching power supply 100 according to the present embodiment does not change the PWM frequency, the output voltage control can also be adapted immediately. That is, the output ripple voltage can be quickly returned within the predetermined range.

Specifically, the ripple voltage ΔV _ripple is expressed by the following equation (1).
ΔV _ripple = ESR × _{ΔI ripple} (1)
Here, ESR in Equation (1) is the series equivalent resistance of the output capacitor. _{ΔI ripple} is a ripple current and is expressed by the following equation (2).
_{ΔI ripple} = (V _out / (f × L)) × (1− (V _out / V _in )) (2)
Here, V _out is the output voltage in the formula (2), V _in is the input voltage, f is the switching frequency, L is the inductance value of the coil.

Generally, the inductance value L is determined so that the ripple voltage ΔV _ripple falls within a specified range with respect to a certain steady-state switching frequency f. For this reason, the ripple voltage falls outside the predetermined range due to a decrease in the switching frequency during overcurrent detection, but the ripple voltage falls within the specified range by returning to the normal state. In the switching power supply 100 of this embodiment, since the PWM frequency does not change, the switching frequency immediately becomes equal to the PWM frequency when the normal state is restored. Therefore, as shown in FIG. 5, the ripple current converges early and the ripple voltage also converges early.

  On the other hand, in the switching power supply 300 that changes the PWM frequency, as shown in FIG. 6, it takes time for the PWM frequency to return to the original state. Therefore, the convergence of the ripple current is delayed, and it takes time for the output voltage control to return to the normal state as compared with the switching power supply 100 of the present embodiment.

  Note that the switching power supply 100 of the present embodiment not only shortens the time until the output voltage control is restored, that is, the transition from the overcurrent protection state to the normal state, but also the transition from the normal state to the overcurrent protection state. Time is also shortened. FIG. 7 is a signal waveform diagram when the control of the switching power supply 100 is transferred. In the switching power supply 100, a time for reducing the coil current (h) is ensured immediately after the overcurrent is detected. On the other hand, in the switching power supply 300, since the frequency of the reset signal is gradually lowered after detecting the overcurrent as shown in FIG. 14, it takes time to reduce the coil current (h).

In the first embodiment of the switching power supply 100 as described above in detail, while monitoring the current value supplied from the power source V _in with the overcurrent detector 6, it is to be detected an overcurrent. When an overcurrent is detected, a signal (current control signal) for decreasing the output current value of the power converter 1 is output from the latch circuit 8. That is, the current control signal is set to Lo, and the switching element of the power conversion unit 1 is turned off. This current control signal has a period during which it is Lo in the reset signal output from the reset signal generation circuit 71. The reset signal generation circuit 71 normally generates a reset signal synchronized with the PWM triangular wave (carrier wave signal) from the triangular wave oscillation circuit 4, but the reset signal is divided when overcurrent occurs. The reset signal after the lap is output to the latch circuit 8. That is, the frequency of the reset signal output to the AND circuits 93 and 94 is reduced. Thereby, it is possible to secure a sufficient time for reducing the output current value of the power converter 1. Therefore, the overcurrent protection function can function effectively.

  Further, in the switching power supply 100 of the present embodiment, the frequency of the reset signal is changed by dividing the frequency to ensure a sufficient time for reducing the output current value of the power conversion unit 1. That is, the overcurrent protection function can be effectively functioned without changing the PWM frequency. Therefore, the frequency of noise generated by the PWM triangular wave and the reset signal is limited to an integer multiple of the PWM triangular wave. Therefore, it is easy to take measures against noise.

  Further, in the switching power supply 100 of the present embodiment, since the PWM frequency is not changed, the ripple current can be converged early. That is, the control can be quickly transferred from the overcurrent state to the normal state. As a result, an overcurrent protection circuit that prevents invalidation of the overcurrent protection function and has a short control transition period and a switching power supply including the overcurrent protection circuit are realized.

[Second form]
FIG. 8 shows a circuit configuration of the switching power supply 120 according to the second embodiment. The switching power supply 120 includes a power conversion unit 1, an output voltage voltage division unit 2, an error amplifier 3, a triangular wave oscillation circuit 4, a PWM comparator 5, an overcurrent detection unit 6, a reset signal generation circuit 72, A latch circuit 8, level shift circuits 91 and 92, and AND circuits 93 and 94 are provided. In the switching power supply 120 of this embodiment, the reset signal generation circuit 72 is provided with a frequency dividing function and a variable control function of the frequency dividing ratio. This is different from the switching power supply 100 of the first embodiment including the reset signal generation circuit 71 whose frequency division ratio is fixed to ½.

  The switching power supply 120 is provided with a latch circuit 73 that generates a signal for controlling the frequency division ratio. In the latch circuit 73, the output level of the overcurrent detector 6 is set when the reset signal rises. Based on the output signal of the latch circuit 73, the division ratio control of the reset signal generation circuit 72 is performed. Specifically, if the output of the latch circuit 73 is Hi, control is performed to increase the frequency division ratio. On the other hand, if the output of the latch circuit 73 is Lo, control is performed to reduce the frequency division ratio.

  Next, the operation of the switching power supply 120 will be described with reference to FIGS. FIG. 9 is a diagram illustrating a signal waveform when an overcurrent is detected. Note that frequency division by the reset signal generation circuit 72 is not performed during normal operation. Therefore, the signal waveform at the normal time is the same as the signal waveform of the conventional form shown in FIG. 11, and the description thereof is omitted.

  The operation when overcurrent is detected, particularly when overcurrent is detected, will be described below. First, an overcurrent is detected by the overcurrent detection unit 6, and the output signal (d) from the overcurrent detection unit 6 becomes Hi. The output signal from the overcurrent detection unit 6 is sent to the latch circuit 8, and the inverted output signal (e) from the latch circuit 8 turns to Lo. Thereby, the NMOS transistor Q1 and the NMOS transistor Q2 are turned off regardless of the output signal from the PWM comparator 5. Therefore, the coil current (h) starts to decrease.

  The output signal from the overcurrent detection unit 6 is also sent to the latch circuit 73. Then, the output of the latch circuit 73 becomes Hi with the rising edge of the reset signal from the reset signal generator 72 as a trigger. In the reset signal generation unit 72, when the output signal from the latch circuit 73 is Hi, control for reducing the frequency division ratio is performed. As a result, the frequency of the reset signal is reduced and the rising cycle of the reset signal is increased. For example, if the previous frequency division ratio is 1/1, it is changed to 1/2, and if it is 1/2, it is changed to 1/3.

  Further, if the overcurrent detection threshold value is reduced while the coil current (h) is decreasing, the output signal (d) from the overcurrent detection unit 6 becomes Lo. Then, triggered by the rise of the reset signal from the reset signal generator 72, the output of the latch circuit 73 becomes Lo. In the reset signal generation unit 72, when the output signal from the latch circuit 73 is Lo, control for increasing the frequency division ratio is performed. As a result, the frequency of the reset signal increases and the rising cycle of the reset signal decreases. For example, if the previous frequency division ratio is 1/3, it is changed to 1/2, and if it is 1/2, it is changed to 1/1. If the division ratio is 1/1, there is no change in the division ratio. In other words, the frequency division ratio is stabilized to 1/1 at the normal time when no overcurrent is detected.

  The reset signal (c) after the frequency division is sent to the latch circuit 8, and the inverted output signal (e) from the latch circuit 8 turns to Hi. As a result, the NMOS transistor Q1 and the NMOS transistor Q2 are turned on and off again, and the coil current (h) starts to increase.

  As described in detail above, in the switching power supply 120 of the second embodiment, the reset signal generation circuit 72 can change the frequency division ratio of the reset signal. Specifically, when the overcurrent is detected by the overcurrent detection unit 6, the frequency division ratio is decreased, and when the overcurrent is not detected, the frequency division ratio is increased. As a result, an overcurrent protection function corresponding to the degree of overcurrent is realized.

  Note that this embodiment is merely an example, and does not limit the present invention. Therefore, the present invention can naturally be improved and modified in various ways without departing from the gist thereof. For example, in the embodiment, the present invention is applied to a synchronous rectification step-down power supply, but the present invention is not limited to this. That is, the present invention can also be applied to an asynchronous rectification type power source, a boost power source, a polarity inversion power source and the like.

  In the embodiment, the reset signal is generated based on the PWM triangular wave, but the present invention is not limited to this. That is, a timer independent from the triangular wave oscillation circuit 4 may be provided, and the reset signal may be generated based on the timer. In this case, the timer cycle is preferably longer than the PWM triangle wave cycle. Further, it is preferable that the timer cycle can be changed by the weight of the overcurrent.

  In addition to the inventions described in the claims, the embodiments of the present invention described above include inventions as shown in the following supplementary notes.

[Appendix 1] In an overcurrent protection circuit that controls current supply by switching on and off at least two switching elements and suppresses output current in the event of an overcurrent,
An overcurrent detector for detecting overcurrent;
A reset signal output unit for outputting a reset signal having a frequency equal to or lower than the frequency of the carrier wave signal;
A current suppression period defining unit that defines a period in which a start period is determined by an output signal from the overcurrent detection unit and an end period is determined by a reset signal from the reset signal output unit; ,
An overcurrent protection circuit comprising: an output current control unit that turns on and off the switching element so that a supply current decreases during a period defined by the current suppression period defining unit.

[Appendix 2] In the overcurrent protection circuit described in Appendix 1,
The overcurrent protection circuit, wherein the reset signal output unit generates a reset signal synchronized with a frequency-divided signal of a carrier wave signal.

[Appendix 3] In the overcurrent protection circuit described in Appendix 2,
The reset signal output unit decreases the frequency division ratio when an overcurrent is detected by the overcurrent detection unit, and increases the frequency division ratio when no overcurrent is detected. Overcurrent protection circuit.

[Appendix 4] In the overcurrent protection circuit described in any one of Appendix 1 to Appendix 3,
The current suppression period defining unit is set when an overcurrent is detected by the overcurrent detection unit, and outputs a current suppression signal that is reset by a reset signal from the reset signal output unit. Current protection circuit.

It is a circuit diagram which shows the switching power supply of the PWM control system concerning a 1st form. FIG. 2 is a circuit diagram illustrating a part of the reset signal generation circuit with a frequency dividing function illustrated in FIG. 1. FIG. 2 is a signal waveform diagram showing an operation of the reset signal generation circuit with a frequency dividing function shown in FIG. 1. FIG. 2 is a signal waveform diagram (at the time of overcurrent detection) showing the operation of the switching power supply shown in FIG. 1. It is a signal waveform figure at the time of the control transfer of the switching power supply concerning a 1st form (it is normal from an overcurrent). It is a signal waveform figure at the time of control transfer of the switching power supply concerning the conventional form (it is normal from an overcurrent). It is a signal waveform diagram at the time of control transition of the switching power supply according to the first embodiment (from normal to overcurrent). It is a circuit diagram which shows the switching power supply of the PWM control system concerning a 2nd form. FIG. 9 is a signal waveform diagram (at the time of overcurrent detection) showing the operation of the switching power supply shown in FIG. 8. It is a circuit diagram (the 1) which shows the switching power supply of the PWM control system concerning the conventional form. FIG. 11 is a signal waveform diagram (normal time) illustrating the operation of the switching power supply illustrated in FIG. 10. FIG. 11 is a signal waveform diagram (at the time of overcurrent detection) showing the operation of the switching power supply shown in FIG. 10. It is a circuit diagram (the 2) which shows the switching power supply of the PWM control system concerning the conventional form. FIG. 14 is a signal waveform diagram (at the time of overcurrent detection) showing the operation of the switching power supply shown in FIG. 13.

Explanation of symbols

1 Power Converter 2 Output Voltage Divider 3 Error Amplifier 4 Triangular Wave Oscillator 5 PWM Comparator 6 Overcurrent Detector 7 Reset Signal Generator 71 Reset Signal Generator 72 Reset Signal Generator 73 Latch Circuit 8 Latch Circuit 93 AND Circuit 94 AND circuit 100 Switching power supply Q1 NMOS transistor Q2 NMOS transistor

Claims (3)

A PWM signal output unit that outputs a PWM signal based on a carrier wave signal, and at least two switching elements that are turned on and off by an output signal from the PWM signal output unit, and controls the supply current by switching on and off the switching element Switching power supply
An overcurrent detector that outputs a first level signal if the test current is greater than or equal to a threshold; otherwise, a second level signal ;
A reset signal output unit that outputs a reset signal having a frequency equal to or lower than the frequency of the carrier wave signal in synchronization with the frequency-divided signal of the carrier wave signal;
A current suppression period defining unit that defines a period in which a start period is determined by an output signal from the overcurrent detection unit and an end period is determined by a reset signal from the reset signal output unit; ,
An output current control unit configured to turn on and off the switching element so that a supply current decreases in a period defined by the current suppression period defining unit;
The reset signal output unit, when triggered by the output of the reset signal, reduces the frequency division ratio from the present time when the overcurrent detection unit outputs a first level signal, and the overcurrent detection unit A switching power supply characterized in that when the second level signal is output and the division ratio is smaller than 1, the division ratio is made larger than the present time . In the switching power supply according to claim 1 ,
The current suppression period defining unit is set when a first level signal is output from the overcurrent detection unit, and outputs a current suppression signal that is reset by a reset signal from the reset signal output unit. Switching power supply. A PWM signal output unit that outputs a PWM signal based on a carrier wave signal, and at least two switching elements that are turned on and off by an output signal from the PWM signal output unit, and controls supply current by switching on and off of the switching element In an overcurrent protection circuit for a switching power supply that
An overcurrent detector that outputs a first level signal if the test current is greater than or equal to a threshold; otherwise, a second level signal ;
A reset signal output unit that outputs a reset signal having a frequency equal to or lower than the frequency of the carrier wave signal in synchronization with the frequency-divided signal of the carrier wave signal;
A current suppression period defining unit that defines a period in which a start period is determined by an output signal from the overcurrent detection unit and an end period is determined by a reset signal from the reset signal output unit; ,
An output current control unit configured to turn on and off the switching element so that a supply current decreases in a period defined by the current suppression period defining unit;
The reset signal output unit, when triggered by the output of the reset signal, reduces the frequency division ratio from the present time when the overcurrent detection unit outputs a first level signal, and the overcurrent detection unit When the second level signal is output and the frequency division ratio is smaller than 1, the frequency division ratio is made larger than the current time.

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