JP4327407B2 - Copper wiring film forming method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a copper wiring formation method in which a copper film is formed on a diffusion barrier base film formed on a substrate to be processed and formed on an insulating film provided with a recess, and the recess is filled with a copper material. The present invention relates to a method for forming a Cu (copper) wiring film with improved adhesion between a base film for diffusion barrier and a copper film, and a wiring film .
[0002]
[Prior art]
In recent years, Cu (copper) has been used as a wiring material along with improvement in performance of semiconductor devices. The reason is that Cu has a low resistance compared to Al (aluminum), and has high resistance to the phenomenon governed by the diffusion behavior of metal atoms constituting the wiring such as stress migration and electromigration. It is.
[0003]
In such a method for forming wiring using Cu (copper), a pattern of wiring and connection holes (via holes or contact holes) is formed in an insulating film on a semiconductor substrate, and then a diffusion barrier base film is formed. A method of forming a film and further embedding a copper (Cu) film in a concave pattern and removing an excess copper film or the like by CMP (chemical mechanical polishing method) is used.
[0004]
The formation method of such a diffusion barrier base film and copper (Cu) film further increases the integration of semiconductor devices, and the aspect ratio (via hole depth / via hole opening diameter) of via holes and the like is further increased. It is becoming difficult to completely cover the inside of openings such as via holes.
[0005]
In addition, as for the embedding of the wiring and the connection hole into the concave pattern with copper, copper embedding by electrolytic copper plating is widely adopted as a cost-effective technique. However, a Cu seed is previously formed on the diffusion barrier base film as an electrode. It is necessary to form a first copper film called a film. In such a technical background, a chemical vapor deposition method (referred to as “CVD method” in the present specification) with excellent coverage (coverage) is cited as a promising candidate as a Cu seed film formation method. ing.
[0006]
However, a semiconductor device manufacturing method in which a first copper film is formed as a Cu seed film by the CVD method as described above, and a second copper thin film is formed by an electrolytic copper plating method using the first copper film as an electrode. In the past, there has been a problem that the adhesion of a copper (Cu) film that forms an interface with a base film for preventing diffusion such as TiN has been weak, and strengthening of the adhesion has been indispensable for practical use.
[0007]
Therefore, in the polishing process (CMP process) after the formation of the copper wiring by the CVD method (after the formation of the second copper film by the electrolytic copper plating method), the copper film (first copper film, Cu seed film) is diffused as TiN or the like. There was a problem that the film was peeled off from the barrier underlayer.
[0008]
Therefore, for example, in Japanese Patent Application No. 2001-13621, which is a previous patent application by the applicant of the present application, the importance of annealing the Cu seed film for improving the adhesion between the diffusion barrier base film and the Cu seed film is found, is suggesting.
[0009]
In the present invention, the first copper film (Cu seed film) forming step by the CVD method and the second copper film forming step by the electrolytic copper plating method using the first copper film as an electrode By providing the step of heating the copper film (Cu seed film) in the temperature range of 200 to 500 ° C., the adhesion between the first copper film and the base film for diffusion barrier is improved, and the CMP in the semiconductor manufacturing process A copper wiring film forming method for forming a highly reliable Cu film wiring that does not cause film peeling even in the (chemical mechanical polishing method) step has been proposed.
[0010]
However, although the effect of improving adhesion is confirmed, depending on the film thickness of the Cu seed film, the film formation conditions, or the annealing time of the Cu seed film, the upper corner of the hole or trench pattern on the semiconductor substrate In a part of the substrate surface such as the portion (near the opening), a phenomenon was observed in which the Cu seed film was repelled and the underlying diffusion barrier base film was exposed. This phenomenon is not observed in the flat portion (surface portion parallel to the semiconductor substrate) that occupies most of the semiconductor substrate, but is limited to the upper corner portion of the hole or trench pattern.
[0011]
[Problems to be solved by the invention]
As described above, in the copper wiring forming method proposed in Japanese Patent Application No. 2001-13621, the effectiveness of improving the adhesion between the diffusion barrier base film and the Cu seed film has been confirmed. There was a phenomenon in which the Cu seed film was repelled and the underlying diffusion barrier base film was exposed at a part of the substrate surface such as the upper corner (near the opening) of the hole or trench pattern. When such a Cu seed film is exposed without completely covering the diffusion barrier base film, in the electrolytic copper plating process using the Cu seed film as an electrode, the copper (Cu) film cannot be grown at the exposed part. After the electrolytic copper plating process, the location becomes a cavity.
[0012]
Reliability that holes with hollow portions in the upper corner (near the opening) have high wiring resistance, low migration resistance, and a high possibility of disconnection failure when electricity is applied to copper wiring for a long time. Sexual problems will occur.
[0013]
Therefore, in view of such a situation, the present invention provides a method for forming a hole on a semiconductor substrate or an upper corner portion of a trench pattern (near the opening) even if the Cu seed film is effectively annealed in the copper wiring forming method. And a wiring film formed in this manner , which can be annealed without causing the phenomenon that the Cu seed film is repelled on the substrate surface and the underlying diffusion barrier film is exposed.
[0014]
[Means for Solving the Problems]
To solve the above problems, the copper wiring film forming how the present invention proposes is formed on a semiconductor substrate, a recessed portion to form a diffusion barrier for the underlying film on an insulating film provided, the CVD thereon In the copper wiring film forming method, the first copper film is formed by a method, and the second copper film is formed by an electrolytic plating method using the first copper film as an electrode .
During the process of forming the pre-Symbol diffusion barrier for the underlying film and the first copper film formation step, heating the diffusion barrier for the underlying film, after the vacuum of 1 × 10 ^-4 Pa or less at an ultimate vacuum of Along with a process,
A step of heating the first copper film in a temperature range of 200 to 500 ° C. and a pressure atmosphere of 10 KPa or more is performed between the first copper film forming step and the second copper film forming step. It is what.
[0015]
In order to improve the adhesion between the first copper film (Cu seed film) and the base film for diffusion barrier, the first copper film forming step by the CVD method and the electrolytic copper plating method using the first copper film as an electrode Even when a step of heating the first copper film (Cu seed film) is provided between the steps of forming the second copper film by the diffusion, as in the method for forming a copper wiring film of the present invention, diffusion is performed. Between the step of forming the barrier base film and the first copper film forming step, a step is provided in which the diffusion barrier base film is heated to a vacuum state of 1 × 10 ⁻⁴ Pa or less in the ultimate vacuum. This causes a phenomenon that the Cu seed film is repelled and the underlying layer for the diffusion barrier is exposed on the substrate surface such as holes on the semiconductor substrate and the upper corners (near the opening) of the trench pattern. Can be prevented.
In addition, in the step of heating the diffusion barrier base film, the partial pressure of O ₂ and H ₂ O is equal to or higher than the ultimate vacuum level, while the ultimate vacuum level is 1 × 10 ⁻⁴ Pa or less. The reason why the value is set to a low value is that it is considered effective to prevent the aggregation of the Cu seed film by reducing the partial pressure of O ₂ and H ₂ O and preventing oxidation during the heating step .
[0016]
In the above, it is preferable that the steps from the formation of the base film for diffusion barrier to the formation of the first copper film are performed in a consistent vacuum state without exposing the semiconductor substrate to the atmosphere.
[0017]
If the base film for diffusion barrier is exposed to the atmosphere, oxygen in the air is taken into the base film for diffusion barrier. It is easy to release the gas remaining during the formation of the diffusion barrier base film by the heating process, but it is difficult to release oxygen taken in by exposure to the atmosphere. If oxygen taken in by exposure to the air remains in the diffusion barrier base film, the adhesion between the first copper film formed thereon by the CVD method is adversely affected. Therefore, as described above, it is desirable that the steps until the first copper film is formed be performed in a consistent vacuum state without exposing the semiconductor substrate to the atmosphere.
[0018]
In the above, the step of heating the diffusion barrier underlayer is preferably performed at a temperature equal to or higher than the film formation temperature of the diffusion barrier underlayer where the effect of annealing appears, that is, 300 ° C. or higher. However, it is desirable to carry out the process in a temperature range that does not thermally damage the semiconductor substrate, up to about 600 ° C. at most.
[0019]
In the above, the formation of the diffusion barrier base film can be performed using tetrakisdialkylaminotitanium (may be referred to as “TDAAT” in this specification) as a source gas.
[0020]
The applicant of the present application forms a TiN film as a base film for a diffusion barrier by using TDAAT as a raw material by a MOCVD (Metal Organic Chemical Vapor Deposition) method, and forms a Cu film thereon. In order to improve the adhesion between the diffusion barrier base film (TiN film) and the Cu wiring film, the diffusion barrier is formed between the film formation process of the diffusion barrier base film (TiN film) and the Cu film formation process. Cu wiring film formation provided with an annealing process in a pressure range of 1 Pa to 10 KPa and a temperature range of 200 to 500 ° C. in a consistently vacuum state without being exposed to the atmosphere after the film forming process of the base film for coating (TiN film) A method has been proposed (Japanese Patent Laid-Open No. 2000-331957).
[0021]
According to the Cu wiring film forming method proposed in Japanese Patent Laid-Open No. 2000-331957, a Cu wiring film having good adhesion between the diffusion barrier base film (TiN film) and the Cu film can be formed.
[0022]
The present invention has been completed by further examining and improving the copper wiring forming method proposed in Japanese Patent Application Laid-Open No. 2000-331957 and the above-mentioned Japanese Patent Application No. 2001-13621.
[0023]
That is, the present invention includes a step of annealing a diffusion barrier base film under a predetermined condition before forming a diffusion barrier base film and forming a Cu film thereon. Unlike the invention proposed in US Pat. No. 3,331,957, the first copper film formed on the diffusion barrier base film is a Cu seed film, on which a second copper film is formed by electrolytic copper plating. The present invention relates to a method for forming a copper wiring film. In particular, in such a method for forming a copper wiring film, an electrolytic copper plating method using the first copper film as an electrode in order to improve the adhesion between the first copper film (Cu seed film) and the base film for diffusion barrier. Even when the first copper film is annealed before the second copper film is formed by the above-described method, in a part of the substrate surface such as a hole on the semiconductor substrate or an upper corner (near the opening) of the trench pattern, The research has been completed for the purpose of preventing the phenomenon that the Cu seed film is repelled and the underlying diffusion barrier film is exposed.
[0024]
According to the present invention, the diffusion barrier underlayer is annealed before forming the first copper film to be a Cu seed film on the diffusion barrier underlayer, and the most preferable conditions at this time are specified. It was completed by.
[0025]
According to the method of the present invention, the first copper film formed on the diffusion barrier base film is used as a Cu seed film, and the second copper film is formed thereon by electrolytic copper plating. In the formation, the second copper film is formed before the second copper film is formed by electrolytic copper plating using the first copper film (Cu seed film) as an electrode in order to improve the adhesion between the diffusion barrier base film and the Cu seed film. Even if the copper film of 1 is annealed, the Cu seed film is repelled in a part of the substrate surface such as the upper corner of the hole or trench pattern (near the opening) on the semiconductor substrate, and the diffusion barrier base film underneath It is possible to prevent the phenomenon of exposure. That is, a copper wiring film forming method in which a first copper film is formed on a diffusion barrier base film by a CVD method, and a second copper film is formed thereon by an electrolytic copper plating method using the first copper film as an electrode In order to improve the adhesion between the first copper film (Cu seed film) and the diffusion barrier base film, for example, between the first copper film forming process and the second copper film forming process, The present invention may be provided in the temperature range of 200 to 500 ° C., more preferably in the temperature range of 350 to 450 ° C., and the step of heating the first copper film with the pressure atmosphere in this heating step being 10 KPa or more. By using this method in combination, the Cu seed film is repelled and the underlying diffusion barrier base film is exposed in a part of the substrate surface such as the upper corner of the hole or trench pattern (near the opening) on the semiconductor substrate. Does not occur It can be so.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
Preferred embodiments of the present invention will be described below with reference to the accompanying drawings.
[0027]
FIG. 1 shows a schematic configuration of an example of a copper wiring film forming apparatus used in the copper wiring film forming method of the present invention.
[0028]
As shown in FIG. 2, the apparatus shown in FIG. 1 is formed on a semiconductor substrate 1 and a TiN film 3 as a diffusion barrier base film is formed on an insulating film 2 provided with a concave portion by MOCVD (Metal Organic Chemical Vapor Deposition). The TiN film 3 is heated (annealed), and a first copper film 4 is formed on the annealed TiN film 3 by a CVD method, and then the first copper film 4 shows an example of a system until a process of heating (annealing) 4 is performed.
[0029]
In this case, the insulating film 2 may be an organic low dielectric constant film, for example. Moreover, the diffusion barrier underlying film is not limited to the TiN film, but can be a refractory metal film such as Ta, TaN, WxN, or TiSiN. The film formation method of the diffusion barrier underlying film is also CVD. The method is not limited, and sputtering or the like may be used. In addition, the diffusion barrier base film may be exposed to plasma such as hydrogen or Ar gas after film formation in order to improve the film quality.
[0030]
The copper wiring film forming apparatus shown in FIG. 1 is configured as a multi-chamber apparatus as an example, and a separation chamber (transfer chamber) 14 including a transfer robot (substrate transfer mechanism) 18 is provided in the center. Three process chambers, namely, a TiNCVD chamber 11 for diffusion barrier, a CVD chamber 12 for copper film, and an annealing chamber 13 are arranged in the periphery, and two load / unload lock modules 15 and 16 are additionally provided. is there. Each chamber is provided with a gate valve 17.
[0031]
Here, the “module” means a part that constitutes a device, a machine, and a system and is functionally grouped. Therefore, the above-mentioned three process chambers (diffusion barrier TiNCVD chamber 11, copper film CVD chamber 12, and annealing chamber 13) are naturally also configured as modules, and the term chamber refers to the place where these processes are performed. Is used.
[0032]
Inside the separation chamber 14, a transfer robot (substrate transfer mechanism) 18 is provided, and the transfer robot 18 carries the substrate 19 into or out of each chamber or the like with its hand. In the above apparatus, one substrate 19 set in a cassette (not shown) is carried into the separation chamber 14 by the transfer robot 18 from the load / unload lock module 15 on the left side of the drawing.
[0033]
A predetermined process is performed in each of the diffusion barrier TiNCVD chamber 11, the copper film CVD chamber 12, and the annealing chamber 13. First, as shown in FIG. 2A, a TiN film 3 is formed by MOCVD as a diffusion barrier base film on an insulating film 2 formed on a semiconductor substrate 1 and provided with a recess. Next, a step of heating (annealing) the TiN film 3 is performed (FIG. 2B). Next, a first copper film 4 is formed on the annealed TiN film 3 by CVD (FIG. 2C). Then, as shown in FIG. 2D, a step of heating (annealing) the first copper film 4 is performed. The substrate 19 subjected to these series of processes is returned to the load / unload / lock module 16 by the transfer robot 18 and carried out. In the above configuration, the process chamber will be described in a little more detail.
[0034]
The diffusion barrier TiNCVD chamber 11, the copper film CVD chamber 12, and the annealing chamber 13 include vacuum evacuation mechanisms 11 a, 12 a, and 13 a, respectively. Each process chamber is appropriately maintained in a reduced pressure state, that is, in a desired vacuum state, by the vacuum exhaust mechanisms 11a, 12a, and 13a. The operation of the vacuum exhaust mechanisms 11a, 12a, and 13a is controlled by the controller 20.
[0035]
Each process chamber of the diffusion barrier TiNCVD chamber 11, the copper film CVD chamber 12, and the annealing chamber 13 includes a substrate support mechanism (not shown) in which a substrate 19 that is carried into each process chamber by the transfer robot 18 can be disposed. In addition, a process of each step proceeds, and a substrate heating mechanism (not shown) that can heat the substrate 19 to a predetermined temperature is also installed.
[0036]
Gas used in the annealing chamber 13 (mainly Ar is used, but N ₂ and H ₂ can also be used) is a gas supply system (not shown) mainly composed of an MFC (mass flow controller) and piping. Thus, it is introduced into the annealing chamber 13. The controller 20 also controls the flow rate of the process gas used in other chambers.
[0037]
In the Cu wiring film forming method according to the present invention, as described above, the substrate 19 is transferred in the order of the diffusion barrier TiNCVD chamber 11, the annealing chamber 13, the copper film CVD chamber 12, and the annealing chamber 13. After the TiN film 3 is formed, the annealing process is performed, the first copper film 4 is then formed, and the first copper film 4 is then annealed. Yes. An example of the process conditions of each of these steps performed using the apparatus shown in FIG. 1 will be described below.
[0038]
First, on the insulating film 2 formed on the semiconductor substrate 1 and provided with a recess, a TiN film 3 is formed by MOCVD as a diffusion barrier base film by a diffusion barrier TiNCVD chamber 11 (FIG. 2A). ) A specific film forming process is performed as follows.
[0039]
The internal pressure in the diffusion barrier TiNCVD chamber 11 is, for example, in the range of 0.1 to 15 Pa, and the temperature of the substrate 19 is heated to about 300 to 400 ° C. In this state, first, TDAAT (tetrakisdialkylaminotitanium) is supplied as a source gas in a range of 0.004 to 0.2 g / min, for example. At this time, the carrier gas (Ar: argon gas) added to improve the fluidity of the raw material gas in the pipe has a flow rate range of about 0.05 to 3.0 g / min (about 30 to 170 ml / min). To do. The additive gas (NH3: ammonia gas) is supplied in a flow rate range of 0.76 to 380 mg / min, for example. Under the above conditions, the diffusion barrier film 3 was formed with a thickness of 10 nm (FIG. 2A).
[0040]
Next, the substrate 19 after the film formation step of the diffusion barrier base film (TiN film) is carried into the annealing chamber 13, where the TiN film 3 is heated (see FIG. 2B). Annealing) is performed.
[0041]
The annealing conditions are performed after the internal pressure of the annealing chamber 13 is once reduced to a vacuum state of 1 × 10 ⁻⁴ Pa or less in terms of ultimate vacuum.
[0042]
At this time, it is more preferable that the partial pressure of 0 ₂ (oxygen) or H ₂ 0 (water) is sufficiently lower than the level equivalent to the ultimate vacuum. That is, in this annealing, it is considered that reducing the partial pressure of H ₂ O to prevent oxidation is effective in preventing aggregation of the Cu seed film.
[0043]
The heating temperature of the substrate 19 is preferably equal to or higher than the deposition temperature of the TiN film 3 which is the diffusion barrier base film in which the annealing effect appears, that is, 300 ° C. or higher. The upper limit of the annealing temperature is desirably a temperature range in which the substrate 19 is not thermally damaged, up to about 600 ° C. at most.
[0044]
As for the annealing time, an effect appears if at least the heating time until the temperature reaches 300 ° C. which is the lower limit of the TiN film 3 which is the base film for the diffusion barrier is spent as heating.
[0045]
Next, the substrate 19 that has completed the TiN film forming process and the annealing process is carried into the copper film CVD chamber 12, where the CVD film is formed on the TiN film 3 as a diffusion barrier base film. The first copper film 4 is formed by the method, and a film forming process of the copper thin film in the state shown in FIG.
[0046]
The internal pressure in the copper film CVD chamber 12 is maintained at 1.0 KPa, for example, and the temperature of the substrate 19 is set to about 170 ° C. In this state, Cu (hfac) (tmvs) (trimethylvinylsilylhexafluoroacetylacetonate copper I) was used as the source gas, and the first copper film 4 was formed (FIG. 2C). ).
[0047]
Finally, the substrate 19 that has completed the first copper film 4 deposition process is carried into the annealing chamber 13 where the first copper film 4 is heated as shown in FIG. Annealing) is performed. The annealing conditions are performed, for example, by introducing argon gas (Ar) into the annealing chamber 13 and maintaining the internal pressure at 0.008 to 40 KPa. The gas used may be either nitrogen (N ₂ ) or hydrogen in addition to Ar, and may be a mixed gas of two or more types. The temperature of the substrate 19 is 300 to 500 ° C., and the heating time is, for example, 30 minutes.
[0048]
Here, the process up to the CVD chamber for copper film 12, that is, the process up to the formation of the first copper film 4 on the barrier base film (TiN film 3) (FIGS. 2A to 2C). The step (step) is preferably carried out continuously in a vacuum atmosphere without exposing the substrate 19 being processed to the atmosphere. However, the substrate 19 on which the first copper film 4 is formed may be exposed to the atmosphere before the annealing process for the first copper film 4. Therefore, for example, as in the annealing chamber 13 in the multi-chamber system shown in FIG. 1, the first copper film 4 may be annealed continuously in a series of steps while maintaining a vacuum state. Although not shown, the first copper film 4 may be exposed to the atmosphere and an annealing process may be performed in an electric furnace, for example.
[0049]
After the annealing process for the first copper film 4, the first copper film 4 is used as an electrode for electrolytic copper plating (Cu seed film), and the concave portion of the substrate 19 is filled with the second copper film 5 (FIG. 2E). Process).
[0050]
[Experiment 1]
A Cu seed film was formed by performing the steps of FIGS. 2A to 2D under the following conditions, and this was used as an experimental example.
Deposition conditions of TiN film (underlying film for diffusion barrier) Raw material gas (TDAAT) flow rate: 0.04 g / min
Carrier gas (N ₂ ) flow rate: 50 to 300 ml / min and adjusted additive gas (NH ₃ ) flow rate: 1.1 ml / min
Heating temperature: 300 ° C
Internal pressure: 10Pa
Film thickness: 10nm
Degree of vacuum for annealing conditions of TiN film: 1 × 10 ⁻⁴ Pa
(Achieving vacuum before annealing)
Heating temperature: 400 ° C
Heating time: 10 minutes Film formation conditions for Cu seed film (first copper film) Raw material gas (Cu (hfac) (tmvs)) Flow rate: 1 g / min
Carrier gas (Ar) flow rate: 100 to 1000 ml / min and adjusted heating temperature: 200 ° C.
Internal pressure: 500Pa
Film thickness: 50nm
Annealing conditions for Cu seed film (first copper film) Internal pressure: 400 Pa
Heating temperature: 400 ° C
Heating time: 30 minutes [0051]
On the other hand, under the same conditions as described above except that the ultimate vacuum before annealing of the TiN film was set to 1 × 10 ⁻³ Pa, the steps of FIGS. 2A to 2D were performed to perform the Cu seed film. This was used as a comparative example.
[0052]
When the surface of each of the experimental example and the comparative example was observed with an SEM (scanning electron microscope), FIG. 3A (experimental example: when the TiN film was annealed, the vacuum state was 1 × 10 ⁻⁴ Pa at the ultimate vacuum. The result of FIG. 3B (comparative example: when annealing the TiN film, the annealing was started after the vacuum state of 1 × 10 ⁻³ Pa was reached when the TiN film was annealed) was obtained. .
[0053]
In the case of the comparative example (FIG. 3B), the Cu seed film is repelled by the diffusion barrier underlayer at the upper corner (near the opening) of the hole entrance, and the diffusion barrier underlayer is partially exposed. It was. On the other hand, in the case of the experimental example (FIG. 3A), the Cu seed film was continuous without being repelled by the diffusion barrier base film.
[0054]
From this experimental result, according to the copper wiring forming method of the present invention, even when annealing of the Cu seed film effective for improving the adhesion is performed, the substrate such as the upper corner (near the opening) of the hole on the semiconductor substrate It was confirmed that the annealing treatment can be performed without causing the phenomenon that the Cu seed film is repelled on the surface and the underlying diffusion barrier base film is exposed.
[0055]
[Experimental example 2]
When the experiment on the relationship between the ultimate pressure of the annealing chamber 13 and the hole upper corner coverage (%) in the heating (annealing) step shown in FIG. 2B was performed as follows, the result shown in FIG. Obtained.
[0056]
In the experiment, after forming a diffusion barrier base film on an insulating film on an 8-inch wafer provided with recesses (holes), the diffusion barrier base film was annealed, and then on this by a CuCVD method. In forming the Cu seed film (first copper film), the Cu seed film is formed under the same conditions except that the ultimate pressure of the annealing chamber 13 is changed when annealing the diffusion barrier base film. This is a SEM confirmation of the covering state with a test pattern in a predetermined region at the center of an 8-inch wafer.
[0057]
The ratio of the number of holes that were completely covered without exposing the diffusion barrier base film at the upper corners of the holes with respect to the total number of holes in the predetermined region (hole upper corner coverage) was calculated. The hole upper corner coverage: 100% indicates that all holes in a predetermined region are completely covered without exposing the diffusion barrier base film at the hole upper corner.
[0058]
In FIG. 4, the horizontal axis represents the ultimate pressure of the annealing chamber 13 before the step of heating the diffusion barrier underlayer shown in FIG. 2B is started, and the vertical axis represents the hole top corner coverage. Yes. From the experimental results shown in FIG. 4, after the ultimate pressure of the annealing chamber 13 is once reduced to a vacuum state of 1 × 10 ⁻⁴ Pa or less, the step of heating the diffusion barrier base film shown in FIG. 2B is performed. As a result, even if the Cu seed film is effectively annealed to improve the adhesion, the Cu seed film is repelled on the substrate surface such as the upper corner (near the opening) of the hole on the semiconductor substrate and diffused thereunder It was confirmed that the annealing treatment can be performed without causing the phenomenon of exposing the barrier underlayer.
[0059]
The preferred embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to such embodiments, and various forms are possible within the technical scope grasped from the description of the claims. Can be changed.
[0060]
【The invention's effect】
According to the onset bright, even when the annealing treatment effective Cu seed film for improving the adhesion, the substrate surface such as upper corner of the hole or trench pattern on a semiconductor substrate (vicinity of the opening), Cu seed film Thus, annealing can be performed without causing a phenomenon that the underlying film for diffusion barrier is exposed, and the reliability as a copper wiring can be ensured, and the adhesion can be improved.
[Brief description of the drawings]
FIG. 1 is a diagram showing a schematic configuration of an example of a copper wiring film forming apparatus used in a copper wiring film forming method of the present invention.
FIG. 2 is a diagram for explaining a process of a copper wiring film forming method according to the present invention, in which (a) is formed on a semiconductor substrate, and a base film for a diffusion barrier is formed on an insulating film provided with a recess. (B) is a partial cross-sectional view for explaining a state in which heat treatment is performed after the step shown in FIG. 2 (a), and (c) is a first copper. FIG. 2D is a partial cross-sectional view illustrating a state where a film is formed, FIG. 2D is a partial cross-sectional view illustrating a state in which heat treatment is performed after the step illustrated in FIG. 2C, and FIG. The partial sectional view in the state where the film was formed.
FIG. 3 (a) Cu seed film formed by the copper wiring film forming method of the present invention (after the ultimate vacuum of the annealing chamber is set to a vacuum state of 1 × 10 ⁻⁴ Pa, annealing of the base film for diffusion barrier is started. SEM photograph of the surface after annealing of the Cu seed film in (1), (b) Cu seed film not subjected to the copper wiring film forming method of the present invention (diffusion after the ultimate vacuum of the annealing chamber is set to a vacuum state of 1 × 10 ⁻³ Pa) SEM photograph of the surface after Cu seed film annealing in (begin annealing of barrier underlayer).
FIG. 4 is a graph showing an experimental result of an annealing chamber ultimate pressure before starting the diffusion barrier underlayer annealing and a hole upper corner coverage after the Cu seed film annealing.
[Explanation of symbols]
1 Semiconductor substrate 2 Insulating film 3 TiN film (Diffusion barrier base film)
4 First copper film 5 Second copper film 11 Diffusion barrier TiNCVD chambers 11a, 12a, 13a Vacuum exhaust mechanism 12 Copper film CVD chamber 13 Annealing chamber 14 Separation chamber (transfer chamber)
15, 16 Load / unload lock module 17 Gate valve 18 Transfer robot (substrate transfer mechanism)
19 Board 20 Controller

Claims (1)

A base film for diffusion barrier is formed on an insulating film formed on a semiconductor substrate and provided with a recess, and a first copper film is formed thereon by CVD, and the first copper film is used as an electrode. In the copper wiring film forming method of forming the second copper film by the electrolytic plating method as described above,
Between the step of forming the diffusion barrier base film and the first copper film forming step, the diffusion barrier base film is heated to a vacuum state of 1 × 10 ⁻⁴ Pa or less in ultimate vacuum. With
A step of heating the first copper film in a temperature range of 200 to 500 ° C. and a pressure atmosphere of 10 KPa or more is performed between the first copper film forming step and the second copper film forming step. A copper wiring film forming method.

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