JP4322095B2 - RF power amplifier module - Google Patents

Description

  The present invention relates to a high-frequency power amplifier module, and more particularly to a technique that is effective when applied to a high-frequency power amplifier module that is mounted on a mobile communication device and requires stability of output power.

  In recent years, mobile communication devices (so-called mobile phones) typified by various communication methods have become widespread worldwide. Examples of this communication method include a GSM (Global System for Mobile Communications) method in Europe, a PDC (Personal Digital Cellular) method in Japan, and a CDMA (Code Division Multiple Access) method in North America. As next-generation communication systems, for example, EDGE (Enhanced Data Rates for GSM Evolution) system, W (Wideband) -CDMA system, and cdma2000 system have been proposed.

  Such a cellular phone mainly includes a portion that performs baseband processing and a portion that performs wireless processing. At the time of transmission, this radio processing performs signal modulation, amplification of the modulated signal, and the like, and a high frequency power amplifier module is used to amplify the modulated signal. The high-frequency power amplifier module includes, for example, a multistage transistor in which MOS transistors, GaAs transistors, and the like are sequentially connected, and a bias circuit that applies a bias current and a bias voltage to the multistage transistor.

  By the way, according to a study by the present inventor, the high-frequency power amplifier module as described in the background art has a configuration as shown in FIG. 4, for example. FIG. 4 is a circuit diagram showing an example of the configuration of a conventional high-frequency power amplifier module studied as a premise of the present invention. The high-frequency power amplifier module shown in FIG. 4 includes a power amplification unit having a three-stage configuration of 1st (first stage), 2nd (second stage), and 3rd (third stage), and a bias current to those power amplification parts. And a bias circuit 40 to be supplied.

  Each power amplifying unit includes MOS transistors QN1, QN2, and QN3 that are supplied with the power supply voltage Vdd and perform power amplification, and MOS transistors QN11, QN21, and QN31 that form current mirror circuits for these transistors, respectively. . The bias circuit 40 supplies constant currents I1, I2, and I3 that do not depend on temperature, power supply voltage Vdd, and the like to the MOS transistors QN11, QN21, and QN31, respectively.

  Thereby, in the MOS transistors QN1, QN2, and QN3, a bias current is applied in accordance with the ratio of the transistor sizes of two transistors (for example, the MOS transistor QN1 and the MOS transistor QN11) constituting the current mirror circuit. When a high frequency signal is input from the signal input terminal Pin, the MOS transistors QN1, QN2, and QN3 perform power amplification in order of 1st, 2nd, and 3rd according to the bias current, and output the amplified high frequency signal as a signal. Output from terminal Pout.

  In such a high-frequency power amplifier module, MOS transistors QN1, QN2, and QN3 have recently been used with short gate lengths in order to improve high-frequency characteristics. However, when the gate length is shortened, as shown in FIG. 5, a phenomenon (so-called channel length modulation effect) that the source-drain saturation current Ids increases by ΔIds according to the source-drain voltage Vds appears remarkably. Come.

  This channel length modulation effect affects the current characteristics of the current mirror circuit, thereby affecting the power amplification characteristics of the high-frequency power amplifier module. That is, the two transistors constituting the current mirror circuit operate so that a saturation current flows, but only the MOS transistors QN1, QN2, and QN3 change the saturation current depending on the power supply voltage. For this reason, an error depending on the power supply voltage occurs between the ratio of the saturation current set by the size ratio of the transistors constituting the current mirror circuit and the ratio of the saturation current that actually flows. This causes a setting error in the bias current flowing through the MOS transistors QN1, QN2, and QN3, and affects the power amplification characteristics.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a high frequency power amplifier module having stable power amplification characteristics regardless of fluctuations in power supply voltage.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The high-frequency power amplifier module according to the present invention includes a semiconductor amplifying element that performs power amplification by being supplied with a power supply voltage, and means for supplying a bias current to the semiconductor amplifying element. The means for supplying the bias current includes a first transistor that forms a current mirror circuit with the semiconductor amplifying element, a means for generating a constant current independent of fluctuations in the power supply voltage, and the power supply voltage. Means for generating a first current for compensating for a bias current fluctuation in the semiconductor amplifying element caused by the fluctuation of the first current, and a second current obtained by subtracting the first current from the constant current to the first transistor. Means for supplying the bias current to the semiconductor amplifying element by supplying the second current to the first transistor.

  Thus, for example, when power amplification is performed by a MOS transistor, for example, an increase in saturation current due to the channel length modulation effect in the MOS transistor can be compensated by reducing the current supplied to the MOS transistor. It becomes possible to stabilize the current.

  Here, the means for generating the first current includes, for example, a second transistor having the same current fluctuation characteristics as the semiconductor amplifying element and supplied with the same power supply voltage as the semiconductor amplifying element, The current fluctuation in the second transistor caused by the fluctuation of the power supply voltage is extracted, and the first current is generated based on the extracted current fluctuation.

  That is, it is possible to extract the current fluctuation in the semiconductor amplifying element by regarding that the current fluctuation in the semiconductor amplifying element is equal to the current fluctuation in the second transistor. If the extracted current fluctuation is used, the first current can be generated.

  Further, the means for generating the first current includes, for example, a function of supplying the constant current to the second transistor by a current mirror circuit, and subtracting the constant current from the current flowing through the second transistor. A function of extracting the current fluctuation amount; and a function of adjusting a size of the extracted current fluctuation amount using a size ratio of a current mirror circuit, and the adjusted current fluctuation amount is the first It is a current.

  Accordingly, the first current can be a current obtained by further adjusting the current fluctuation in the second transistor according to various conditions.

  The semiconductor amplifying element described above is more useful when it is a short channel MOS transistor.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  By compensating for the current fluctuation that increases due to the channel length modulation effect in the semiconductor amplifying element by reducing the current supplied to the semiconductor amplifying element, a stable bias current can be obtained in the semiconductor amplifying element regardless of fluctuations in the power supply voltage. It becomes possible to flow. As a result, it is possible to realize a high-frequency power amplifier module having stable power amplification characteristics regardless of fluctuations in the power supply voltage.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  FIG. 1 is a circuit diagram showing an example of the configuration of a high-frequency power amplifier module according to an embodiment of the present invention.

  The high-frequency power amplifier module shown in FIG. 1 shows a configuration in, for example, a 3rd power amplifier in the circuit shown in FIG. 4 described above. The configuration includes, for example, the first, second, and third current mirror circuits 1, 2, 3, in addition to the fourth current mirror circuit 4 having the same MOS transistor as that in the 3rd power amplifier of FIG. The three constant current sources 5a, 5b and 5c for supplying the same constant current I3, the choke coil L3 as an inductance element, and AC coupling capacitors C3 and C4, respectively. The constant current sources 5a, 5b and 5c mean the current from the bias circuit 40 shown in FIG. 4, and can supply a constant constant current I3 regardless of temperature and power supply voltage fluctuations.

  The fourth current mirror circuit 4 forms a current mirror circuit between an n-channel MOS transistor QN3 (semiconductor amplifying element) that performs power amplification by setting a source terminal to a ground potential (GND), and a MOS transistor It has a MOS transistor QN31 (first transistor) that supplies a bias current Ibias to the transistor QN3, and a resistance element R provided between the gate terminal of the MOS transistor QN3 and the gate terminal of the MOS transistor QN31.

  Here, the high frequency signal is input from the signal input terminal Pin2, only the AC component is passed through the AC coupling capacitor C3, and is input to the gate terminal of the MOS transistor QN3. The MOS transistor QN3 performs power amplification according to the value of the bias current Ibias. The high frequency signal subjected to the power amplification is output from the signal output terminal Pout via the AC coupling capacitor C4. At this time, the resistance element R plays a role of preventing a high-frequency signal input to the gate terminal of the MOS transistor QN3 from leaking to the MOS transistor QN31 and changing the characteristics of the current mirror circuit due to the influence.

  The first current mirror circuit 1 includes an n-channel MOS transistor QN311 (third transistor) and an n-channel MOS transistor QN312 (second transistor). A constant current I3 is supplied to the MOS transistor QN311 from the constant current source 5a (first constant current source), whereby a current I3a corresponding to the size ratio of the MOS transistor QN311 and the MOS transistor QN312 is supplied to the MOS transistor QN312 side. Flowing.

  The second current mirror circuit 2 includes a p-channel MOS transistor QP311 (fourth transistor) and a p-channel MOS transistor QP312 (fifth transistor). The drain terminals (first nodes) of the MOS transistor QP311 and the MOS transistor QN312 are connected in common, whereby the current I3a is supplied to the MOS transistor QP311. A current I3b corresponding to the size ratio of the MOS transistor QP311 and the MOS transistor QP312 flows through the MOS transistor QP312.

  The third current mirror circuit 3 includes an n-channel MOS transistor QN313 (sixth transistor) and an n-channel MOS transistor QN314 (seventh transistor). A current I3c is supplied to the MOS transistor QN313 by a node (second node) provided between the MOS transistor QP312 and the constant current source 5b (second constant current source). The current I3c is a value obtained by subtracting the constant current I3 from the current I3b. When the current I3c is supplied, a current I3d corresponding to the size ratio of the MOS transistor QN313 and the MOS transistor QN314 flows to the MOS transistor QN314 side.

  Further, the current I3e is supplied to the MOS transistor QN31 of the fourth current mirror circuit 4 by a node provided between the constant current source 5c and the MOS transistor QN314. The current I3e is a value obtained by subtracting the current I3d from the constant current I3. When the current I3e is supplied, the bias current Ibias is generated in the MOS transistor QN3 according to the size ratio of the MOS transistor QN31 and the MOS transistor QN3.

  Note that the size (channel width W / channel length L) of each transistor constituting each current mirror circuit described above is, for example, that the MOS transistors QN311, QN312 and QN31 are both 100 μm / 0.3 μm, and the MOS transistors QP311, QP312 and QN313. Are 100 μm / 5 μm, the MOS transistor QN314 is (k × 100 μm) / 5 μm (k is a variable), and the MOS transistor QN3 is (n × 100 μm) /0.3 μm (n is a variable).

  Thus, the transistor size ratio in the first and second current mirror circuits 1 and 2 is 1: 1, the transistor size ratio in the third current mirror circuit 3 is 1: k, and the fourth current The transistor size ratio in the mirror circuit 4 is 1: n. The MOS transistors QN311 and QN312 in the first current mirror circuit 1 and the MOS transistors QN31 and QN3 in the fourth current mirror circuit 4 are both short-channel MOS transistors, for example, LD-MOS ( Laterally Diffused-MOS) or the like is used.

  In the first to fourth current mirror circuits, paired transistors (for example, the MOS transistor QN311 and the MOS transistor QN312) are provided in the vicinity in the layout. As a result, variations in electrical characteristics due to manufacturing variations and temperature changes can be offset between the pair of transistors, and the characteristics of the current mirror circuit can be stabilized.

  The high-frequency power amplifier module having such a configuration can generate a constant bias current Ibias regardless of fluctuations in the power supply voltage Vdd by the operation described below. In this description, first, the flow of operation will be briefly described, and then detailed description will be given using specific equations.

  First, the MOS transistor QN312 in the first current mirror circuit 1 having the same channel length modulation coefficient (current variation characteristic) as the MOS transistor QN3 that performs power amplification and supplied with the same power supply voltage Vdd is fixed. Constant current I3 is supplied by current source 5a and MOS transistor QN311.

  Next, by using the second current mirror circuit 2 and the constant current source 5b that generates the constant current I3, the channel length in the MOS transistor QN312 is subtracted by subtracting the constant current I3 from the current that actually flows in the MOS transistor QN312. Only current fluctuations increased due to the modulation effect are extracted. The extracted current fluctuation becomes the current I3c.

  Then, the magnitude of the extracted current fluctuation is adjusted by the transistor size ratio (1: k) in the third current mirror circuit 3 to generate a current I3d (first current). The MOS transistor QN31 in the fourth current mirror circuit 4 has a current I3e (second current) obtained by subtracting the adjusted current fluctuation (current I3d) from the constant current I3 supplied by the constant current source 5c. Supplied. By causing this current I3e to flow through MOS transistor QN31, bias current Ibias is supplied in MOS transistor QN3.

  In other words, the circuit shown in FIG. 1 is a circuit that compensates for the bias current fluctuation that increases in the MOS transistor QN3 due to the channel length modulation effect by reducing the current I3e supplied to the MOS transistor QN31. The magnitude of the decrease in the current I3e is determined by the current I3d. The current I3d has the same channel length modulation coefficient as the MOS transistor QN3, and the current in the MOS transistor QN312 supplied with the same power supply voltage Vdd. The value reflects the fluctuation.

  The above operation flow will be described in detail using equations as follows.

  In the first current mirror circuit 1, the size ratio of the MOS transistor QN311 and the MOS transistor QN312 is 1: 1, and a channel length modulation effect is generated in the MOS transistor QN312 to which the power supply voltage Vdd is supplied. The value is expressed by the following formula.

I3a = I3 (1 + λVdd) (1)
Here, λ is a channel length modulation coefficient in the MOS transistor QN312 and the voltage between the source terminal and the drain terminal of the MOS transistor QN312 is approximated to the power supply voltage Vdd.

  The current I3a is transmitted to the MOS transistor QP312 side by the second current mirror circuit 2, and the current I3b becomes I3b = I3a. Therefore, the current I3c input to the third current mirror circuit 3 is expressed by the following equation.

I3c = I3b−I3 = I3 × λVdd (2)
When the current I3c is input to the third current mirror circuit 3, since the size ratio of the MOS transistor QN313 and the MOS transistor QN314 is 1: k, the current I3d on the MOS transistor QN314 side is expressed by the following equation.

I3d = k × I3 × λVdd (3)
Therefore, the current I3e input to the fourth current mirror circuit 4 is expressed by the following equation.

I3e = I3-I3d = I3-kI3λVdd (4)
In the fourth current mirror circuit 4, the size ratio of the MOS transistor QN31 and the MOS transistor QN3 is 1: n, and a channel length modulation effect is generated in the MOS transistor QN3 to which the power supply voltage Vdd is supplied. The channel length modulation coefficient at this time is equal to the channel length modulation coefficient λ of the QN 312 because the structure of the MOS transistor QN3 is such that n MOS transistors QN312 are connected in parallel. Therefore, the bias current Ibias supplied to the MOS transistor QN3 is expressed by the following equation.

Ibias = nI3e (1 + λVdd)
= NI3 (1-kλVdd) (1 + λVdd) (5)
Here, in Equation (5), if the fluctuation range of the coefficient value (1-kλVdd) (1 + λVdd) is small with respect to the fluctuation of the power supply voltage Vdd, an approximately constant bias current can be supplied regardless of the power supply voltage. Become. An example of the relationship between the power supply voltage Vdd and the coefficient value (1-kλVdd) (1 + λVdd) is shown in FIG.

  FIG. 2 is a graph showing an example of an increasing tendency of the bias current with respect to the fluctuation of the power supply voltage in the high-frequency power amplifier module according to the embodiment of the present invention, including the case of the related art. 2 also shows the case of the prior art in FIG. 4 described above, and the coefficient value in this prior art is (1 + λVdd). Further, the value of the channel length modulation coefficient λ is assumed to be 0.1, and in FIG. 1, the value of k, which is the transistor size ratio of the third current mirror circuit 3, is set to 0.75. Note that the value of k is set to an optimum value according to the use range of the power supply voltage Vdd, as can be seen from the equation (5).

  In FIG. 2, for example, the fluctuation range of the coefficient value (1 + λVdd) in the conventional technique is about 10% ((1.4−1.3) / 1) between 3 V and 4 V, which is the use range of the power supply voltage. On the other hand, the fluctuation range of the coefficient value (1−kλVdd) (1 + λVdd) in the present invention is an extremely small value, which is about 3%. As the power supply voltage is used in a wider range, these disparities become even greater.

  As described above, as can be seen from the above description, by using the high-frequency power amplifier module of FIG. 1 which is an embodiment of the present invention, a constant bias current can be supplied regardless of fluctuations in the power supply voltage. As a result, stable power amplification characteristics can be obtained regardless of fluctuations in the power supply voltage. In FIG. 1, the configuration example in the 3rd power amplification unit in FIG. 4, which is the prior art, is shown, but the present invention is not limited to the 3rd power amplification unit and can be similarly applied to the 1st and 2nd power amplification units. .

  Further, although the MOS transistors QN311, QN312, QN31, and QN3 in FIG. 1 have channel lengths of 0.3 μm, the channel length modulation effect becomes more prominent as the channel lengths become shorter, and the power amplification characteristics are also improved. It becomes more unstable. Accordingly, it is considered that the effect of the present invention becomes more important as the MOS transistor has a shorter channel.

  By the way, the high-frequency power amplifier module according to the embodiment of the present invention described so far is particularly useful when applied to a mobile phone or the like. FIG. 3 shows an example of the configuration of a mobile phone using the high frequency power amplifier module according to one embodiment of the present invention.

  The mobile phone shown in FIG. 3 includes, for example, an RF (Radio Frequency) including an antenna 21 for signal radio wave transmission / reception, an antenna transmission / reception switch 22 connected to the antenna 21, and a baseband processing circuit 23 having a function of controlling transmission / reception. ) A transmission circuit 26 including a linear circuit 24, the above-described high-frequency power amplifier module (PA: Power Amplifier) 25, etc., and having a function of modulating a transmission signal, and a reception system circuit having a function of demodulating a reception signal 27 or the like.

  The antenna transmission / reception switch 22 includes, for example, a transmission / reception switch 22a for switching between transmission and reception, a capacitor 22b connected to the reception side, a filter 22c connected to the transmission side, and the like. The transmission / reception selector switch 22a of the antenna transmission / reception selector 22 is controlled to be switched between the transmission side and the reception side by a control signal from the baseband processing circuit 23, for example.

  The baseband processing circuit 23 includes, for example, a not-shown DSP (Digital Signal Processor), a microprocessor, and a semiconductor memory. The baseband processing circuit 23 converts an audio signal into a baseband signal at the time of transmission and converts a received signal into an audio signal at the time of reception. And other functions for generating various control signals.

  The transmission system circuit 26 is connected to, for example, the baseband processing circuit 23, and modulates the IQ signal by a VCO (Voltage Controlled Oscillator) 26a that generates an oscillation signal in a plurality of frequency bands, and a carrier wave based on the oscillation signal from the VCO 26a. A mixer (MIX) 26b, a CPU 26c connected to the RF linear circuit 24, an APC (Automatic Power Control) 26d that controls power by applying output feedback based on the arithmetic processing of the CPU 26c, and an APC 26d for the modulation signal from the mixer 26b AGC (Automatic Gain Control) 26e for controlling the gain based on the feedback control, and the above-described high-frequency power amplifier module for amplifying the output signal from the AGC 26e. Lumpur 25, and the like coupler 26f of the high-frequency power amplifier module connected output level detection 25.

  The reception system circuit 27 is connected to the capacitor 22b of the antenna transmission / reception switch 22, for example, and includes a filter 27a that removes unnecessary waves from the received signal, an LNA (Low Noise Amplifier) 27b connected to the filter 27a, and the like.

  The output power at the time of transmission in the mobile phone needs to be changed according to the distance from the base station due to problems such as radio wave interference. Therefore, the APC 26d outputs a control signal Vapc for setting output power to the AGC 26e and the high frequency power amplifier module 25. The high frequency power amplifier module 25 sets a bias current or the like according to the control signal Vapc and performs power amplification. The output fluctuation of the high frequency power amplifier module 25 is detected by the coupler 26f, and the detected value is fed back to the APC 26d.

  In such a mobile phone, the power supply voltage of the high frequency power amplifier module is supplied by a battery. However, the battery voltage tends to decrease with time after charging. In the high-frequency power amplifier module in the prior art, it is possible that the bias current changes as the battery voltage decreases, and the output power varies. This variation in output power can be suppressed to some extent by feedback from the coupler 26f to the APC 26d, but problems such as insufficient performance of the coupler 26f and an increased burden on the APC 26d were considered. .

  Therefore, when the high-frequency power amplifier module according to the embodiment of the present invention is used, the output power can be stabilized against the fluctuation of the battery voltage by itself, so that such a problem can be solved. become. Also, from the viewpoint of general product specifications of the high-frequency power amplifier module, it is a useful technique to provide stable power characteristics regardless of fluctuations in the power supply voltage.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the description so far, the channel length modulation effect of the MOS transistor has been described as an example, but the same configuration can be applied not only to the MOS transistor but also to the Early effect of the bipolar transistor. Further, the configuration as shown in FIG. 1 is not limited to the high frequency power amplifier module, but can be applied as a method for further stabilizing the current characteristics of a general current mirror circuit.

1 is a circuit diagram showing an example of the configuration of a high-frequency power amplifier module according to an embodiment of the present invention. 6 is a graph showing an example of a tendency of an increase in bias current with respect to fluctuations in power supply voltage, including the case of the prior art, in the high frequency power amplifier module according to the embodiment of the present invention. 1 is a block diagram showing an example of a configuration of a mobile phone using the high frequency power amplifier module according to one embodiment of the present invention. 1 is a circuit diagram showing an example of the configuration of a conventional high-frequency power amplifier module studied as a premise of the present invention. It is a figure explaining the channel length modulation effect used as the subject of a prior art in the conventional high frequency power amplifier module examined as a premise of the present invention.

Explanation of symbols

1, 2, 3, 4 Current mirror circuit 5a, 5b, 5c Constant current source 21 Antenna 22 Antenna transmission / reception switch 22a Transmission / reception switch 22b Capacitor 22c, 27a Filter 23 Baseband processing circuit 24 RF linear circuit 25 PA
26 Transmission System 26a VCO
26b mixer 26c CPU
26d APC
26e AGC
26f coupler 27 receiving system circuit 27a filter 27b LNA
40 Bias circuit C1, C2, C3, C4 AC coupling capacitor L1, L2, L3 Choke coil R Resistance element QN1, QN2, QN3, QN11, QN21, QN31, QN311, QN312, QN313, QN314, QP311, QP312 MOS transistor Pin, Pin2 signal input terminal Pout signal output terminal

Claims (5)

A high-frequency power amplifier module having a semiconductor amplifying element supplied with a power supply voltage and performing power amplification, and means for supplying a bias current to the semiconductor amplifying element;
The means for supplying the bias current comprises:
A first transistor constituting a current mirror circuit with the semiconductor amplifying element;
Means for generating a constant current independent of fluctuations in the power supply voltage;
Means for generating a first current that compensates for a bias current fluctuation in the semiconductor amplifying element caused by fluctuations in the power supply voltage;
Means for supplying a second current obtained by subtracting the first current from the constant current to the first transistor;
The high frequency power amplifier module according to claim 1, wherein the bias current is supplied to the semiconductor amplifying element by supplying the second current to the first transistor. The high frequency power amplifier module according to claim 1,
The means for generating the first current is:
A second transistor having the same current fluctuation characteristic as that of the semiconductor amplifying element and supplied with the same power supply voltage as that of the semiconductor amplifying element, and a current fluctuation in the second transistor caused by the fluctuation of the power supply voltage; A high frequency power amplifier module that extracts a minute and generates the first current based on the extracted current fluctuation. The high frequency power amplifier module according to claim 2,
The means for generating the first current is:
A function of supplying the constant current to the second transistor by a current mirror circuit;
A function of extracting the current fluctuation by subtracting the constant current from the current flowing in the second transistor;
A function of adjusting the size of the extracted current fluctuation using a size ratio of a current mirror circuit;
The high-frequency power amplifier module according to claim 1, wherein the adjusted current fluctuation is the first current. The high frequency power amplifier module according to claim 2,
The means for generating the first current is:
A first current mirror circuit composed of a third transistor and the second transistor;
A second current mirror circuit composed of a fourth transistor and a fifth transistor;
A third current mirror circuit composed of a sixth transistor and a seventh transistor;
A first constant current source and a second constant current source for generating the constant current;
The third transistor is provided between the first constant current source and a ground potential, and the second transistor is provided between a first node and the ground potential, and the fourth transistor The transistor is provided between the power supply voltage and the first node, the fifth transistor is provided between the power supply voltage and the second constant current source, and the sixth transistor is , Provided between a second node between the fifth transistor and the second constant current source and the ground potential, the second node from the current flowing through the fifth transistor A current obtained by subtracting the constant current from a second constant current source is supplied to the sixth transistor, and the first current is generated from the seventh transistor by the third current mirror circuit. Characteristic high circumference Power amplifier module. The high frequency power amplifier module according to any one of claims 1 to 4,
2. The high frequency power amplifier module according to claim 1, wherein the semiconductor amplifying element is a short channel MOS transistor.

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